Add qemu 2.4.0
[kvmfornfv.git] / qemu / tcg / s390 / tcg-target.h
1 /*
2  * Tiny Code Generator for QEMU
3  *
4  * Copyright (c) 2009 Ulrich Hecht <uli@suse.de>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 #ifndef TCG_TARGET_S390 
25 #define TCG_TARGET_S390 1
26
27 #define TCG_TARGET_INSN_UNIT_SIZE 2
28 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
29
30 typedef enum TCGReg {
31     TCG_REG_R0 = 0,
32     TCG_REG_R1,
33     TCG_REG_R2,
34     TCG_REG_R3,
35     TCG_REG_R4,
36     TCG_REG_R5,
37     TCG_REG_R6,
38     TCG_REG_R7,
39     TCG_REG_R8,
40     TCG_REG_R9,
41     TCG_REG_R10,
42     TCG_REG_R11,
43     TCG_REG_R12,
44     TCG_REG_R13,
45     TCG_REG_R14,
46     TCG_REG_R15
47 } TCGReg;
48
49 #define TCG_TARGET_NB_REGS 16
50
51 /* optional instructions */
52 #define TCG_TARGET_HAS_div2_i32         1
53 #define TCG_TARGET_HAS_rot_i32          1
54 #define TCG_TARGET_HAS_ext8s_i32        1
55 #define TCG_TARGET_HAS_ext16s_i32       1
56 #define TCG_TARGET_HAS_ext8u_i32        1
57 #define TCG_TARGET_HAS_ext16u_i32       1
58 #define TCG_TARGET_HAS_bswap16_i32      1
59 #define TCG_TARGET_HAS_bswap32_i32      1
60 #define TCG_TARGET_HAS_not_i32          0
61 #define TCG_TARGET_HAS_neg_i32          1
62 #define TCG_TARGET_HAS_andc_i32         0
63 #define TCG_TARGET_HAS_orc_i32          0
64 #define TCG_TARGET_HAS_eqv_i32          0
65 #define TCG_TARGET_HAS_nand_i32         0
66 #define TCG_TARGET_HAS_nor_i32          0
67 #define TCG_TARGET_HAS_deposit_i32      1
68 #define TCG_TARGET_HAS_movcond_i32      1
69 #define TCG_TARGET_HAS_add2_i32         1
70 #define TCG_TARGET_HAS_sub2_i32         1
71 #define TCG_TARGET_HAS_mulu2_i32        0
72 #define TCG_TARGET_HAS_muls2_i32        0
73 #define TCG_TARGET_HAS_muluh_i32        0
74 #define TCG_TARGET_HAS_mulsh_i32        0
75 #define TCG_TARGET_HAS_trunc_shr_i32    0
76
77 #define TCG_TARGET_HAS_div2_i64         1
78 #define TCG_TARGET_HAS_rot_i64          1
79 #define TCG_TARGET_HAS_ext8s_i64        1
80 #define TCG_TARGET_HAS_ext16s_i64       1
81 #define TCG_TARGET_HAS_ext32s_i64       1
82 #define TCG_TARGET_HAS_ext8u_i64        1
83 #define TCG_TARGET_HAS_ext16u_i64       1
84 #define TCG_TARGET_HAS_ext32u_i64       1
85 #define TCG_TARGET_HAS_bswap16_i64      1
86 #define TCG_TARGET_HAS_bswap32_i64      1
87 #define TCG_TARGET_HAS_bswap64_i64      1
88 #define TCG_TARGET_HAS_not_i64          0
89 #define TCG_TARGET_HAS_neg_i64          1
90 #define TCG_TARGET_HAS_andc_i64         0
91 #define TCG_TARGET_HAS_orc_i64          0
92 #define TCG_TARGET_HAS_eqv_i64          0
93 #define TCG_TARGET_HAS_nand_i64         0
94 #define TCG_TARGET_HAS_nor_i64          0
95 #define TCG_TARGET_HAS_deposit_i64      1
96 #define TCG_TARGET_HAS_movcond_i64      1
97 #define TCG_TARGET_HAS_add2_i64         1
98 #define TCG_TARGET_HAS_sub2_i64         1
99 #define TCG_TARGET_HAS_mulu2_i64        1
100 #define TCG_TARGET_HAS_muls2_i64        0
101 #define TCG_TARGET_HAS_muluh_i64        0
102 #define TCG_TARGET_HAS_mulsh_i64        0
103
104 extern bool tcg_target_deposit_valid(int ofs, int len);
105 #define TCG_TARGET_deposit_i32_valid  tcg_target_deposit_valid
106 #define TCG_TARGET_deposit_i64_valid  tcg_target_deposit_valid
107
108 /* used for function call generation */
109 #define TCG_REG_CALL_STACK              TCG_REG_R15
110 #define TCG_TARGET_STACK_ALIGN          8
111 #define TCG_TARGET_CALL_STACK_OFFSET    160
112
113 #define TCG_TARGET_EXTEND_ARGS 1
114
115 enum {
116     TCG_AREG0 = TCG_REG_R10,
117 };
118
119 static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
120 {
121 }
122
123 #endif