qemu/target-ppc/mmu-hash64.h

   1 #if !defined (__MMU_HASH64_H__)
   2 #define __MMU_HASH64_H__
   3
   4 #ifndef CONFIG_USER_ONLY
   5
   6 #ifdef TARGET_PPC64
   7 void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
   8 int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
   9 hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
  10 int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
  11                                 int mmu_idx);
  12 void ppc_hash64_store_hpte(CPUPPCState *env, target_ulong index,
  13                            target_ulong pte0, target_ulong pte1);
  14 #endif
  15
  16 /*
  17  * SLB definitions
  18  */
  19
  20 /* Bits in the SLB ESID word */
  21 #define SLB_ESID_ESID           0xFFFFFFFFF0000000ULL
  22 #define SLB_ESID_V              0x0000000008000000ULL /* valid */
  23
  24 /* Bits in the SLB VSID word */
  25 #define SLB_VSID_SHIFT          12
  26 #define SLB_VSID_SHIFT_1T       24
  27 #define SLB_VSID_SSIZE_SHIFT    62
  28 #define SLB_VSID_B              0xc000000000000000ULL
  29 #define SLB_VSID_B_256M         0x0000000000000000ULL
  30 #define SLB_VSID_B_1T           0x4000000000000000ULL
  31 #define SLB_VSID_VSID           0x3FFFFFFFFFFFF000ULL
  32 #define SLB_VSID_PTEM           (SLB_VSID_B | SLB_VSID_VSID)
  33 #define SLB_VSID_KS             0x0000000000000800ULL
  34 #define SLB_VSID_KP             0x0000000000000400ULL
  35 #define SLB_VSID_N              0x0000000000000200ULL /* no-execute */
  36 #define SLB_VSID_L              0x0000000000000100ULL
  37 #define SLB_VSID_C              0x0000000000000080ULL /* class */
  38 #define SLB_VSID_LP             0x0000000000000030ULL
  39 #define SLB_VSID_ATTR           0x0000000000000FFFULL
  40 #define SLB_VSID_LLP_MASK       (SLB_VSID_L | SLB_VSID_LP)
  41 #define SLB_VSID_4K             0x0000000000000000ULL
  42 #define SLB_VSID_64K            0x0000000000000110ULL
  43
  44 /*
  45  * Hash page table definitions
  46  */
  47
  48 #define HPTES_PER_GROUP         8
  49 #define HASH_PTE_SIZE_64        16
  50 #define HASH_PTEG_SIZE_64       (HASH_PTE_SIZE_64 * HPTES_PER_GROUP)
  51
  52 #define HPTE64_V_SSIZE_SHIFT    62
  53 #define HPTE64_V_AVPN_SHIFT     7
  54 #define HPTE64_V_AVPN           0x3fffffffffffff80ULL
  55 #define HPTE64_V_AVPN_VAL(x)    (((x) & HPTE64_V_AVPN) >> HPTE64_V_AVPN_SHIFT)
  56 #define HPTE64_V_COMPARE(x, y)  (!(((x) ^ (y)) & 0xffffffffffffff80ULL))
  57 #define HPTE64_V_LARGE          0x0000000000000004ULL
  58 #define HPTE64_V_SECONDARY      0x0000000000000002ULL
  59 #define HPTE64_V_VALID          0x0000000000000001ULL
  60
  61 #define HPTE64_R_PP0            0x8000000000000000ULL
  62 #define HPTE64_R_TS             0x4000000000000000ULL
  63 #define HPTE64_R_KEY_HI         0x3000000000000000ULL
  64 #define HPTE64_R_RPN_SHIFT      12
  65 #define HPTE64_R_RPN            0x0ffffffffffff000ULL
  66 #define HPTE64_R_FLAGS          0x00000000000003ffULL
  67 #define HPTE64_R_PP             0x0000000000000003ULL
  68 #define HPTE64_R_N              0x0000000000000004ULL
  69 #define HPTE64_R_G              0x0000000000000008ULL
  70 #define HPTE64_R_M              0x0000000000000010ULL
  71 #define HPTE64_R_I              0x0000000000000020ULL
  72 #define HPTE64_R_W              0x0000000000000040ULL
  73 #define HPTE64_R_WIMG           0x0000000000000078ULL
  74 #define HPTE64_R_C              0x0000000000000080ULL
  75 #define HPTE64_R_R              0x0000000000000100ULL
  76 #define HPTE64_R_KEY_LO         0x0000000000000e00ULL
  77 #define HPTE64_R_KEY(x)         ((((x) & HPTE64_R_KEY_HI) >> 60) | \
  78                                  (((x) & HPTE64_R_KEY_LO) >> 9))
  79
  80 #define HPTE64_V_1TB_SEG        0x4000000000000000ULL
  81 #define HPTE64_V_VRMA_MASK      0x4001ffffff000000ULL
  82
  83
  84 extern bool kvmppc_kern_htab;
  85 uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index);
  86 void ppc_hash64_stop_access(uint64_t token);
  87
  88 static inline target_ulong ppc_hash64_load_hpte0(CPUPPCState *env,
  89                                                  uint64_t token, int index)
  90 {
  91     CPUState *cs = CPU(ppc_env_get_cpu(env));
  92     uint64_t addr;
  93
  94     addr = token + (index * HASH_PTE_SIZE_64);
  95     if (env->external_htab) {
  96         return  ldq_p((const void *)(uintptr_t)addr);
  97     } else {
  98         return ldq_phys(cs->as, addr);
  99     }
 100 }
 101
 102 static inline target_ulong ppc_hash64_load_hpte1(CPUPPCState *env,
 103                                                  uint64_t token, int index)
 104 {
 105     CPUState *cs = CPU(ppc_env_get_cpu(env));
 106     uint64_t addr;
 107
 108     addr = token + (index * HASH_PTE_SIZE_64) + HASH_PTE_SIZE_64/2;
 109     if (env->external_htab) {
 110         return  ldq_p((const void *)(uintptr_t)addr);
 111     } else {
 112         return ldq_phys(cs->as, addr);
 113     }
 114 }
 115
 116 typedef struct {
 117     uint64_t pte0, pte1;
 118 } ppc_hash_pte64_t;
 119
 120 #endif /* CONFIG_USER_ONLY */
 121
 122 #endif /* !defined (__MMU_HASH64_H__) */