Add qemu 2.4.0
[kvmfornfv.git] / qemu / roms / u-boot / board / esd / vme8349 / caddy.c
1 /*
2  * caddy.c -- esd VME8349 support for "missing" access modes in TSI148.
3  * Copyright (c) 2009 esd gmbh.
4  *
5  * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #include <common.h>
11 #include <ioports.h>
12 #include <mpc83xx.h>
13 #include <asm/mpc8349_pci.h>
14 #include <pci.h>
15 #include <asm/mmu.h>
16 #include <asm/io.h>
17
18 #include "caddy.h"
19
20 static struct caddy_interface *caddy_interface;
21
22 void generate_answer(struct caddy_cmd *cmd, uint32_t status, uint32_t *result)
23 {
24         struct caddy_answer *answer;
25         uint32_t ptr;
26
27         answer = &caddy_interface->answer[caddy_interface->answer_in];
28         memset((void *)answer, 0, sizeof(struct caddy_answer));
29         answer->answer = cmd->cmd;
30         answer->issue = cmd->issue;
31         answer->status = status;
32         memcpy(answer->par, result, 5 * sizeof(result[0]));
33         ptr = caddy_interface->answer_in + 1;
34         ptr = ptr & (ANSWER_SIZE - 1);
35         if (ptr != caddy_interface->answer_out)
36                 caddy_interface->answer_in = ptr;
37 }
38
39 int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
40 {
41         unsigned long base_addr;
42         uint32_t ptr;
43         struct caddy_cmd *caddy_cmd;
44         uint32_t result[5];
45         uint16_t data16;
46         uint8_t data8;
47         uint32_t status;
48         pci_dev_t dev;
49         void *pci_ptr;
50
51         if (argc < 2) {
52                 puts("Missing parameter\n");
53                 return 1;
54         }
55
56         base_addr = simple_strtoul(argv[1], NULL, 16);
57         caddy_interface = (struct caddy_interface *) base_addr;
58
59         memset((void *)caddy_interface, 0, sizeof(struct caddy_interface));
60         memcpy((void *)&caddy_interface->magic[0], &CADDY_MAGIC, 16);
61
62         while (ctrlc() == 0) {
63                 if (caddy_interface->cmd_in != caddy_interface->cmd_out) {
64                         memset(result, 0, 5 * sizeof(result[0]));
65                         status = 0;
66                         caddy_cmd = &caddy_interface->cmd[caddy_interface->cmd_out];
67                         pci_ptr = (void *)CONFIG_SYS_PCI1_IO_PHYS +
68                                 (caddy_cmd->addr & 0x001fffff);
69
70                         switch (caddy_cmd->cmd) {
71                         case CADDY_CMD_IO_READ_8:
72                                 result[0] = in_8(pci_ptr);
73                                 break;
74
75                         case CADDY_CMD_IO_READ_16:
76                                 result[0] = in_be16(pci_ptr);
77                                 break;
78
79                         case CADDY_CMD_IO_READ_32:
80                                 result[0] = in_be32(pci_ptr);
81                                 break;
82
83                         case CADDY_CMD_IO_WRITE_8:
84                                 data8 = caddy_cmd->par[0] & 0x000000ff;
85                                 out_8(pci_ptr, data8);
86                                 break;
87
88                         case CADDY_CMD_IO_WRITE_16:
89                                 data16 = caddy_cmd->par[0] & 0x0000ffff;
90                                 out_be16(pci_ptr, data16);
91                                 break;
92
93                         case CADDY_CMD_IO_WRITE_32:
94                                 out_be32(pci_ptr, caddy_cmd->par[0]);
95                                 break;
96
97                         case CADDY_CMD_CONFIG_READ_8:
98                                 dev = PCI_BDF(caddy_cmd->par[0],
99                                               caddy_cmd->par[1],
100                                               caddy_cmd->par[2]);
101                                 status = pci_read_config_byte(dev,
102                                                               caddy_cmd->addr,
103                                                               &data8);
104                                 result[0] = data8;
105                                 break;
106
107                         case CADDY_CMD_CONFIG_READ_16:
108                                 dev = PCI_BDF(caddy_cmd->par[0],
109                                               caddy_cmd->par[1],
110                                               caddy_cmd->par[2]);
111                                 status = pci_read_config_word(dev,
112                                                               caddy_cmd->addr,
113                                                               &data16);
114                                 result[0] = data16;
115                                 break;
116
117                         case CADDY_CMD_CONFIG_READ_32:
118                                 dev = PCI_BDF(caddy_cmd->par[0],
119                                               caddy_cmd->par[1],
120                                               caddy_cmd->par[2]);
121                                 status = pci_read_config_dword(dev,
122                                                                caddy_cmd->addr,
123                                                                &result[0]);
124                                 break;
125
126                         case CADDY_CMD_CONFIG_WRITE_8:
127                                 dev = PCI_BDF(caddy_cmd->par[0],
128                                               caddy_cmd->par[1],
129                                               caddy_cmd->par[2]);
130                                 data8 = caddy_cmd->par[3] & 0x000000ff;
131                                 status = pci_write_config_byte(dev,
132                                                                caddy_cmd->addr,
133                                                                data8);
134                                 break;
135
136                         case CADDY_CMD_CONFIG_WRITE_16:
137                                 dev = PCI_BDF(caddy_cmd->par[0],
138                                               caddy_cmd->par[1],
139                                               caddy_cmd->par[2]);
140                                 data16 = caddy_cmd->par[3] & 0x0000ffff;
141                                 status = pci_write_config_word(dev,
142                                                                caddy_cmd->addr,
143                                                                data16);
144                                 break;
145
146                         case CADDY_CMD_CONFIG_WRITE_32:
147                                 dev = PCI_BDF(caddy_cmd->par[0],
148                                               caddy_cmd->par[1],
149                                               caddy_cmd->par[2]);
150                                 status = pci_write_config_dword(dev,
151                                                                 caddy_cmd->addr,
152                                                                 caddy_cmd->par[3]);
153                                 break;
154
155                         default:
156                                 status = 0xffffffff;
157                                 break;
158                         }
159
160                         generate_answer(caddy_cmd, status, &result[0]);
161
162                         ptr = caddy_interface->cmd_out + 1;
163                         ptr = ptr & (CMD_SIZE - 1);
164                         caddy_interface->cmd_out = ptr;
165                 }
166
167                 caddy_interface->heartbeat++;
168         }
169
170         return 0;
171 }
172
173 U_BOOT_CMD(
174         caddy,  2,      0,      do_caddy,
175         "Start Caddy server.",
176         "Start Caddy server with Data structure a given addr\n"
177         );