3 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __SPARC_CACHE_H__
9 #define __SPARC_CACHE_H__
11 #include <asm/processor.h>
14 * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
15 * use 32-bytes, the cacheline size for Sparc.
17 #ifdef CONFIG_SYS_CACHELINE_SIZE
18 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
20 #define ARCH_DMA_MINALIGN 32