3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
11 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
13 * SPDX-License-Identifier: GPL-2.0+
17 #if defined (CONFIG_IMX)
19 #include <asm/arch/imx-regs.h>
24 /* setup GP Timer 1 */
26 for ( i=0; i<100; i++) TCTL1 = 0; /* We have no udelay by now */
27 TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
28 TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
32 TCTL1 |= TCTL_TEN; /* Enable timer */
38 * timer without interrupts
40 ulong get_timer (ulong base)
42 return get_timer_masked() - base;
45 ulong get_timer_masked (void)
50 void udelay_masked (unsigned long usec)
52 ulong endtime = get_timer_masked() + usec;
56 ulong now = get_timer_masked ();
61 void __udelay (unsigned long usec)
67 * This function is derived from PowerPC code (read timebase as long long).
68 * On ARM it just returns the timer value.
70 unsigned long long get_ticks(void)
76 * This function is derived from PowerPC code (timebase clock frequency).
77 * On ARM it returns the number of timer ticks per second.
79 ulong get_tbclk (void)
83 tbclk = CONFIG_SYS_HZ;
89 * Reset the cpu by setting up the watchdog timer and let him time out
91 void reset_cpu (ulong ignored)
93 /* Disable watchdog and set Time-Out field to 0 */
96 /* Write Service Sequence */
100 /* Enable watchdog */
107 #endif /* defined (CONFIG_IMX) */