qemu/roms/seabios/src/tcgbios.h

   1 #ifndef TCGBIOS_H
   2 #define TCGBIOS_H
   3
   4 #include "types.h"
   5
   6 /* Define for section 12.3 */
   7 #define TCG_PC_OK                       0x0
   8 #define TCG_PC_TPMERROR                 0x1
   9 #define TCG_PC_LOGOVERFLOW              0x2
  10 #define TCG_PC_UNSUPPORTED              0x3
  11
  12 #define TPM_ALG_SHA                     0x4
  13
  14 #define TCG_MAGIC                       0x41504354L
  15 #define TCG_VERSION_MAJOR               1
  16 #define TCG_VERSION_MINOR               2
  17
  18 #define TPM_OK                          0x0
  19 #define TPM_RET_BASE                    0x1
  20 #define TCG_GENERAL_ERROR               (TPM_RET_BASE + 0x0)
  21 #define TCG_TPM_IS_LOCKED               (TPM_RET_BASE + 0x1)
  22 #define TCG_NO_RESPONSE                 (TPM_RET_BASE + 0x2)
  23 #define TCG_INVALID_RESPONSE            (TPM_RET_BASE + 0x3)
  24 #define TCG_INVALID_ACCESS_REQUEST      (TPM_RET_BASE + 0x4)
  25 #define TCG_FIRMWARE_ERROR              (TPM_RET_BASE + 0x5)
  26 #define TCG_INTEGRITY_CHECK_FAILED      (TPM_RET_BASE + 0x6)
  27 #define TCG_INVALID_DEVICE_ID           (TPM_RET_BASE + 0x7)
  28 #define TCG_INVALID_VENDOR_ID           (TPM_RET_BASE + 0x8)
  29 #define TCG_UNABLE_TO_OPEN              (TPM_RET_BASE + 0x9)
  30 #define TCG_UNABLE_TO_CLOSE             (TPM_RET_BASE + 0xa)
  31 #define TCG_RESPONSE_TIMEOUT            (TPM_RET_BASE + 0xb)
  32 #define TCG_INVALID_COM_REQUEST         (TPM_RET_BASE + 0xc)
  33 #define TCG_INVALID_ADR_REQUEST         (TPM_RET_BASE + 0xd)
  34 #define TCG_WRITE_BYTE_ERROR            (TPM_RET_BASE + 0xe)
  35 #define TCG_READ_BYTE_ERROR             (TPM_RET_BASE + 0xf)
  36 #define TCG_BLOCK_WRITE_TIMEOUT         (TPM_RET_BASE + 0x10)
  37 #define TCG_CHAR_WRITE_TIMEOUT          (TPM_RET_BASE + 0x11)
  38 #define TCG_CHAR_READ_TIMEOUT           (TPM_RET_BASE + 0x12)
  39 #define TCG_BLOCK_READ_TIMEOUT          (TPM_RET_BASE + 0x13)
  40 #define TCG_TRANSFER_ABORT              (TPM_RET_BASE + 0x14)
  41 #define TCG_INVALID_DRV_FUNCTION        (TPM_RET_BASE + 0x15)
  42 #define TCG_OUTPUT_BUFFER_TOO_SHORT     (TPM_RET_BASE + 0x16)
  43 #define TCG_FATAL_COM_ERROR             (TPM_RET_BASE + 0x17)
  44 #define TCG_INVALID_INPUT_PARA          (TPM_RET_BASE + 0x18)
  45 #define TCG_TCG_COMMAND_ERROR           (TPM_RET_BASE + 0x19)
  46 #define TCG_INTERFACE_SHUTDOWN          (TPM_RET_BASE + 0x20)
  47 //define TCG_PC_UNSUPPORTED             (TPM_RET_BASE + 0x21)
  48 #define TCG_PC_TPM_NOT_PRESENT          (TPM_RET_BASE + 0x22)
  49 #define TCG_PC_TPM_DEACTIVATED          (TPM_RET_BASE + 0x23)
  50
  51
  52 #define TPM_ORD_SelfTestFull             0x00000050
  53 #define TPM_ORD_ForceClear               0x0000005d
  54 #define TPM_ORD_GetCapability            0x00000065
  55 #define TPM_ORD_PhysicalEnable           0x0000006f
  56 #define TPM_ORD_PhysicalDisable          0x00000070
  57 #define TPM_ORD_SetOwnerInstall          0x00000071
  58 #define TPM_ORD_PhysicalSetDeactivated   0x00000072
  59 #define TPM_ORD_Startup                  0x00000099
  60 #define TPM_ORD_PhysicalPresence         0x4000000a
  61 #define TPM_ORD_Extend                   0x00000014
  62 #define TPM_ORD_SHA1Start                0x000000a0
  63 #define TPM_ORD_SHA1Update               0x000000a1
  64 #define TPM_ORD_SHA1Complete             0x000000a2
  65 #define TSC_ORD_ResetEstablishmentBit    0x4000000b
  66
  67
  68 #define TPM_ST_CLEAR                     0x1
  69 #define TPM_ST_STATE                     0x2
  70 #define TPM_ST_DEACTIVATED               0x3
  71
  72
  73 /* TPM command error codes */
  74 #define TPM_INVALID_POSTINIT             0x26
  75 #define TPM_BAD_LOCALITY                 0x3d
  76
  77 /* TPM command tags */
  78 #define TPM_TAG_RQU_CMD                  0x00c1
  79
  80 /* interrupt identifiers (al register) */
  81 enum irq_ids {
  82     TCG_StatusCheck = 0,
  83     TCG_HashLogExtendEvent = 1,
  84     TCG_PassThroughToTPM = 2,
  85     TCG_ShutdownPreBootInterface = 3,
  86     TCG_HashLogEvent = 4,
  87     TCG_HashAll = 5,
  88     TCG_TSS = 6,
  89     TCG_CompactHashLogExtendEvent = 7,
  90 };
  91
  92 /* event types: 10.4.1 / table 11 */
  93 #define EV_POST_CODE             1
  94 #define EV_SEPARATOR             4
  95 #define EV_ACTION                5
  96 #define EV_EVENT_TAG             6
  97 #define EV_COMPACT_HASH         12
  98 #define EV_IPL                  13
  99 #define EV_IPL_PARTITION_DATA   14
 100
 101
 102 #define STATUS_FLAG_SHUTDOWN        (1 << 0)
 103
 104 #define SHA1_BUFSIZE                20
 105
 106
 107 struct iovec
 108 {
 109     size_t length;
 110     void   *data;
 111 };
 112
 113
 114 /* Input and Output blocks for the TCG BIOS commands */
 115
 116 struct hleei_short
 117 {
 118     u16   ipblength;
 119     u16   reserved;
 120     const void *hashdataptr;
 121     u32   hashdatalen;
 122     u32   pcrindex;
 123     const void *logdataptr;
 124     u32   logdatalen;
 125 } PACKED;
 126
 127
 128 struct hleei_long
 129 {
 130     u16   ipblength;
 131     u16   reserved;
 132     void *hashdataptr;
 133     u32   hashdatalen;
 134     u32   pcrindex;
 135     u32   reserved2;
 136     void *logdataptr;
 137     u32   logdatalen;
 138 } PACKED;
 139
 140
 141 struct hleeo
 142 {
 143     u16    opblength;
 144     u16    reserved;
 145     u32    eventnumber;
 146     u8     digest[SHA1_BUFSIZE];
 147 } PACKED;
 148
 149
 150 struct pttti
 151 {
 152     u16    ipblength;
 153     u16    reserved;
 154     u16    opblength;
 155     u16    reserved2;
 156     u8     tpmopin[0];
 157 } PACKED;
 158
 159
 160 struct pttto
 161 {
 162     u16    opblength;
 163     u16    reserved;
 164     u8     tpmopout[0];
 165 };
 166
 167
 168 struct hlei
 169 {
 170     u16    ipblength;
 171     u16    reserved;
 172     const void  *hashdataptr;
 173     u32    hashdatalen;
 174     u32    pcrindex;
 175     u32    logeventtype;
 176     const void  *logdataptr;
 177     u32    logdatalen;
 178 } PACKED;
 179
 180
 181 struct hleo
 182 {
 183     u16    opblength;
 184     u16    reserved;
 185     u32    eventnumber;
 186 } PACKED;
 187
 188
 189 struct hai
 190 {
 191     u16    ipblength;
 192     u16    reserved;
 193     const void  *hashdataptr;
 194     u32    hashdatalen;
 195     u32    algorithmid;
 196 } PACKED;
 197
 198
 199 struct ti
 200 {
 201     u16    ipblength;
 202     u16    reserved;
 203     u16    opblength;
 204     u16    reserved2;
 205     u8     tssoperandin[0];
 206 } PACKED;
 207
 208
 209 struct to
 210 {
 211     u16    opblength;
 212     u16    reserved;
 213     u8     tssoperandout[0];
 214 } PACKED;
 215
 216
 217 struct pcpes
 218 {
 219     u32    pcrindex;
 220     u32    eventtype;
 221     u8     digest[SHA1_BUFSIZE];
 222     u32    eventdatasize;
 223     u32    event;
 224 } PACKED;
 225
 226 struct pcctes
 227 {
 228     u32 eventid;
 229     u32 eventdatasize;
 230     u8  digest[SHA1_BUFSIZE];
 231 } PACKED;
 232
 233 struct pcctes_romex
 234 {
 235     u32 eventid;
 236     u32 eventdatasize;
 237     u16 reserved;
 238     u16 pfa;
 239     u8  digest[SHA1_BUFSIZE];
 240 } PACKED;
 241
 242
 243 #define TPM_REQ_HEADER \
 244     u16    tag; \
 245     u32    totlen; \
 246     u32    ordinal;
 247
 248 #define TPM_REQ_HEADER_SIZE  (sizeof(u16) + sizeof(u32) + sizeof(u32))
 249
 250 #define TPM_RSP_HEADER \
 251     u16    tag; \
 252     u32    totlen; \
 253     u32    errcode;
 254
 255 #define TPM_RSP_HEADER_SIZE  (sizeof(u16) + sizeof(u32) + sizeof(u32))
 256
 257 struct tpm_req_header {
 258     TPM_REQ_HEADER;
 259 } PACKED;
 260
 261
 262 struct tpm_rsp_header {
 263     TPM_RSP_HEADER;
 264 } PACKED;
 265
 266
 267 struct tpm_req_extend {
 268     TPM_REQ_HEADER
 269     u32    pcrindex;
 270     u8     digest[SHA1_BUFSIZE];
 271 } PACKED;
 272
 273
 274 struct tpm_rsp_extend {
 275     TPM_RSP_HEADER
 276     u8     digest[SHA1_BUFSIZE];
 277 } PACKED;
 278
 279
 280 struct tpm_req_getcap_perm_flags {
 281     TPM_REQ_HEADER
 282     u32    capArea;
 283     u32    subCapSize;
 284     u32    subCap;
 285 } PACKED;
 286
 287
 288 struct tpm_permanent_flags {
 289     u16    tag;
 290     u8     flags[20];
 291 } PACKED;
 292
 293
 294 enum permFlagsIndex {
 295     PERM_FLAG_IDX_DISABLE = 0,
 296     PERM_FLAG_IDX_OWNERSHIP,
 297     PERM_FLAG_IDX_DEACTIVATED,
 298     PERM_FLAG_IDX_READPUBEK,
 299     PERM_FLAG_IDX_DISABLEOWNERCLEAR,
 300     PERM_FLAG_IDX_ALLOW_MAINTENANCE,
 301     PERM_FLAG_IDX_PHYSICAL_PRESENCE_LIFETIME_LOCK,
 302     PERM_FLAG_IDX_PHYSICAL_PRESENCE_HW_ENABLE,
 303 };
 304
 305
 306 struct tpm_res_getcap_perm_flags {
 307     TPM_RSP_HEADER
 308     u32    size;
 309     struct tpm_permanent_flags perm_flags;
 310 } PACKED;
 311
 312
 313 struct tpm_res_getcap_ownerauth {
 314     TPM_RSP_HEADER
 315     u32    size;
 316     u8     flag;
 317 } PACKED;
 318
 319
 320 struct tpm_res_getcap_timeouts {
 321     TPM_RSP_HEADER
 322     u32    size;
 323     u32    timeouts[4];
 324 } PACKED;
 325
 326
 327 struct tpm_res_getcap_durations {
 328     TPM_RSP_HEADER
 329     u32    size;
 330     u32    durations[3];
 331 } PACKED;
 332
 333
 334 struct tpm_res_sha1start {
 335     TPM_RSP_HEADER
 336     u32    max_num_bytes;
 337 } PACKED;
 338
 339
 340 struct tpm_res_sha1complete {
 341     TPM_RSP_HEADER
 342     u8     hash[20];
 343 } PACKED;
 344
 345 struct pttti_extend {
 346     struct pttti pttti;
 347     struct tpm_req_extend req;
 348 } PACKED;
 349
 350
 351 struct pttto_extend {
 352     struct pttto pttto;
 353     struct tpm_rsp_extend rsp;
 354 } PACKED;
 355
 356
 357 enum ipltype {
 358     IPL_BCV = 0,
 359     IPL_EL_TORITO_1,
 360     IPL_EL_TORITO_2
 361 };
 362
 363
 364 struct bregs;
 365 void tpm_interrupt_handler32(struct bregs *regs);
 366
 367 void tpm_setup(void);
 368 void tpm_prepboot(void);
 369 void tpm_s3_resume(void);
 370 u32 tpm_add_bcv(u32 bootdrv, const u8 *addr, u32 length);
 371 u32 tpm_add_cdrom(u32 bootdrv, const u8 *addr, u32 length);
 372 u32 tpm_add_cdrom_catalog(const u8 *addr, u32 length);
 373 u32 tpm_option_rom(const void *addr, u32 len);
 374
 375 #endif /* TCGBIOS_H */