1 // Code for handling UHCI USB controllers.
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "biosvar.h" // GET_LOWFLAT
8 #include "config.h" // CONFIG_*
9 #include "malloc.h" // free
10 #include "output.h" // dprintf
11 #include "pci.h" // pci_bdf_to_bus
12 #include "pci_ids.h" // PCI_CLASS_SERIAL_USB_UHCI
13 #include "pci_regs.h" // PCI_BASE_ADDRESS_4
14 #include "string.h" // memset
15 #include "usb.h" // struct usb_s
16 #include "usb-uhci.h" // USBLEGSUP
17 #include "util.h" // msleep
18 #include "x86.h" // outw
23 struct uhci_qh *control_qh;
24 struct uhci_framelist *framelist;
29 struct uhci_td *next_td;
36 /****************************************************************
38 ****************************************************************/
40 // Check if device attached to a given port
42 uhci_hub_detect(struct usbhub_s *hub, u32 port)
44 struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
45 u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
46 u16 status = inw(ioport);
47 if (!(status & USBPORTSC_CCS))
51 // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
53 // Begin reset on port
54 outw(USBPORTSC_PR, ioport);
55 msleep(USB_TIME_DRSTR);
59 // Reset device on port
61 uhci_hub_reset(struct usbhub_s *hub, u32 port)
63 struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
64 u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
66 // Finish reset on port
68 udelay(6); // 64 high-speed bit times
69 u16 status = inw(ioport);
70 if (!(status & USBPORTSC_CCS))
71 // No longer connected
73 outw(USBPORTSC_PE, ioport);
74 return !!(status & USBPORTSC_LSDA);
79 uhci_hub_disconnect(struct usbhub_s *hub, u32 port)
81 struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
82 u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
86 static struct usbhub_op_s uhci_HubOp = {
87 .detect = uhci_hub_detect,
88 .reset = uhci_hub_reset,
89 .disconnect = uhci_hub_disconnect,
92 // Find any devices connected to the root hub.
94 check_uhci_ports(struct usb_uhci_s *cntl)
98 memset(&hub, 0, sizeof(hub));
99 hub.cntl = &cntl->usb;
101 hub.op = &uhci_HubOp;
107 /****************************************************************
109 ****************************************************************/
111 // Wait for next USB frame to start - for ensuring safe memory release.
113 uhci_waittick(u16 iobase)
116 u16 startframe = inw(iobase + USBFRNUM);
117 u32 end = timer_calc(1000 * 5);
119 if (inw(iobase + USBFRNUM) != startframe)
121 if (timer_check(end)) {
130 uhci_free_pipes(struct usb_uhci_s *cntl)
132 dprintf(7, "uhci_free_pipes %p\n", cntl);
134 struct uhci_qh *pos = (void*)(cntl->framelist->links[0] & ~UHCI_PTR_BITS);
136 u32 link = pos->link;
137 if (link == UHCI_PTR_TERM)
139 struct uhci_qh *next = (void*)(link & ~UHCI_PTR_BITS);
140 struct uhci_pipe *pipe = container_of(next, struct uhci_pipe, qh);
141 if (usb_is_freelist(&cntl->usb, &pipe->pipe))
142 pos->link = next->link;
146 uhci_waittick(cntl->iobase);
148 struct usb_pipe *usbpipe = cntl->usb.freelist;
151 cntl->usb.freelist = usbpipe->freenext;
152 struct uhci_pipe *pipe = container_of(usbpipe, struct uhci_pipe, pipe);
158 reset_uhci(struct usb_uhci_s *cntl, u16 bdf)
160 // XXX - don't reset if not needed.
162 // Reset PIRQ and SMI
163 pci_config_writew(bdf, USBLEGSUP, USBLEGSUP_RWC);
166 outw(USBCMD_HCRESET, cntl->iobase + USBCMD);
169 // Disable interrupts and commands (just to be safe).
170 outw(0, cntl->iobase + USBINTR);
171 outw(0, cntl->iobase + USBCMD);
175 configure_uhci(void *data)
177 struct usb_uhci_s *cntl = data;
179 // Allocate ram for schedule storage
180 struct uhci_td *term_td = malloc_high(sizeof(*term_td));
181 struct uhci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
182 struct uhci_pipe *intr_pipe = malloc_high(sizeof(*intr_pipe));
183 struct uhci_pipe *term_pipe = malloc_high(sizeof(*term_pipe));
184 if (!term_td || !fl || !intr_pipe || !term_pipe) {
189 // Work around for PIIX errata
190 memset(term_td, 0, sizeof(*term_td));
191 term_td->link = UHCI_PTR_TERM;
192 term_td->token = (uhci_explen(0) | (0x7f << TD_TOKEN_DEVADDR_SHIFT)
194 memset(term_pipe, 0, sizeof(*term_pipe));
195 term_pipe->qh.element = (u32)term_td;
196 term_pipe->qh.link = UHCI_PTR_TERM;
197 term_pipe->pipe.cntl = &cntl->usb;
199 // Set schedule to point to primary intr queue head
200 memset(intr_pipe, 0, sizeof(*intr_pipe));
201 intr_pipe->qh.element = UHCI_PTR_TERM;
202 intr_pipe->qh.link = (u32)&term_pipe->qh | UHCI_PTR_QH;
203 intr_pipe->pipe.cntl = &cntl->usb;
205 for (i=0; i<ARRAY_SIZE(fl->links); i++)
206 fl->links[i] = (u32)&intr_pipe->qh | UHCI_PTR_QH;
207 cntl->framelist = fl;
208 cntl->control_qh = &intr_pipe->qh;
211 // Set the frame length to the default: 1 ms exactly
212 outb(USBSOF_DEFAULT, cntl->iobase + USBSOF);
214 // Store the frame list base address
215 outl((u32)fl->links, cntl->iobase + USBFLBASEADD);
217 // Set the current frame number
218 outw(0, cntl->iobase + USBFRNUM);
220 // Mark as configured and running with a 64-byte max packet.
221 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, cntl->iobase + USBCMD);
224 int count = check_uhci_ports(cntl);
225 uhci_free_pipes(cntl);
230 // No devices found - shutdown and free controller.
231 outw(0, cntl->iobase + USBCMD);
241 uhci_controller_setup(struct pci_device *pci)
244 struct usb_uhci_s *cntl = malloc_tmphigh(sizeof(*cntl));
249 wait_preempt(); // Avoid pci_config_readl when preempting
250 memset(cntl, 0, sizeof(*cntl));
252 cntl->usb.type = USB_TYPE_UHCI;
253 cntl->iobase = (pci_config_readl(bdf, PCI_BASE_ADDRESS_4)
254 & PCI_BASE_ADDRESS_IO_MASK);
256 dprintf(1, "UHCI init on dev %02x:%02x.%x (io=%x)\n"
257 , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
258 , pci_bdf_to_fn(bdf), cntl->iobase);
260 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
262 reset_uhci(cntl, bdf);
264 run_thread(configure_uhci, cntl);
270 if (! CONFIG_USB_UHCI)
272 struct pci_device *pci;
274 if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_UHCI)
275 uhci_controller_setup(pci);
280 /****************************************************************
281 * End point communication
282 ****************************************************************/
284 static struct usb_pipe *
285 uhci_alloc_intr_pipe(struct usbdevice_s *usbdev
286 , struct usb_endpoint_descriptor *epdesc)
288 struct usb_uhci_s *cntl = container_of(
289 usbdev->hub->cntl, struct usb_uhci_s, usb);
290 int frameexp = usb_get_period(usbdev, epdesc);
291 dprintf(7, "uhci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
295 int maxpacket = epdesc->wMaxPacketSize;
296 // Determine number of entries needed for 2 timer ticks.
297 int ms = 1<<frameexp;
298 int count = DIV_ROUND_UP(ticks_to_ms(2), ms);
299 count = ALIGN(count, 2);
300 struct uhci_pipe *pipe = malloc_low(sizeof(*pipe));
301 struct uhci_td *tds = malloc_low(sizeof(*tds) * count);
302 void *data = malloc_low(maxpacket * count);
303 if (!pipe || !tds || !data) {
307 memset(pipe, 0, sizeof(*pipe));
308 usb_desc2pipe(&pipe->pipe, usbdev, epdesc);
309 int lowspeed = pipe->pipe.speed;
310 int devaddr = pipe->pipe.devaddr | (pipe->pipe.ep << 7);
311 pipe->qh.element = (u32)tds;
312 pipe->next_td = &tds[0];
313 pipe->iobase = cntl->iobase;
317 for (i=0; i<count; i++) {
318 tds[i].link = (i==count-1 ? (u32)&tds[0] : (u32)&tds[i+1]);
319 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
321 tds[i].token = (uhci_explen(maxpacket) | toggle
322 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
324 tds[i].buffer = data + maxpacket * i;
325 toggle ^= TD_TOKEN_TOGGLE;
328 // Add to interrupt schedule.
329 struct uhci_framelist *fl = cntl->framelist;
331 // Add to existing interrupt entry.
332 struct uhci_qh *intr_qh = (void*)(fl->links[0] & ~UHCI_PTR_BITS);
333 pipe->qh.link = intr_qh->link;
335 intr_qh->link = (u32)&pipe->qh | UHCI_PTR_QH;
336 if (cntl->control_qh == intr_qh)
337 cntl->control_qh = &pipe->qh;
339 int startpos = 1<<(frameexp-1);
340 pipe->qh.link = fl->links[startpos];
342 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
343 fl->links[i] = (u32)&pipe->qh | UHCI_PTR_QH;
355 uhci_realloc_pipe(struct usbdevice_s *usbdev, struct usb_pipe *upipe
356 , struct usb_endpoint_descriptor *epdesc)
358 if (! CONFIG_USB_UHCI)
360 usb_add_freelist(upipe);
363 u8 eptype = epdesc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
364 if (eptype == USB_ENDPOINT_XFER_INT)
365 return uhci_alloc_intr_pipe(usbdev, epdesc);
366 struct usb_uhci_s *cntl = container_of(
367 usbdev->hub->cntl, struct usb_uhci_s, usb);
368 dprintf(7, "uhci_alloc_async_pipe %p %d\n", &cntl->usb, eptype);
370 struct usb_pipe *usbpipe = usb_get_freelist(&cntl->usb, eptype);
372 // Use previously allocated pipe.
373 usb_desc2pipe(usbpipe, usbdev, epdesc);
377 // Allocate a new queue head.
378 struct uhci_pipe *pipe;
379 if (eptype == USB_ENDPOINT_XFER_CONTROL)
380 pipe = malloc_tmphigh(sizeof(*pipe));
382 pipe = malloc_low(sizeof(*pipe));
387 memset(pipe, 0, sizeof(*pipe));
388 usb_desc2pipe(&pipe->pipe, usbdev, epdesc);
389 pipe->qh.element = UHCI_PTR_TERM;
390 pipe->iobase = cntl->iobase;
392 // Add queue head to controller list.
393 struct uhci_qh *control_qh = cntl->control_qh;
394 pipe->qh.link = control_qh->link;
396 control_qh->link = (u32)&pipe->qh | UHCI_PTR_QH;
397 if (eptype == USB_ENDPOINT_XFER_CONTROL)
398 cntl->control_qh = &pipe->qh;
403 wait_pipe(struct uhci_pipe *pipe, u32 end)
406 u32 el_link = GET_LOWFLAT(pipe->qh.element);
407 if (el_link & UHCI_PTR_TERM)
409 if (timer_check(end)) {
411 u16 iobase = GET_LOWFLAT(pipe->iobase);
412 struct uhci_td *td = (void*)(el_link & ~UHCI_PTR_BITS);
413 dprintf(1, "Timeout on wait_pipe %p (td=%p s=%x c=%x/%x)\n"
414 , pipe, (void*)el_link, GET_LOWFLAT(td->status)
415 , inw(iobase + USBCMD)
416 , inw(iobase + USBSTS));
417 SET_LOWFLAT(pipe->qh.element, UHCI_PTR_TERM);
418 uhci_waittick(iobase);
426 wait_td(struct uhci_td *td, u32 end)
431 if (!(status & TD_CTRL_ACTIVE))
433 if (timer_check(end)) {
439 if (status & TD_CTRL_ANY_ERROR) {
440 dprintf(1, "wait_td error - status=%x\n", status);
450 uhci_send_pipe(struct usb_pipe *p, int dir, const void *cmd
451 , void *data, int datasize)
453 if (! CONFIG_USB_UHCI)
455 struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
456 dprintf(7, "uhci_send_pipe qh=%p dir=%d data=%p size=%d\n"
457 , &pipe->qh, dir, data, datasize);
458 int maxpacket = GET_LOWFLAT(pipe->pipe.maxpacket);
459 int lowspeed = GET_LOWFLAT(pipe->pipe.speed);
460 int devaddr = (GET_LOWFLAT(pipe->pipe.devaddr)
461 | (GET_LOWFLAT(pipe->pipe.ep) << 7));
462 int toggle = GET_LOWFLAT(pipe->toggle) ? TD_TOKEN_TOGGLE : 0;
464 // Allocate 16 tds on stack (16byte aligned)
465 u8 tdsbuf[sizeof(struct uhci_td) * STACKTDS + TDALIGN - 1];
466 struct uhci_td *tds = (void*)ALIGN((u32)tdsbuf, TDALIGN);
467 memset(tds, 0, sizeof(*tds) * STACKTDS);
471 u32 end = timer_calc(usb_xfer_time(p, datasize));
473 SET_LOWFLAT(pipe->qh.element, (u32)MAKE_FLATPTR(GET_SEG(SS), tds));
475 // Setup transfer descriptors
477 // Send setup pid on control transfers
478 struct uhci_td *td = &tds[tdpos++ % STACKTDS];
479 u32 nexttd = (u32)MAKE_FLATPTR(GET_SEG(SS), &tds[tdpos % STACKTDS]);
480 td->link = nexttd | UHCI_PTR_DEPTH;
481 td->token = (uhci_explen(USB_CONTROL_SETUP_SIZE)
482 | (devaddr << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_SETUP);
483 td->buffer = (void*)cmd;
485 td->status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
487 toggle = TD_TOKEN_TOGGLE;
491 struct uhci_td *td = &tds[tdpos++ % STACKTDS];
492 int ret = wait_td(td, end);
496 int transfer = datasize;
497 if (transfer > maxpacket)
498 transfer = maxpacket;
499 u32 nexttd = (u32)MAKE_FLATPTR(GET_SEG(SS), &tds[tdpos % STACKTDS]);
500 td->link = ((transfer==datasize && !cmd)
501 ? UHCI_PTR_TERM : (nexttd | UHCI_PTR_DEPTH));
502 td->token = (uhci_explen(transfer) | toggle
503 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
504 | (dir ? USB_PID_IN : USB_PID_OUT));
507 td->status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
509 toggle ^= TD_TOKEN_TOGGLE;
512 datasize -= transfer;
515 // Send status pid on control transfers
516 struct uhci_td *td = &tds[tdpos++ % STACKTDS];
517 int ret = wait_td(td, end);
520 td->link = UHCI_PTR_TERM;
521 td->token = (uhci_explen(0) | TD_TOKEN_TOGGLE
522 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
523 | (dir ? USB_PID_OUT : USB_PID_IN));
526 td->status = (uhci_maxerr(0) | (lowspeed ? TD_CTRL_LS : 0)
529 SET_LOWFLAT(pipe->toggle, !!toggle);
530 return wait_pipe(pipe, end);
532 dprintf(1, "uhci_send_bulk failed\n");
533 SET_LOWFLAT(pipe->qh.element, UHCI_PTR_TERM);
534 uhci_waittick(GET_LOWFLAT(pipe->iobase));
539 uhci_poll_intr(struct usb_pipe *p, void *data)
542 if (! CONFIG_USB_UHCI)
545 struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
546 struct uhci_td *td = GET_LOWFLAT(pipe->next_td);
547 u32 status = GET_LOWFLAT(td->status);
548 u32 token = GET_LOWFLAT(td->token);
549 if (status & TD_CTRL_ACTIVE)
552 // XXX - check for errors.
555 void *tddata = GET_LOWFLAT(td->buffer);
556 memcpy_far(GET_SEG(SS), data, SEG_LOW, LOWFLAT2LOW(tddata)
557 , uhci_expected_length(token));
560 struct uhci_td *next = (void*)(GET_LOWFLAT(td->link) & ~UHCI_PTR_BITS);
561 SET_LOWFLAT(pipe->next_td, next);
563 SET_LOWFLAT(td->status, (uhci_maxerr(0) | (status & TD_CTRL_LS)