Add qemu 2.4.0
[kvmfornfv.git] / qemu / roms / seabios / src / fw / acpi-dsdt.dsl
1 /*
2  * Bochs/QEMU ACPI DSDT ASL definition
3  *
4  * Copyright (c) 2006 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License version 2 as published by the Free Software Foundation.
9  *
10  * This library is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * Lesser General Public License for more details.
14  *
15  * You should have received a copy of the GNU Lesser General Public
16  * License along with this library; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18  */
19
20 ACPI_EXTRACT_ALL_CODE AmlCode
21
22 DefinitionBlock (
23     "acpi-dsdt.aml",    // Output Filename
24     "DSDT",             // Signature
25     0x01,               // DSDT Compliance Revision
26     "BXPC",             // OEMID
27     "BXDSDT",           // TABLE ID
28     0x1                 // OEM Revision
29     )
30 {
31
32 #include "acpi-dsdt-dbug.dsl"
33
34
35 /****************************************************************
36  * PCI Bus definition
37  ****************************************************************/
38
39     Scope(\_SB) {
40         Device(PCI0) {
41             Name(_HID, EisaId("PNP0A03"))
42             Name(_ADR, 0x00)
43             Name(_UID, 1)
44         }
45     }
46
47 #include "acpi-dsdt-pci-crs.dsl"
48 #include "acpi-dsdt-hpet.dsl"
49
50
51 /****************************************************************
52  * VGA
53  ****************************************************************/
54
55     Scope(\_SB.PCI0) {
56         Device(VGA) {
57             Name(_ADR, 0x00020000)
58             OperationRegion(PCIC, PCI_Config, Zero, 0x4)
59             Field(PCIC, DWordAcc, NoLock, Preserve) {
60                 VEND, 32
61             }
62             Method(_S1D, 0, NotSerialized) {
63                 Return (0x00)
64             }
65             Method(_S2D, 0, NotSerialized) {
66                 Return (0x00)
67             }
68             Method(_S3D, 0, NotSerialized) {
69                 If (LEqual(VEND, 0x1001b36)) {
70                     Return (0x03)           // QXL
71                 } Else {
72                     Return (0x00)
73                 }
74             }
75         }
76     }
77
78
79 /****************************************************************
80  * PIIX4 PM
81  ****************************************************************/
82
83     Scope(\_SB.PCI0) {
84         Device(PX13) {
85             Name(_ADR, 0x00010003)
86             OperationRegion(P13C, PCI_Config, 0x00, 0xff)
87         }
88     }
89
90
91 /****************************************************************
92  * PIIX3 ISA bridge
93  ****************************************************************/
94
95     Scope(\_SB.PCI0) {
96         Device(ISA) {
97             Name(_ADR, 0x00010000)
98
99             /* PIIX PCI to ISA irq remapping */
100             OperationRegion(P40C, PCI_Config, 0x60, 0x04)
101
102             /* enable bits */
103             Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) {
104                 Offset(0x5f),
105                 , 7,
106                 LPEN, 1,         // LPT
107                 Offset(0x67),
108                 , 3,
109                 CAEN, 1,         // COM1
110                 , 3,
111                 CBEN, 1,         // COM2
112             }
113             Name(FDEN, 1)
114         }
115     }
116
117 #include "acpi-dsdt-isa.dsl"
118
119
120 /****************************************************************
121  * PCI hotplug
122  ****************************************************************/
123
124     Scope(\_SB.PCI0) {
125         OperationRegion(PCST, SystemIO, 0xae00, 0x08)
126         Field(PCST, DWordAcc, NoLock, WriteAsZeros) {
127             PCIU, 32,
128             PCID, 32,
129         }
130
131         OperationRegion(SEJ, SystemIO, 0xae08, 0x04)
132         Field(SEJ, DWordAcc, NoLock, WriteAsZeros) {
133             B0EJ, 32,
134         }
135
136         /* Methods called by bulk generated PCI devices below */
137
138         /* Methods called by hotplug devices */
139         Method(PCEJ, 1, NotSerialized) {
140             // _EJ0 method - eject callback
141             Store(ShiftLeft(1, Arg0), B0EJ)
142         }
143
144         /* Hotplug notification method supplied by SSDT */
145         External(\_SB.PCI0.PCNT, MethodObj)
146
147         /* PCI hotplug notify method */
148         Method(PCNF, 0) {
149             // Local0 = iterator
150             Store(Zero, Local0)
151             While (LLess(Local0, 31)) {
152                 Increment(Local0)
153                 If (And(PCIU, ShiftLeft(1, Local0))) {
154                     PCNT(Local0, 1)
155                 }
156                 If (And(PCID, ShiftLeft(1, Local0))) {
157                     PCNT(Local0, 3)
158                 }
159             }
160         }
161     }
162
163
164 /****************************************************************
165  * PCI IRQs
166  ****************************************************************/
167
168     Scope(\_SB) {
169         Scope(PCI0) {
170             Name(_PRT, Package() {
171                 /* PCI IRQ routing table, example from ACPI 2.0a specification,
172                    section 6.2.8.1 */
173                 /* Note: we provide the same info as the PCI routing
174                    table of the Bochs BIOS */
175
176 #define prt_slot(nr, lnk0, lnk1, lnk2, lnk3) \
177     Package() { nr##ffff, 0, lnk0, 0 }, \
178     Package() { nr##ffff, 1, lnk1, 0 }, \
179     Package() { nr##ffff, 2, lnk2, 0 }, \
180     Package() { nr##ffff, 3, lnk3, 0 }
181
182 #define prt_slot0(nr) prt_slot(nr, LNKD, LNKA, LNKB, LNKC)
183 #define prt_slot1(nr) prt_slot(nr, LNKA, LNKB, LNKC, LNKD)
184 #define prt_slot2(nr) prt_slot(nr, LNKB, LNKC, LNKD, LNKA)
185 #define prt_slot3(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB)
186
187                 prt_slot0(0x0000),
188                 /* Device 1 is power mgmt device, and can only use irq 9 */
189                 prt_slot(0x0001, LNKS, LNKB, LNKC, LNKD),
190                 prt_slot2(0x0002),
191                 prt_slot3(0x0003),
192                 prt_slot0(0x0004),
193                 prt_slot1(0x0005),
194                 prt_slot2(0x0006),
195                 prt_slot3(0x0007),
196                 prt_slot0(0x0008),
197                 prt_slot1(0x0009),
198                 prt_slot2(0x000a),
199                 prt_slot3(0x000b),
200                 prt_slot0(0x000c),
201                 prt_slot1(0x000d),
202                 prt_slot2(0x000e),
203                 prt_slot3(0x000f),
204                 prt_slot0(0x0010),
205                 prt_slot1(0x0011),
206                 prt_slot2(0x0012),
207                 prt_slot3(0x0013),
208                 prt_slot0(0x0014),
209                 prt_slot1(0x0015),
210                 prt_slot2(0x0016),
211                 prt_slot3(0x0017),
212                 prt_slot0(0x0018),
213                 prt_slot1(0x0019),
214                 prt_slot2(0x001a),
215                 prt_slot3(0x001b),
216                 prt_slot0(0x001c),
217                 prt_slot1(0x001d),
218                 prt_slot2(0x001e),
219                 prt_slot3(0x001f),
220             })
221         }
222
223         Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
224             PRQ0,   8,
225             PRQ1,   8,
226             PRQ2,   8,
227             PRQ3,   8
228         }
229
230         Method(IQST, 1, NotSerialized) {
231             // _STA method - get status
232             If (And(0x80, Arg0)) {
233                 Return (0x09)
234             }
235             Return (0x0B)
236         }
237         Method(IQCR, 1, Serialized) {
238             // _CRS method - get current settings
239             Name(PRR0, ResourceTemplate() {
240                 Interrupt(, Level, ActiveHigh, Shared) { 0 }
241             })
242             CreateDWordField(PRR0, 0x05, PRRI)
243             If (LLess(Arg0, 0x80)) {
244                 Store(Arg0, PRRI)
245             }
246             Return (PRR0)
247         }
248
249 #define define_link(link, uid, reg)                             \
250         Device(link) {                                          \
251             Name(_HID, EISAID("PNP0C0F"))                       \
252             Name(_UID, uid)                                     \
253             Name(_PRS, ResourceTemplate() {                     \
254                 Interrupt(, Level, ActiveHigh, Shared) {        \
255                     5, 10, 11                                   \
256                 }                                               \
257             })                                                  \
258             Method(_STA, 0, NotSerialized) {                    \
259                 Return (IQST(reg))                              \
260             }                                                   \
261             Method(_DIS, 0, NotSerialized) {                    \
262                 Or(reg, 0x80, reg)                              \
263             }                                                   \
264             Method(_CRS, 0, NotSerialized) {                    \
265                 Return (IQCR(reg))                              \
266             }                                                   \
267             Method(_SRS, 1, NotSerialized) {                    \
268                 CreateDWordField(Arg0, 0x05, PRRI)              \
269                 Store(PRRI, reg)                                \
270             }                                                   \
271         }
272
273         define_link(LNKA, 0, PRQ0)
274         define_link(LNKB, 1, PRQ1)
275         define_link(LNKC, 2, PRQ2)
276         define_link(LNKD, 3, PRQ3)
277
278         Device(LNKS) {
279             Name(_HID, EISAID("PNP0C0F"))
280             Name(_UID, 4)
281             Name(_PRS, ResourceTemplate() {
282                 Interrupt(, Level, ActiveHigh, Shared) { 9 }
283             })
284
285             // The SCI cannot be disabled and is always attached to GSI 9,
286             // so these are no-ops.  We only need this link to override the
287             // polarity to active high and match the content of the MADT.
288             Method(_STA, 0, NotSerialized) { Return (0x0b) }
289             Method(_DIS, 0, NotSerialized) { }
290             Method(_CRS, 0, NotSerialized) { Return (_PRS) }
291             Method(_SRS, 1, NotSerialized) { }
292         }
293     }
294
295 #include "acpi-dsdt-cpu-hotplug.dsl"
296
297
298 /****************************************************************
299  * General purpose events
300  ****************************************************************/
301
302     Scope(\_GPE) {
303         Name(_HID, "ACPI0006")
304
305         Method(_L00) {
306         }
307         Method(_E01) {
308             // PCI hotplug event
309             \_SB.PCI0.PCNF()
310         }
311         Method(_E02) {
312             // CPU hotplug event
313             \_SB.PRSC()
314         }
315         Method(_L03) {
316         }
317         Method(_L04) {
318         }
319         Method(_L05) {
320         }
321         Method(_L06) {
322         }
323         Method(_L07) {
324         }
325         Method(_L08) {
326         }
327         Method(_L09) {
328         }
329         Method(_L0A) {
330         }
331         Method(_L0B) {
332         }
333         Method(_L0C) {
334         }
335         Method(_L0D) {
336         }
337         Method(_L0E) {
338         }
339         Method(_L0F) {
340         }
341     }
342 }