1 // 16bit code to handle system clocks.
3 // Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
8 #include "biosvar.h" // SET_BDA
9 #include "bregs.h" // struct bregs
10 #include "hw/pic.h" // pic_eoi1
11 #include "hw/ps2port.h" // ps2_check_event
12 #include "hw/rtc.h" // rtc_read
13 #include "hw/usb-hid.h" // usb_check_event
14 #include "output.h" // debug_enter
15 #include "stacks.h" // yield
16 #include "string.h" // memset
17 #include "util.h" // clock_setup
20 /****************************************************************
22 ****************************************************************/
27 return (val & 0xf) + ((val >> 4) * 10);
35 dprintf(3, "init timer\n");
40 u32 seconds = bcd2bin(rtc_read(CMOS_RTC_SECONDS));
41 u32 minutes = bcd2bin(rtc_read(CMOS_RTC_MINUTES));
42 u32 hours = bcd2bin(rtc_read(CMOS_RTC_HOURS));
43 u32 ticks = ticks_from_ms(((hours * 60 + minutes) * 60 + seconds) * 1000);
44 SET_BDA(timer_counter, ticks % TICKS_PER_DAY);
46 // Setup Century storage
48 Century = rtc_read(CMOS_CENTURY);
50 // Infer current century from the year.
51 u8 year = rtc_read(CMOS_RTC_YEAR);
58 enable_hwirq(0, FUNC16(entry_08));
60 enable_hwirq(8, FUNC16(entry_70));
64 /****************************************************************
65 * Standard clock functions
66 ****************************************************************/
68 // get current clock count
70 handle_1a00(struct bregs *regs)
73 u32 ticks = GET_BDA(timer_counter);
74 regs->cx = ticks >> 16;
76 regs->al = GET_BDA(timer_rollover);
77 SET_BDA(timer_rollover, 0); // reset flag
81 // Set Current Clock Count
83 handle_1a01(struct bregs *regs)
85 u32 ticks = (regs->cx << 16) | regs->dx;
86 SET_BDA(timer_counter, ticks);
87 SET_BDA(timer_rollover, 0); // reset flag
88 // XXX - should use set_code_success()?
95 handle_1a02(struct bregs *regs)
102 regs->dh = rtc_read(CMOS_RTC_SECONDS);
103 regs->cl = rtc_read(CMOS_RTC_MINUTES);
104 regs->ch = rtc_read(CMOS_RTC_HOURS);
105 regs->dl = rtc_read(CMOS_STATUS_B) & RTC_B_DSE;
113 handle_1a03(struct bregs *regs)
115 // Using a debugger, I notice the following masking/setting
116 // of bits in Status Register B, by setting Reg B to
117 // a few values and getting its value after INT 1A was called.
120 // before 1111 1101 0111 1101 0000 0000
121 // after 0110 0010 0110 0010 0000 0010
123 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
124 // My assumption: RegB = ((RegB & 01100000b) | 00000010b)
125 if (rtc_updating()) {
127 // fall through as if an update were not in progress
129 rtc_write(CMOS_RTC_SECONDS, regs->dh);
130 rtc_write(CMOS_RTC_MINUTES, regs->cl);
131 rtc_write(CMOS_RTC_HOURS, regs->ch);
132 // Set Daylight Savings time enabled bit to requested value
133 u8 val8 = ((rtc_read(CMOS_STATUS_B) & (RTC_B_PIE|RTC_B_AIE))
134 | RTC_B_24HR | (regs->dl & RTC_B_DSE));
135 rtc_write(CMOS_STATUS_B, val8);
137 regs->al = val8; // val last written to Reg B
143 handle_1a04(struct bregs *regs)
146 if (rtc_updating()) {
150 regs->cl = rtc_read(CMOS_RTC_YEAR);
151 regs->dh = rtc_read(CMOS_RTC_MONTH);
152 regs->dl = rtc_read(CMOS_RTC_DAY_MONTH);
153 regs->ch = GET_LOW(Century);
160 handle_1a05(struct bregs *regs)
162 // Using a debugger, I notice the following masking/setting
163 // of bits in Status Register B, by setting Reg B to
164 // a few values and getting its value after INT 1A was called.
166 // try#1 try#2 try#3 try#4
167 // before 1111 1101 0111 1101 0000 0010 0000 0000
168 // after 0110 1101 0111 1101 0000 0010 0000 0000
170 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
171 // My assumption: RegB = (RegB & 01111111b)
172 if (rtc_updating()) {
177 rtc_write(CMOS_RTC_YEAR, regs->cl);
178 rtc_write(CMOS_RTC_MONTH, regs->dh);
179 rtc_write(CMOS_RTC_DAY_MONTH, regs->dl);
180 SET_LOW(Century, regs->ch);
181 // clear halt-clock bit
182 u8 val8 = rtc_read(CMOS_STATUS_B) & ~RTC_B_SET;
183 rtc_write(CMOS_STATUS_B, val8);
185 regs->al = val8; // AL = val last written to Reg B
189 // Set Alarm Time in CMOS
191 handle_1a06(struct bregs *regs)
193 // Using a debugger, I notice the following masking/setting
194 // of bits in Status Register B, by setting Reg B to
195 // a few values and getting its value after INT 1A was called.
198 // before 1101 1111 0101 1111 0000 0000
199 // after 0110 1111 0111 1111 0010 0000
201 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
202 // My assumption: RegB = ((RegB & 01111111b) | 00100000b)
203 u8 val8 = rtc_read(CMOS_STATUS_B); // Get Status Reg B
205 if (val8 & RTC_B_AIE) {
206 // Alarm interrupt enabled already
210 if (rtc_updating()) {
212 // fall through as if an update were not in progress
214 rtc_write(CMOS_RTC_SECONDS_ALARM, regs->dh);
215 rtc_write(CMOS_RTC_MINUTES_ALARM, regs->cl);
216 rtc_write(CMOS_RTC_HOURS_ALARM, regs->ch);
217 // enable Status Reg B alarm bit, clear halt clock bit
218 rtc_write(CMOS_STATUS_B, (val8 & ~RTC_B_SET) | RTC_B_AIE);
224 handle_1a07(struct bregs *regs)
226 // Using a debugger, I notice the following masking/setting
227 // of bits in Status Register B, by setting Reg B to
228 // a few values and getting its value after INT 1A was called.
230 // try#1 try#2 try#3 try#4
231 // before 1111 1101 0111 1101 0010 0000 0010 0010
232 // after 0100 0101 0101 0101 0000 0000 0000 0010
234 // Bit4 in try#1 flipped in hardware (forced low) due to bit7=1
235 // My assumption: RegB = (RegB & 01010111b)
236 u8 val8 = rtc_read(CMOS_STATUS_B); // Get Status Reg B
237 // clear clock-halt bit, disable alarm bit
238 rtc_write(CMOS_STATUS_B, val8 & ~(RTC_B_SET|RTC_B_AIE));
240 regs->al = val8; // val last written to Reg B
245 handle_1abb(struct bregs *regs)
250 dprintf(DEBUG_tcg, "16: Calling tpm_interrupt_handler\n");
251 call32(tpm_interrupt_handler32, MAKE_FLATPTR(GET_SEG(SS), regs), 0);
256 handle_1aXX(struct bregs *regs)
258 set_unimplemented(regs);
261 // INT 1Ah Time-of-day Service Entry Point
263 handle_1a(struct bregs *regs)
265 debug_enter(regs, DEBUG_HDL_1a);
267 case 0x00: handle_1a00(regs); break;
268 case 0x01: handle_1a01(regs); break;
269 case 0x02: handle_1a02(regs); break;
270 case 0x03: handle_1a03(regs); break;
271 case 0x04: handle_1a04(regs); break;
272 case 0x05: handle_1a05(regs); break;
273 case 0x06: handle_1a06(regs); break;
274 case 0x07: handle_1a07(regs); break;
275 case 0xbb: handle_1abb(regs); break;
276 default: handle_1aXX(regs); break;
280 // Update main tick counter
284 u32 counter = GET_BDA(timer_counter);
286 // compare to one days worth of timer ticks at 18.2 hz
287 if (counter >= TICKS_PER_DAY) {
288 // there has been a midnight rollover at this point
290 SET_BDA(timer_rollover, GET_BDA(timer_rollover) + 1);
292 SET_BDA(timer_counter, counter);
294 // Check for internal events.
300 // INT 08h System Timer ISR Entry Point
304 debug_isr(DEBUG_ISR_08);
307 // chain to user timer tick INT #0x1c
309 memset(&br, 0, sizeof(br));
311 call16_int(0x1c, &br);
316 u32 last_timer_check VARLOW;
318 // Simulate timer irq on machines without hardware irqs
322 if (CONFIG_HARDWARE_IRQ)
324 if (!timer_check(GET_LOW(last_timer_check)))
326 SET_LOW(last_timer_check, timer_calc(ticks_to_ms(1)));
331 /****************************************************************
333 ****************************************************************/
335 // Calculate the timer value at 'count' number of full timer ticks in
338 irqtimer_calc_ticks(u32 count)
340 return (GET_BDA(timer_counter) + count + 1) % TICKS_PER_DAY;
343 // Return the timer value that is 'msecs' time in the future.
345 irqtimer_calc(u32 msecs)
348 return GET_BDA(timer_counter);
349 return irqtimer_calc_ticks(ticks_from_ms(msecs));
352 // Check if the given timer value has passed.
354 irqtimer_check(u32 end)
356 return (((GET_BDA(timer_counter) + TICKS_PER_DAY - end) % TICKS_PER_DAY)
357 < (TICKS_PER_DAY/2));
361 /****************************************************************
363 ****************************************************************/
366 set_usertimer(u32 usecs, u16 seg, u16 offset)
368 if (GET_BDA(rtc_wait_flag) & RWS_WAIT_PENDING)
371 // Interval not already set.
372 SET_BDA(rtc_wait_flag, RWS_WAIT_PENDING); // Set status byte.
373 SET_BDA(user_wait_complete_flag, SEGOFF(seg, offset));
374 SET_BDA(user_wait_timeout, usecs);
380 clear_usertimer(void)
382 if (!(GET_BDA(rtc_wait_flag) & RWS_WAIT_PENDING))
384 // Turn off status byte.
385 SET_BDA(rtc_wait_flag, 0);
389 #define RET_ECLOCKINUSE 0x83
391 // Wait for CX:DX microseconds
393 handle_1586(struct bregs *regs)
395 if (!CONFIG_RTC_TIMER) {
396 set_code_unimplemented(regs, RET_EUNSUPPORTED);
399 // Use the rtc to wait for the specified time.
401 u32 count = (regs->cx << 16) | regs->dx;
402 int ret = set_usertimer(count, GET_SEG(SS), (u32)&statusflag);
404 set_code_invalid(regs, RET_ECLOCKINUSE);
412 // Set Interval requested.
414 handle_158300(struct bregs *regs)
416 int ret = set_usertimer((regs->cx << 16) | regs->dx, regs->es, regs->bx);
418 // Interval already set.
419 set_code_invalid(regs, RET_EUNSUPPORTED);
424 // Clear interval requested
426 handle_158301(struct bregs *regs)
433 handle_1583XX(struct bregs *regs)
435 set_code_unimplemented(regs, RET_EUNSUPPORTED);
440 handle_1583(struct bregs *regs)
442 if (!CONFIG_RTC_TIMER) {
447 case 0x00: handle_158300(regs); break;
448 case 0x01: handle_158301(regs); break;
449 default: handle_1583XX(regs); break;
453 #define USEC_PER_RTC DIV_ROUND_CLOSEST(1000000, 1024)
455 // int70h: IRQ8 - CMOS RTC
459 if (!CONFIG_RTC_TIMER)
461 debug_isr(DEBUG_ISR_70);
463 // Check which modes are enabled and have occurred.
464 u8 registerB = rtc_read(CMOS_STATUS_B);
465 u8 registerC = rtc_read(CMOS_STATUS_C);
467 if (!(registerB & (RTC_B_PIE|RTC_B_AIE)))
469 if (registerC & RTC_B_AIE) {
470 // Handle Alarm Interrupt.
472 memset(&br, 0, sizeof(br));
474 call16_int(0x4a, &br);
476 if (!(registerC & RTC_B_PIE))
479 // Handle Periodic Interrupt.
483 if (!GET_BDA(rtc_wait_flag))
486 // Wait Interval (Int 15, AH=83) active.
487 u32 time = GET_BDA(user_wait_timeout); // Time left in microseconds.
488 if (time < USEC_PER_RTC) {
489 // Done waiting - write to specified flag byte.
490 struct segoff_s segoff = GET_BDA(user_wait_complete_flag);
491 u16 ptr_seg = segoff.seg;
492 u8 *ptr_far = (u8*)(segoff.offset+0);
493 u8 oldval = GET_FARVAR(ptr_seg, *ptr_far);
494 SET_FARVAR(ptr_seg, *ptr_far, oldval | 0x80);
499 time -= USEC_PER_RTC;
500 SET_BDA(user_wait_timeout, time);