1 # Kconfig SeaBIOS configuration
3 mainmenu "SeaBIOS Configuration"
5 menu "General Features"
12 bool "Build for coreboot"
14 Configure as a coreboot payload.
17 bool "Build for QEMU/Xen/KVM/Bochs"
20 Configure for an emulated machine (QEMU, Xen, KVM, or Bochs).
23 bool "Build as Compatibilty Support Module for EFI BIOS"
25 Configure to be used by EFI firmware as Compatibility Support
26 module (CSM) to provide legacy BIOS services.
31 bool "Support hardware found on emulators (QEMU/Xen/KVM/Bochs)" if !QEMU
34 Support virtual hardware when the code detects it is
35 running on an emulator.
39 bool "Support Xen HVM"
42 Configure to be used by xen hvmloader, for a HVM guest.
45 bool "Parallelize hardware init"
48 Support running hardware initialization in parallel.
51 bool "Copy init code to high memory"
54 Support relocating the one time initialization code to high memory.
61 Support an interactive boot menu at end of post.
64 bool "Graphical boot splash screen"
67 Support showing a graphical boot splash screen.
73 Support controlling of the boot order via the fw_cfg/CBFS
78 bool "coreboot CBFS support"
81 Support searching coreboot flash format.
83 depends on COREBOOT_FLASH
84 bool "CBFS lzma support"
87 Support CBFS files compressed using the lzma decompression
90 depends on COREBOOT_FLASH
91 hex "CBFS memory end location"
94 Memory address of where the CBFS data ends. This should
95 be zero for normal builds. It may be a non-zero value if
96 the CBFS filesystem is at a non-standard location (eg,
97 0xffe00000 if CBFS ends 2Meg below the end of flash).
100 depends on COREBOOT_FLASH
101 bool "Floppy images in CBFS"
104 Support floppy images in coreboot flash.
105 config ENTRY_EXTRASTACK
106 bool "Use internal stack for 16bit interrupt entry points"
109 Utilize an internal stack for all the legacy 16bit
110 interrupt entry points. This reduces the amount of space
111 on the caller's stack that SeaBIOS uses. This may
112 adversely impact any legacy operating systems that call
113 the BIOS in 16bit protected mode.
115 config MALLOC_UPPERMEMORY
116 bool "Allocate memory that needs to be in first Meg above 0xc0000"
119 Use the "Upper Memory Block" area (0xc0000-0xf0000) for
120 internal "low memory" allocations. If this is not
121 selected, the memory is instead allocated from the
122 "9-segment" (0x90000-0xa0000).
125 int "ROM size (in KB)"
128 Set the ROM size. Say '0' here to make seabios figure the
129 needed size automatically.
131 Currently SeaBIOS will easily fit into 256 KB. To make it fit
132 it into 128 KB (which was big enouth for a long time) you'll
133 probably have to disable some featues such as xhci support.
137 menu "Hardware support"
140 bool "ATA controllers"
143 Support for IDE disk code.
149 Detect and try to use ATA bus mastering DMA controllers.
155 Use 32bit PIO accesses on ATA (minor optimization on PCI transfers).
158 bool "AHCI controllers"
161 Support for AHCI disk code.
163 depends on DRIVES && QEMU_HARDWARE
164 bool "SD controllers"
167 Support for SD cards on PCI host controllers.
169 depends on DRIVES && QEMU_HARDWARE
170 bool "virtio-blk controllers"
173 Support boot from virtio-blk storage.
175 depends on DRIVES && QEMU_HARDWARE
176 bool "virtio-scsi controllers"
179 Support boot from virtio-scsi storage.
181 depends on DRIVES && QEMU_HARDWARE
182 bool "PVSCSI controllers"
185 Support boot from Paravirtualized SCSI storage. This kind of storage
186 is mainly supported by VMware ESX hypervisor. It is commonly used
187 to allow fast storage access by communicating directly with the
188 underlying hypervisor. Enabling this type of boot will allow
189 booting directly from images imported from an ESX platform,
190 without the need to use slower emulation of storage controllers
193 depends on DRIVES && QEMU_HARDWARE
194 bool "AMD PCscsi controllers"
197 Support boot from AMD PCscsi storage.
199 depends on DRIVES && QEMU_HARDWARE
200 bool "lsi53c895a scsi controllers"
203 Support boot from qemu-emulated lsi53c895a scsi storage.
206 bool "LSI MegaRAID SAS controllers"
209 Support boot from LSI MegaRAID SAS scsi storage.
212 bool "Floppy controller"
215 Support floppy drive access.
218 depends on KEYBOARD || MOUSE
222 Support PS2 ports (keyboard and mouse).
231 bool "USB UHCI controllers"
234 Support USB UHCI controllers.
237 bool "USB OHCI controllers"
240 Support USB OHCI controllers.
243 bool "USB EHCI controllers"
246 Support USB EHCI controllers.
249 bool "USB XHCI controllers"
252 Support USB XHCI controllers.
254 depends on USB && DRIVES
258 Support USB BOT (bulk-only transport) disks.
260 depends on USB && DRIVES
264 Support USB UAS (usb attached scsi) disks.
272 depends on USB && KEYBOARD
276 Support USB keyboards.
278 depends on USB && MOUSE
288 Support serial ports. This also enables int 14 serial port calls.
293 Support parallel ports. This also enables int 17 parallel port calls.
297 bool "System Management Mode (SMM)"
300 Support System Management Mode (on emulators).
307 bool "Initialize MTRRs"
310 Initialize the Memory Type Range Registers (on emulators).
312 bool "Use ACPI timer"
315 Use the ACPI timer instead of the TSC for timekeeping (on qemu).
318 menu "BIOS interfaces"
320 bool "Drive interface"
323 Support int13 disk/floppy drive functions.
327 bool "DVD/CDROM booting"
330 Support for booting from a CD. (El Torito spec support.)
332 depends on CDROM_BOOT
333 bool "DVD/CDROM boot drive emulation"
336 Support bootable CDROMs that emulate a floppy/harddrive.
339 bool "PCIBIOS interface"
342 Support int 1a/b1 PCI BIOS calls.
347 Support int 15/53 APM BIOS calls.
349 bool "PnP BIOS interface"
352 Support PnP BIOS entry point.
357 Support finding and running option roms during POST.
358 config OPTIONROMS_DEPLOYED
359 depends on OPTIONROMS && QEMU
360 bool "Option roms are already at 0xc0000-0xf0000"
363 Select this if option ROMs are already copied to
364 0xc0000-0xf0000. This must only be selected when using
365 Bochs or QEMU versions older than 0.12.
367 depends on OPTIONROMS
371 Support Post Memory Manager (PMM) entry point.
373 bool "Boot interface"
376 Support int 19/18 system bootup support.
378 bool "Keyboard interface"
381 Support int 16 keyboard calls.
382 config KBD_CALL_INT15_4F
384 bool "Keyboard hook interface"
387 Support calling int155f on each keyboard event.
389 bool "Mouse interface"
392 Support for int15c2 mouse calls.
398 Support S3 resume handler.
401 bool "Hardware specific VGA helpers"
404 Support int 155f BIOS callbacks specific to some Intel and
405 VIA on-board vga devices.
411 Disable A20 on 16bit boot.
413 config WRITABLE_UPPERMEMORY
415 bool "Make unused UMB memory read/writeable."
418 When selected, the "Upper Memory Block" area
419 (0x90000-0xa0000) that is not used for option roms will be
420 made writable. This allows the ram to be directly
421 modified by programs. However, some old DOS high memory
422 managers may require the UMB region to be read-only.
432 Support generation of a PIR table in 0xf000 segment.
437 Support generation of MPTable.
442 Support generation of SM BIOS tables. This is also
443 sometimes called DMI.
448 Support generation of ACPI tables.
450 bool "Include default ACPI DSDT"
454 Include default DSDT ACPI table in BIOS.
455 Required for QEMU 1.3 and older.
456 This option can be disabled for QEMU 1.4 and newer
457 to save some space in the ROM file.
459 config FW_ROMFILE_LOAD
460 bool "Load BIOS tables from ROM files"
461 depends on QEMU_HARDWARE
464 Support loading BIOS firmware tables from ROM files.
465 At the moment, only ACPI tables can be loaded in this way.
466 Required for QEMU 1.7 and newer.
467 This option can be disabled for QEMU 1.6 and older
468 to save some space in the ROM file.
472 source vgasrc/Kconfig
479 Control how verbose debug output is. The higher the
480 number, the more verbose SeaBIOS will be.
482 Set to zero to disable debugging.
485 depends on DEBUG_LEVEL != 0
486 bool "Serial port debugging"
489 Send debugging information to serial port.
490 config DEBUG_SERIAL_PORT
491 depends on DEBUG_SERIAL
492 hex "Serial port base address"
495 Base port for serial - generally 0x3f8, 0x2f8, 0x3e8, or 0x2e8.
498 depends on QEMU_HARDWARE && DEBUG_LEVEL != 0
499 bool "Special IO port debugging"
502 Some emulators or hypervisors provide with a way to output debug
503 information by outputing strings in a special port present in the
506 config DEBUG_COREBOOT
507 depends on COREBOOT && DEBUG_LEVEL != 0
508 bool "coreboot cbmem debug logging"
511 Send debugging information to the coreboot cbmem console buffer.
512 Needs CONFIG_CONSOLE_CBMEM in coreboot. You can read the log
513 after boot using 'cbmem -c'. Only 32bit code (basically every-
514 thing before booting the OS) writes to the log buffer.