qemu/roms/openbios/drivers/usbohci.c

   1 /*
   2  * Driver for USB OHCI ported from CoreBoot
   3  *
   4  * Copyright (C) 2014 BALATON Zoltan
   5  *
   6  * This file was part of the libpayload project.
   7  *
   8  * Copyright (C) 2010 Patrick Georgi
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  * 3. The name of the author may not be used to endorse or promote products
  19  *    derived from this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  31  * SUCH DAMAGE.
  32  */
  33
  34 //#define USB_DEBUG_ED
  35
  36 #include "config.h"
  37 #include <asm/io.h>
  38 #include <libopenbios/ofmem.h>
  39 #include "timer.h"
  40 #include "drivers/pci.h"
  41 #include "pci.h"
  42 #include <drivers/usb.h>
  43 #include "usbohci_private.h"
  44 #include "usbohci.h"
  45
  46 static void ohci_start (hci_t *controller);
  47 static void ohci_stop (hci_t *controller);
  48 static void ohci_reset (hci_t *controller);
  49 static void ohci_shutdown (hci_t *controller);
  50 static int ohci_bulk (endpoint_t *ep, int size, u8 *data, int finalize);
  51 static int ohci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq,
  52                          int dalen, u8 *data);
  53 static void* ohci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming);
  54 static void ohci_destroy_intr_queue (endpoint_t *ep, void *queue);
  55 static u8* ohci_poll_intr_queue (void *queue);
  56 static void ohci_process_done_queue(ohci_t *ohci, int spew_debug);
  57
  58 #ifdef USB_DEBUG_ED
  59 static void
  60 dump_td (td_t *cur)
  61 {
  62         usb_debug("+---------------------------------------------------+\n");
  63         if (((__le32_to_cpu(cur->config) & (3UL << 19)) >> 19) == 0)
  64                 usb_debug("|..[SETUP]..........................................|\n");
  65         else if (((__le32_to_cpu(cur->config) & (3UL << 8)) >> 8) == 2)
  66                 usb_debug("|..[IN].............................................|\n");
  67         else if (((__le32_to_cpu(cur->config) & (3UL << 8)) >> 8) == 1)
  68                 usb_debug("|..[OUT]............................................|\n");
  69         else
  70                 usb_debug("|..[]...............................................|\n");
  71         usb_debug("|:|============ OHCI TD at [0x%08lx] ==========|:|\n", virt_to_phys(cur));
  72         usb_debug("|:| ERRORS = [%ld] | CONFIG = [0x%08x] |        |:|\n",
  73                   3 - ((__le32_to_cpu(cur->config) & (3UL << 26)) >> 26), __le32_to_cpu(cur->config));
  74         usb_debug("|:+-----------------------------------------------+:|\n");
  75         usb_debug("|:|   C   | Condition Code               |   [%02ld] |:|\n",
  76                  (__le32_to_cpu(cur->config) & (0xFUL << 28)) >> 28);
  77         usb_debug("|:|   O   | Direction/PID                |    [%ld] |:|\n",
  78                  (__le32_to_cpu(cur->config) & (3UL << 19)) >> 19);
  79         usb_debug("|:|   N   | Buffer Rounding              |    [%ld] |:|\n",
  80                  (__le32_to_cpu(cur->config) & (1UL << 18)) >> 18);
  81         usb_debug("|:|   F   | Delay Intterrupt             |    [%ld] |:|\n",
  82                  (__le32_to_cpu(cur->config) & (7UL << 21)) >> 21);
  83         usb_debug("|:|   I   | Data Toggle                  |    [%ld] |:|\n",
  84                  (__le32_to_cpu(cur->config) & (3UL << 24)) >> 24);
  85         usb_debug("|:|   G   | Error Count                  |    [%ld] |:|\n",
  86                  (__le32_to_cpu(cur->config) & (3UL << 26)) >> 26);
  87         usb_debug("|:+-----------------------------------------------+:|\n");
  88         usb_debug("|:| Current Buffer Pointer         [0x%08x]   |:|\n", __le32_to_cpu(cur->current_buffer_pointer));
  89         usb_debug("|:+-----------------------------------------------+:|\n");
  90         usb_debug("|:| Next TD                        [0x%08x]   |:|\n", __le32_to_cpu(cur->next_td));
  91         usb_debug("|:+-----------------------------------------------+:|\n");
  92         usb_debug("|:| Current Buffer End             [0x%08x]   |:|\n", __le32_to_cpu(cur->buffer_end));
  93         usb_debug("|:|-----------------------------------------------|:|\n");
  94         usb_debug("|...................................................|\n");
  95         usb_debug("+---------------------------------------------------+\n");
  96 }
  97
  98 static void
  99 dump_ed (ed_t *cur)
 100 {
 101         td_t *tmp_td = NULL;
 102         usb_debug("+===================================================+\n");
 103         usb_debug("| ############# OHCI ED at [0x%08lx] ########### |\n", virt_to_phys(cur));
 104         usb_debug("+---------------------------------------------------+\n");
 105         usb_debug("| Next Endpoint Descriptor       [0x%08lx]       |\n", __le32_to_cpu(cur->next_ed) & ~0xFUL);
 106         usb_debug("+---------------------------------------------------+\n");
 107         usb_debug("|        |               @ 0x%08x :             |\n", __le32_to_cpu(cur->config));
 108         usb_debug("|   C    | Maximum Packet Length           | [%04ld] |\n",
 109                  ((__le32_to_cpu(cur->config) & (0x3fffUL << 16)) >> 16));
 110         usb_debug("|   O    | Function Address                | [%04d] |\n",
 111                  __le32_to_cpu(cur->config) & 0x7F);
 112         usb_debug("|   N    | Endpoint Number                 |   [%02ld] |\n",
 113                  (__le32_to_cpu(cur->config) & (0xFUL << 7)) >> 7);
 114         usb_debug("|   F    | Endpoint Direction              |    [%ld] |\n",
 115                  ((__le32_to_cpu(cur->config) & (3UL << 11)) >> 11));
 116         usb_debug("|   I    | Endpoint Speed                  |    [%ld] |\n",
 117                  ((__le32_to_cpu(cur->config) & (1UL << 13)) >> 13));
 118         usb_debug("|   G    | Skip                            |    [%ld] |\n",
 119                  ((__le32_to_cpu(cur->config) & (1UL << 14)) >> 14));
 120         usb_debug("|        | Format                          |    [%ld] |\n",
 121                  ((__le32_to_cpu(cur->config) & (1UL << 15)) >> 15));
 122         usb_debug("+---------------------------------------------------+\n");
 123         usb_debug("| TD Queue Tail Pointer          [0x%08lx]       |\n",
 124                  __le32_to_cpu(cur->tail_pointer) & ~0xFUL);
 125         usb_debug("+---------------------------------------------------+\n");
 126         usb_debug("| TD Queue Head Pointer          [0x%08lx]       |\n",
 127                  __le32_to_cpu(cur->head_pointer) & ~0xFUL);
 128         usb_debug("| CarryToggleBit    [%d]          Halted   [%d]       |\n",
 129                  (u16)(__le32_to_cpu(cur->head_pointer) & 0x2UL)>>1, (u16)(__le32_to_cpu(cur->head_pointer) & 0x1UL));
 130
 131         tmp_td = (td_t *)phys_to_virt((__le32_to_cpu(cur->head_pointer) & ~0xFUL));
 132         if ((__le32_to_cpu(cur->head_pointer) & ~0xFUL) != (__le32_to_cpu(cur->tail_pointer) & ~0xFUL)) {
 133                 usb_debug("|:::::::::::::::::: OHCI TD CHAIN ::::::::::::::::::|\n");
 134                 while (virt_to_phys(tmp_td) != (__le32_to_cpu(cur->tail_pointer) & ~0xFUL))
 135                 {
 136                         dump_td(tmp_td);
 137                         tmp_td = (td_t *)phys_to_virt((__le32_to_cpu(tmp_td->next_td) & ~0xFUL));
 138                 }
 139                 usb_debug("|:::::::::::::::: EOF OHCI TD CHAIN ::::::::::::::::|\n");
 140                 usb_debug("+---------------------------------------------------+\n");
 141         } else {
 142                 usb_debug("+---------------------------------------------------+\n");
 143         }
 144 }
 145 #endif
 146
 147 static void
 148 ohci_reset (hci_t *controller)
 149 {
 150         if (controller == NULL)
 151                 return;
 152
 153         OHCI_INST(controller)->opreg->HcCommandStatus = __cpu_to_le32(HostControllerReset);
 154         mdelay(2); /* wait 2ms */
 155         OHCI_INST(controller)->opreg->HcControl = 0;
 156         mdelay(10); /* wait 10ms */
 157 }
 158
 159 static void
 160 ohci_reinit (hci_t *controller)
 161 {
 162 }
 163
 164 hci_t *
 165 ohci_init (void *bar)
 166 {
 167         int i;
 168
 169         hci_t *controller = new_controller ();
 170
 171         if (!controller) {
 172                 printk("Could not create USB controller instance.\n");
 173                 return NULL;
 174         }
 175
 176         controller->instance = malloc (sizeof (ohci_t));
 177         if(!controller->instance) {
 178                 printk("Not enough memory creating USB controller instance.\n");
 179                 return NULL;
 180         }
 181
 182         controller->type = OHCI;
 183
 184         controller->start = ohci_start;
 185         controller->stop = ohci_stop;
 186         controller->reset = ohci_reset;
 187         controller->init = ohci_reinit;
 188         controller->shutdown = ohci_shutdown;
 189         controller->bulk = ohci_bulk;
 190         controller->control = ohci_control;
 191         controller->set_address = generic_set_address;
 192         controller->finish_device_config = NULL;
 193         controller->destroy_device = NULL;
 194         controller->create_intr_queue = ohci_create_intr_queue;
 195         controller->destroy_intr_queue = ohci_destroy_intr_queue;
 196         controller->poll_intr_queue = ohci_poll_intr_queue;
 197         for (i = 0; i < 128; i++) {
 198                 controller->devices[i] = 0;
 199         }
 200         init_device_entry (controller, 0);
 201         OHCI_INST (controller)->roothub = controller->devices[0];
 202
 203         controller->reg_base = (u32)(unsigned long)bar;
 204         OHCI_INST (controller)->opreg = (opreg_t*)phys_to_virt(controller->reg_base);
 205         usb_debug("OHCI Version %x.%x\n",
 206                   (READ_OPREG(OHCI_INST(controller), HcRevision) >> 4) & 0xf,
 207                   READ_OPREG(OHCI_INST(controller), HcRevision) & 0xf);
 208
 209         if ((READ_OPREG(OHCI_INST(controller), HcControl) & HostControllerFunctionalStateMask) == USBReset) {
 210                 /* cold boot */
 211                 OHCI_INST (controller)->opreg->HcControl &= __cpu_to_le32(~RemoteWakeupConnected);
 212                 OHCI_INST (controller)->opreg->HcFmInterval =
 213                         __cpu_to_le32((11999 * FrameInterval) | ((((11999 - 210)*6)/7) * FSLargestDataPacket));
 214                 /* TODO: right value for PowerOnToPowerGoodTime ? */
 215                 OHCI_INST (controller)->opreg->HcRhDescriptorA =
 216                         __cpu_to_le32(NoPowerSwitching | NoOverCurrentProtection | (10 * PowerOnToPowerGoodTime));
 217                 OHCI_INST (controller)->opreg->HcRhDescriptorB = __cpu_to_le32(0 * DeviceRemovable);
 218                 udelay(100); /* TODO: reset asserting according to USB spec */
 219         } else if ((READ_OPREG(OHCI_INST(controller), HcControl) & HostControllerFunctionalStateMask) != USBOperational) {
 220                 OHCI_INST (controller)->opreg->HcControl =
 221                         __cpu_to_le32((READ_OPREG(OHCI_INST(controller), HcControl) & ~HostControllerFunctionalStateMask)
 222                         | USBResume);
 223                 udelay(100); /* TODO: resume time according to USB spec */
 224         }
 225         int interval = OHCI_INST (controller)->opreg->HcFmInterval;
 226
 227         OHCI_INST (controller)->opreg->HcCommandStatus = __cpu_to_le32(HostControllerReset);
 228         udelay (10); /* at most 10us for reset to complete. State must be set to Operational within 2ms (5.1.1.4) */
 229         OHCI_INST (controller)->opreg->HcFmInterval = interval;
 230         ofmem_posix_memalign((void **)&(OHCI_INST (controller)->hcca), 256, 256);
 231         memset((void*)OHCI_INST (controller)->hcca, 0, 256);
 232
 233         usb_debug("HCCA addr %p\n", OHCI_INST(controller)->hcca);
 234         /* Initialize interrupt table. */
 235         u32 *const intr_table = OHCI_INST(controller)->hcca->HccaInterruptTable;
 236         ed_t *const periodic_ed;
 237         ofmem_posix_memalign((void **)&periodic_ed, sizeof(ed_t), sizeof(ed_t));
 238         memset((void *)periodic_ed, 0, sizeof(*periodic_ed));
 239         for (i = 0; i < 32; ++i)
 240                 intr_table[i] = __cpu_to_le32(virt_to_phys(periodic_ed));
 241         OHCI_INST (controller)->periodic_ed = periodic_ed;
 242
 243         OHCI_INST (controller)->opreg->HcHCCA = __cpu_to_le32(virt_to_phys(OHCI_INST(controller)->hcca));
 244         /* Make sure periodic schedule is enabled. */
 245         OHCI_INST (controller)->opreg->HcControl |= __cpu_to_le32(PeriodicListEnable);
 246         OHCI_INST (controller)->opreg->HcControl &= __cpu_to_le32(~IsochronousEnable); // unused by this driver
 247         // disable everything, contrary to what OHCI spec says in 5.1.1.4, as we don't need IRQs
 248         OHCI_INST (controller)->opreg->HcInterruptEnable = __cpu_to_le32(1<<31);
 249         OHCI_INST (controller)->opreg->HcInterruptDisable = __cpu_to_le32(~(1<<31));
 250         OHCI_INST (controller)->opreg->HcInterruptStatus = __cpu_to_le32(~0);
 251         OHCI_INST (controller)->opreg->HcPeriodicStart =
 252                 __cpu_to_le32((READ_OPREG(OHCI_INST(controller), HcFmInterval) & FrameIntervalMask) / 10 * 9);
 253         OHCI_INST (controller)->opreg->HcControl = __cpu_to_le32((READ_OPREG(OHCI_INST(controller), HcControl)
 254                                                                 & ~HostControllerFunctionalStateMask) | USBOperational);
 255
 256         mdelay(100);
 257
 258         controller->devices[0]->controller = controller;
 259         controller->devices[0]->init = ohci_rh_init;
 260         controller->devices[0]->init (controller->devices[0]);
 261         return controller;
 262 }
 263
 264 hci_t *
 265 ohci_pci_init (pci_addr addr)
 266 {
 267         u32 reg_base;
 268         uint16_t cmd;
 269
 270         cmd = pci_config_read16(addr, PCI_COMMAND);
 271         cmd |= PCI_COMMAND_BUS_MASTER;
 272         pci_config_write16(addr, PCI_COMMAND, cmd);
 273
 274         /* regarding OHCI spec, Appendix A, BAR_OHCI register description, Table A-4
 275          * BASE ADDRESS only [31-12] bits. All other usually 0, but not all.
 276          * OHCI mandates MMIO, so bit 0 is clear */
 277         reg_base = pci_config_read32 (addr, PCI_BASE_ADDR_0) & 0xfffff000;
 278
 279         return ohci_init((void *)(unsigned long)reg_base);
 280 }
 281
 282 static void
 283 ohci_shutdown (hci_t *controller)
 284 {
 285         if (controller == 0)
 286                 return;
 287         detach_controller (controller);
 288         ohci_stop(controller);
 289         OHCI_INST (controller)->roothub->destroy (OHCI_INST (controller)->
 290                                                   roothub);
 291         controller->reset (controller);
 292         free ((void *)OHCI_INST (controller)->periodic_ed);
 293         free (OHCI_INST (controller));
 294         free (controller);
 295 }
 296
 297 static void
 298 ohci_start (hci_t *controller)
 299 {
 300 // TODO: turn on all operation of OHCI, but assume that it's initialized.
 301 }
 302
 303 static void
 304 ohci_stop (hci_t *controller)
 305 {
 306 // TODO: turn off all operation of OHCI
 307 }
 308
 309 static int
 310 wait_for_ed(usbdev_t *dev, ed_t *head, int pages)
 311 {
 312         usb_debug("Waiting for %d pages on dev %p with head %p\n", pages, dev, head);
 313         /* wait for results */
 314         /* TOTEST: how long to wait?
 315          *         give 2s per TD (2 pages) plus another 2s for now
 316          */
 317         int timeout = pages*1000 + 2000;
 318         while (((__le32_to_cpu(head->head_pointer) & ~3) != __le32_to_cpu(head->tail_pointer)) &&
 319                 !(__le32_to_cpu(head->head_pointer) & 1) &&
 320                 ((__le32_to_cpu((((td_t*)phys_to_virt(__le32_to_cpu(head->head_pointer) & ~3)))->config)
 321                 & TD_CC_MASK) >= TD_CC_NOACCESS) && timeout--) {
 322                 /* don't log every ms */
 323                 if (!(timeout % 100))
 324                 usb_debug("intst: %x; ctrl: %x; cmdst: %x; head: %x -> %x, tail: %x, condition: %x\n",
 325                           READ_OPREG(OHCI_INST(dev->controller), HcInterruptStatus),
 326                           READ_OPREG(OHCI_INST(dev->controller), HcControl),
 327                           READ_OPREG(OHCI_INST(dev->controller), HcCommandStatus),
 328                         __le32_to_cpu(head->head_pointer),
 329                         __le32_to_cpu(((td_t*)phys_to_virt(__le32_to_cpu(head->head_pointer) & ~3))->next_td),
 330                         __le32_to_cpu(head->tail_pointer),
 331                         (__le32_to_cpu(((td_t*)phys_to_virt(__le32_to_cpu(head->head_pointer) & ~3))->config) & TD_CC_MASK) >> TD_CC_SHIFT);
 332                 mdelay(1);
 333         }
 334         if (timeout < 0)
 335                 usb_debug("Error: ohci: endpoint "
 336                         "descriptor processing timed out.\n");
 337         /* Clear the done queue. */
 338         ohci_process_done_queue(OHCI_INST(dev->controller), 1);
 339
 340         if (__le32_to_cpu(head->head_pointer) & 1) {
 341                 usb_debug("HALTED!\n");
 342                 return 1;
 343         }
 344         return 0;
 345 }
 346
 347 static void
 348 ohci_free_ed (ed_t *const head)
 349 {
 350         /* In case the transfer canceled, we have to free unprocessed TDs. */
 351         while ((__le32_to_cpu(head->head_pointer) & ~0x3) != __le32_to_cpu(head->tail_pointer)) {
 352                 /* Save current TD pointer. */
 353                 td_t *const cur_td =
 354                         (td_t*)phys_to_virt(__le32_to_cpu(head->head_pointer) & ~0x3);
 355                 /* Advance head pointer. */
 356                 head->head_pointer = cur_td->next_td;
 357                 /* Free current TD. */
 358                 free((void *)cur_td);
 359         }
 360
 361         /* Always free the dummy TD */
 362         if ((__le32_to_cpu(head->head_pointer) & ~0x3) == __le32_to_cpu(head->tail_pointer))
 363                 free(phys_to_virt(__le32_to_cpu(head->head_pointer) & ~0x3));
 364         /* and the ED. */
 365         free((void *)head);
 366 }
 367
 368 static int
 369 ohci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen,
 370               unsigned char *data)
 371 {
 372         td_t *cur;
 373
 374         // pages are specified as 4K in OHCI, so don't use getpagesize()
 375         int first_page = (unsigned long)data / 4096;
 376         int last_page = (unsigned long)(data+dalen-1)/4096;
 377         if (last_page < first_page) last_page = first_page;
 378         int pages = (dalen==0)?0:(last_page - first_page + 1);
 379
 380         /* First TD. */
 381         td_t *const first_td;
 382         ofmem_posix_memalign((void **)&first_td, sizeof(td_t), sizeof(td_t));
 383         memset((void *)first_td, 0, sizeof(*first_td));
 384         cur = first_td;
 385
 386         cur->config = __cpu_to_le32(TD_DIRECTION_SETUP |
 387                 TD_DELAY_INTERRUPT_NOINTR |
 388                 TD_TOGGLE_FROM_TD |
 389                 TD_TOGGLE_DATA0 |
 390                 TD_CC_NOACCESS);
 391         cur->current_buffer_pointer = __cpu_to_le32(virt_to_phys(devreq));
 392         cur->buffer_end = __cpu_to_le32(virt_to_phys((char *)devreq + drlen - 1));
 393
 394         while (pages > 0) {
 395                 /* One more TD. */
 396                 td_t *const next;
 397                 ofmem_posix_memalign((void **)&next, sizeof(td_t), sizeof(td_t));
 398                 memset((void *)next, 0, sizeof(*next));
 399                 /* Linked to the previous. */
 400                 cur->next_td = __cpu_to_le32(virt_to_phys(next));
 401                 /* Advance to the new TD. */
 402                 cur = next;
 403
 404                 cur->config = __cpu_to_le32((dir == IN ? TD_DIRECTION_IN : TD_DIRECTION_OUT) |
 405                         TD_DELAY_INTERRUPT_NOINTR |
 406                         TD_TOGGLE_FROM_ED |
 407                         TD_CC_NOACCESS);
 408                 cur->current_buffer_pointer = __cpu_to_le32(virt_to_phys(data));
 409                 pages--;
 410                 int consumed = (4096 - ((unsigned long)data % 4096));
 411                 if (consumed >= dalen) {
 412                         // end of data is within same page
 413                         cur->buffer_end = __cpu_to_le32(virt_to_phys(data + dalen - 1));
 414                         dalen = 0;
 415                         /* assert(pages == 0); */
 416                 } else {
 417                         dalen -= consumed;
 418                         data += consumed;
 419                         pages--;
 420                         int second_page_size = dalen;
 421                         if (dalen > 4096) {
 422                                 second_page_size = 4096;
 423                         }
 424                         cur->buffer_end = __cpu_to_le32(virt_to_phys(data + second_page_size - 1));
 425                         dalen -= second_page_size;
 426                         data += second_page_size;
 427                 }
 428         }
 429
 430         /* One more TD. */
 431         td_t *const next_td;
 432         ofmem_posix_memalign((void **)&next_td, sizeof(td_t), sizeof(td_t));
 433         memset((void *)next_td, 0, sizeof(*next_td));
 434         /* Linked to the previous. */
 435         cur->next_td = __cpu_to_le32(virt_to_phys(next_td));
 436         /* Advance to the new TD. */
 437         cur = next_td;
 438         cur->config = __cpu_to_le32((dir == IN ? TD_DIRECTION_OUT : TD_DIRECTION_IN) |
 439                 TD_DELAY_INTERRUPT_ZERO | /* Write done head after this TD. */
 440                 TD_TOGGLE_FROM_TD |
 441                 TD_TOGGLE_DATA1 |
 442                 TD_CC_NOACCESS);
 443         cur->current_buffer_pointer = 0;
 444         cur->buffer_end = 0;
 445
 446         /* Final dummy TD. */
 447         td_t *const final_td;
 448         ofmem_posix_memalign((void **)&final_td, sizeof(td_t), sizeof(td_t));
 449         memset((void *)final_td, 0, sizeof(*final_td));
 450         /* Linked to the previous. */
 451         cur->next_td = __cpu_to_le32(virt_to_phys(final_td));
 452
 453         /* Data structures */
 454         ed_t *head;
 455         ofmem_posix_memalign((void **)&head, sizeof(ed_t), sizeof(ed_t));
 456         memset((void*)head, 0, sizeof(*head));
 457         head->config = __cpu_to_le32((dev->address << ED_FUNC_SHIFT) |
 458                 (0 << ED_EP_SHIFT) |
 459                 (OHCI_FROM_TD << ED_DIR_SHIFT) |
 460                 (dev->speed?ED_LOWSPEED:0) |
 461                 (dev->endpoints[0].maxpacketsize << ED_MPS_SHIFT));
 462         head->tail_pointer = __cpu_to_le32(virt_to_phys(final_td));
 463         head->head_pointer = __cpu_to_le32(virt_to_phys(first_td));
 464
 465         usb_debug("ohci_control(): doing transfer with %x. first_td at %x\n",
 466                 __le32_to_cpu(head->config) & ED_FUNC_MASK, __le32_to_cpu(head->head_pointer));
 467 #ifdef USB_DEBUG_ED
 468         dump_ed(head);
 469 #endif
 470
 471         /* activate schedule */
 472         OHCI_INST(dev->controller)->opreg->HcControlHeadED = __cpu_to_le32(virt_to_phys(head));
 473         OHCI_INST(dev->controller)->opreg->HcControl |= __cpu_to_le32(ControlListEnable);
 474         OHCI_INST(dev->controller)->opreg->HcCommandStatus = __cpu_to_le32(ControlListFilled);
 475
 476         int failure = wait_for_ed(dev, head,
 477                         (dalen==0)?0:(last_page - first_page + 1));
 478         /* Wait some frames before and one after disabling list access. */
 479         mdelay(4);
 480         OHCI_INST(dev->controller)->opreg->HcControl &= __cpu_to_le32(~ControlListEnable);
 481         mdelay(1);
 482
 483         /* free memory */
 484         ohci_free_ed(head);
 485
 486         return failure;
 487 }
 488
 489 /* finalize == 1: if data is of packet aligned size, add a zero length packet */
 490 static int
 491 ohci_bulk (endpoint_t *ep, int dalen, u8 *data, int finalize)
 492 {
 493         int i;
 494         usb_debug("bulk: %x bytes from %p, finalize: %x, maxpacketsize: %x\n", dalen, data, finalize, ep->maxpacketsize);
 495
 496         td_t *cur, *next;
 497
 498         // pages are specified as 4K in OHCI, so don't use getpagesize()
 499         int first_page = (unsigned long)data / 4096;
 500         int last_page = (unsigned long)(data+dalen-1)/4096;
 501         if (last_page < first_page) last_page = first_page;
 502         int pages = (dalen==0)?0:(last_page - first_page + 1);
 503         int td_count = (pages+1)/2;
 504
 505         if (finalize && ((dalen % ep->maxpacketsize) == 0)) {
 506                 td_count++;
 507         }
 508
 509         /* First TD. */
 510         td_t *const first_td;
 511         ofmem_posix_memalign((void **)&first_td, sizeof(td_t), sizeof(td_t));
 512         memset((void *)first_td, 0, sizeof(*first_td));
 513         cur = next = first_td;
 514
 515         for (i = 0; i < td_count; ++i) {
 516                 /* Advance to next TD. */
 517                 cur = next;
 518                 cur->config = __cpu_to_le32((ep->direction == IN ? TD_DIRECTION_IN : TD_DIRECTION_OUT) |
 519                         TD_DELAY_INTERRUPT_NOINTR |
 520                         TD_TOGGLE_FROM_ED |
 521                         TD_CC_NOACCESS);
 522                 cur->current_buffer_pointer = __cpu_to_le32(virt_to_phys(data));
 523                 pages--;
 524                 if (dalen == 0) {
 525                         /* magic TD for empty packet transfer */
 526                         cur->current_buffer_pointer = 0;
 527                         cur->buffer_end = 0;
 528                         /* assert((pages == 0) && finalize); */
 529                 }
 530                 int consumed = (4096 - ((unsigned long)data % 4096));
 531                 if (consumed >= dalen) {
 532                         // end of data is within same page
 533                         cur->buffer_end = __cpu_to_le32(virt_to_phys(data + dalen - 1));
 534                         dalen = 0;
 535                         /* assert(pages == finalize); */
 536                 } else {
 537                         dalen -= consumed;
 538                         data += consumed;
 539                         pages--;
 540                         int second_page_size = dalen;
 541                         if (dalen > 4096) {
 542                                 second_page_size = 4096;
 543                         }
 544                         cur->buffer_end = __cpu_to_le32(virt_to_phys(data + second_page_size - 1));
 545                         dalen -= second_page_size;
 546                         data += second_page_size;
 547                 }
 548                 /* One more TD. */
 549                 ofmem_posix_memalign((void **)&next, sizeof(td_t), sizeof(td_t));
 550                 memset((void *)next, 0, sizeof(*next));
 551                 /* Linked to the previous. */
 552                 cur->next_td = __cpu_to_le32(virt_to_phys(next));
 553         }
 554
 555         /* Write done head after last TD. */
 556         cur->config &= __cpu_to_le32(~TD_DELAY_INTERRUPT_MASK);
 557         /* Advance to final, dummy TD. */
 558         cur = next;
 559
 560         /* Data structures */
 561         ed_t *head;
 562         ofmem_posix_memalign((void **)&head, sizeof(ed_t), sizeof(ed_t));
 563         memset((void*)head, 0, sizeof(*head));
 564         head->config = __cpu_to_le32((ep->dev->address << ED_FUNC_SHIFT) |
 565                 ((ep->endpoint & 0xf) << ED_EP_SHIFT) |
 566                 (((ep->direction==IN)?OHCI_IN:OHCI_OUT) << ED_DIR_SHIFT) |
 567                 (ep->dev->speed?ED_LOWSPEED:0) |
 568                 (ep->maxpacketsize << ED_MPS_SHIFT));
 569         head->tail_pointer = __cpu_to_le32(virt_to_phys(cur));
 570         head->head_pointer = __cpu_to_le32(virt_to_phys(first_td) | (ep->toggle?ED_TOGGLE:0));
 571
 572         usb_debug("doing bulk transfer with %x(%x). first_td at %lx, last %lx\n",
 573                 __le32_to_cpu(head->config) & ED_FUNC_MASK,
 574                 (__le32_to_cpu(head->config) & ED_EP_MASK) >> ED_EP_SHIFT,
 575                 virt_to_phys(first_td), virt_to_phys(cur));
 576
 577         /* activate schedule */
 578         OHCI_INST(ep->dev->controller)->opreg->HcBulkHeadED = __cpu_to_le32(virt_to_phys(head));
 579         OHCI_INST(ep->dev->controller)->opreg->HcControl |= __cpu_to_le32(BulkListEnable);
 580         OHCI_INST(ep->dev->controller)->opreg->HcCommandStatus = __cpu_to_le32(BulkListFilled);
 581
 582         int failure = wait_for_ed(ep->dev, head,
 583                         (dalen==0)?0:(last_page - first_page + 1));
 584         /* Wait some frames before and one after disabling list access. */
 585         mdelay(4);
 586         OHCI_INST(ep->dev->controller)->opreg->HcControl &= __cpu_to_le32(~BulkListEnable);
 587         mdelay(1);
 588
 589         ep->toggle = __le32_to_cpu(head->head_pointer) & ED_TOGGLE;
 590
 591         /* free memory */
 592         ohci_free_ed(head);
 593
 594         if (failure) {
 595                 /* try cleanup */
 596                 clear_stall(ep);
 597         }
 598
 599         return failure;
 600 }
 601
 602
 603 struct _intr_queue;
 604
 605 struct _intrq_td {
 606         volatile td_t           td;
 607         u8                      *data;
 608         struct _intrq_td        *next;
 609         struct _intr_queue      *intrq;
 610 };
 611
 612 struct _intr_queue {
 613         volatile ed_t           ed;
 614         struct _intrq_td        *head;
 615         struct _intrq_td        *tail;
 616         u8                      *data;
 617         int                     reqsize;
 618         endpoint_t              *endp;
 619         unsigned int            remaining_tds;
 620         int                     destroy;
 621 };
 622
 623 typedef struct _intrq_td intrq_td_t;
 624 typedef struct _intr_queue intr_queue_t;
 625
 626 #define INTRQ_TD_FROM_TD(x) ((intrq_td_t *)x)
 627
 628 static void
 629 ohci_fill_intrq_td(intrq_td_t *const td, intr_queue_t *const intrq,
 630                    u8 *const data)
 631 {
 632         memset(td, 0, sizeof(*td));
 633         td->td.config = __cpu_to_le32(TD_QUEUETYPE_INTR |
 634                 (intrq->endp->direction == IN ? TD_DIRECTION_IN : TD_DIRECTION_OUT) |
 635                 TD_DELAY_INTERRUPT_ZERO |
 636                 TD_TOGGLE_FROM_ED |
 637                 TD_CC_NOACCESS);
 638         td->td.current_buffer_pointer = __cpu_to_le32(virt_to_phys(data));
 639         td->td.buffer_end = __cpu_to_le32(virt_to_phys(data) + intrq->reqsize - 1);
 640         td->intrq = intrq;
 641         td->data = data;
 642 }
 643
 644 /* create and hook-up an intr queue into device schedule */
 645 static void *
 646 ohci_create_intr_queue(endpoint_t *const ep, const int reqsize,
 647                        const int reqcount, const int reqtiming)
 648 {
 649         int i;
 650         intrq_td_t *first_td = NULL, *last_td = NULL;
 651
 652         if (reqsize > 4096)
 653                 return NULL;
 654
 655         intr_queue_t *const intrq;
 656         ofmem_posix_memalign((void **)&intrq, sizeof(intrq->ed), sizeof(*intrq));
 657         memset(intrq, 0, sizeof(*intrq));
 658         intrq->data = (u8 *)malloc(reqcount * reqsize);
 659         intrq->reqsize = reqsize;
 660         intrq->endp = ep;
 661
 662         /* Create #reqcount TDs. */
 663         u8 *cur_data = intrq->data;
 664         for (i = 0; i < reqcount; ++i) {
 665                 intrq_td_t *const td;
 666                 ofmem_posix_memalign((void **)&td, sizeof(td->td), sizeof(*td));
 667                 ++intrq->remaining_tds;
 668                 ohci_fill_intrq_td(td, intrq, cur_data);
 669                 cur_data += reqsize;
 670                 if (!first_td)
 671                         first_td = td;
 672                 else
 673                         last_td->td.next_td = __cpu_to_le32(virt_to_phys(&td->td));
 674                 last_td = td;
 675         }
 676
 677         /* Create last, dummy TD. */
 678         intrq_td_t *dummy_td;
 679         ofmem_posix_memalign((void **)&dummy_td, sizeof(dummy_td->td), sizeof(*dummy_td));
 680         memset(dummy_td, 0, sizeof(*dummy_td));
 681         dummy_td->intrq = intrq;
 682         if (last_td)
 683                 last_td->td.next_td = __cpu_to_le32(virt_to_phys(&dummy_td->td));
 684         last_td = dummy_td;
 685
 686         /* Initialize ED. */
 687         intrq->ed.config =  __cpu_to_le32((ep->dev->address << ED_FUNC_SHIFT) |
 688                 ((ep->endpoint & 0xf) << ED_EP_SHIFT) |
 689                 (((ep->direction == IN) ? OHCI_IN : OHCI_OUT) << ED_DIR_SHIFT) |
 690                 (ep->dev->speed ? ED_LOWSPEED : 0) |
 691                 (ep->maxpacketsize << ED_MPS_SHIFT));
 692         intrq->ed.tail_pointer = __cpu_to_le32(virt_to_phys(last_td));
 693         intrq->ed.head_pointer = __cpu_to_le32(virt_to_phys(first_td) | (ep->toggle ? ED_TOGGLE : 0));
 694
 695 #ifdef USB_DEBUG_ED
 696         dump_ed(&intrq->ed);
 697 #endif
 698         /* Insert ED into periodic table. */
 699         int nothing_placed      = 1;
 700         ohci_t *const ohci      = OHCI_INST(ep->dev->controller);
 701         u32 *const intr_table   = ohci->hcca->HccaInterruptTable;
 702         const u32 dummy_ptr     = __cpu_to_le32(virt_to_phys(ohci->periodic_ed));
 703         for (i = 0; i < 32; i += reqtiming) {
 704                 /* Advance to the next free position. */
 705                 while ((i < 32) && (intr_table[i] != dummy_ptr)) ++i;
 706                 if (i < 32) {
 707                         usb_debug("Placed endpoint %lx to %d\n", virt_to_phys(&intrq->ed), i);
 708                         intr_table[i] = __cpu_to_le32(virt_to_phys(&intrq->ed));
 709                         nothing_placed = 0;
 710                 }
 711         }
 712         if (nothing_placed) {
 713                 usb_debug("Error: Failed to place ohci interrupt endpoint "
 714                         "descriptor into periodic table: no space left\n");
 715                 ohci_destroy_intr_queue(ep, intrq);
 716                 return NULL;
 717         }
 718
 719         return intrq;
 720 }
 721
 722 /* remove queue from device schedule, dropping all data that came in */
 723 static void
 724 ohci_destroy_intr_queue(endpoint_t *const ep, void *const q_)
 725 {
 726         intr_queue_t *const intrq = (intr_queue_t *)q_;
 727
 728         int i;
 729
 730         /* Remove interrupt queue from periodic table. */
 731         ohci_t *const ohci      = OHCI_INST(ep->dev->controller);
 732         u32 *const intr_table   = ohci->hcca->HccaInterruptTable;
 733         for (i=0; i < 32; ++i) {
 734                 if (intr_table[i] == __cpu_to_le32(virt_to_phys(intrq)))
 735                         intr_table[i] = __cpu_to_le32(virt_to_phys(ohci->periodic_ed));
 736         }
 737         /* Wait for frame to finish. */
 738         mdelay(1);
 739
 740         /* Free unprocessed TDs. */
 741         while ((__le32_to_cpu(intrq->ed.head_pointer) & ~0x3) != __le32_to_cpu(intrq->ed.tail_pointer)) {
 742                 td_t *const cur_td = (td_t *)phys_to_virt(__le32_to_cpu(intrq->ed.head_pointer) & ~0x3);
 743                 intrq->ed.head_pointer = cur_td->next_td;
 744                 free(INTRQ_TD_FROM_TD(cur_td));
 745                 --intrq->remaining_tds;
 746         }
 747         /* Free final, dummy TD. */
 748         free(phys_to_virt(__le32_to_cpu(intrq->ed.head_pointer) & ~0x3));
 749         /* Free data buffer. */
 750         free(intrq->data);
 751
 752         /* Free TDs already fetched from the done queue. */
 753         ohci_process_done_queue(ohci, 1);
 754         while (intrq->head) {
 755                 intrq_td_t *const cur_td = (intrq_td_t *const )__le32_to_cpu(intrq->head);
 756                 intrq->head = intrq->head->next;
 757                 free(cur_td);
 758                 --intrq->remaining_tds;
 759         }
 760
 761         /* Mark interrupt queue to be destroyed.
 762            ohci_process_done_queue() will free the remaining TDs
 763            and finish the interrupt queue off once all TDs are gone. */
 764         intrq->destroy = 1;
 765
 766         /* Save data toggle. */
 767         ep->toggle = __le32_to_cpu(intrq->ed.head_pointer) & ED_TOGGLE;
 768 }
 769
 770 /* read one intr-packet from queue, if available. extend the queue for new input.
 771    return NULL if nothing new available.
 772    Recommended use: while (data=poll_intr_queue(q)) process(data);
 773  */
 774 static u8 *
 775 ohci_poll_intr_queue(void *const q_)
 776 {
 777         intr_queue_t *const intrq = (intr_queue_t *)q_;
 778
 779         u8 *data = NULL;
 780
 781         /* Process done queue first, then check if we have work to do. */
 782         ohci_process_done_queue(OHCI_INST(intrq->endp->dev->controller), 0);
 783
 784         if (intrq->head) {
 785                 /* Save pointer to processed TD and advance. */
 786                 intrq_td_t *const cur_td = intrq->head;
 787                 intrq->head = cur_td->next;
 788
 789                 /* Return data buffer of this TD. */
 790                 data = cur_td->data;
 791
 792                 /* Requeue this TD (i.e. copy to dummy and requeue as dummy). */
 793                 intrq_td_t *const dummy_td =
 794                         INTRQ_TD_FROM_TD(phys_to_virt(__le32_to_cpu(intrq->ed.tail_pointer)));
 795                 ohci_fill_intrq_td(dummy_td, intrq, data);
 796                 /* Reset all but intrq pointer (i.e. init as dummy). */
 797                 memset(cur_td, 0, sizeof(*cur_td));
 798                 cur_td->intrq = intrq;
 799                 /* Insert into interrupt queue as dummy. */
 800                 dummy_td->td.next_td = __le32_to_cpu(virt_to_phys(&cur_td->td));
 801                 intrq->ed.tail_pointer = __le32_to_cpu(virt_to_phys(&cur_td->td));
 802         }
 803
 804         return data;
 805 }
 806
 807 static void
 808 ohci_process_done_queue(ohci_t *const ohci, const int spew_debug)
 809 {
 810         int i, j;
 811
 812         /* Temporary queue of interrupt queue TDs (to reverse order). */
 813         intrq_td_t *temp_tdq = NULL;
 814
 815         /* Check if done head has been written. */
 816         if (!(READ_OPREG(ohci, HcInterruptStatus) & WritebackDoneHead))
 817                 return;
 818         /* Fetch current done head.
 819            Lsb is only interesting for hw interrupts. */
 820         u32 phys_done_queue = __le32_to_cpu(ohci->hcca->HccaDoneHead) & ~1;
 821         /* Tell host controller, he may overwrite the done head pointer. */
 822         ohci->opreg->HcInterruptStatus = __cpu_to_le32(WritebackDoneHead);
 823
 824         i = 0;
 825         /* Process done queue (it's in reversed order). */
 826         while (phys_done_queue) {
 827                 td_t *const done_td = (td_t *)phys_to_virt(phys_done_queue);
 828
 829                 /* Advance pointer to next TD. */
 830                 phys_done_queue = __le32_to_cpu(done_td->next_td);
 831
 832                 switch (__le32_to_cpu(done_td->config) & TD_QUEUETYPE_MASK) {
 833                 case TD_QUEUETYPE_ASYNC:
 834                         /* Free processed async TDs. */
 835                   free((void *)done_td);
 836                         break;
 837                 case TD_QUEUETYPE_INTR: {
 838                         intrq_td_t *const td = INTRQ_TD_FROM_TD(done_td);
 839                         intr_queue_t *const intrq = td->intrq;
 840                         /* Check if the corresponding interrupt
 841                            queue is still beeing processed. */
 842                         if (intrq->destroy) {
 843                                 /* Free this TD, and */
 844                                 free(td);
 845                                 --intrq->remaining_tds;
 846                                 /* the interrupt queue if it has no more TDs. */
 847                                 if (!intrq->remaining_tds)
 848                                         free(intrq);
 849                                 usb_debug("Freed TD from orphaned interrupt "
 850                                           "queue, %d TDs remain.\n",
 851                                           intrq->remaining_tds);
 852                         } else {
 853                                 /* Save done TD to be processed. */
 854                                 td->next = temp_tdq;
 855                                 temp_tdq = td;
 856                         }
 857                         break;
 858                 }
 859                 default:
 860                         break;
 861                 }
 862                 ++i;
 863         }
 864         if (spew_debug)
 865                 usb_debug("Processed %d done TDs.\n", i);
 866
 867         j = 0;
 868         /* Process interrupt queue TDs in right order. */
 869         while (temp_tdq) {
 870                 /* Save pointer of current TD and advance. */
 871                 intrq_td_t *const cur_td = temp_tdq;
 872                 temp_tdq = temp_tdq->next;
 873
 874                 /* The interrupt queue for the current TD. */
 875                 intr_queue_t *const intrq = cur_td->intrq;
 876                 /* Append to interrupt queue. */
 877                 if (!intrq->head) {
 878                         /* First element. */
 879                         intrq->head = intrq->tail = cur_td;
 880                 } else {
 881                         /* Insert at tail. */
 882                         intrq->tail->next = cur_td;
 883                         intrq->tail = cur_td;
 884                 }
 885                 /* It's always the last element. */
 886                 cur_td->next = NULL;
 887                 ++j;
 888         }
 889         if (spew_debug)
 890                 usb_debug("processed %d done tds, %d intr tds thereof.\n", i, j);
 891 }
 892
 893 int ob_usb_ohci_init (const char *path, uint32_t addr)
 894 {
 895         hci_t *ctrl;
 896         int i;
 897
 898         usb_debug("ohci_init: %s addr = %x\n", path, addr);
 899         ctrl = ohci_pci_init(addr);
 900         if (!ctrl)
 901                 return 0;
 902
 903         /* Init ports */
 904         usb_poll();
 905
 906         /* Look for a keyboard */
 907         for (i = 0; i < 128; i++) {
 908                 if (ctrl->devices[i] && ctrl->devices[i]->configuration) {
 909                         configuration_descriptor_t *cd;
 910                         interface_descriptor_t *intf;
 911
 912                         cd = (configuration_descriptor_t *)ctrl->devices[i]->configuration;
 913                         intf = (interface_descriptor_t *)(ctrl->devices[i]->configuration + cd->bLength);
 914                         usb_debug("Device at port %d is class %d\n", i, intf->bInterfaceClass);
 915                         if (intf->bInterfaceClass == hid_device &&
 916                             intf->bInterfaceSubClass == hid_subclass_boot &&
 917                             intf->bInterfaceProtocol == hid_boot_proto_keyboard ) {
 918                                 break;
 919                         }
 920                 }
 921         }
 922         if ( i < 128 )
 923                 ob_usb_hid_add_keyboard(path);
 924
 925         return 1;
 926 }