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21 #ifndef __XEN_PUBLIC_HVM_PARAMS_H__
22 #define __XEN_PUBLIC_HVM_PARAMS_H__
29 * Parameter space for HVMOP_{set,get}_param.
33 * How should CPU0 event-channel notifications be delivered?
34 * val[63:56] == 0: val[55:0] is a delivery GSI (Global System Interrupt).
35 * val[63:56] == 1: val[55:0] is a delivery PCI INTx line, as follows:
36 * Domain = val[47:32], Bus = val[31:16],
37 * DevFn = val[15: 8], IntX = val[ 1: 0]
38 * val[63:56] == 2: val[7:0] is a vector number, check for
39 * XENFEAT_hvm_callback_vector to know if this delivery
40 * method is available.
41 * If val == 0 then CPU0 event-channel notifications are not delivered.
43 #define HVM_PARAM_CALLBACK_IRQ 0
46 * These are not used by Xen. They are here for convenience of HVM-guest
47 * xenbus implementations.
49 #define HVM_PARAM_STORE_PFN 1
50 #define HVM_PARAM_STORE_EVTCHN 2
52 #define HVM_PARAM_PAE_ENABLED 4
54 #define HVM_PARAM_IOREQ_PFN 5
56 #define HVM_PARAM_BUFIOREQ_PFN 6
57 #define HVM_PARAM_BUFIOREQ_EVTCHN 26
59 #if defined(__i386__) || defined(__x86_64__)
61 /* Expose Viridian interfaces to this HVM guest? */
62 #define HVM_PARAM_VIRIDIAN 9
67 * Set mode for virtual timers (currently x86 only):
68 * delay_for_missed_ticks (default):
69 * Do not advance a vcpu's time beyond the correct delivery time for
70 * interrupts that have been missed due to preemption. Deliver missed
71 * interrupts when the vcpu is rescheduled and advance the vcpu's virtual
72 * time stepwise for each one.
73 * no_delay_for_missed_ticks:
74 * As above, missed interrupts are delivered, but guest time always tracks
75 * wallclock (i.e., real) time while doing so.
76 * no_missed_ticks_pending:
77 * No missed interrupts are held pending. Instead, to ensure ticks are
78 * delivered at some non-zero rate, if we detect missed ticks then the
79 * internal tick alarm is not disabled if the VCPU is preempted during the
81 * one_missed_tick_pending:
82 * Missed interrupts are collapsed together and delivered as one 'late tick'.
83 * Guest time always tracks wallclock (i.e., real) time.
85 #define HVM_PARAM_TIMER_MODE 10
86 #define HVMPTM_delay_for_missed_ticks 0
87 #define HVMPTM_no_delay_for_missed_ticks 1
88 #define HVMPTM_no_missed_ticks_pending 2
89 #define HVMPTM_one_missed_tick_pending 3
91 /* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */
92 #define HVM_PARAM_HPET_ENABLED 11
94 /* Identity-map page directory used by Intel EPT when CR0.PG=0. */
95 #define HVM_PARAM_IDENT_PT 12
97 /* Device Model domain, defaults to 0. */
98 #define HVM_PARAM_DM_DOMAIN 13
100 /* ACPI S state: currently support S0 and S3 on x86. */
101 #define HVM_PARAM_ACPI_S_STATE 14
103 /* TSS used on Intel when CR0.PE=0. */
104 #define HVM_PARAM_VM86_TSS 15
106 /* Boolean: Enable aligning all periodic vpts to reduce interrupts */
107 #define HVM_PARAM_VPT_ALIGN 16
109 /* Console debug shared memory ring and event channel */
110 #define HVM_PARAM_CONSOLE_PFN 17
111 #define HVM_PARAM_CONSOLE_EVTCHN 18
114 * Select location of ACPI PM1a and TMR control blocks. Currently two locations
115 * are supported, specified by version 0 or 1 in this parameter:
116 * - 0: default, use the old addresses
117 * PM1A_EVT == 0x1f40; PM1A_CNT == 0x1f44; PM_TMR == 0x1f48
118 * - 1: use the new default qemu addresses
119 * PM1A_EVT == 0xb000; PM1A_CNT == 0xb004; PM_TMR == 0xb008
120 * You can find these address definitions in <hvm/ioreq.h>
122 #define HVM_PARAM_ACPI_IOPORTS_LOCATION 19
124 /* Enable blocking memory events, async or sync (pause vcpu until response)
125 * onchangeonly indicates messages only on a change of value */
126 #define HVM_PARAM_MEMORY_EVENT_CR0 20
127 #define HVM_PARAM_MEMORY_EVENT_CR3 21
128 #define HVM_PARAM_MEMORY_EVENT_CR4 22
129 #define HVM_PARAM_MEMORY_EVENT_INT3 23
130 #define HVM_PARAM_MEMORY_EVENT_SINGLE_STEP 25
131 #define HVM_PARAM_MEMORY_EVENT_MSR 30
133 #define HVMPME_MODE_MASK (3 << 0)
134 #define HVMPME_mode_disabled 0
135 #define HVMPME_mode_async 1
136 #define HVMPME_mode_sync 2
137 #define HVMPME_onchangeonly (1 << 2)
139 /* Boolean: Enable nestedhvm (hvm only) */
140 #define HVM_PARAM_NESTEDHVM 24
142 /* Params for the mem event rings */
143 #define HVM_PARAM_PAGING_RING_PFN 27
144 #define HVM_PARAM_ACCESS_RING_PFN 28
145 #define HVM_PARAM_SHARING_RING_PFN 29
147 /* SHUTDOWN_* action in case of a triple fault */
148 #define HVM_PARAM_TRIPLE_FAULT_REASON 31
150 #define HVM_PARAM_IOREQ_SERVER_PFN 32
151 #define HVM_PARAM_NR_IOREQ_SERVER_PAGES 33
153 /* Location of the VM Generation ID in guest physical address space. */
154 #define HVM_PARAM_VM_GENERATION_ID_ADDR 34
156 #define HVM_NR_PARAMS 35
158 #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */