2 This header file contains all of the PXE type definitions,
3 structure prototypes, global variables and constants that
4 are needed for porting PXE to EFI.
6 Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
7 This program and the accompanying materials are licensed and made available under
8 the terms and conditions of the BSD License that accompanies this distribution.
9 The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 @par Revision Reference:
16 32/64-bit PXE specification:
24 FILE_LICENCE ( BSD3 );
28 #define PXE_BUSTYPE(a, b, c, d) \
30 (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \
31 ((PXE_UINT32) (a) & 0xFF) \
35 /// UNDI ROM ID and devive ID signature.
37 #define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
40 /// BUS ROM ID signatures.
42 #define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')
43 #define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
44 #define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')
45 #define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')
47 #define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))
49 #define PXE_SWAP_UINT32(n) \
50 ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
51 (((PXE_UINT32)(n) & 0x0000FF00) << 8) | \
52 (((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \
53 (((PXE_UINT32)(n) & 0xFF000000) >> 24))
55 #define PXE_SWAP_UINT64(n) \
56 ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \
57 (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \
58 (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \
59 (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8) | \
60 (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8) | \
61 (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \
62 (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
63 (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))
66 #define PXE_CPBSIZE_NOT_USED 0 ///< zero
67 #define PXE_DBSIZE_NOT_USED 0 ///< zero
68 #define PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 ///< zero
69 #define PXE_DBADDR_NOT_USED (PXE_UINT64) 0 ///< zero
70 #define PXE_CONST CONST
72 #define PXE_VOLATILE volatile
74 typedef VOID PXE_VOID;
75 typedef UINT8 PXE_UINT8;
76 typedef UINT16 PXE_UINT16;
77 typedef UINT32 PXE_UINT32;
78 typedef UINTN PXE_UINTN;
81 /// Typedef unsigned long PXE_UINT64.
83 typedef UINT64 PXE_UINT64;
85 typedef PXE_UINT8 PXE_BOOL;
86 #define PXE_FALSE 0 ///< zero
87 #define PXE_TRUE (!PXE_FALSE)
89 typedef PXE_UINT16 PXE_OPCODE;
92 /// Return UNDI operational state.
94 #define PXE_OPCODE_GET_STATE 0x0000
97 /// Change UNDI operational state from Stopped to Started.
99 #define PXE_OPCODE_START 0x0001
102 /// Change UNDI operational state from Started to Stopped.
104 #define PXE_OPCODE_STOP 0x0002
107 /// Get UNDI initialization information.
109 #define PXE_OPCODE_GET_INIT_INFO 0x0003
112 /// Get NIC configuration information.
114 #define PXE_OPCODE_GET_CONFIG_INFO 0x0004
117 /// Changed UNDI operational state from Started to Initialized.
119 #define PXE_OPCODE_INITIALIZE 0x0005
122 /// Re-initialize the NIC H/W.
124 #define PXE_OPCODE_RESET 0x0006
127 /// Change the UNDI operational state from Initialized to Started.
129 #define PXE_OPCODE_SHUTDOWN 0x0007
132 /// Read & change state of external interrupt enables.
134 #define PXE_OPCODE_INTERRUPT_ENABLES 0x0008
137 /// Read & change state of packet receive filters.
139 #define PXE_OPCODE_RECEIVE_FILTERS 0x0009
142 /// Read & change station MAC address.
144 #define PXE_OPCODE_STATION_ADDRESS 0x000A
147 /// Read traffic statistics.
149 #define PXE_OPCODE_STATISTICS 0x000B
152 /// Convert multicast IP address to multicast MAC address.
154 #define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C
157 /// Read or change non-volatile storage on the NIC.
159 #define PXE_OPCODE_NVDATA 0x000D
162 /// Get & clear interrupt status.
164 #define PXE_OPCODE_GET_STATUS 0x000E
167 /// Fill media header in packet for transmit.
169 #define PXE_OPCODE_FILL_HEADER 0x000F
172 /// Transmit packet(s).
174 #define PXE_OPCODE_TRANSMIT 0x0010
179 #define PXE_OPCODE_RECEIVE 0x0011
182 /// Last valid PXE UNDI OpCode number.
184 #define PXE_OPCODE_LAST_VALID 0x0011
186 typedef PXE_UINT16 PXE_OPFLAGS;
188 #define PXE_OPFLAGS_NOT_USED 0x0000
191 // //////////////////////////////////////
196 ////////////////////////////////////////
201 ////////////////////////////////////////
206 ////////////////////////////////////////
207 // UNDI Get Init Info
211 ////////////////////////////////////////
212 // UNDI Get Config Info
219 #define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001
220 #define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000
221 #define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001
227 #define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001
228 #define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002
236 /// UNDI Interrupt Enables.
239 /// Select whether to enable or disable external interrupt signals.
240 /// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
242 #define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000
243 #define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000
244 #define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
245 #define PXE_OPFLAGS_INTERRUPT_READ 0x0000
248 /// Enable receive interrupts. An external interrupt will be generated
249 /// after a complete non-error packet has been received.
251 #define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
254 /// Enable transmit interrupts. An external interrupt will be generated
255 /// after a complete non-error packet has been transmitted.
257 #define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002
260 /// Enable command interrupts. An external interrupt will be generated
261 /// when command execution stops.
263 #define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
266 /// Generate software interrupt. Setting this bit generates an external
267 /// interrupt, if it is supported by the hardware.
269 #define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008
272 /// UNDI Receive Filters.
275 /// Select whether to enable or disable receive filters.
276 /// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
278 #define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000
279 #define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000
280 #define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000
281 #define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000
284 /// To reset the contents of the multicast MAC address filter list,
287 #define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
290 /// Enable unicast packet receiving. Packets sent to the current station
291 /// MAC address will be received.
293 #define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001
296 /// Enable broadcast packet receiving. Packets sent to the broadcast
297 /// MAC address will be received.
299 #define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
302 /// Enable filtered multicast packet receiving. Packets sent to any
303 /// of the multicast MAC addresses in the multicast MAC address filter
304 /// list will be received. If the filter list is empty, no multicast
306 #define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
309 /// Enable promiscuous packet receiving. All packets will be received.
311 #define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
314 /// Enable promiscuous multicast packet receiving. All multicast
315 /// packets will be received.
317 #define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
320 /// UNDI Station Address.
322 #define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000
323 #define PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000
324 #define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001
329 #define PXE_OPFLAGS_STATISTICS_READ 0x0000
330 #define PXE_OPFLAGS_STATISTICS_RESET 0x0001
333 /// UNDI MCast IP to MAC.
336 /// Identify the type of IP address in the CPB.
338 #define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003
339 #define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000
340 #define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001
346 /// Select the type of non-volatile data operation.
348 #define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
349 #define PXE_OPFLAGS_NVDATA_READ 0x0000
350 #define PXE_OPFLAGS_NVDATA_WRITE 0x0001
356 /// Return current interrupt status. This will also clear any interrupts
357 /// that are currently set. This can be used in a polling routine. The
358 /// interrupt flags are still set and cleared even when the interrupts
361 #define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001
364 /// Return list of transmitted buffers for recycling. Transmit buffers
365 /// must not be changed or unallocated until they have recycled. After
366 /// issuing a transmit command, wait for a transmit complete interrupt.
367 /// When a transmit complete interrupt is received, read the transmitted
368 /// buffers. Do not plan on getting one buffer per interrupt. Some
369 /// NICs and UNDIs may transmit multiple buffers per interrupt.
371 #define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
374 /// Return current media status.
376 #define PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004
379 /// UNDI Fill Header.
381 #define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001
382 #define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001
383 #define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000
389 /// S/W UNDI only. Return after the packet has been transmitted. A
390 /// transmit complete interrupt will still be generated and the transmit
391 /// buffer will have to be recycled.
393 #define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001
394 #define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001
395 #define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000
397 #define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002
398 #define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
399 #define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000
410 typedef PXE_UINT16 PXE_STATFLAGS;
412 #define PXE_STATFLAGS_INITIALIZE 0x0000
415 /// Common StatFlags that can be returned by all commands.
418 /// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
419 /// implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs
420 /// that support command queuing.
422 #define PXE_STATFLAGS_STATUS_MASK 0xC000
423 #define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000
424 #define PXE_STATFLAGS_COMMAND_FAILED 0x8000
425 #define PXE_STATFLAGS_COMMAND_QUEUED 0x4000
430 #define PXE_STATFLAGS_GET_STATE_MASK 0x0003
431 #define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
432 #define PXE_STATFLAGS_GET_STATE_STARTED 0x0001
433 #define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000
438 /// No additional StatFlags.
442 /// UNDI Get Init Info.
444 #define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001
445 #define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000
446 #define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001
448 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_MASK 0x0002
449 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_NOT_SUPPORTED 0x0000
450 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_SUPPORTED 0x0002
455 #define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001
460 #define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001
465 /// No additional StatFlags.
468 /// UNDI Interrupt Enables.
471 /// If set, receive interrupts are enabled.
473 #define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
476 /// If set, transmit interrupts are enabled.
478 #define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002
481 /// If set, command interrupts are enabled.
483 #define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
486 /// UNDI Receive Filters.
490 /// If set, unicast packets will be received.
492 #define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001
495 /// If set, broadcast packets will be received.
497 #define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
500 /// If set, multicast packets that match up with the multicast address
501 /// filter list will be received.
503 #define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
506 /// If set, all packets will be received.
508 #define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
511 /// If set, all multicast packets will be received.
513 #define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
516 /// UNDI Station Address.
518 /// No additional StatFlags.
524 /// No additional StatFlags.
528 //// UNDI MCast IP to MAC.
530 //// No additional StatFlags.
535 /// No additional StatFlags.
543 /// Use to determine if an interrupt has occurred.
545 #define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
546 #define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000
549 /// If set, at least one receive interrupt occurred.
551 #define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001
554 /// If set, at least one transmit interrupt occurred.
556 #define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
559 /// If set, at least one command interrupt occurred.
561 #define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004
564 /// If set, at least one software interrupt occurred.
566 #define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
569 /// This flag is set if the transmitted buffer queue is empty. This flag
570 /// will be set if all transmitted buffer addresses get written into the DB.
572 #define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010
575 /// This flag is set if no transmitted buffer addresses were written
576 /// into the DB. (This could be because DBsize was too small.)
578 #define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020
581 /// This flag is set if there is no media detected.
583 #define PXE_STATFLAGS_GET_STATUS_NO_MEDIA 0x0040
586 /// UNDI Fill Header.
588 /// No additional StatFlags.
594 /// No additional StatFlags.
601 /// No additional StatFlags.
603 typedef PXE_UINT16 PXE_STATCODE;
605 #define PXE_STATCODE_INITIALIZE 0x0000
608 /// Common StatCodes returned by all UNDI commands, UNDI protocol functions
609 /// and BC protocol functions.
611 #define PXE_STATCODE_SUCCESS 0x0000
613 #define PXE_STATCODE_INVALID_CDB 0x0001
614 #define PXE_STATCODE_INVALID_CPB 0x0002
615 #define PXE_STATCODE_BUSY 0x0003
616 #define PXE_STATCODE_QUEUE_FULL 0x0004
617 #define PXE_STATCODE_ALREADY_STARTED 0x0005
618 #define PXE_STATCODE_NOT_STARTED 0x0006
619 #define PXE_STATCODE_NOT_SHUTDOWN 0x0007
620 #define PXE_STATCODE_ALREADY_INITIALIZED 0x0008
621 #define PXE_STATCODE_NOT_INITIALIZED 0x0009
622 #define PXE_STATCODE_DEVICE_FAILURE 0x000A
623 #define PXE_STATCODE_NVDATA_FAILURE 0x000B
624 #define PXE_STATCODE_UNSUPPORTED 0x000C
625 #define PXE_STATCODE_BUFFER_FULL 0x000D
626 #define PXE_STATCODE_INVALID_PARAMETER 0x000E
627 #define PXE_STATCODE_INVALID_UNDI 0x000F
628 #define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010
629 #define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011
630 #define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012
631 #define PXE_STATCODE_NO_DATA 0x0013
633 typedef PXE_UINT16 PXE_IFNUM;
636 /// This interface number must be passed to the S/W UNDI Start command.
638 #define PXE_IFNUM_START 0x0000
641 /// This interface number is returned by the S/W UNDI Get State and
642 /// Start commands if information in the CDB, CPB or DB is invalid.
644 #define PXE_IFNUM_INVALID 0x0000
646 typedef PXE_UINT16 PXE_CONTROL;
649 /// Setting this flag directs the UNDI to queue this command for later
650 /// execution if the UNDI is busy and it supports command queuing.
651 /// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
652 /// is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
653 /// error is returned.
655 #define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
658 /// These two bit values are used to determine if there are more UNDI
659 /// CDB structures following this one. If the link bit is set, there
660 /// must be a CDB structure following this one. Execution will start
661 /// on the next CDB structure as soon as this one completes successfully.
662 /// If an error is generated by this command, execution will stop.
664 #define PXE_CONTROL_LINK 0x0001
665 #define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000
667 typedef PXE_UINT8 PXE_FRAME_TYPE;
669 #define PXE_FRAME_TYPE_NONE 0x00
670 #define PXE_FRAME_TYPE_UNICAST 0x01
671 #define PXE_FRAME_TYPE_BROADCAST 0x02
672 #define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03
673 #define PXE_FRAME_TYPE_PROMISCUOUS 0x04
674 #define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05
676 #define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST
678 typedef PXE_UINT32 PXE_IPV4;
680 typedef PXE_UINT32 PXE_IPV6[4];
681 #define PXE_MAC_LENGTH 32
683 typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];
685 typedef PXE_UINT8 PXE_IFTYPE;
686 typedef UINT16 PXE_MEDIA_PROTOCOL;
689 /// This information is from the ARP section of RFC 1700.
691 /// 1 Ethernet (10Mb) [JBP]
692 /// 2 Experimental Ethernet (3Mb) [JBP]
693 /// 3 Amateur Radio AX.25 [PXK]
694 /// 4 Proteon ProNET Token Ring [JBP]
696 /// 6 IEEE 802 Networks [JBP]
698 /// 8 Hyperchannel [JBP]
700 /// 10 Autonet Short Address [MXB1]
701 /// 11 LocalTalk [JKR1]
702 /// 12 LocalNet (IBM* PCNet or SYTEK* LocalNET) [JXM]
703 /// 13 Ultra link [RXD2]
705 /// 15 Frame Relay [AGM]
706 /// 16 Asynchronous Transmission Mode (ATM) [JXB2]
708 /// 18 Fibre Channel [Yakov Rekhter]
709 /// 19 Asynchronous Transmission Mode (ATM) [Mark Laubach]
710 /// 20 Serial Line [JBP]
711 /// 21 Asynchronous Transmission Mode (ATM) [MXB1]
713 /// * Other names and brands may be claimed as the property of others.
715 #define PXE_IFTYPE_ETHERNET 0x01
716 #define PXE_IFTYPE_TOKENRING 0x04
717 #define PXE_IFTYPE_FIBRE_CHANNEL 0x12
719 typedef struct s_pxe_hw_undi {
720 PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.
721 PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI).
722 PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero.
723 PXE_UINT8 Rev; ///< PXE_ROMID_REV.
724 PXE_UINT8 IFcnt; ///< physical connector count lower byte.
725 PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.
726 PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.
727 PXE_UINT8 IFcntExt; ///< physical connector count upper byte.
728 PXE_UINT8 reserved; ///< zero, not used.
729 PXE_UINT32 Implementation; ///< implementation flags.
730 ///< reserved ///< vendor use.
731 ///< UINT32 Status; ///< status port.
732 ///< UINT32 Command; ///< command port.
733 ///< UINT64 CDBaddr; ///< CDB address port.
738 /// Status port bit definitions.
742 /// UNDI operation state.
744 #define PXE_HWSTAT_STATE_MASK 0xC0000000
745 #define PXE_HWSTAT_BUSY 0xC0000000
746 #define PXE_HWSTAT_INITIALIZED 0x80000000
747 #define PXE_HWSTAT_STARTED 0x40000000
748 #define PXE_HWSTAT_STOPPED 0x00000000
751 /// If set, last command failed.
753 #define PXE_HWSTAT_COMMAND_FAILED 0x20000000
756 /// If set, identifies enabled receive filters.
758 #define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
759 #define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800
760 #define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400
761 #define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200
762 #define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100
765 /// If set, identifies enabled external interrupts.
767 #define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080
768 #define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040
769 #define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020
770 #define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
773 /// If set, identifies pending interrupts.
775 #define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008
776 #define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004
777 #define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002
778 #define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
781 /// Command port definitions.
785 /// If set, CDB identified in CDBaddr port is given to UNDI.
786 /// If not set, other bits in this word will be processed.
788 #define PXE_HWCMD_ISSUE_COMMAND 0x80000000
789 #define PXE_HWCMD_INTS_AND_FILTS 0x00000000
792 /// Use these to enable/disable receive filters.
794 #define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
795 #define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800
796 #define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400
797 #define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200
798 #define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100
801 /// Use these to enable/disable external interrupts.
803 #define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080
804 #define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040
805 #define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020
806 #define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
809 /// Use these to clear pending external interrupts.
811 #define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008
812 #define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004
813 #define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002
814 #define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001
816 typedef struct s_pxe_sw_undi {
817 PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.
818 PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI).
819 PXE_UINT8 Fudge; ///< makes 8-bit cksum zero.
820 PXE_UINT8 Rev; ///< PXE_ROMID_REV.
821 PXE_UINT8 IFcnt; ///< physical connector count lower byte.
822 PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.
823 PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.
824 PXE_UINT8 IFcntExt; ///< physical connector count upper byte.
825 PXE_UINT8 reserved1; ///< zero, not used.
826 PXE_UINT32 Implementation; ///< Implementation flags.
827 PXE_UINT64 EntryPoint; ///< API entry point.
828 PXE_UINT8 reserved2[3]; ///< zero, not used.
829 PXE_UINT8 BusCnt; ///< number of bustypes supported.
830 PXE_UINT32 BusType[1]; ///< list of supported bustypes.
833 typedef union u_pxe_undi {
839 /// Signature of !PXE structure.
841 #define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
844 /// !PXE structure format revision
846 #define PXE_ROMID_REV 0x02
849 /// UNDI command interface revision. These are the values that get sent
850 /// in option 94 (Client Network Interface Identifier) in the DHCP Discover
851 /// and PXE Boot Server Request packets.
853 #define PXE_ROMID_MAJORVER 0x03
854 #define PXE_ROMID_MINORVER 0x01
857 /// Implementation flags.
859 #define PXE_ROMID_IMP_HW_UNDI 0x80000000
860 #define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000
861 #define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000
862 #define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000
863 #define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000
864 #define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000
865 #define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000
866 #define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00
867 #define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00
868 #define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800
869 #define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400
870 #define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000
871 #define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200
872 #define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100
873 #define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080
874 #define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040
875 #define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020
876 #define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010
877 #define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008
878 #define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004
879 #define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002
880 #define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001
882 typedef struct s_pxe_cdb {
889 PXE_STATCODE StatCode;
890 PXE_STATFLAGS StatFlags;
895 typedef union u_pxe_ip_addr {
900 typedef union pxe_device {
902 /// PCI and PC Card NICs are both identified using bus, device
903 /// and function numbers. For PC Card, this may require PC
904 /// Card services to be loaded in the BIOS or preboot
909 /// See S/W UNDI ROMID structure definition for PCI and
910 /// PCC BusType definitions.
915 /// Bus, device & function numbers that locate this device.
926 /// cpb and db definitions
928 #define MAX_PCI_CONFIG_LEN 64 ///< # of dwords.
929 #define MAX_EEPROM_LEN 128 ///< # of dwords.
930 #define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done.
931 #define MAX_MCAST_ADDRESS_CNT 8
933 typedef struct s_pxe_cpb_start_30 {
935 /// PXE_VOID Delay(UINTN microseconds);
937 /// UNDI will never request a delay smaller than 10 microseconds
938 /// and will always request delays in increments of 10 microseconds.
939 /// The Delay() CallBack routine must delay between n and n + 10
940 /// microseconds before returning control to the UNDI.
942 /// This field cannot be set to zero.
947 /// PXE_VOID Block(UINT32 enable);
949 /// UNDI may need to block multi-threaded/multi-processor access to
950 /// critical code sections when programming or accessing the network
951 /// device. To this end, a blocking service is needed by the UNDI.
952 /// When UNDI needs a block, it will call Block() passing a non-zero
953 /// value. When UNDI no longer needs a block, it will call Block()
954 /// with a zero value. When called, if the Block() is already enabled,
955 /// do not return control to the UNDI until the previous Block() is
958 /// This field cannot be set to zero.
963 /// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
965 /// UNDI will pass the virtual address of a buffer and the virtual
966 /// address of a 64-bit physical buffer. Convert the virtual address
967 /// to a physical address and write the result to the physical address
968 /// buffer. If virtual and physical addresses are the same, just
969 /// copy the virtual address to the physical address buffer.
971 /// This field can be set to zero if virtual and physical addresses
976 /// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
977 /// UINT64 buf_addr);
979 /// UNDI will read or write the device io space using this call back
980 /// function. It passes the number of bytes as the len parameter and it
981 /// will be either 1,2,4 or 8.
983 /// This field can not be set to zero.
988 typedef struct s_pxe_cpb_start_31 {
990 /// PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);
992 /// UNDI will never request a delay smaller than 10 microseconds
993 /// and will always request delays in increments of 10 microseconds.
994 /// The Delay() CallBack routine must delay between n and n + 10
995 /// microseconds before returning control to the UNDI.
997 /// This field cannot be set to zero.
1002 /// PXE_VOID Block(UINT64 unq_id, UINT32 enable);
1004 /// UNDI may need to block multi-threaded/multi-processor access to
1005 /// critical code sections when programming or accessing the network
1006 /// device. To this end, a blocking service is needed by the UNDI.
1007 /// When UNDI needs a block, it will call Block() passing a non-zero
1008 /// value. When UNDI no longer needs a block, it will call Block()
1009 /// with a zero value. When called, if the Block() is already enabled,
1010 /// do not return control to the UNDI until the previous Block() is
1013 /// This field cannot be set to zero.
1018 /// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
1020 /// UNDI will pass the virtual address of a buffer and the virtual
1021 /// address of a 64-bit physical buffer. Convert the virtual address
1022 /// to a physical address and write the result to the physical address
1023 /// buffer. If virtual and physical addresses are the same, just
1024 /// copy the virtual address to the physical address buffer.
1026 /// This field can be set to zero if virtual and physical addresses
1031 /// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
1032 /// UINT64 buf_addr);
1034 /// UNDI will read or write the device io space using this call back
1035 /// function. It passes the number of bytes as the len parameter and it
1036 /// will be either 1,2,4 or 8.
1038 /// This field can not be set to zero.
1042 /// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
1043 /// UINT32 Direction, UINT64 mapped_addr);
1045 /// UNDI will pass the virtual address of a buffer, direction of the data
1046 /// flow from/to the mapped buffer (the constants are defined below)
1047 /// and a place holder (pointer) for the mapped address.
1048 /// This call will Map the given address to a physical DMA address and write
1049 /// the result to the mapped_addr pointer. If there is no need to
1050 /// map the given address to a lower address (i.e. the given address is
1051 /// associated with a physical address that is already compatible to be
1052 /// used with the DMA, it converts the given virtual address to it's
1053 /// physical address and write that in the mapped address pointer.
1055 /// This field can be set to zero if there is no mapping service available.
1060 /// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
1061 /// UINT32 Direction, UINT64 mapped_addr);
1063 /// UNDI will pass the virtual and mapped addresses of a buffer.
1064 /// This call will un map the given address.
1066 /// This field can be set to zero if there is no unmapping service available.
1071 /// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
1072 /// UINT32 size, UINT32 Direction, UINT64 mapped_addr);
1074 /// UNDI will pass the virtual and mapped addresses of a buffer.
1075 /// This call will synchronize the contents of both the virtual and mapped.
1076 /// buffers for the given Direction.
1078 /// This field can be set to zero if there is no service available.
1083 /// protocol driver can provide anything for this Unique_ID, UNDI remembers
1084 /// that as just a 64bit value assocaited to the interface specified by
1085 /// the ifnum and gives it back as a parameter to all the call-back routines
1086 /// when calling for that interface!
1091 #define TO_AND_FROM_DEVICE 0
1092 #define FROM_DEVICE 1
1095 #define PXE_DELAY_MILLISECOND 1000
1096 #define PXE_DELAY_SECOND 1000000
1097 #define PXE_IO_READ 0
1098 #define PXE_IO_WRITE 1
1099 #define PXE_MEM_READ 2
1100 #define PXE_MEM_WRITE 4
1102 typedef struct s_pxe_db_get_init_info {
1104 /// Minimum length of locked memory buffer that must be given to
1105 /// the Initialize command. Giving UNDI more memory will generally
1106 /// give better performance.
1108 /// If MemoryRequired is zero, the UNDI does not need and will not
1109 /// use system memory to receive and transmit packets.
1111 PXE_UINT32 MemoryRequired;
1114 /// Maximum frame data length for Tx/Rx excluding the media header.
1116 PXE_UINT32 FrameDataLen;
1119 /// Supported link speeds are in units of mega bits. Common ethernet
1120 /// values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero
1123 PXE_UINT32 LinkSpeeds[4];
1126 /// Number of non-volatile storage items.
1131 /// Width of non-volatile storage item in bytes. 0, 1, 2 or 4
1136 /// Media header length. This is the typical media header length for
1137 /// this UNDI. This information is needed when allocating receive
1138 /// and transmit buffers.
1140 PXE_UINT16 MediaHeaderLen;
1143 /// Number of bytes in the NIC hardware (MAC) address.
1145 PXE_UINT16 HWaddrLen;
1148 /// Maximum number of multicast MAC addresses in the multicast
1149 /// MAC address filter list.
1151 PXE_UINT16 MCastFilterCnt;
1154 /// Default number and size of transmit and receive buffers that will
1155 /// be allocated by the UNDI. If MemoryRequired is non-zero, this
1156 /// allocation will come out of the memory buffer given to the Initialize
1157 /// command. If MemoryRequired is zero, this allocation will come out of
1158 /// memory on the NIC.
1160 PXE_UINT16 TxBufCnt;
1161 PXE_UINT16 TxBufSize;
1162 PXE_UINT16 RxBufCnt;
1163 PXE_UINT16 RxBufSize;
1166 /// Hardware interface types defined in the Assigned Numbers RFC
1167 /// and used in DHCP and ARP packets.
1168 /// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
1173 /// Supported duplex. See PXE_DUPLEX_xxxxx #defines below.
1175 PXE_UINT8 SupportedDuplexModes;
1178 /// Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below.
1180 PXE_UINT8 SupportedLoopBackModes;
1181 } PXE_DB_GET_INIT_INFO;
1183 #define PXE_MAX_TXRX_UNIT_ETHER 1500
1185 #define PXE_HWADDR_LEN_ETHER 0x0006
1186 #define PXE_MAC_HEADER_LEN_ETHER 0x000E
1188 #define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1
1189 #define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2
1191 #define PXE_LOOPBACK_INTERNAL_SUPPORTED 1
1192 #define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2
1194 typedef struct s_pxe_pci_config_info {
1196 /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
1197 /// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
1202 /// This identifies the PCI network device that this UNDI interface.
1210 /// This is a copy of the PCI configuration space for this
1218 } PXE_PCI_CONFIG_INFO;
1220 typedef struct s_pxe_pcc_config_info {
1222 /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
1223 /// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
1228 /// This identifies the PCC network device that this UNDI interface
1236 /// This is a copy of the PCC configuration space for this
1240 PXE_UINT8 Byte[256];
1241 PXE_UINT16 Word[128];
1242 PXE_UINT32 Dword[64];
1244 } PXE_PCC_CONFIG_INFO;
1246 typedef union u_pxe_db_get_config_info {
1247 PXE_PCI_CONFIG_INFO pci;
1248 PXE_PCC_CONFIG_INFO pcc;
1249 } PXE_DB_GET_CONFIG_INFO;
1251 typedef struct s_pxe_cpb_initialize {
1253 /// Address of first (lowest) byte of the memory buffer. This buffer must
1254 /// be in contiguous physical memory and cannot be swapped out. The UNDI
1255 /// will be using this for transmit and receive buffering.
1257 PXE_UINT64 MemoryAddr;
1260 /// MemoryLength must be greater than or equal to MemoryRequired
1261 /// returned by the Get Init Info command.
1263 PXE_UINT32 MemoryLength;
1266 /// Desired link speed in Mbit/sec. Common ethernet values are 10, 100
1267 /// and 1000. Setting a value of zero will auto-detect and/or use the
1268 /// default link speed (operation depends on UNDI/NIC functionality).
1270 PXE_UINT32 LinkSpeed;
1273 /// Suggested number and size of receive and transmit buffers to
1274 /// allocate. If MemoryAddr and MemoryLength are non-zero, this
1275 /// allocation comes out of the supplied memory buffer. If MemoryAddr
1276 /// and MemoryLength are zero, this allocation comes out of memory
1279 /// If these fields are set to zero, the UNDI will allocate buffer
1280 /// counts and sizes as it sees fit.
1282 PXE_UINT16 TxBufCnt;
1283 PXE_UINT16 TxBufSize;
1284 PXE_UINT16 RxBufCnt;
1285 PXE_UINT16 RxBufSize;
1288 /// The following configuration parameters are optional and must be zero
1289 /// to use the default values.
1291 PXE_UINT8 DuplexMode;
1293 PXE_UINT8 LoopBackMode;
1294 } PXE_CPB_INITIALIZE;
1296 #define PXE_DUPLEX_DEFAULT 0x00
1297 #define PXE_FORCE_FULL_DUPLEX 0x01
1298 #define PXE_ENABLE_FULL_DUPLEX 0x02
1299 #define PXE_FORCE_HALF_DUPLEX 0x04
1300 #define PXE_DISABLE_FULL_DUPLEX 0x08
1302 #define LOOPBACK_NORMAL 0
1303 #define LOOPBACK_INTERNAL 1
1304 #define LOOPBACK_EXTERNAL 2
1306 typedef struct s_pxe_db_initialize {
1308 /// Actual amount of memory used from the supplied memory buffer. This
1309 /// may be less that the amount of memory suppllied and may be zero if
1310 /// the UNDI and network device do not use external memory buffers.
1312 /// Memory used by the UNDI and network device is allocated from the
1313 /// lowest memory buffer address.
1315 PXE_UINT32 MemoryUsed;
1318 /// Actual number and size of receive and transmit buffers that were
1321 PXE_UINT16 TxBufCnt;
1322 PXE_UINT16 TxBufSize;
1323 PXE_UINT16 RxBufCnt;
1324 PXE_UINT16 RxBufSize;
1325 } PXE_DB_INITIALIZE;
1327 typedef struct s_pxe_cpb_receive_filters {
1329 /// List of multicast MAC addresses. This list, if present, will
1330 /// replace the existing multicast MAC address filter list.
1332 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
1333 } PXE_CPB_RECEIVE_FILTERS;
1335 typedef struct s_pxe_db_receive_filters {
1337 /// Filtered multicast MAC address list.
1339 PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
1340 } PXE_DB_RECEIVE_FILTERS;
1342 typedef struct s_pxe_cpb_station_address {
1344 /// If supplied and supported, the current station MAC address
1345 /// will be changed.
1347 PXE_MAC_ADDR StationAddr;
1348 } PXE_CPB_STATION_ADDRESS;
1350 typedef struct s_pxe_dpb_station_address {
1352 /// Current station MAC address.
1354 PXE_MAC_ADDR StationAddr;
1357 /// Station broadcast MAC address.
1359 PXE_MAC_ADDR BroadcastAddr;
1362 /// Permanent station MAC address.
1364 PXE_MAC_ADDR PermanentAddr;
1365 } PXE_DB_STATION_ADDRESS;
1367 typedef struct s_pxe_db_statistics {
1369 /// Bit field identifying what statistic data is collected by the
1371 /// If bit 0x00 is set, Data[0x00] is collected.
1372 /// If bit 0x01 is set, Data[0x01] is collected.
1373 /// If bit 0x20 is set, Data[0x20] is collected.
1374 /// If bit 0x21 is set, Data[0x21] is collected.
1377 PXE_UINT64 Supported;
1382 PXE_UINT64 Data[64];
1383 } PXE_DB_STATISTICS;
1386 /// Total number of frames received. Includes frames with errors and
1389 #define PXE_STATISTICS_RX_TOTAL_FRAMES 0x00
1392 /// Number of valid frames received and copied into receive buffers.
1394 #define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
1397 /// Number of frames below the minimum length for the media.
1398 /// This would be <64 for ethernet.
1400 #define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02
1403 /// Number of frames longer than the maxminum length for the
1404 /// media. This would be >1500 for ethernet.
1406 #define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
1409 /// Valid frames that were dropped because receive buffers were full.
1411 #define PXE_STATISTICS_RX_DROPPED_FRAMES 0x04
1414 /// Number of valid unicast frames received and not dropped.
1416 #define PXE_STATISTICS_RX_UNICAST_FRAMES 0x05
1419 /// Number of valid broadcast frames received and not dropped.
1421 #define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06
1424 /// Number of valid mutlicast frames received and not dropped.
1426 #define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07
1429 /// Number of frames w/ CRC or alignment errors.
1431 #define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08
1434 /// Total number of bytes received. Includes frames with errors
1435 /// and dropped frames.
1437 #define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
1440 /// Transmit statistics.
1442 #define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A
1443 #define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B
1444 #define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C
1445 #define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D
1446 #define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E
1447 #define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F
1448 #define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10
1449 #define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11
1450 #define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12
1451 #define PXE_STATISTICS_TX_TOTAL_BYTES 0x13
1454 /// Number of collisions detection on this subnet.
1456 #define PXE_STATISTICS_COLLISIONS 0x14
1459 /// Number of frames destined for unsupported protocol.
1461 #define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
1463 typedef struct s_pxe_cpb_mcast_ip_to_mac {
1465 /// Multicast IP address to be converted to multicast MAC address.
1468 } PXE_CPB_MCAST_IP_TO_MAC;
1470 typedef struct s_pxe_db_mcast_ip_to_mac {
1472 /// Multicast MAC address.
1475 } PXE_DB_MCAST_IP_TO_MAC;
1477 typedef struct s_pxe_cpb_nvdata_sparse {
1479 /// NvData item list. Only items in this list will be updated.
1483 /// Non-volatile storage address to be changed.
1488 /// Data item to write into above storage address.
1495 } Item[MAX_EEPROM_LEN];
1496 } PXE_CPB_NVDATA_SPARSE;
1499 /// When using bulk update, the size of the CPB structure must be
1500 /// the same size as the non-volatile NIC storage.
1502 typedef union u_pxe_cpb_nvdata_bulk {
1504 /// Array of byte-wide data items.
1506 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
1509 /// Array of word-wide data items.
1511 PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
1514 /// Array of dword-wide data items.
1516 PXE_UINT32 Dword[MAX_EEPROM_LEN];
1517 } PXE_CPB_NVDATA_BULK;
1519 typedef struct s_pxe_db_nvdata {
1521 /// Arrays of data items from non-volatile storage.
1525 /// Array of byte-wide data items.
1527 PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
1530 /// Array of word-wide data items.
1532 PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
1535 /// Array of dword-wide data items.
1537 PXE_UINT32 Dword[MAX_EEPROM_LEN];
1541 typedef struct s_pxe_db_get_status {
1543 /// Length of next receive frame (header + data). If this is zero,
1544 /// there is no next receive frame available.
1546 PXE_UINT32 RxFrameLen;
1549 /// Reserved, set to zero.
1551 PXE_UINT32 reserved;
1554 /// Addresses of transmitted buffers that need to be recycled.
1556 PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];
1557 } PXE_DB_GET_STATUS;
1559 typedef struct s_pxe_cpb_fill_header {
1561 /// Source and destination MAC addresses. These will be copied into
1562 /// the media header without doing byte swapping.
1564 PXE_MAC_ADDR SrcAddr;
1565 PXE_MAC_ADDR DestAddr;
1568 /// Address of first byte of media header. The first byte of packet data
1569 /// follows the last byte of the media header.
1571 PXE_UINT64 MediaHeader;
1574 /// Length of packet data in bytes (not including the media header).
1576 PXE_UINT32 PacketLen;
1579 /// Protocol type. This will be copied into the media header without
1580 /// doing byte swapping. Protocol type numbers can be obtained from
1581 /// the Assigned Numbers RFC 1700.
1583 PXE_UINT16 Protocol;
1586 /// Length of the media header in bytes.
1588 PXE_UINT16 MediaHeaderLen;
1589 } PXE_CPB_FILL_HEADER;
1591 #define PXE_PROTOCOL_ETHERNET_IP 0x0800
1592 #define PXE_PROTOCOL_ETHERNET_ARP 0x0806
1593 #define MAX_XMIT_FRAGMENTS 16
1595 typedef struct s_pxe_cpb_fill_header_fragmented {
1597 /// Source and destination MAC addresses. These will be copied into
1598 /// the media header without doing byte swapping.
1600 PXE_MAC_ADDR SrcAddr;
1601 PXE_MAC_ADDR DestAddr;
1604 /// Length of packet data in bytes (not including the media header).
1606 PXE_UINT32 PacketLen;
1609 /// Protocol type. This will be copied into the media header without
1610 /// doing byte swapping. Protocol type numbers can be obtained from
1611 /// the Assigned Numbers RFC 1700.
1613 PXE_MEDIA_PROTOCOL Protocol;
1616 /// Length of the media header in bytes.
1618 PXE_UINT16 MediaHeaderLen;
1621 /// Number of packet fragment descriptors.
1626 /// Reserved, must be set to zero.
1628 PXE_UINT16 reserved;
1631 /// Array of packet fragment descriptors. The first byte of the media
1632 /// header is the first byte of the first fragment.
1636 /// Address of this packet fragment.
1638 PXE_UINT64 FragAddr;
1641 /// Length of this packet fragment.
1646 /// Reserved, must be set to zero.
1648 PXE_UINT32 reserved;
1649 } FragDesc[MAX_XMIT_FRAGMENTS];
1651 PXE_CPB_FILL_HEADER_FRAGMENTED;
1653 typedef struct s_pxe_cpb_transmit {
1655 /// Address of first byte of frame buffer. This is also the first byte
1656 /// of the media header.
1658 PXE_UINT64 FrameAddr;
1661 /// Length of the data portion of the frame buffer in bytes. Do not
1662 /// include the length of the media header.
1667 /// Length of the media header in bytes.
1669 PXE_UINT16 MediaheaderLen;
1672 /// Reserved, must be zero.
1674 PXE_UINT16 reserved;
1677 typedef struct s_pxe_cpb_transmit_fragments {
1679 /// Length of packet data in bytes (not including the media header).
1681 PXE_UINT32 FrameLen;
1684 /// Length of the media header in bytes.
1686 PXE_UINT16 MediaheaderLen;
1689 /// Number of packet fragment descriptors.
1694 /// Array of frame fragment descriptors. The first byte of the first
1695 /// fragment is also the first byte of the media header.
1699 /// Address of this frame fragment.
1701 PXE_UINT64 FragAddr;
1704 /// Length of this frame fragment.
1709 /// Reserved, must be set to zero.
1711 PXE_UINT32 reserved;
1712 } FragDesc[MAX_XMIT_FRAGMENTS];
1714 PXE_CPB_TRANSMIT_FRAGMENTS;
1716 typedef struct s_pxe_cpb_receive {
1718 /// Address of first byte of receive buffer. This is also the first byte
1719 /// of the frame header.
1721 PXE_UINT64 BufferAddr;
1724 /// Length of receive buffer. This must be large enough to hold the
1725 /// received frame (media header + data). If the length of smaller than
1726 /// the received frame, data will be lost.
1728 PXE_UINT32 BufferLen;
1731 /// Reserved, must be set to zero.
1733 PXE_UINT32 reserved;
1736 typedef struct s_pxe_db_receive {
1738 /// Source and destination MAC addresses from media header.
1740 PXE_MAC_ADDR SrcAddr;
1741 PXE_MAC_ADDR DestAddr;
1744 /// Length of received frame. May be larger than receive buffer size.
1745 /// The receive buffer will not be overwritten. This is how to tell
1746 /// if data was lost because the receive buffer was too small.
1748 PXE_UINT32 FrameLen;
1751 /// Protocol type from media header.
1753 PXE_MEDIA_PROTOCOL Protocol;
1756 /// Length of media header in received frame.
1758 PXE_UINT16 MediaHeaderLen;
1761 /// Type of receive frame.
1763 PXE_FRAME_TYPE Type;
1766 /// Reserved, must be zero.
1768 PXE_UINT8 reserved[7];