qemu/roms/ipxe/src/drivers/net/rtl818x/rtl8180_sa2400.c

   1 /*
   2  * Radio tuning for Philips SA2400 on RTL8180
   3  *
   4  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   5  *
   6  * Modified slightly for iPXE, June 2009 by Joshua Oreman.
   7  *
   8  * Code from the BSD driver and the rtl8181 project have been
   9  * very useful to understand certain things
  10  *
  11  * I want to thanks the Authors of such projects and the Ndiswrapper
  12  * project Authors.
  13  *
  14  * A special Big Thanks also is for all people who donated me cards,
  15  * making possible the creation of the original rtl8180 driver
  16  * from which this code is derived!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <unistd.h>
  24 #include <ipxe/pci.h>
  25 #include <ipxe/net80211.h>
  26
  27 #include "rtl818x.h"
  28
  29 FILE_LICENCE(GPL2_ONLY);
  30
  31 #define SA2400_ANTENNA 0x91
  32 #define SA2400_DIG_ANAPARAM_PWR1_ON 0x8
  33 #define SA2400_ANA_ANAPARAM_PWR1_ON 0x28
  34 #define SA2400_ANAPARAM_PWR0_ON 0x3
  35
  36 /* RX sensitivity in dbm */
  37 #define SA2400_MAX_SENS 85
  38
  39 #define SA2400_REG4_FIRDAC_SHIFT 7
  40
  41 static const u32 sa2400_chan[] = {
  42         0x00096c, /* ch1 */
  43         0x080970,
  44         0x100974,
  45         0x180978,
  46         0x000980,
  47         0x080984,
  48         0x100988,
  49         0x18098c,
  50         0x000994,
  51         0x080998,
  52         0x10099c,
  53         0x1809a0,
  54         0x0009a8,
  55         0x0009b4, /* ch 14 */
  56 };
  57
  58 static void write_sa2400(struct net80211_device *dev, u8 addr, u32 data)
  59 {
  60         struct rtl818x_priv *priv = dev->priv;
  61         u32 phy_config;
  62
  63         /* MAC will bang bits to the sa2400. sw 3-wire is NOT used */
  64         phy_config = 0xb0000000;
  65
  66         phy_config |= ((u32)(addr & 0xf)) << 24;
  67         phy_config |= data & 0xffffff;
  68
  69         /* This was originally a 32-bit write to a typecast
  70            RFPinsOutput, but gcc complained about aliasing rules. -JBO */
  71         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, phy_config & 0xffff);
  72         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, phy_config >> 16);
  73
  74         mdelay(3);
  75 }
  76
  77 static void sa2400_write_phy_antenna(struct net80211_device *dev, short chan)
  78 {
  79         struct rtl818x_priv *priv = dev->priv;
  80         u8 ant = SA2400_ANTENNA;
  81
  82         if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
  83                 ant |= BB_ANTENNA_B;
  84
  85         if (chan == 14)
  86                 ant |= BB_ANTATTEN_CHAN14;
  87
  88         rtl818x_write_phy(dev, 0x10, ant);
  89
  90 }
  91
  92 static void sa2400_rf_set_channel(struct net80211_device *dev,
  93                                   struct net80211_channel *channelp)
  94 {
  95         struct rtl818x_priv *priv = dev->priv;
  96         int channel = channelp->channel_nr;
  97         u32 txpw = priv->txpower[channel - 1] & 0xFF;
  98         u32 chan = sa2400_chan[channel - 1];
  99
 100         write_sa2400(dev, 7, txpw);
 101
 102         sa2400_write_phy_antenna(dev, channel);
 103
 104         write_sa2400(dev, 0, chan);
 105         write_sa2400(dev, 1, 0xbb50);
 106         write_sa2400(dev, 2, 0x80);
 107         write_sa2400(dev, 3, 0);
 108 }
 109
 110 static void sa2400_rf_stop(struct net80211_device *dev)
 111 {
 112         write_sa2400(dev, 4, 0);
 113 }
 114
 115 static void sa2400_rf_init(struct net80211_device *dev)
 116 {
 117         struct rtl818x_priv *priv = dev->priv;
 118         u32 anaparam, txconf;
 119         u8 firdac;
 120         int analogphy = priv->rfparam & RF_PARAM_ANALOGPHY;
 121
 122         anaparam = priv->anaparam;
 123         anaparam &= ~(1 << ANAPARAM_TXDACOFF_SHIFT);
 124         anaparam &= ~ANAPARAM_PWR1_MASK;
 125         anaparam &= ~ANAPARAM_PWR0_MASK;
 126
 127         if (analogphy) {
 128                 anaparam |= SA2400_ANA_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT;
 129                 firdac = 0;
 130         } else {
 131                 anaparam |= (SA2400_DIG_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT);
 132                 anaparam |= (SA2400_ANAPARAM_PWR0_ON << ANAPARAM_PWR0_SHIFT);
 133                 firdac = 1 << SA2400_REG4_FIRDAC_SHIFT;
 134         }
 135
 136         rtl818x_set_anaparam(priv, anaparam);
 137
 138         write_sa2400(dev, 0, sa2400_chan[0]);
 139         write_sa2400(dev, 1, 0xbb50);
 140         write_sa2400(dev, 2, 0x80);
 141         write_sa2400(dev, 3, 0);
 142         write_sa2400(dev, 4, 0x19340 | firdac);
 143         write_sa2400(dev, 5, 0x1dfb | (SA2400_MAX_SENS - 54) << 15);
 144         write_sa2400(dev, 4, 0x19348 | firdac); /* calibrate VCO */
 145
 146         if (!analogphy)
 147                 write_sa2400(dev, 4, 0x1938c); /*???*/
 148
 149         write_sa2400(dev, 4, 0x19340 | firdac);
 150
 151         write_sa2400(dev, 0, sa2400_chan[0]);
 152         write_sa2400(dev, 1, 0xbb50);
 153         write_sa2400(dev, 2, 0x80);
 154         write_sa2400(dev, 3, 0);
 155         write_sa2400(dev, 4, 0x19344 | firdac); /* calibrate filter */
 156
 157         /* new from rtl8180 embedded driver (rtl8181 project) */
 158         write_sa2400(dev, 6, 0x13ff | (1 << 23)); /* MANRX */
 159         write_sa2400(dev, 8, 0); /* VCO */
 160
 161         if (analogphy) {
 162                 rtl818x_set_anaparam(priv, anaparam |
 163                                      (1 << ANAPARAM_TXDACOFF_SHIFT));
 164
 165                 txconf = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 166                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 167                         txconf | RTL818X_TX_CONF_LOOPBACK_CONT);
 168
 169                 write_sa2400(dev, 4, 0x19341); /* calibrates DC */
 170
 171                 /* a 5us delay is required here,
 172                  * we rely on the 3ms delay introduced in write_sa2400 */
 173
 174                 write_sa2400(dev, 4, 0x19345);
 175
 176                 /* a 20us delay is required here,
 177                  * we rely on the 3ms delay introduced in write_sa2400 */
 178
 179                 rtl818x_iowrite32(priv, &priv->map->TX_CONF, txconf);
 180
 181                 rtl818x_set_anaparam(priv, anaparam);
 182         }
 183         /* end new code */
 184
 185         write_sa2400(dev, 4, 0x19341 | firdac); /* RTX MODE */
 186
 187         /* baseband configuration */
 188         rtl818x_write_phy(dev, 0, 0x98);
 189         rtl818x_write_phy(dev, 3, 0x38);
 190         rtl818x_write_phy(dev, 4, 0xe0);
 191         rtl818x_write_phy(dev, 5, 0x90);
 192         rtl818x_write_phy(dev, 6, 0x1a);
 193         rtl818x_write_phy(dev, 7, 0x64);
 194
 195         sa2400_write_phy_antenna(dev, 1);
 196
 197         rtl818x_write_phy(dev, 0x11, 0x80);
 198
 199         if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
 200             RTL818X_CONFIG2_ANTENNA_DIV)
 201                 rtl818x_write_phy(dev, 0x12, 0xc7); /* enable ant diversity */
 202         else
 203                 rtl818x_write_phy(dev, 0x12, 0x47); /* disable ant diversity */
 204
 205         rtl818x_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
 206
 207         rtl818x_write_phy(dev, 0x19, 0x0);
 208         rtl818x_write_phy(dev, 0x1a, 0xa0);
 209 }
 210
 211 struct rtl818x_rf_ops sa2400_rf_ops __rtl818x_rf_driver = {
 212         .name           = "Philips SA2400",
 213         .id             = 3,
 214         .init           = sa2400_rf_init,
 215         .stop           = sa2400_rf_stop,
 216         .set_chan       = sa2400_rf_set_channel
 217 };