2 * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
4 * (EEPROM code originally implemented for rtl8139.c)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * You can also choose to distribute this program under the terms of
22 * the Unmodified Binary Distribution Licence (as given in the file
23 * COPYING.UBDL), provided that you have satisfied its requirements.
26 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
33 #include <ipxe/netdevice.h>
34 #include <ipxe/ethernet.h>
35 #include <ipxe/if_ether.h>
36 #include <ipxe/iobuf.h>
37 #include <ipxe/malloc.h>
40 #include <ipxe/threewire.h>
41 #include <ipxe/bitbash.h>
47 * Realtek 10/100/1000 network card driver
49 * Based on the following datasheets:
51 * http://www.datasheetarchive.com/dl/Datasheets-8/DSA-153536.pdf
52 * http://www.datasheetarchive.com/indexdl/Datasheet-028/DSA00494723.pdf
55 /******************************************************************************
59 ******************************************************************************
63 * Dump all registers (for debugging)
65 * @v rtl Realtek device
67 static __attribute__ (( unused )) void realtek_dump ( struct realtek_nic *rtl ){
71 /* Do nothing unless debug output is enabled */
75 /* Dump registers (via byte accesses; may not work for all registers) */
76 for ( i = 0 ; i < sizeof ( regs ) ; i++ )
77 regs[i] = readb ( rtl->regs + i );
78 DBGC ( rtl, "REALTEK %p register dump:\n", rtl );
79 DBGC_HDA ( rtl, 0, regs, sizeof ( regs ) );
82 /******************************************************************************
86 ******************************************************************************
89 /** Pin mapping for SPI bit-bashing interface */
90 static const uint8_t realtek_eeprom_bits[] = {
91 [SPI_BIT_SCLK] = RTL_9346CR_EESK,
92 [SPI_BIT_MOSI] = RTL_9346CR_EEDI,
93 [SPI_BIT_MISO] = RTL_9346CR_EEDO,
94 [SPI_BIT_SS(0)] = RTL_9346CR_EECS,
98 * Open bit-bashing interface
100 * @v basher Bit-bashing interface
102 static void realtek_spi_open_bit ( struct bit_basher *basher ) {
103 struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
106 /* Enable EEPROM access */
107 writeb ( RTL_9346CR_EEM_EEPROM, rtl->regs + RTL_9346CR );
108 readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
112 * Close bit-bashing interface
114 * @v basher Bit-bashing interface
116 static void realtek_spi_close_bit ( struct bit_basher *basher ) {
117 struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
120 /* Disable EEPROM access */
121 writeb ( RTL_9346CR_EEM_NORMAL, rtl->regs + RTL_9346CR );
122 readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
128 * @v basher Bit-bashing interface
129 * @v bit_id Bit number
130 * @ret zero Input is a logic 0
131 * @ret non-zero Input is a logic 1
133 static int realtek_spi_read_bit ( struct bit_basher *basher,
134 unsigned int bit_id ) {
135 struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
137 uint8_t mask = realtek_eeprom_bits[bit_id];
140 DBG_DISABLE ( DBGLVL_IO );
141 reg = readb ( rtl->regs + RTL_9346CR );
142 DBG_ENABLE ( DBGLVL_IO );
143 return ( reg & mask );
147 * Set/clear output bit
149 * @v basher Bit-bashing interface
150 * @v bit_id Bit number
151 * @v data Value to write
153 static void realtek_spi_write_bit ( struct bit_basher *basher,
154 unsigned int bit_id, unsigned long data ) {
155 struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
157 uint8_t mask = realtek_eeprom_bits[bit_id];
160 DBG_DISABLE ( DBGLVL_IO );
161 reg = readb ( rtl->regs + RTL_9346CR );
163 reg |= ( data & mask );
164 writeb ( reg, rtl->regs + RTL_9346CR );
165 readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
166 DBG_ENABLE ( DBGLVL_IO );
169 /** SPI bit-bashing interface */
170 static struct bit_basher_operations realtek_basher_ops = {
171 .open = realtek_spi_open_bit,
172 .close = realtek_spi_close_bit,
173 .read = realtek_spi_read_bit,
174 .write = realtek_spi_write_bit,
180 * @v netdev Network device
181 * @ret rc Return status code
183 static int realtek_init_eeprom ( struct net_device *netdev ) {
184 struct realtek_nic *rtl = netdev->priv;
188 /* Initialise SPI bit-bashing interface */
189 rtl->spibit.basher.op = &realtek_basher_ops;
190 rtl->spibit.bus.mode = SPI_MODE_THREEWIRE;
191 init_spi_bit_basher ( &rtl->spibit );
193 /* Detect EEPROM type and initialise three-wire device */
194 if ( readl ( rtl->regs + RTL_RCR ) & RTL_RCR_9356SEL ) {
195 DBGC ( rtl, "REALTEK %p EEPROM is a 93C56\n", rtl );
196 init_at93c56 ( &rtl->eeprom, 16 );
198 DBGC ( rtl, "REALTEK %p EEPROM is a 93C46\n", rtl );
199 init_at93c46 ( &rtl->eeprom, 16 );
202 /* Check for EEPROM presence. Some onboard NICs will have no
203 * EEPROM connected, with the BIOS being responsible for
204 * programming the initial register values.
206 if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_ID,
207 &id, sizeof ( id ) ) ) != 0 ) {
208 DBGC ( rtl, "REALTEK %p could not read EEPROM ID: %s\n",
209 rtl, strerror ( rc ) );
212 if ( id != cpu_to_le16 ( RTL_EEPROM_ID_MAGIC ) ) {
213 DBGC ( rtl, "REALTEK %p EEPROM ID incorrect (%#04x); assuming "
214 "no EEPROM\n", rtl, le16_to_cpu ( id ) );
218 /* Initialise space for non-volatile options, if available
220 * We use offset 0x40 (i.e. address 0x20), length 0x40. This
221 * block is marked as VPD in the Realtek datasheets, so we use
222 * it only if we detect that the card is not supporting VPD.
224 if ( readb ( rtl->regs + RTL_CONFIG1 ) & RTL_CONFIG1_VPD ) {
225 DBGC ( rtl, "REALTEK %p EEPROM in use for VPD; cannot use "
226 "for options\n", rtl );
228 nvo_init ( &rtl->nvo, &rtl->eeprom.nvs, RTL_EEPROM_VPD,
229 RTL_EEPROM_VPD_LEN, NULL, &netdev->refcnt );
235 /******************************************************************************
239 ******************************************************************************
243 * Read from MII register
245 * @v mii MII interface
246 * @v reg Register address
247 * @ret value Data read, or negative error
249 static int realtek_mii_read ( struct mii_interface *mii, unsigned int reg ) {
250 struct realtek_nic *rtl = container_of ( mii, struct realtek_nic, mii );
254 /* Fail if PHYAR register is not present */
255 if ( ! rtl->have_phy_regs )
259 writel ( RTL_PHYAR_VALUE ( 0, reg, 0 ), rtl->regs + RTL_PHYAR );
261 /* Wait for read to complete */
262 for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
264 /* If read is not complete, delay 1us and retry */
265 value = readl ( rtl->regs + RTL_PHYAR );
266 if ( ! ( value & RTL_PHYAR_FLAG ) ) {
271 /* Return register value */
272 return ( RTL_PHYAR_DATA ( value ) );
275 DBGC ( rtl, "REALTEK %p timed out waiting for MII read\n", rtl );
280 * Write to MII register
282 * @v mii MII interface
283 * @v reg Register address
284 * @v data Data to write
285 * @ret rc Return status code
287 static int realtek_mii_write ( struct mii_interface *mii, unsigned int reg,
289 struct realtek_nic *rtl = container_of ( mii, struct realtek_nic, mii );
292 /* Fail if PHYAR register is not present */
293 if ( ! rtl->have_phy_regs )
297 writel ( RTL_PHYAR_VALUE ( RTL_PHYAR_FLAG, reg, data ),
298 rtl->regs + RTL_PHYAR );
300 /* Wait for write to complete */
301 for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
303 /* If write is not complete, delay 1us and retry */
304 if ( readl ( rtl->regs + RTL_PHYAR ) & RTL_PHYAR_FLAG ) {
312 DBGC ( rtl, "REALTEK %p timed out waiting for MII write\n", rtl );
316 /** Realtek MII operations */
317 static struct mii_operations realtek_mii_operations = {
318 .read = realtek_mii_read,
319 .write = realtek_mii_write,
322 /******************************************************************************
326 ******************************************************************************
332 * @v rtl Realtek device
333 * @ret rc Return status code
335 static int realtek_reset ( struct realtek_nic *rtl ) {
339 writeb ( RTL_CR_RST, rtl->regs + RTL_CR );
341 /* Wait for reset to complete */
342 for ( i = 0 ; i < RTL_RESET_MAX_WAIT_MS ; i++ ) {
344 /* If reset is not complete, delay 1ms and retry */
345 if ( readb ( rtl->regs + RTL_CR ) & RTL_CR_RST ) {
353 DBGC ( rtl, "REALTEK %p timed out waiting for reset\n", rtl );
358 * Configure PHY for Gigabit operation
360 * @v rtl Realtek device
361 * @ret rc Return status code
363 static int realtek_phy_speed ( struct realtek_nic *rtl ) {
367 /* Read CTRL1000 register */
368 ctrl1000 = mii_read ( &rtl->mii, MII_CTRL1000 );
369 if ( ctrl1000 < 0 ) {
371 DBGC ( rtl, "REALTEK %p could not read CTRL1000: %s\n",
372 rtl, strerror ( rc ) );
376 /* Advertise 1000Mbps speeds */
377 ctrl1000 |= ( ADVERTISE_1000FULL | ADVERTISE_1000HALF );
378 if ( ( rc = mii_write ( &rtl->mii, MII_CTRL1000, ctrl1000 ) ) != 0 ) {
379 DBGC ( rtl, "REALTEK %p could not write CTRL1000: %s\n",
380 rtl, strerror ( rc ) );
390 * @v rtl Realtek device
391 * @ret rc Return status code
393 static int realtek_phy_reset ( struct realtek_nic *rtl ) {
396 /* Do nothing if we have no separate PHY register access */
397 if ( ! rtl->have_phy_regs )
400 /* Perform MII reset */
401 if ( ( rc = mii_reset ( &rtl->mii ) ) != 0 ) {
402 DBGC ( rtl, "REALTEK %p could not reset MII: %s\n",
403 rtl, strerror ( rc ) );
407 /* Some cards (e.g. RTL8169SC) do not advertise Gigabit by
408 * default. Try to enable advertisement of Gigabit speeds.
410 if ( ( rc = realtek_phy_speed ( rtl ) ) != 0 ) {
411 /* Ignore failures, since the register may not be
412 * present on non-Gigabit PHYs (e.g. RTL8101).
416 /* Restart autonegotiation */
417 if ( ( rc = mii_restart ( &rtl->mii ) ) != 0 ) {
418 DBGC ( rtl, "REALTEK %p could not restart MII: %s\n",
419 rtl, strerror ( rc ) );
426 /******************************************************************************
430 ******************************************************************************
436 * @v netdev Network device
438 static void realtek_check_link ( struct net_device *netdev ) {
439 struct realtek_nic *rtl = netdev->priv;
444 /* Determine link state */
445 if ( rtl->have_phy_regs ) {
446 mii_dump ( &rtl->mii );
447 phystatus = readb ( rtl->regs + RTL_PHYSTATUS );
448 link_up = ( phystatus & RTL_PHYSTATUS_LINKSTS );
449 DBGC ( rtl, "REALTEK %p PHY status is %02x (%s%s%s%s%s%s, "
450 "Link%s, %sDuplex)\n", rtl, phystatus,
451 ( ( phystatus & RTL_PHYSTATUS_ENTBI ) ? "TBI" : "GMII" ),
452 ( ( phystatus & RTL_PHYSTATUS_TXFLOW ) ?
454 ( ( phystatus & RTL_PHYSTATUS_RXFLOW ) ?
456 ( ( phystatus & RTL_PHYSTATUS_1000MF ) ?
458 ( ( phystatus & RTL_PHYSTATUS_100M ) ?
460 ( ( phystatus & RTL_PHYSTATUS_10M ) ?
462 ( ( phystatus & RTL_PHYSTATUS_LINKSTS ) ?
464 ( ( phystatus & RTL_PHYSTATUS_FULLDUP ) ?
467 msr = readb ( rtl->regs + RTL_MSR );
468 link_up = ( ! ( msr & RTL_MSR_LINKB ) );
469 DBGC ( rtl, "REALTEK %p media status is %02x (Link%s, "
470 "%dMbps%s%s%s%s%s)\n", rtl, msr,
471 ( ( msr & RTL_MSR_LINKB ) ? "Down" : "Up" ),
472 ( ( msr & RTL_MSR_SPEED_10 ) ? 10 : 100 ),
473 ( ( msr & RTL_MSR_TXFCE ) ? ", TxFlow" : "" ),
474 ( ( msr & RTL_MSR_RXFCE ) ? ", RxFlow" : "" ),
475 ( ( msr & RTL_MSR_AUX_STATUS ) ? ", AuxPwr" : "" ),
476 ( ( msr & RTL_MSR_TXPF ) ? ", TxPause" : "" ),
477 ( ( msr & RTL_MSR_RXPF ) ? ", RxPause" : "" ) );
480 /* Report link state */
482 netdev_link_up ( netdev );
484 netdev_link_down ( netdev );
488 /******************************************************************************
490 * Network device interface
492 ******************************************************************************
496 * Create receive buffer (legacy mode)
498 * @v rtl Realtek device
499 * @ret rc Return status code
501 static int realtek_create_buffer ( struct realtek_nic *rtl ) {
502 size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
506 /* Do nothing unless in legacy mode */
510 /* Allocate buffer */
511 rtl->rx_buffer = malloc_dma ( len, RTL_RXBUF_ALIGN );
512 if ( ! rtl->rx_buffer ) {
516 address = virt_to_bus ( rtl->rx_buffer );
518 /* Check that card can support address */
519 if ( address & ~0xffffffffULL ) {
520 DBGC ( rtl, "REALTEK %p cannot support 64-bit RX buffer "
526 /* Program buffer address */
527 writel ( address, rtl->regs + RTL_RBSTART );
528 DBGC ( rtl, "REALTEK %p receive buffer is at [%08llx,%08llx,%08llx)\n",
529 rtl, ( ( unsigned long long ) address ),
530 ( ( unsigned long long ) address + RTL_RXBUF_LEN ),
531 ( ( unsigned long long ) address + len ) );
536 free_dma ( rtl->rx_buffer, len );
537 rtl->rx_buffer = NULL;
543 * Destroy receive buffer (legacy mode)
545 * @v rtl Realtek device
547 static void realtek_destroy_buffer ( struct realtek_nic *rtl ) {
548 size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
550 /* Do nothing unless in legacy mode */
554 /* Clear buffer address */
555 writel ( 0, rtl->regs + RTL_RBSTART );
558 free_dma ( rtl->rx_buffer, len );
559 rtl->rx_buffer = NULL;
564 * Create descriptor ring
566 * @v rtl Realtek device
567 * @v ring Descriptor ring
568 * @ret rc Return status code
570 static int realtek_create_ring ( struct realtek_nic *rtl,
571 struct realtek_ring *ring ) {
574 /* Do nothing in legacy mode */
578 /* Allocate descriptor ring */
579 ring->desc = malloc_dma ( ring->len, RTL_RING_ALIGN );
583 /* Initialise descriptor ring */
584 memset ( ring->desc, 0, ring->len );
586 /* Program ring address */
587 address = virt_to_bus ( ring->desc );
588 writel ( ( ( ( uint64_t ) address ) >> 32 ),
589 rtl->regs + ring->reg + 4 );
590 writel ( ( address & 0xffffffffUL ), rtl->regs + ring->reg );
591 DBGC ( rtl, "REALTEK %p ring %02x is at [%08llx,%08llx)\n",
592 rtl, ring->reg, ( ( unsigned long long ) address ),
593 ( ( unsigned long long ) address + ring->len ) );
599 * Destroy descriptor ring
601 * @v rtl Realtek device
602 * @v ring Descriptor ring
604 static void realtek_destroy_ring ( struct realtek_nic *rtl,
605 struct realtek_ring *ring ) {
607 /* Reset producer and consumer counters */
611 /* Do nothing more if in legacy mode */
615 /* Clear ring address */
616 writel ( 0, rtl->regs + ring->reg );
617 writel ( 0, rtl->regs + ring->reg + 4 );
619 /* Free descriptor ring */
620 free_dma ( ring->desc, ring->len );
625 * Refill receive descriptor ring
627 * @v rtl Realtek device
629 static void realtek_refill_rx ( struct realtek_nic *rtl ) {
630 struct realtek_descriptor *rx;
631 struct io_buffer *iobuf;
636 /* Do nothing in legacy mode */
640 while ( ( rtl->rx.prod - rtl->rx.cons ) < RTL_NUM_RX_DESC ) {
642 /* Allocate I/O buffer */
643 iobuf = alloc_iob ( RTL_RX_MAX_LEN );
645 /* Wait for next refill */
649 /* Get next receive descriptor */
650 rx_idx = ( rtl->rx.prod++ % RTL_NUM_RX_DESC );
651 is_last = ( rx_idx == ( RTL_NUM_RX_DESC - 1 ) );
652 rx = &rtl->rx.desc[rx_idx];
654 /* Populate receive descriptor */
655 address = virt_to_bus ( iobuf->data );
656 rx->address = cpu_to_le64 ( address );
657 rx->length = cpu_to_le16 ( RTL_RX_MAX_LEN );
659 rx->flags = ( cpu_to_le16 ( RTL_DESC_OWN ) |
660 ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
663 /* Record I/O buffer */
664 assert ( rtl->rx_iobuf[rx_idx] == NULL );
665 rtl->rx_iobuf[rx_idx] = iobuf;
667 DBGC2 ( rtl, "REALTEK %p RX %d is [%llx,%llx)\n", rtl, rx_idx,
668 ( ( unsigned long long ) address ),
669 ( ( unsigned long long ) address + RTL_RX_MAX_LEN ) );
674 * Open network device
676 * @v netdev Network device
677 * @ret rc Return status code
679 static int realtek_open ( struct net_device *netdev ) {
680 struct realtek_nic *rtl = netdev->priv;
685 /* Create transmit descriptor ring */
686 if ( ( rc = realtek_create_ring ( rtl, &rtl->tx ) ) != 0 )
689 /* Create receive descriptor ring */
690 if ( ( rc = realtek_create_ring ( rtl, &rtl->rx ) ) != 0 )
693 /* Create receive buffer */
694 if ( ( rc = realtek_create_buffer ( rtl ) ) != 0 )
695 goto err_create_buffer;
697 /* Accept all packets */
698 writel ( 0xffffffffUL, rtl->regs + RTL_MAR0 );
699 writel ( 0xffffffffUL, rtl->regs + RTL_MAR4 );
701 /* Enable transmitter and receiver. RTL8139 requires that
702 * this happens before writing to RCR.
704 writeb ( ( RTL_CR_TE | RTL_CR_RE ), rtl->regs + RTL_CR );
706 /* Configure transmitter */
707 tcr = readl ( rtl->regs + RTL_TCR );
708 tcr &= ~RTL_TCR_MXDMA_MASK;
709 tcr |= RTL_TCR_MXDMA_DEFAULT;
710 writel ( tcr, rtl->regs + RTL_TCR );
712 /* Configure receiver */
713 rcr = readl ( rtl->regs + RTL_RCR );
714 rcr &= ~( RTL_RCR_STOP_WORKING | RTL_RCR_RXFTH_MASK |
715 RTL_RCR_RBLEN_MASK | RTL_RCR_MXDMA_MASK );
716 rcr |= ( RTL_RCR_RXFTH_DEFAULT | RTL_RCR_RBLEN_DEFAULT |
717 RTL_RCR_MXDMA_DEFAULT | RTL_RCR_WRAP | RTL_RCR_AB |
718 RTL_RCR_AM | RTL_RCR_APM | RTL_RCR_AAP );
719 writel ( rcr, rtl->regs + RTL_RCR );
721 /* Fill receive ring */
722 realtek_refill_rx ( rtl );
724 /* Update link state */
725 realtek_check_link ( netdev );
729 realtek_destroy_buffer ( rtl );
731 realtek_destroy_ring ( rtl, &rtl->rx );
733 realtek_destroy_ring ( rtl, &rtl->tx );
739 * Close network device
741 * @v netdev Network device
743 static void realtek_close ( struct net_device *netdev ) {
744 struct realtek_nic *rtl = netdev->priv;
747 /* Disable receiver and transmitter */
748 writeb ( 0, rtl->regs + RTL_CR );
750 /* Destroy receive buffer */
751 realtek_destroy_buffer ( rtl );
753 /* Destroy receive descriptor ring */
754 realtek_destroy_ring ( rtl, &rtl->rx );
756 /* Discard any unused receive buffers */
757 for ( i = 0 ; i < RTL_NUM_RX_DESC ; i++ ) {
758 if ( rtl->rx_iobuf[i] )
759 free_iob ( rtl->rx_iobuf[i] );
760 rtl->rx_iobuf[i] = NULL;
763 /* Destroy transmit descriptor ring */
764 realtek_destroy_ring ( rtl, &rtl->tx );
770 * @v netdev Network device
771 * @v iobuf I/O buffer
772 * @ret rc Return status code
774 static int realtek_transmit ( struct net_device *netdev,
775 struct io_buffer *iobuf ) {
776 struct realtek_nic *rtl = netdev->priv;
777 struct realtek_descriptor *tx;
782 /* Get next transmit descriptor */
783 if ( ( rtl->tx.prod - rtl->tx.cons ) >= RTL_NUM_TX_DESC ) {
784 netdev_tx_defer ( netdev, iobuf );
787 tx_idx = ( rtl->tx.prod++ % RTL_NUM_TX_DESC );
789 /* Transmit packet */
792 /* Pad and align packet */
793 iob_pad ( iobuf, ETH_ZLEN );
794 address = virt_to_bus ( iobuf->data );
796 /* Check that card can support address */
797 if ( address & ~0xffffffffULL ) {
798 DBGC ( rtl, "REALTEK %p cannot support 64-bit TX "
799 "buffer address\n", rtl );
803 /* Add to transmit ring */
804 writel ( address, rtl->regs + RTL_TSAD ( tx_idx ) );
805 writel ( ( RTL_TSD_ERTXTH_DEFAULT | iob_len ( iobuf ) ),
806 rtl->regs + RTL_TSD ( tx_idx ) );
810 /* Populate transmit descriptor */
811 address = virt_to_bus ( iobuf->data );
812 is_last = ( tx_idx == ( RTL_NUM_TX_DESC - 1 ) );
813 tx = &rtl->tx.desc[tx_idx];
814 tx->address = cpu_to_le64 ( address );
815 tx->length = cpu_to_le16 ( iob_len ( iobuf ) );
817 tx->flags = ( cpu_to_le16 ( RTL_DESC_OWN | RTL_DESC_FS |
819 ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
822 /* Notify card that there are packets ready to transmit */
823 writeb ( RTL_TPPOLL_NPQ, rtl->regs + rtl->tppoll );
826 DBGC2 ( rtl, "REALTEK %p TX %d is [%llx,%llx)\n", rtl, tx_idx,
827 ( ( unsigned long long ) virt_to_bus ( iobuf->data ) ),
828 ( ( ( unsigned long long ) virt_to_bus ( iobuf->data ) ) +
829 iob_len ( iobuf ) ) );
835 * Poll for completed packets
837 * @v netdev Network device
839 static void realtek_poll_tx ( struct net_device *netdev ) {
840 struct realtek_nic *rtl = netdev->priv;
841 struct realtek_descriptor *tx;
844 /* Check for completed packets */
845 while ( rtl->tx.cons != rtl->tx.prod ) {
847 /* Get next transmit descriptor */
848 tx_idx = ( rtl->tx.cons % RTL_NUM_TX_DESC );
850 /* Stop if descriptor is still in use */
853 /* Check ownership bit in transmit status register */
854 if ( ! ( readl ( rtl->regs + RTL_TSD ( tx_idx ) ) &
860 /* Check ownership bit in descriptor */
861 tx = &rtl->tx.desc[tx_idx];
862 if ( tx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
866 DBGC2 ( rtl, "REALTEK %p TX %d complete\n", rtl, tx_idx );
868 /* Complete TX descriptor */
870 netdev_tx_complete_next ( netdev );
875 * Poll for received packets (legacy mode)
877 * @v netdev Network device
879 static void realtek_legacy_poll_rx ( struct net_device *netdev ) {
880 struct realtek_nic *rtl = netdev->priv;
881 struct realtek_legacy_header *rx;
882 struct io_buffer *iobuf;
885 /* Check for received packets */
886 while ( ! ( readb ( rtl->regs + RTL_CR ) & RTL_CR_BUFE ) ) {
888 /* Extract packet from receive buffer */
889 rx = ( rtl->rx_buffer + rtl->rx_offset );
890 len = le16_to_cpu ( rx->length );
891 if ( rx->status & cpu_to_le16 ( RTL_STAT_ROK ) ) {
893 DBGC2 ( rtl, "REALTEK %p RX offset %x+%zx\n",
894 rtl, rtl->rx_offset, len );
896 /* Allocate I/O buffer */
897 iobuf = alloc_iob ( len );
899 netdev_rx_err ( netdev, NULL, -ENOMEM );
900 /* Leave packet for next poll */
904 /* Copy data to I/O buffer */
905 memcpy ( iob_put ( iobuf, len ), rx->data, len );
906 iob_unput ( iobuf, 4 /* strip CRC */ );
908 /* Hand off to network stack */
909 netdev_rx ( netdev, iobuf );
913 DBGC ( rtl, "REALTEK %p RX offset %x+%zx error %04x\n",
914 rtl, rtl->rx_offset, len,
915 le16_to_cpu ( rx->status ) );
916 netdev_rx_err ( netdev, NULL, -EIO );
919 /* Update buffer offset */
920 rtl->rx_offset = ( rtl->rx_offset + sizeof ( *rx ) + len );
921 rtl->rx_offset = ( ( rtl->rx_offset + 3 ) & ~3 );
922 rtl->rx_offset = ( rtl->rx_offset % RTL_RXBUF_LEN );
923 writew ( ( rtl->rx_offset - 16 ), rtl->regs + RTL_CAPR );
925 /* Give chip time to react before rechecking RTL_CR */
926 readw ( rtl->regs + RTL_CAPR );
931 * Poll for received packets
933 * @v netdev Network device
935 static void realtek_poll_rx ( struct net_device *netdev ) {
936 struct realtek_nic *rtl = netdev->priv;
937 struct realtek_descriptor *rx;
938 struct io_buffer *iobuf;
942 /* Poll receive buffer if in legacy mode */
944 realtek_legacy_poll_rx ( netdev );
948 /* Check for received packets */
949 while ( rtl->rx.cons != rtl->rx.prod ) {
951 /* Get next receive descriptor */
952 rx_idx = ( rtl->rx.cons % RTL_NUM_RX_DESC );
953 rx = &rtl->rx.desc[rx_idx];
955 /* Stop if descriptor is still in use */
956 if ( rx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
959 /* Populate I/O buffer */
960 iobuf = rtl->rx_iobuf[rx_idx];
961 rtl->rx_iobuf[rx_idx] = NULL;
962 len = ( le16_to_cpu ( rx->length ) & RTL_DESC_SIZE_MASK );
963 iob_put ( iobuf, ( len - 4 /* strip CRC */ ) );
965 /* Hand off to network stack */
966 if ( rx->flags & cpu_to_le16 ( RTL_DESC_RES ) ) {
967 DBGC ( rtl, "REALTEK %p RX %d error (length %zd, "
968 "flags %04x)\n", rtl, rx_idx, len,
969 le16_to_cpu ( rx->flags ) );
970 netdev_rx_err ( netdev, iobuf, -EIO );
972 DBGC2 ( rtl, "REALTEK %p RX %d complete (length "
973 "%zd)\n", rtl, rx_idx, len );
974 netdev_rx ( netdev, iobuf );
981 * Poll for completed and received packets
983 * @v netdev Network device
985 static void realtek_poll ( struct net_device *netdev ) {
986 struct realtek_nic *rtl = netdev->priv;
989 /* Check for and acknowledge interrupts */
990 isr = readw ( rtl->regs + RTL_ISR );
993 writew ( isr, rtl->regs + RTL_ISR );
995 /* Poll for TX completions, if applicable */
996 if ( isr & ( RTL_IRQ_TER | RTL_IRQ_TOK ) )
997 realtek_poll_tx ( netdev );
999 /* Poll for RX completionsm, if applicable */
1000 if ( isr & ( RTL_IRQ_RER | RTL_IRQ_ROK ) )
1001 realtek_poll_rx ( netdev );
1003 /* Check link state, if applicable */
1004 if ( isr & RTL_IRQ_PUN_LINKCHG )
1005 realtek_check_link ( netdev );
1007 /* Refill RX ring */
1008 realtek_refill_rx ( rtl );
1012 * Enable or disable interrupts
1014 * @v netdev Network device
1015 * @v enable Interrupts should be enabled
1017 static void realtek_irq ( struct net_device *netdev, int enable ) {
1018 struct realtek_nic *rtl = netdev->priv;
1021 /* Set interrupt mask */
1022 imr = ( enable ? ( RTL_IRQ_PUN_LINKCHG | RTL_IRQ_TER | RTL_IRQ_TOK |
1023 RTL_IRQ_RER | RTL_IRQ_ROK ) : 0 );
1024 writew ( imr, rtl->regs + RTL_IMR );
1027 /** Realtek network device operations */
1028 static struct net_device_operations realtek_operations = {
1029 .open = realtek_open,
1030 .close = realtek_close,
1031 .transmit = realtek_transmit,
1032 .poll = realtek_poll,
1036 /******************************************************************************
1040 ******************************************************************************
1044 * Detect device type
1046 * @v rtl Realtek device
1048 static void realtek_detect ( struct realtek_nic *rtl ) {
1052 uint16_t check_cpcr;
1054 /* The RX Packet Maximum Size register is present only on
1055 * 8169. Try to set to our intended MTU.
1057 rms = RTL_RX_MAX_LEN;
1058 writew ( rms, rtl->regs + RTL_RMS );
1059 check_rms = readw ( rtl->regs + RTL_RMS );
1061 /* The C+ Command register is present only on 8169 and 8139C+.
1062 * Try to enable C+ mode and PCI Dual Address Cycle (for
1063 * 64-bit systems), if supported.
1065 * Note that enabling DAC seems to cause bizarre behaviour
1066 * (lockups, garbage data on the wire) on some systems, even
1067 * if only 32-bit addresses are used.
1069 cpcr = readw ( rtl->regs + RTL_CPCR );
1070 cpcr |= ( RTL_CPCR_MULRW | RTL_CPCR_CPRX | RTL_CPCR_CPTX );
1071 if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) )
1072 cpcr |= RTL_CPCR_DAC;
1073 writew ( cpcr, rtl->regs + RTL_CPCR );
1074 check_cpcr = readw ( rtl->regs + RTL_CPCR );
1076 /* Detect device type */
1077 if ( check_rms == rms ) {
1078 DBGC ( rtl, "REALTEK %p appears to be an RTL8169\n", rtl );
1079 rtl->have_phy_regs = 1;
1080 rtl->tppoll = RTL_TPPOLL_8169;
1082 if ( ( check_cpcr == cpcr ) && ( cpcr != 0xffff ) ) {
1083 DBGC ( rtl, "REALTEK %p appears to be an RTL8139C+\n",
1085 rtl->tppoll = RTL_TPPOLL_8139CP;
1087 DBGC ( rtl, "REALTEK %p appears to be an RTL8139\n",
1091 rtl->eeprom.bus = &rtl->spibit.bus;
1099 * @ret rc Return status code
1101 static int realtek_probe ( struct pci_device *pci ) {
1102 struct net_device *netdev;
1103 struct realtek_nic *rtl;
1107 /* Allocate and initialise net device */
1108 netdev = alloc_etherdev ( sizeof ( *rtl ) );
1113 netdev_init ( netdev, &realtek_operations );
1115 pci_set_drvdata ( pci, netdev );
1116 netdev->dev = &pci->dev;
1117 memset ( rtl, 0, sizeof ( *rtl ) );
1118 realtek_init_ring ( &rtl->tx, RTL_NUM_TX_DESC, RTL_TNPDS );
1119 realtek_init_ring ( &rtl->rx, RTL_NUM_RX_DESC, RTL_RDSAR );
1121 /* Fix up PCI device */
1122 adjust_pci_device ( pci );
1125 rtl->regs = ioremap ( pci->membase, RTL_BAR_SIZE );
1126 if ( ! rtl->regs ) {
1132 if ( ( rc = realtek_reset ( rtl ) ) != 0 )
1135 /* Detect device type */
1136 realtek_detect ( rtl );
1138 /* Initialise EEPROM */
1139 if ( rtl->eeprom.bus &&
1140 ( ( rc = realtek_init_eeprom ( netdev ) ) == 0 ) ) {
1142 /* Read MAC address from EEPROM */
1143 if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_MAC,
1144 netdev->hw_addr, ETH_ALEN ) ) != 0 ) {
1145 DBGC ( rtl, "REALTEK %p could not read MAC address: "
1146 "%s\n", rtl, strerror ( rc ) );
1152 /* EEPROM not present. Fall back to reading the
1153 * current ID register value, which will hopefully
1154 * have been programmed by the platform firmware.
1156 for ( i = 0 ; i < ETH_ALEN ; i++ )
1157 netdev->hw_addr[i] = readb ( rtl->regs + RTL_IDR0 + i );
1160 /* Initialise and reset MII interface */
1161 mii_init ( &rtl->mii, &realtek_mii_operations );
1162 if ( ( rc = realtek_phy_reset ( rtl ) ) != 0 )
1165 /* Register network device */
1166 if ( ( rc = register_netdev ( netdev ) ) != 0 )
1167 goto err_register_netdev;
1169 /* Set initial link state */
1170 realtek_check_link ( netdev );
1172 /* Register non-volatile options, if applicable */
1173 if ( rtl->nvo.nvs ) {
1174 if ( ( rc = register_nvo ( &rtl->nvo,
1175 netdev_settings ( netdev ) ) ) != 0)
1176 goto err_register_nvo;
1182 unregister_netdev ( netdev );
1183 err_register_netdev:
1186 realtek_reset ( rtl );
1188 iounmap ( rtl->regs );
1190 netdev_nullify ( netdev );
1191 netdev_put ( netdev );
1201 static void realtek_remove ( struct pci_device *pci ) {
1202 struct net_device *netdev = pci_get_drvdata ( pci );
1203 struct realtek_nic *rtl = netdev->priv;
1205 /* Unregister non-volatile options, if applicable */
1207 unregister_nvo ( &rtl->nvo );
1209 /* Unregister network device */
1210 unregister_netdev ( netdev );
1213 realtek_reset ( rtl );
1215 /* Free network device */
1216 iounmap ( rtl->regs );
1217 netdev_nullify ( netdev );
1218 netdev_put ( netdev );
1221 /** Realtek PCI device IDs */
1222 static struct pci_device_id realtek_nics[] = {
1223 PCI_ROM ( 0x0001, 0x8168, "clone8169", "Cloned 8169", 0 ),
1224 PCI_ROM ( 0x018a, 0x0106, "fpc0106tx", "LevelOne FPC-0106TX", 0 ),
1225 PCI_ROM ( 0x021b, 0x8139, "hne300", "Compaq HNE-300", 0 ),
1226 PCI_ROM ( 0x02ac, 0x1012, "s1012", "SpeedStream 1012", 0 ),
1227 PCI_ROM ( 0x0357, 0x000a, "ttpmon", "TTTech TTP-Monitoring", 0 ),
1228 PCI_ROM ( 0x10ec, 0x8129, "rtl8129", "RTL-8129", 0 ),
1229 PCI_ROM ( 0x10ec, 0x8136, "rtl8136", "RTL8101E/RTL8102E", 0 ),
1230 PCI_ROM ( 0x10ec, 0x8138, "rtl8138", "RT8139 (B/C)", 0 ),
1231 PCI_ROM ( 0x10ec, 0x8139, "rtl8139", "RTL-8139/8139C/8139C+", 0 ),
1232 PCI_ROM ( 0x10ec, 0x8167, "rtl8167", "RTL-8110SC/8169SC", 0 ),
1233 PCI_ROM ( 0x10ec, 0x8168, "rtl8168", "RTL8111/8168B", 0 ),
1234 PCI_ROM ( 0x10ec, 0x8169, "rtl8169", "RTL-8169", 0 ),
1235 PCI_ROM ( 0x1113, 0x1211, "smc1211", "SMC2-1211TX", 0 ),
1236 PCI_ROM ( 0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX", 0 ),
1237 PCI_ROM ( 0x1186, 0x1340, "dfe690", "DFE-690TXD", 0 ),
1238 PCI_ROM ( 0x1186, 0x4300, "dge528t", "DGE-528T", 0 ),
1239 PCI_ROM ( 0x11db, 0x1234, "sega8139", "Sega Enterprises 8139", 0 ),
1240 PCI_ROM ( 0x1259, 0xa117, "allied8139", "Allied Telesyn 8139", 0 ),
1241 PCI_ROM ( 0x1259, 0xa11e, "allied81xx", "Allied Telesyn 81xx", 0 ),
1242 PCI_ROM ( 0x1259, 0xc107, "allied8169", "Allied Telesyn 8169", 0 ),
1243 PCI_ROM ( 0x126c, 0x1211, "northen8139","Northern Telecom 8139", 0 ),
1244 PCI_ROM ( 0x13d1, 0xab06, "fe2000vx", "Abocom FE2000VX", 0 ),
1245 PCI_ROM ( 0x1432, 0x9130, "edi8139", "Edimax 8139", 0 ),
1246 PCI_ROM ( 0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX", 0 ),
1247 PCI_ROM ( 0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX", 0 ),
1248 PCI_ROM ( 0x1500, 0x1360, "delta8139", "Delta Electronics 8139", 0 ),
1249 PCI_ROM ( 0x16ec, 0x0116, "usr997902", "USR997902", 0 ),
1250 PCI_ROM ( 0x1737, 0x1032, "linksys8169","Linksys 8169", 0 ),
1251 PCI_ROM ( 0x1743, 0x8139, "rolf100", "Peppercorn ROL/F-100", 0 ),
1252 PCI_ROM ( 0x4033, 0x1360, "addron8139", "Addtron 8139", 0 ),
1253 PCI_ROM ( 0xffff, 0x8139, "clonse8139", "Cloned 8139", 0 ),
1256 /** Realtek PCI driver */
1257 struct pci_driver realtek_driver __pci_driver = {
1258 .ids = realtek_nics,
1259 .id_count = ( sizeof ( realtek_nics ) / sizeof ( realtek_nics[0] ) ),
1260 .probe = realtek_probe,
1261 .remove = realtek_remove,