2 * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
3 * Copyright (C) 2008 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * You can also choose to distribute this program under the terms of
21 * the Unmodified Binary Distribution Licence (as given in the file
22 * COPYING.UBDL), provided that you have satisfied its requirements.
25 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
36 #include <ipxe/malloc.h>
37 #include <ipxe/iobuf.h>
38 #include <ipxe/netdevice.h>
39 #include <ipxe/if_ether.h>
40 #include <ipxe/ethernet.h>
42 #include <ipxe/settings.h>
52 /** Maximum number of ports */
53 #define PHN_MAX_NUM_PORTS 8
55 /** Maximum time to wait for command PEG to initialise
59 * The command PEG will currently report initialisation complete only
60 * when at least one PHY has detected a link (so that the global PHY
61 * clock can be set to 10G/1G as appropriate). This can take a very,
64 * A future firmware revision should decouple PHY initialisation from
65 * firmware initialisation, at which point the command PEG will report
66 * initialisation complete much earlier, and this timeout can be
69 #define PHN_CMDPEG_INIT_TIMEOUT_SEC 50
71 /** Maximum time to wait for receive PEG to initialise */
72 #define PHN_RCVPEG_INIT_TIMEOUT_SEC 2
74 /** Maximum time to wait for firmware to accept a command */
75 #define PHN_ISSUE_CMD_TIMEOUT_MS 2000
77 /** Maximum time to wait for test memory */
78 #define PHN_TEST_MEM_TIMEOUT_MS 100
80 /** Maximum time to wait for CLP command to be issued */
81 #define PHN_CLP_CMD_TIMEOUT_MS 500
83 /** Link state poll frequency
85 * The link state will be checked once in every N calls to poll().
87 #define PHN_LINK_POLL_FREQUENCY 4096
89 /** Number of RX descriptors */
90 #define PHN_NUM_RDS 32
92 /** RX maximum fill level. Must be strictly less than PHN_NUM_RDS. */
93 #define PHN_RDS_MAX_FILL 16
96 #define PHN_RX_BUFSIZE ( 32 /* max LL padding added by card */ + \
99 /** Number of RX status descriptors */
100 #define PHN_NUM_SDS 32
102 /** Number of TX descriptors */
103 #define PHN_NUM_CDS 8
105 /** A Phantom descriptor ring set */
106 struct phantom_descriptor_rings {
107 /** RX descriptors */
108 struct phantom_rds rds[PHN_NUM_RDS];
109 /** RX status descriptors */
110 struct phantom_sds sds[PHN_NUM_SDS];
111 /** TX descriptors */
112 union phantom_cds cds[PHN_NUM_CDS];
113 /** TX consumer index */
114 volatile uint32_t cmd_cons;
117 /** RX context creation request and response buffers */
118 struct phantom_create_rx_ctx_rqrsp {
120 struct nx_hostrq_rx_ctx_s rx_ctx;
121 struct nx_hostrq_rds_ring_s rds;
122 struct nx_hostrq_sds_ring_s sds;
123 } __unm_dma_aligned hostrq;
125 struct nx_cardrsp_rx_ctx_s rx_ctx;
126 struct nx_cardrsp_rds_ring_s rds;
127 struct nx_cardrsp_sds_ring_s sds;
128 } __unm_dma_aligned cardrsp;
131 /** TX context creation request and response buffers */
132 struct phantom_create_tx_ctx_rqrsp {
134 struct nx_hostrq_tx_ctx_s tx_ctx;
135 } __unm_dma_aligned hostrq;
137 struct nx_cardrsp_tx_ctx_s tx_ctx;
138 } __unm_dma_aligned cardrsp;
145 /** Current CRB window */
146 unsigned long crb_window;
147 /** CRB window access method */
148 unsigned long ( *crb_access ) ( struct phantom_nic *phantom,
157 uint16_t rx_context_id;
158 /** RX descriptor producer CRB offset */
159 unsigned long rds_producer_crb;
160 /** RX status descriptor consumer CRB offset */
161 unsigned long sds_consumer_crb;
162 /** RX interrupt mask CRB offset */
163 unsigned long sds_irq_mask_crb;
164 /** RX interrupts enabled */
165 unsigned int sds_irq_enabled;
167 /** RX producer index */
168 unsigned int rds_producer_idx;
169 /** RX consumer index */
170 unsigned int rds_consumer_idx;
171 /** RX status consumer index */
172 unsigned int sds_consumer_idx;
173 /** RX I/O buffers */
174 struct io_buffer *rds_iobuf[PHN_RDS_MAX_FILL];
178 uint16_t tx_context_id;
179 /** TX descriptor producer CRB offset */
180 unsigned long cds_producer_crb;
182 /** TX producer index */
183 unsigned int cds_producer_idx;
184 /** TX consumer index */
185 unsigned int cds_consumer_idx;
186 /** TX I/O buffers */
187 struct io_buffer *cds_iobuf[PHN_NUM_CDS];
190 /** Descriptor rings */
191 struct phantom_descriptor_rings *desc;
194 /** Last known link state */
196 /** Link state poll timer */
197 unsigned long link_poll_timer;
200 /** Non-volatile settings */
201 struct settings settings;
204 /** Interrupt mask registers */
205 static const unsigned long phantom_irq_mask_reg[PHN_MAX_NUM_PORTS] = {
206 UNM_PCIE_IRQ_MASK_F0,
207 UNM_PCIE_IRQ_MASK_F1,
208 UNM_PCIE_IRQ_MASK_F2,
209 UNM_PCIE_IRQ_MASK_F3,
210 UNM_PCIE_IRQ_MASK_F4,
211 UNM_PCIE_IRQ_MASK_F5,
212 UNM_PCIE_IRQ_MASK_F6,
213 UNM_PCIE_IRQ_MASK_F7,
216 /** Interrupt status registers */
217 static const unsigned long phantom_irq_status_reg[PHN_MAX_NUM_PORTS] = {
218 UNM_PCIE_IRQ_STATUS_F0,
219 UNM_PCIE_IRQ_STATUS_F1,
220 UNM_PCIE_IRQ_STATUS_F2,
221 UNM_PCIE_IRQ_STATUS_F3,
222 UNM_PCIE_IRQ_STATUS_F4,
223 UNM_PCIE_IRQ_STATUS_F5,
224 UNM_PCIE_IRQ_STATUS_F6,
225 UNM_PCIE_IRQ_STATUS_F7,
228 /***************************************************************************
230 * CRB register access
235 * Prepare for access to CRB register via 128MB BAR
237 * @v phantom Phantom NIC
238 * @v reg Register offset within abstract address space
239 * @ret offset Register offset within PCI BAR0
241 static unsigned long phantom_crb_access_128m ( struct phantom_nic *phantom,
242 unsigned long reg ) {
243 unsigned long offset = ( 0x6000000 + ( reg & 0x1ffffff ) );
244 uint32_t window = ( reg & 0x2000000 );
245 uint32_t verify_window;
247 if ( phantom->crb_window != window ) {
249 /* Write to the CRB window register */
250 writel ( window, phantom->bar0 + UNM_128M_CRB_WINDOW );
252 /* Ensure that the write has reached the card */
253 verify_window = readl ( phantom->bar0 + UNM_128M_CRB_WINDOW );
254 assert ( verify_window == window );
256 /* Record new window */
257 phantom->crb_window = window;
264 * Prepare for access to CRB register via 32MB BAR
266 * @v phantom Phantom NIC
267 * @v reg Register offset within abstract address space
268 * @ret offset Register offset within PCI BAR0
270 static unsigned long phantom_crb_access_32m ( struct phantom_nic *phantom,
271 unsigned long reg ) {
272 unsigned long offset = ( reg & 0x1ffffff );
273 uint32_t window = ( reg & 0x2000000 );
274 uint32_t verify_window;
276 if ( phantom->crb_window != window ) {
278 /* Write to the CRB window register */
279 writel ( window, phantom->bar0 + UNM_32M_CRB_WINDOW );
281 /* Ensure that the write has reached the card */
282 verify_window = readl ( phantom->bar0 + UNM_32M_CRB_WINDOW );
283 assert ( verify_window == window );
285 /* Record new window */
286 phantom->crb_window = window;
293 * Prepare for access to CRB register via 2MB BAR
295 * @v phantom Phantom NIC
296 * @v reg Register offset within abstract address space
297 * @ret offset Register offset within PCI BAR0
299 static unsigned long phantom_crb_access_2m ( struct phantom_nic *phantom,
300 unsigned long reg ) {
301 static const struct {
304 } reg_window_hi[] = {
305 { UNM_CRB_BLK_PCIE, 0x773 },
306 { UNM_CRB_BLK_CAM, 0x416 },
307 { UNM_CRB_BLK_ROMUSB, 0x421 },
308 { UNM_CRB_BLK_TEST, 0x295 },
309 { UNM_CRB_BLK_PEG_0, 0x340 },
310 { UNM_CRB_BLK_PEG_1, 0x341 },
311 { UNM_CRB_BLK_PEG_2, 0x342 },
312 { UNM_CRB_BLK_PEG_3, 0x343 },
313 { UNM_CRB_BLK_PEG_4, 0x34b },
315 unsigned int block = UNM_CRB_BLK ( reg );
316 unsigned long offset = UNM_CRB_OFFSET ( reg );
318 uint32_t verify_window;
321 for ( i = 0 ; i < ( sizeof ( reg_window_hi ) /
322 sizeof ( reg_window_hi[0] ) ) ; i++ ) {
324 if ( reg_window_hi[i].block != block )
327 window = ( ( reg_window_hi[i].window_hi << 20 ) |
328 ( offset & 0x000f0000 ) );
330 if ( phantom->crb_window != window ) {
332 /* Write to the CRB window register */
333 writel ( window, phantom->bar0 + UNM_2M_CRB_WINDOW );
335 /* Ensure that the write has reached the card */
336 verify_window = readl ( phantom->bar0 +
338 assert ( verify_window == window );
340 /* Record new window */
341 phantom->crb_window = window;
344 return ( 0x1e0000 + ( offset & 0xffff ) );
352 * Read from Phantom CRB register
354 * @v phantom Phantom NIC
355 * @v reg Register offset within abstract address space
356 * @ret value Register value
358 static uint32_t phantom_readl ( struct phantom_nic *phantom,
359 unsigned long reg ) {
360 unsigned long offset;
362 offset = phantom->crb_access ( phantom, reg );
363 return readl ( phantom->bar0 + offset );
367 * Write to Phantom CRB register
369 * @v phantom Phantom NIC
370 * @v value Register value
371 * @v reg Register offset within abstract address space
373 static void phantom_writel ( struct phantom_nic *phantom, uint32_t value,
374 unsigned long reg ) {
375 unsigned long offset;
377 offset = phantom->crb_access ( phantom, reg );
378 writel ( value, phantom->bar0 + offset );
382 * Write to Phantom CRB HI/LO register pair
384 * @v phantom Phantom NIC
385 * @v value Register value
386 * @v lo_offset LO register offset within CRB
387 * @v hi_offset HI register offset within CRB
389 static inline void phantom_write_hilo ( struct phantom_nic *phantom,
391 unsigned long lo_offset,
392 unsigned long hi_offset ) {
393 uint32_t lo = ( value & 0xffffffffUL );
394 uint32_t hi = ( value >> 32 );
396 phantom_writel ( phantom, lo, lo_offset );
397 phantom_writel ( phantom, hi, hi_offset );
400 /***************************************************************************
402 * Firmware message buffer access (for debug)
407 * Read from Phantom test memory
409 * @v phantom Phantom NIC
410 * @v offset Offset within test memory
411 * @v buf 8-byte buffer to fill
412 * @ret rc Return status code
414 static int phantom_read_test_mem_block ( struct phantom_nic *phantom,
415 unsigned long offset,
417 unsigned int retries;
418 uint32_t test_control;
420 phantom_write_hilo ( phantom, offset, UNM_TEST_ADDR_LO,
422 phantom_writel ( phantom, UNM_TEST_CONTROL_ENABLE, UNM_TEST_CONTROL );
423 phantom_writel ( phantom,
424 ( UNM_TEST_CONTROL_ENABLE | UNM_TEST_CONTROL_START ),
427 for ( retries = 0 ; retries < PHN_TEST_MEM_TIMEOUT_MS ; retries++ ) {
428 test_control = phantom_readl ( phantom, UNM_TEST_CONTROL );
429 if ( ( test_control & UNM_TEST_CONTROL_BUSY ) == 0 ) {
430 buf[0] = phantom_readl ( phantom, UNM_TEST_RDDATA_LO );
431 buf[1] = phantom_readl ( phantom, UNM_TEST_RDDATA_HI );
437 DBGC ( phantom, "Phantom %p timed out waiting for test memory\n",
443 * Read single byte from Phantom test memory
445 * @v phantom Phantom NIC
446 * @v offset Offset within test memory
447 * @ret byte Byte read, or negative error
449 static int phantom_read_test_mem ( struct phantom_nic *phantom,
450 unsigned long offset ) {
455 static unsigned long cache_offset = -1UL;
456 unsigned long sub_offset;
459 sub_offset = ( offset & ( sizeof ( cache ) - 1 ) );
460 offset = ( offset & ~( sizeof ( cache ) - 1 ) );
462 if ( cache_offset != offset ) {
463 if ( ( rc = phantom_read_test_mem_block ( phantom, offset,
464 cache.dwords )) !=0 )
466 cache_offset = offset;
469 return cache.bytes[sub_offset];
473 * Dump Phantom firmware dmesg log
475 * @v phantom Phantom NIC
477 * @v max_lines Maximum number of lines to show, or -1 to show all
478 * @ret rc Return status code
480 static int phantom_dmesg ( struct phantom_nic *phantom, unsigned int log,
481 unsigned int max_lines ) {
488 /* Optimise out for non-debug builds */
493 head = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_HEAD ( log ) );
494 tail = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_TAIL ( log ) );
495 sig = phantom_readl ( phantom, UNM_CAM_RAM_DMESG_SIG ( log ) );
496 DBGC ( phantom, "Phantom %p firmware dmesg buffer %d (%08x-%08x)\n",
497 phantom, log, head, tail );
498 assert ( ( head & 0x07 ) == 0 );
499 if ( sig != UNM_CAM_RAM_DMESG_SIG_MAGIC ) {
500 DBGC ( phantom, "Warning: bad signature %08x (want %08lx)\n",
501 sig, UNM_CAM_RAM_DMESG_SIG_MAGIC );
504 /* Locate start of last (max_lines) lines */
505 for ( offset = tail ; offset > head ; offset-- ) {
506 if ( ( byte = phantom_read_test_mem ( phantom,
507 ( offset - 1 ) ) ) < 0 )
509 if ( ( byte == '\n' ) && ( max_lines-- == 0 ) )
514 for ( ; offset < tail ; offset++ ) {
515 if ( ( byte = phantom_read_test_mem ( phantom, offset ) ) < 0 )
524 * Dump Phantom firmware dmesg logs
526 * @v phantom Phantom NIC
527 * @v max_lines Maximum number of lines to show, or -1 to show all
529 static void __attribute__ (( unused ))
530 phantom_dmesg_all ( struct phantom_nic *phantom, unsigned int max_lines ) {
533 for ( i = 0 ; i < UNM_CAM_RAM_NUM_DMESG_BUFFERS ; i++ )
534 phantom_dmesg ( phantom, i, max_lines );
537 /***************************************************************************
544 * Wait for firmware to accept command
546 * @v phantom Phantom NIC
547 * @ret rc Return status code
549 static int phantom_wait_for_cmd ( struct phantom_nic *phantom ) {
550 unsigned int retries;
553 for ( retries = 0 ; retries < PHN_ISSUE_CMD_TIMEOUT_MS ; retries++ ) {
555 cdrp = phantom_readl ( phantom, UNM_NIC_REG_NX_CDRP );
556 if ( NX_CDRP_IS_RSP ( cdrp ) ) {
557 switch ( NX_CDRP_FORM_RSP ( cdrp ) ) {
560 case NX_CDRP_RSP_FAIL:
562 case NX_CDRP_RSP_TIMEOUT:
570 DBGC ( phantom, "Phantom %p timed out waiting for firmware to accept "
571 "command\n", phantom );
576 * Issue command to firmware
578 * @v phantom Phantom NIC
579 * @v command Firmware command
583 * @ret rc Return status code
585 static int phantom_issue_cmd ( struct phantom_nic *phantom,
586 uint32_t command, uint32_t arg1, uint32_t arg2,
592 signature = NX_CDRP_SIGNATURE_MAKE ( phantom->port,
594 DBGC2 ( phantom, "Phantom %p issuing command %08x (%08x, %08x, "
595 "%08x)\n", phantom, command, arg1, arg2, arg3 );
596 phantom_writel ( phantom, signature, UNM_NIC_REG_NX_SIGN );
597 phantom_writel ( phantom, arg1, UNM_NIC_REG_NX_ARG1 );
598 phantom_writel ( phantom, arg2, UNM_NIC_REG_NX_ARG2 );
599 phantom_writel ( phantom, arg3, UNM_NIC_REG_NX_ARG3 );
600 phantom_writel ( phantom, NX_CDRP_FORM_CMD ( command ),
601 UNM_NIC_REG_NX_CDRP );
603 /* Wait for command to be accepted */
604 if ( ( rc = phantom_wait_for_cmd ( phantom ) ) != 0 ) {
605 DBGC ( phantom, "Phantom %p could not issue command: %s\n",
606 phantom, strerror ( rc ) );
614 * Issue buffer-format command to firmware
616 * @v phantom Phantom NIC
617 * @v command Firmware command
618 * @v buffer Buffer to pass to firmware
619 * @v len Length of buffer
620 * @ret rc Return status code
622 static int phantom_issue_buf_cmd ( struct phantom_nic *phantom,
623 uint32_t command, void *buffer,
627 physaddr = virt_to_bus ( buffer );
628 return phantom_issue_cmd ( phantom, command, ( physaddr >> 32 ),
629 ( physaddr & 0xffffffffUL ), len );
633 * Create Phantom RX context
635 * @v phantom Phantom NIC
636 * @ret rc Return status code
638 static int phantom_create_rx_ctx ( struct phantom_nic *phantom ) {
639 struct phantom_create_rx_ctx_rqrsp *buf;
642 /* Allocate context creation buffer */
643 buf = malloc_dma ( sizeof ( *buf ), UNM_DMA_BUFFER_ALIGN );
648 memset ( buf, 0, sizeof ( *buf ) );
650 /* Prepare request */
651 buf->hostrq.rx_ctx.host_rsp_dma_addr =
652 cpu_to_le64 ( virt_to_bus ( &buf->cardrsp ) );
653 buf->hostrq.rx_ctx.capabilities[0] =
654 cpu_to_le32 ( NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN );
655 buf->hostrq.rx_ctx.host_int_crb_mode =
656 cpu_to_le32 ( NX_HOST_INT_CRB_MODE_SHARED );
657 buf->hostrq.rx_ctx.host_rds_crb_mode =
658 cpu_to_le32 ( NX_HOST_RDS_CRB_MODE_UNIQUE );
659 buf->hostrq.rx_ctx.rds_ring_offset = cpu_to_le32 ( 0 );
660 buf->hostrq.rx_ctx.sds_ring_offset =
661 cpu_to_le32 ( sizeof ( buf->hostrq.rds ) );
662 buf->hostrq.rx_ctx.num_rds_rings = cpu_to_le16 ( 1 );
663 buf->hostrq.rx_ctx.num_sds_rings = cpu_to_le16 ( 1 );
664 buf->hostrq.rds.host_phys_addr =
665 cpu_to_le64 ( virt_to_bus ( phantom->desc->rds ) );
666 buf->hostrq.rds.buff_size = cpu_to_le64 ( PHN_RX_BUFSIZE );
667 buf->hostrq.rds.ring_size = cpu_to_le32 ( PHN_NUM_RDS );
668 buf->hostrq.rds.ring_kind = cpu_to_le32 ( NX_RDS_RING_TYPE_NORMAL );
669 buf->hostrq.sds.host_phys_addr =
670 cpu_to_le64 ( virt_to_bus ( phantom->desc->sds ) );
671 buf->hostrq.sds.ring_size = cpu_to_le32 ( PHN_NUM_SDS );
673 DBGC ( phantom, "Phantom %p creating RX context\n", phantom );
674 DBGC2_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
675 &buf->hostrq, sizeof ( buf->hostrq ) );
678 if ( ( rc = phantom_issue_buf_cmd ( phantom,
679 NX_CDRP_CMD_CREATE_RX_CTX,
681 sizeof ( buf->hostrq ) ) ) != 0 ) {
682 DBGC ( phantom, "Phantom %p could not create RX context: "
683 "%s\n", phantom, strerror ( rc ) );
684 DBGC ( phantom, "Request:\n" );
685 DBGC_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
686 &buf->hostrq, sizeof ( buf->hostrq ) );
687 DBGC ( phantom, "Response:\n" );
688 DBGC_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
689 &buf->cardrsp, sizeof ( buf->cardrsp ) );
693 /* Retrieve context parameters */
694 phantom->rx_context_id =
695 le16_to_cpu ( buf->cardrsp.rx_ctx.context_id );
696 phantom->rds_producer_crb =
698 le32_to_cpu ( buf->cardrsp.rds.host_producer_crb ) );
699 phantom->sds_consumer_crb =
701 le32_to_cpu ( buf->cardrsp.sds.host_consumer_crb ) );
702 phantom->sds_irq_mask_crb =
704 le32_to_cpu ( buf->cardrsp.sds.interrupt_crb ) );
706 DBGC ( phantom, "Phantom %p created RX context (id %04x, port phys "
707 "%02x virt %02x)\n", phantom, phantom->rx_context_id,
708 buf->cardrsp.rx_ctx.phys_port, buf->cardrsp.rx_ctx.virt_port );
709 DBGC2_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
710 &buf->cardrsp, sizeof ( buf->cardrsp ) );
711 DBGC ( phantom, "Phantom %p RDS producer CRB is %08lx\n",
712 phantom, phantom->rds_producer_crb );
713 DBGC ( phantom, "Phantom %p SDS consumer CRB is %08lx\n",
714 phantom, phantom->sds_consumer_crb );
715 DBGC ( phantom, "Phantom %p SDS interrupt mask CRB is %08lx\n",
716 phantom, phantom->sds_irq_mask_crb );
719 free_dma ( buf, sizeof ( *buf ) );
724 * Destroy Phantom RX context
726 * @v phantom Phantom NIC
727 * @ret rc Return status code
729 static void phantom_destroy_rx_ctx ( struct phantom_nic *phantom ) {
732 DBGC ( phantom, "Phantom %p destroying RX context (id %04x)\n",
733 phantom, phantom->rx_context_id );
736 if ( ( rc = phantom_issue_cmd ( phantom,
737 NX_CDRP_CMD_DESTROY_RX_CTX,
738 phantom->rx_context_id,
739 NX_DESTROY_CTX_RESET, 0 ) ) != 0 ) {
740 DBGC ( phantom, "Phantom %p could not destroy RX context: "
741 "%s\n", phantom, strerror ( rc ) );
742 /* We're probably screwed */
746 /* Clear context parameters */
747 phantom->rx_context_id = 0;
748 phantom->rds_producer_crb = 0;
749 phantom->sds_consumer_crb = 0;
751 /* Reset software counters */
752 phantom->rds_producer_idx = 0;
753 phantom->rds_consumer_idx = 0;
754 phantom->sds_consumer_idx = 0;
758 * Create Phantom TX context
760 * @v phantom Phantom NIC
761 * @ret rc Return status code
763 static int phantom_create_tx_ctx ( struct phantom_nic *phantom ) {
764 struct phantom_create_tx_ctx_rqrsp *buf;
767 /* Allocate context creation buffer */
768 buf = malloc_dma ( sizeof ( *buf ), UNM_DMA_BUFFER_ALIGN );
773 memset ( buf, 0, sizeof ( *buf ) );
775 /* Prepare request */
776 buf->hostrq.tx_ctx.host_rsp_dma_addr =
777 cpu_to_le64 ( virt_to_bus ( &buf->cardrsp ) );
778 buf->hostrq.tx_ctx.cmd_cons_dma_addr =
779 cpu_to_le64 ( virt_to_bus ( &phantom->desc->cmd_cons ) );
780 buf->hostrq.tx_ctx.capabilities[0] =
781 cpu_to_le32 ( NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN );
782 buf->hostrq.tx_ctx.host_int_crb_mode =
783 cpu_to_le32 ( NX_HOST_INT_CRB_MODE_SHARED );
784 buf->hostrq.tx_ctx.cds_ring.host_phys_addr =
785 cpu_to_le64 ( virt_to_bus ( phantom->desc->cds ) );
786 buf->hostrq.tx_ctx.cds_ring.ring_size = cpu_to_le32 ( PHN_NUM_CDS );
788 DBGC ( phantom, "Phantom %p creating TX context\n", phantom );
789 DBGC2_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
790 &buf->hostrq, sizeof ( buf->hostrq ) );
793 if ( ( rc = phantom_issue_buf_cmd ( phantom,
794 NX_CDRP_CMD_CREATE_TX_CTX,
796 sizeof ( buf->hostrq ) ) ) != 0 ) {
797 DBGC ( phantom, "Phantom %p could not create TX context: "
798 "%s\n", phantom, strerror ( rc ) );
799 DBGC ( phantom, "Request:\n" );
800 DBGC_HDA ( phantom, virt_to_bus ( &buf->hostrq ),
801 &buf->hostrq, sizeof ( buf->hostrq ) );
802 DBGC ( phantom, "Response:\n" );
803 DBGC_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
804 &buf->cardrsp, sizeof ( buf->cardrsp ) );
808 /* Retrieve context parameters */
809 phantom->tx_context_id =
810 le16_to_cpu ( buf->cardrsp.tx_ctx.context_id );
811 phantom->cds_producer_crb =
813 le32_to_cpu(buf->cardrsp.tx_ctx.cds_ring.host_producer_crb));
815 DBGC ( phantom, "Phantom %p created TX context (id %04x, port phys "
816 "%02x virt %02x)\n", phantom, phantom->tx_context_id,
817 buf->cardrsp.tx_ctx.phys_port, buf->cardrsp.tx_ctx.virt_port );
818 DBGC2_HDA ( phantom, virt_to_bus ( &buf->cardrsp ),
819 &buf->cardrsp, sizeof ( buf->cardrsp ) );
820 DBGC ( phantom, "Phantom %p CDS producer CRB is %08lx\n",
821 phantom, phantom->cds_producer_crb );
824 free_dma ( buf, sizeof ( *buf ) );
829 * Destroy Phantom TX context
831 * @v phantom Phantom NIC
832 * @ret rc Return status code
834 static void phantom_destroy_tx_ctx ( struct phantom_nic *phantom ) {
837 DBGC ( phantom, "Phantom %p destroying TX context (id %04x)\n",
838 phantom, phantom->tx_context_id );
841 if ( ( rc = phantom_issue_cmd ( phantom,
842 NX_CDRP_CMD_DESTROY_TX_CTX,
843 phantom->tx_context_id,
844 NX_DESTROY_CTX_RESET, 0 ) ) != 0 ) {
845 DBGC ( phantom, "Phantom %p could not destroy TX context: "
846 "%s\n", phantom, strerror ( rc ) );
847 /* We're probably screwed */
851 /* Clear context parameters */
852 phantom->tx_context_id = 0;
853 phantom->cds_producer_crb = 0;
855 /* Reset software counters */
856 phantom->cds_producer_idx = 0;
857 phantom->cds_consumer_idx = 0;
860 /***************************************************************************
862 * Descriptor ring management
867 * Allocate Phantom RX descriptor
869 * @v phantom Phantom NIC
870 * @ret index RX descriptor index, or negative error
872 static int phantom_alloc_rds ( struct phantom_nic *phantom ) {
873 unsigned int rds_producer_idx;
874 unsigned int next_rds_producer_idx;
876 /* Check for space in the ring. RX descriptors are consumed
877 * out of order, but they are *read* by the hardware in strict
878 * order. We maintain a pessimistic consumer index, which is
879 * guaranteed never to be an overestimate of the number of
880 * descriptors read by the hardware.
882 rds_producer_idx = phantom->rds_producer_idx;
883 next_rds_producer_idx = ( ( rds_producer_idx + 1 ) % PHN_NUM_RDS );
884 if ( next_rds_producer_idx == phantom->rds_consumer_idx ) {
885 DBGC ( phantom, "Phantom %p RDS ring full (index %d not "
886 "consumed)\n", phantom, next_rds_producer_idx );
890 return rds_producer_idx;
894 * Post Phantom RX descriptor
896 * @v phantom Phantom NIC
897 * @v rds RX descriptor
899 static void phantom_post_rds ( struct phantom_nic *phantom,
900 struct phantom_rds *rds ) {
901 unsigned int rds_producer_idx;
902 unsigned int next_rds_producer_idx;
903 struct phantom_rds *entry;
905 /* Copy descriptor to ring */
906 rds_producer_idx = phantom->rds_producer_idx;
907 entry = &phantom->desc->rds[rds_producer_idx];
908 memcpy ( entry, rds, sizeof ( *entry ) );
909 DBGC2 ( phantom, "Phantom %p posting RDS %ld (slot %d):\n",
910 phantom, NX_GET ( rds, handle ), rds_producer_idx );
911 DBGC2_HDA ( phantom, virt_to_bus ( entry ), entry, sizeof ( *entry ) );
913 /* Update producer index */
914 next_rds_producer_idx = ( ( rds_producer_idx + 1 ) % PHN_NUM_RDS );
915 phantom->rds_producer_idx = next_rds_producer_idx;
917 phantom_writel ( phantom, phantom->rds_producer_idx,
918 phantom->rds_producer_crb );
922 * Allocate Phantom TX descriptor
924 * @v phantom Phantom NIC
925 * @ret index TX descriptor index, or negative error
927 static int phantom_alloc_cds ( struct phantom_nic *phantom ) {
928 unsigned int cds_producer_idx;
929 unsigned int next_cds_producer_idx;
931 /* Check for space in the ring. TX descriptors are consumed
932 * in strict order, so we just check for a collision against
933 * the consumer index.
935 cds_producer_idx = phantom->cds_producer_idx;
936 next_cds_producer_idx = ( ( cds_producer_idx + 1 ) % PHN_NUM_CDS );
937 if ( next_cds_producer_idx == phantom->cds_consumer_idx ) {
938 DBGC ( phantom, "Phantom %p CDS ring full (index %d not "
939 "consumed)\n", phantom, next_cds_producer_idx );
943 return cds_producer_idx;
947 * Post Phantom TX descriptor
949 * @v phantom Phantom NIC
950 * @v cds TX descriptor
952 static void phantom_post_cds ( struct phantom_nic *phantom,
953 union phantom_cds *cds ) {
954 unsigned int cds_producer_idx;
955 unsigned int next_cds_producer_idx;
956 union phantom_cds *entry;
958 /* Copy descriptor to ring */
959 cds_producer_idx = phantom->cds_producer_idx;
960 entry = &phantom->desc->cds[cds_producer_idx];
961 memcpy ( entry, cds, sizeof ( *entry ) );
962 DBGC2 ( phantom, "Phantom %p posting CDS %d:\n",
963 phantom, cds_producer_idx );
964 DBGC2_HDA ( phantom, virt_to_bus ( entry ), entry, sizeof ( *entry ) );
966 /* Update producer index */
967 next_cds_producer_idx = ( ( cds_producer_idx + 1 ) % PHN_NUM_CDS );
968 phantom->cds_producer_idx = next_cds_producer_idx;
970 phantom_writel ( phantom, phantom->cds_producer_idx,
971 phantom->cds_producer_crb );
974 /***************************************************************************
976 * MAC address management
981 * Add/remove MAC address
983 * @v phantom Phantom NIC
984 * @v ll_addr MAC address to add or remove
985 * @v opcode MAC request opcode
986 * @ret rc Return status code
988 static int phantom_update_macaddr ( struct phantom_nic *phantom,
989 const uint8_t *ll_addr,
990 unsigned int opcode ) {
991 union phantom_cds cds;
994 /* Get descriptor ring entry */
995 index = phantom_alloc_cds ( phantom );
999 /* Fill descriptor ring entry */
1000 memset ( &cds, 0, sizeof ( cds ) );
1001 NX_FILL_1 ( &cds, 0,
1002 nic_request.common.opcode, UNM_NIC_REQUEST );
1003 NX_FILL_2 ( &cds, 1,
1004 nic_request.header.opcode, UNM_MAC_EVENT,
1005 nic_request.header.context_id, phantom->port );
1006 NX_FILL_7 ( &cds, 2,
1007 nic_request.body.mac_request.opcode, opcode,
1008 nic_request.body.mac_request.mac_addr_0, ll_addr[0],
1009 nic_request.body.mac_request.mac_addr_1, ll_addr[1],
1010 nic_request.body.mac_request.mac_addr_2, ll_addr[2],
1011 nic_request.body.mac_request.mac_addr_3, ll_addr[3],
1012 nic_request.body.mac_request.mac_addr_4, ll_addr[4],
1013 nic_request.body.mac_request.mac_addr_5, ll_addr[5] );
1015 /* Post descriptor */
1016 phantom_post_cds ( phantom, &cds );
1024 * @v phantom Phantom NIC
1025 * @v ll_addr MAC address to add or remove
1026 * @ret rc Return status code
1028 static inline int phantom_add_macaddr ( struct phantom_nic *phantom,
1029 const uint8_t *ll_addr ) {
1031 DBGC ( phantom, "Phantom %p adding MAC address %s\n",
1032 phantom, eth_ntoa ( ll_addr ) );
1034 return phantom_update_macaddr ( phantom, ll_addr, UNM_MAC_ADD );
1038 * Remove MAC address
1040 * @v phantom Phantom NIC
1041 * @v ll_addr MAC address to add or remove
1042 * @ret rc Return status code
1044 static inline int phantom_del_macaddr ( struct phantom_nic *phantom,
1045 const uint8_t *ll_addr ) {
1047 DBGC ( phantom, "Phantom %p removing MAC address %s\n",
1048 phantom, eth_ntoa ( ll_addr ) );
1050 return phantom_update_macaddr ( phantom, ll_addr, UNM_MAC_DEL );
1053 /***************************************************************************
1055 * Link state detection
1062 * @v netdev Network device
1064 static void phantom_poll_link_state ( struct net_device *netdev ) {
1065 struct phantom_nic *phantom = netdev_priv ( netdev );
1066 uint32_t xg_state_p3;
1069 /* Read link state */
1070 xg_state_p3 = phantom_readl ( phantom, UNM_NIC_REG_XG_STATE_P3 );
1072 /* If there is no change, do nothing */
1073 if ( phantom->link_state == xg_state_p3 )
1076 /* Record new link state */
1077 DBGC ( phantom, "Phantom %p new link state %08x (was %08x)\n",
1078 phantom, xg_state_p3, phantom->link_state );
1079 phantom->link_state = xg_state_p3;
1081 /* Indicate link state to iPXE */
1082 link = UNM_NIC_REG_XG_STATE_P3_LINK ( phantom->port,
1083 phantom->link_state );
1085 case UNM_NIC_REG_XG_STATE_P3_LINK_UP:
1086 DBGC ( phantom, "Phantom %p link is up\n", phantom );
1087 netdev_link_up ( netdev );
1089 case UNM_NIC_REG_XG_STATE_P3_LINK_DOWN:
1090 DBGC ( phantom, "Phantom %p link is down\n", phantom );
1091 netdev_link_down ( netdev );
1094 DBGC ( phantom, "Phantom %p bad link state %d\n",
1100 /***************************************************************************
1107 * Refill descriptor ring
1109 * @v netdev Net device
1111 static void phantom_refill_rx_ring ( struct net_device *netdev ) {
1112 struct phantom_nic *phantom = netdev_priv ( netdev );
1113 struct io_buffer *iobuf;
1114 struct phantom_rds rds;
1115 unsigned int handle;
1118 for ( handle = 0 ; handle < PHN_RDS_MAX_FILL ; handle++ ) {
1120 /* Skip this index if the descriptor has not yet been
1123 if ( phantom->rds_iobuf[handle] != NULL )
1126 /* Allocate descriptor ring entry */
1127 index = phantom_alloc_rds ( phantom );
1128 assert ( PHN_RDS_MAX_FILL < PHN_NUM_RDS );
1129 assert ( index >= 0 ); /* Guaranteed by MAX_FILL < NUM_RDS ) */
1131 /* Try to allocate an I/O buffer */
1132 iobuf = alloc_iob ( PHN_RX_BUFSIZE );
1134 /* Failure is non-fatal; we will retry later */
1135 netdev_rx_err ( netdev, NULL, -ENOMEM );
1139 /* Fill descriptor ring entry */
1140 memset ( &rds, 0, sizeof ( rds ) );
1141 NX_FILL_2 ( &rds, 0,
1143 length, iob_len ( iobuf ) );
1144 NX_FILL_1 ( &rds, 1,
1145 dma_addr, virt_to_bus ( iobuf->data ) );
1147 /* Record I/O buffer */
1148 assert ( phantom->rds_iobuf[handle] == NULL );
1149 phantom->rds_iobuf[handle] = iobuf;
1151 /* Post descriptor */
1152 phantom_post_rds ( phantom, &rds );
1159 * @v netdev Net device
1160 * @ret rc Return status code
1162 static int phantom_open ( struct net_device *netdev ) {
1163 struct phantom_nic *phantom = netdev_priv ( netdev );
1166 /* Allocate and zero descriptor rings */
1167 phantom->desc = malloc_dma ( sizeof ( *(phantom->desc) ),
1168 UNM_DMA_BUFFER_ALIGN );
1169 if ( ! phantom->desc ) {
1171 goto err_alloc_desc;
1173 memset ( phantom->desc, 0, sizeof ( *(phantom->desc) ) );
1175 /* Create RX context */
1176 if ( ( rc = phantom_create_rx_ctx ( phantom ) ) != 0 )
1177 goto err_create_rx_ctx;
1179 /* Create TX context */
1180 if ( ( rc = phantom_create_tx_ctx ( phantom ) ) != 0 )
1181 goto err_create_tx_ctx;
1183 /* Fill the RX descriptor ring */
1184 phantom_refill_rx_ring ( netdev );
1186 /* Add MAC addresses
1190 * We would like to be able to enable receiving all multicast
1191 * packets (or, failing that, promiscuous mode), but the
1192 * firmware doesn't currently support this.
1194 if ( ( rc = phantom_add_macaddr ( phantom,
1195 netdev->ll_broadcast ) ) != 0 )
1196 goto err_add_macaddr_broadcast;
1197 if ( ( rc = phantom_add_macaddr ( phantom,
1198 netdev->ll_addr ) ) != 0 )
1199 goto err_add_macaddr_unicast;
1203 phantom_del_macaddr ( phantom, netdev->ll_addr );
1204 err_add_macaddr_unicast:
1205 phantom_del_macaddr ( phantom, netdev->ll_broadcast );
1206 err_add_macaddr_broadcast:
1207 phantom_destroy_tx_ctx ( phantom );
1209 phantom_destroy_rx_ctx ( phantom );
1211 free_dma ( phantom->desc, sizeof ( *(phantom->desc) ) );
1212 phantom->desc = NULL;
1220 * @v netdev Net device
1222 static void phantom_close ( struct net_device *netdev ) {
1223 struct phantom_nic *phantom = netdev_priv ( netdev );
1224 struct io_buffer *iobuf;
1227 /* Shut down the port */
1228 phantom_del_macaddr ( phantom, netdev->ll_addr );
1229 phantom_del_macaddr ( phantom, netdev->ll_broadcast );
1230 phantom_destroy_tx_ctx ( phantom );
1231 phantom_destroy_rx_ctx ( phantom );
1232 free_dma ( phantom->desc, sizeof ( *(phantom->desc) ) );
1233 phantom->desc = NULL;
1235 /* Flush any uncompleted descriptors */
1236 for ( i = 0 ; i < PHN_RDS_MAX_FILL ; i++ ) {
1237 iobuf = phantom->rds_iobuf[i];
1240 phantom->rds_iobuf[i] = NULL;
1243 for ( i = 0 ; i < PHN_NUM_CDS ; i++ ) {
1244 iobuf = phantom->cds_iobuf[i];
1246 netdev_tx_complete_err ( netdev, iobuf, -ECANCELED );
1247 phantom->cds_iobuf[i] = NULL;
1255 * @v netdev Network device
1256 * @v iobuf I/O buffer
1257 * @ret rc Return status code
1259 static int phantom_transmit ( struct net_device *netdev,
1260 struct io_buffer *iobuf ) {
1261 struct phantom_nic *phantom = netdev_priv ( netdev );
1262 union phantom_cds cds;
1265 /* Get descriptor ring entry */
1266 index = phantom_alloc_cds ( phantom );
1270 /* Fill descriptor ring entry */
1271 memset ( &cds, 0, sizeof ( cds ) );
1272 NX_FILL_3 ( &cds, 0,
1273 tx.opcode, UNM_TX_ETHER_PKT,
1275 tx.length, iob_len ( iobuf ) );
1276 NX_FILL_2 ( &cds, 2,
1277 tx.port, phantom->port,
1278 tx.context_id, phantom->port );
1279 NX_FILL_1 ( &cds, 4,
1280 tx.buffer1_dma_addr, virt_to_bus ( iobuf->data ) );
1281 NX_FILL_1 ( &cds, 5,
1282 tx.buffer1_length, iob_len ( iobuf ) );
1284 /* Record I/O buffer */
1285 assert ( phantom->cds_iobuf[index] == NULL );
1286 phantom->cds_iobuf[index] = iobuf;
1288 /* Post descriptor */
1289 phantom_post_cds ( phantom, &cds );
1295 * Poll for received packets
1297 * @v netdev Network device
1299 static void phantom_poll ( struct net_device *netdev ) {
1300 struct phantom_nic *phantom = netdev_priv ( netdev );
1301 struct io_buffer *iobuf;
1302 unsigned int irq_vector;
1303 unsigned int irq_state;
1304 unsigned int cds_consumer_idx;
1305 unsigned int raw_new_cds_consumer_idx;
1306 unsigned int new_cds_consumer_idx;
1307 unsigned int rds_consumer_idx;
1308 unsigned int sds_consumer_idx;
1309 struct phantom_sds *sds;
1310 unsigned int sds_handle;
1311 unsigned int sds_opcode;
1313 /* Occasionally poll the link state */
1314 if ( phantom->link_poll_timer-- == 0 ) {
1315 phantom_poll_link_state ( netdev );
1316 /* Reset the link poll timer */
1317 phantom->link_poll_timer = PHN_LINK_POLL_FREQUENCY;
1320 /* Check for interrupts */
1321 if ( phantom->sds_irq_enabled ) {
1323 /* Do nothing unless an interrupt is asserted */
1324 irq_vector = phantom_readl ( phantom, UNM_PCIE_IRQ_VECTOR );
1325 if ( ! ( irq_vector & UNM_PCIE_IRQ_VECTOR_BIT( phantom->port )))
1328 /* Do nothing unless interrupt state machine has stabilised */
1329 irq_state = phantom_readl ( phantom, UNM_PCIE_IRQ_STATE );
1330 if ( ! UNM_PCIE_IRQ_STATE_TRIGGERED ( irq_state ) )
1333 /* Acknowledge interrupt */
1334 phantom_writel ( phantom, UNM_PCIE_IRQ_STATUS_MAGIC,
1335 phantom_irq_status_reg[phantom->port] );
1336 phantom_readl ( phantom, UNM_PCIE_IRQ_VECTOR );
1339 /* Check for TX completions */
1340 cds_consumer_idx = phantom->cds_consumer_idx;
1341 raw_new_cds_consumer_idx = phantom->desc->cmd_cons;
1342 new_cds_consumer_idx = le32_to_cpu ( raw_new_cds_consumer_idx );
1343 while ( cds_consumer_idx != new_cds_consumer_idx ) {
1344 DBGC2 ( phantom, "Phantom %p CDS %d complete\n",
1345 phantom, cds_consumer_idx );
1346 /* Completions may be for commands other than TX, so
1347 * there may not always be an associated I/O buffer.
1349 if ( ( iobuf = phantom->cds_iobuf[cds_consumer_idx] ) ) {
1350 netdev_tx_complete ( netdev, iobuf );
1351 phantom->cds_iobuf[cds_consumer_idx] = NULL;
1353 cds_consumer_idx = ( ( cds_consumer_idx + 1 ) % PHN_NUM_CDS );
1354 phantom->cds_consumer_idx = cds_consumer_idx;
1357 /* Check for received packets */
1358 rds_consumer_idx = phantom->rds_consumer_idx;
1359 sds_consumer_idx = phantom->sds_consumer_idx;
1361 sds = &phantom->desc->sds[sds_consumer_idx];
1362 if ( NX_GET ( sds, owner ) == 0 )
1365 DBGC2 ( phantom, "Phantom %p SDS %d status:\n",
1366 phantom, sds_consumer_idx );
1367 DBGC2_HDA ( phantom, virt_to_bus ( sds ), sds, sizeof (*sds) );
1369 /* Check received opcode */
1370 sds_opcode = NX_GET ( sds, opcode );
1371 if ( ( sds_opcode == UNM_RXPKT_DESC ) ||
1372 ( sds_opcode == UNM_SYN_OFFLOAD ) ) {
1374 /* Sanity check: ensure that all of the SDS
1375 * descriptor has been written.
1377 if ( NX_GET ( sds, total_length ) == 0 ) {
1378 DBGC ( phantom, "Phantom %p SDS %d "
1379 "incomplete; deferring\n",
1380 phantom, sds_consumer_idx );
1381 /* Leave for next poll() */
1385 /* Process received packet */
1386 sds_handle = NX_GET ( sds, handle );
1387 iobuf = phantom->rds_iobuf[sds_handle];
1388 assert ( iobuf != NULL );
1389 iob_put ( iobuf, NX_GET ( sds, total_length ) );
1390 iob_pull ( iobuf, NX_GET ( sds, pkt_offset ) );
1391 DBGC2 ( phantom, "Phantom %p RDS %d complete\n",
1392 phantom, sds_handle );
1393 netdev_rx ( netdev, iobuf );
1394 phantom->rds_iobuf[sds_handle] = NULL;
1396 /* Update RDS consumer counter. This is a
1397 * lower bound for the number of descriptors
1398 * that have been read by the hardware, since
1399 * the hardware must have read at least one
1400 * descriptor for each completion that we
1404 ( ( rds_consumer_idx + 1 ) % PHN_NUM_RDS );
1405 phantom->rds_consumer_idx = rds_consumer_idx;
1409 DBGC ( phantom, "Phantom %p unexpected SDS opcode "
1410 "%02x\n", phantom, sds_opcode );
1411 DBGC_HDA ( phantom, virt_to_bus ( sds ),
1412 sds, sizeof ( *sds ) );
1415 /* Clear status descriptor */
1416 memset ( sds, 0, sizeof ( *sds ) );
1418 /* Update SDS consumer index */
1419 sds_consumer_idx = ( ( sds_consumer_idx + 1 ) % PHN_NUM_SDS );
1420 phantom->sds_consumer_idx = sds_consumer_idx;
1422 phantom_writel ( phantom, phantom->sds_consumer_idx,
1423 phantom->sds_consumer_crb );
1426 /* Refill the RX descriptor ring */
1427 phantom_refill_rx_ring ( netdev );
1431 * Enable/disable interrupts
1433 * @v netdev Network device
1434 * @v enable Interrupts should be enabled
1436 static void phantom_irq ( struct net_device *netdev, int enable ) {
1437 struct phantom_nic *phantom = netdev_priv ( netdev );
1439 phantom_writel ( phantom, ( enable ? 1 : 0 ),
1440 phantom->sds_irq_mask_crb );
1441 phantom_writel ( phantom, UNM_PCIE_IRQ_MASK_MAGIC,
1442 phantom_irq_mask_reg[phantom->port] );
1443 phantom->sds_irq_enabled = enable;
1446 /** Phantom net device operations */
1447 static struct net_device_operations phantom_operations = {
1448 .open = phantom_open,
1449 .close = phantom_close,
1450 .transmit = phantom_transmit,
1451 .poll = phantom_poll,
1455 /***************************************************************************
1461 /** Phantom CLP settings scope */
1462 static const struct settings_scope phantom_settings_scope;
1464 /** Phantom CLP data
1467 union phantom_clp_data {
1470 * This field is right-aligned; if only N bytes are present
1471 * then bytes[0]..bytes[7-N] should be zero, and the data
1472 * should be in bytes[7-N+1] to bytes[7];
1475 /** Dwords for the CLP interface */
1477 /** High dword, in network byte order */
1479 /** Low dword, in network byte order */
1483 #define PHN_CLP_BLKSIZE ( sizeof ( union phantom_clp_data ) )
1486 * Wait for Phantom CLP command to complete
1488 * @v phantom Phantom NIC
1489 * @ret rc Return status code
1491 static int phantom_clp_wait ( struct phantom_nic *phantom ) {
1492 unsigned int retries;
1495 for ( retries = 0 ; retries < PHN_CLP_CMD_TIMEOUT_MS ; retries++ ) {
1496 status = phantom_readl ( phantom, UNM_CAM_RAM_CLP_STATUS );
1497 if ( status & UNM_CAM_RAM_CLP_STATUS_DONE )
1502 DBGC ( phantom, "Phantom %p timed out waiting for CLP command\n",
1508 * Issue Phantom CLP command
1510 * @v phantom Phantom NIC
1511 * @v port Virtual port number
1513 * @v data_in Data in, or NULL
1514 * @v data_out Data out, or NULL
1515 * @v offset Offset within data
1516 * @v len Data buffer length
1517 * @ret len Total transfer length (for reads), or negative error
1519 static int phantom_clp_cmd ( struct phantom_nic *phantom, unsigned int port,
1520 unsigned int opcode, const void *data_in,
1521 void *data_out, size_t offset, size_t len ) {
1522 union phantom_clp_data data;
1523 unsigned int index = ( offset / sizeof ( data ) );
1524 unsigned int last = 0;
1531 size_t out_frag_len;
1536 assert ( ( offset % sizeof ( data ) ) == 0 );
1538 DBGC ( phantom, "Phantom %p invalid CLP length %zd\n",
1543 /* Check that CLP interface is ready */
1544 if ( ( rc = phantom_clp_wait ( phantom ) ) != 0 )
1548 memset ( &data, 0, sizeof ( data ) );
1550 assert ( offset < len );
1551 in_frag_len = ( len - offset );
1552 if ( in_frag_len > sizeof ( data ) ) {
1553 in_frag_len = sizeof ( data );
1557 in_frag = &data.bytes[ sizeof ( data ) - in_frag_len ];
1558 memcpy ( in_frag, ( data_in + offset ), in_frag_len );
1559 phantom_writel ( phantom, be32_to_cpu ( data.dwords.lo ),
1560 UNM_CAM_RAM_CLP_DATA_LO );
1561 phantom_writel ( phantom, be32_to_cpu ( data.dwords.hi ),
1562 UNM_CAM_RAM_CLP_DATA_HI );
1565 /* Issue CLP command */
1566 command = ( ( index << 24 ) | ( ( data_in ? len : 0 ) << 16 ) |
1567 ( port << 8 ) | ( last << 7 ) | ( opcode << 0 ) );
1568 phantom_writel ( phantom, command, UNM_CAM_RAM_CLP_COMMAND );
1570 phantom_writel ( phantom, UNM_CAM_RAM_CLP_STATUS_START,
1571 UNM_CAM_RAM_CLP_STATUS );
1573 /* Wait for command to complete */
1574 if ( ( rc = phantom_clp_wait ( phantom ) ) != 0 )
1577 /* Get command status */
1578 status = phantom_readl ( phantom, UNM_CAM_RAM_CLP_STATUS );
1579 read_len = ( ( status >> 16 ) & 0xff );
1580 error = ( ( status >> 8 ) & 0xff );
1582 DBGC ( phantom, "Phantom %p CLP command error %02x\n",
1589 data.dwords.lo = cpu_to_be32 ( phantom_readl ( phantom,
1590 UNM_CAM_RAM_CLP_DATA_LO ) );
1591 data.dwords.hi = cpu_to_be32 ( phantom_readl ( phantom,
1592 UNM_CAM_RAM_CLP_DATA_HI ) );
1593 out_frag_len = ( read_len - offset );
1594 if ( out_frag_len > sizeof ( data ) )
1595 out_frag_len = sizeof ( data );
1596 out_frag = &data.bytes[ sizeof ( data ) - out_frag_len ];
1597 if ( out_frag_len > ( len - offset ) )
1598 out_frag_len = ( len - offset );
1599 memcpy ( ( data_out + offset ), out_frag, out_frag_len );
1606 * Store Phantom CLP setting
1608 * @v phantom Phantom NIC
1609 * @v port Virtual port number
1610 * @v setting Setting number
1611 * @v data Data buffer
1612 * @v len Length of data buffer
1613 * @ret rc Return status code
1615 static int phantom_clp_store ( struct phantom_nic *phantom, unsigned int port,
1616 unsigned int setting, const void *data,
1618 unsigned int opcode = setting;
1622 for ( offset = 0 ; offset < len ; offset += PHN_CLP_BLKSIZE ) {
1623 if ( ( rc = phantom_clp_cmd ( phantom, port, opcode, data,
1624 NULL, offset, len ) ) < 0 )
1631 * Fetch Phantom CLP setting
1633 * @v phantom Phantom NIC
1634 * @v port Virtual port number
1635 * @v setting Setting number
1636 * @v data Data buffer
1637 * @v len Length of data buffer
1638 * @ret len Length of setting, or negative error
1640 static int phantom_clp_fetch ( struct phantom_nic *phantom, unsigned int port,
1641 unsigned int setting, void *data, size_t len ) {
1642 unsigned int opcode = ( setting + 1 );
1647 read_len = phantom_clp_cmd ( phantom, port, opcode, NULL,
1648 data, offset, len );
1651 offset += PHN_CLP_BLKSIZE;
1652 if ( offset >= ( unsigned ) read_len )
1654 if ( offset >= len )
1660 /** A Phantom CLP setting */
1661 struct phantom_clp_setting {
1663 const struct setting *setting;
1664 /** Setting number */
1665 unsigned int clp_setting;
1668 /** Phantom CLP settings */
1669 static struct phantom_clp_setting clp_settings[] = {
1670 { &mac_setting, 0x01 },
1674 * Find Phantom CLP setting
1676 * @v setting iPXE setting
1677 * @v clp_setting Setting number, or 0 if not found
1680 phantom_clp_setting ( struct phantom_nic *phantom,
1681 const struct setting *setting ) {
1682 struct phantom_clp_setting *clp_setting;
1685 /* Search the list of explicitly-defined settings */
1686 for ( i = 0 ; i < ( sizeof ( clp_settings ) /
1687 sizeof ( clp_settings[0] ) ) ; i++ ) {
1688 clp_setting = &clp_settings[i];
1689 if ( setting_cmp ( setting, clp_setting->setting ) == 0 )
1690 return clp_setting->clp_setting;
1693 /* Allow for use of numbered settings */
1694 if ( setting->scope == &phantom_settings_scope )
1695 return setting->tag;
1697 DBGC2 ( phantom, "Phantom %p has no \"%s\" setting\n",
1698 phantom, setting->name );
1704 * Check applicability of Phantom CLP setting
1706 * @v settings Settings block
1707 * @v setting Setting
1708 * @ret applies Setting applies within this settings block
1710 static int phantom_setting_applies ( struct settings *settings,
1711 const struct setting *setting ) {
1712 struct phantom_nic *phantom =
1713 container_of ( settings, struct phantom_nic, settings );
1714 unsigned int clp_setting;
1716 /* Find Phantom setting equivalent to iPXE setting */
1717 clp_setting = phantom_clp_setting ( phantom, setting );
1718 return ( clp_setting != 0 );
1722 * Store Phantom CLP setting
1724 * @v settings Settings block
1725 * @v setting Setting to store
1726 * @v data Setting data, or NULL to clear setting
1727 * @v len Length of setting data
1728 * @ret rc Return status code
1730 static int phantom_store_setting ( struct settings *settings,
1731 const struct setting *setting,
1732 const void *data, size_t len ) {
1733 struct phantom_nic *phantom =
1734 container_of ( settings, struct phantom_nic, settings );
1735 unsigned int clp_setting;
1738 /* Find Phantom setting equivalent to iPXE setting */
1739 clp_setting = phantom_clp_setting ( phantom, setting );
1740 assert ( clp_setting != 0 );
1743 if ( ( rc = phantom_clp_store ( phantom, phantom->port,
1744 clp_setting, data, len ) ) != 0 ) {
1745 DBGC ( phantom, "Phantom %p could not store setting \"%s\": "
1746 "%s\n", phantom, setting->name, strerror ( rc ) );
1754 * Fetch Phantom CLP setting
1756 * @v settings Settings block
1757 * @v setting Setting to fetch
1758 * @v data Buffer to fill with setting data
1759 * @v len Length of buffer
1760 * @ret len Length of setting data, or negative error
1762 static int phantom_fetch_setting ( struct settings *settings,
1763 struct setting *setting,
1764 void *data, size_t len ) {
1765 struct phantom_nic *phantom =
1766 container_of ( settings, struct phantom_nic, settings );
1767 unsigned int clp_setting;
1771 /* Find Phantom setting equivalent to iPXE setting */
1772 clp_setting = phantom_clp_setting ( phantom, setting );
1773 assert ( clp_setting != 0 );
1776 if ( ( read_len = phantom_clp_fetch ( phantom, phantom->port,
1777 clp_setting, data, len ) ) < 0 ){
1779 DBGC ( phantom, "Phantom %p could not fetch setting \"%s\": "
1780 "%s\n", phantom, setting->name, strerror ( rc ) );
1787 /** Phantom CLP settings operations */
1788 static struct settings_operations phantom_settings_operations = {
1789 .applies = phantom_setting_applies,
1790 .store = phantom_store_setting,
1791 .fetch = phantom_fetch_setting,
1794 /***************************************************************************
1801 * Map Phantom CRB window
1803 * @v phantom Phantom NIC
1804 * @ret rc Return status code
1806 static int phantom_map_crb ( struct phantom_nic *phantom,
1807 struct pci_device *pci ) {
1808 unsigned long bar0_start;
1809 unsigned long bar0_size;
1811 bar0_start = pci_bar_start ( pci, PCI_BASE_ADDRESS_0 );
1812 bar0_size = pci_bar_size ( pci, PCI_BASE_ADDRESS_0 );
1813 DBGC ( phantom, "Phantom %p is " PCI_FMT " with BAR0 at %08lx+%lx\n",
1814 phantom, PCI_ARGS ( pci ), bar0_start, bar0_size );
1816 if ( ! bar0_start ) {
1817 DBGC ( phantom, "Phantom %p BAR not assigned; ignoring\n",
1822 switch ( bar0_size ) {
1823 case ( 128 * 1024 * 1024 ) :
1824 DBGC ( phantom, "Phantom %p has 128MB BAR\n", phantom );
1825 phantom->crb_access = phantom_crb_access_128m;
1827 case ( 32 * 1024 * 1024 ) :
1828 DBGC ( phantom, "Phantom %p has 32MB BAR\n", phantom );
1829 phantom->crb_access = phantom_crb_access_32m;
1831 case ( 2 * 1024 * 1024 ) :
1832 DBGC ( phantom, "Phantom %p has 2MB BAR\n", phantom );
1833 phantom->crb_access = phantom_crb_access_2m;
1836 DBGC ( phantom, "Phantom %p has bad BAR size\n", phantom );
1840 phantom->bar0 = ioremap ( bar0_start, bar0_size );
1841 if ( ! phantom->bar0 ) {
1842 DBGC ( phantom, "Phantom %p could not map BAR0\n", phantom );
1846 /* Mark current CRB window as invalid, so that the first
1847 * read/write will set the current window.
1849 phantom->crb_window = -1UL;
1857 * @v phantom Phantom NIC
1859 static void phantom_unhalt_pegs ( struct phantom_nic *phantom ) {
1860 uint32_t halt_status;
1862 halt_status = phantom_readl ( phantom, UNM_PEG_0_HALT_STATUS );
1863 phantom_writel ( phantom, halt_status, UNM_PEG_0_HALT_STATUS );
1864 halt_status = phantom_readl ( phantom, UNM_PEG_1_HALT_STATUS );
1865 phantom_writel ( phantom, halt_status, UNM_PEG_1_HALT_STATUS );
1866 halt_status = phantom_readl ( phantom, UNM_PEG_2_HALT_STATUS );
1867 phantom_writel ( phantom, halt_status, UNM_PEG_2_HALT_STATUS );
1868 halt_status = phantom_readl ( phantom, UNM_PEG_3_HALT_STATUS );
1869 phantom_writel ( phantom, halt_status, UNM_PEG_3_HALT_STATUS );
1870 halt_status = phantom_readl ( phantom, UNM_PEG_4_HALT_STATUS );
1871 phantom_writel ( phantom, halt_status, UNM_PEG_4_HALT_STATUS );
1875 * Initialise the Phantom command PEG
1877 * @v phantom Phantom NIC
1878 * @ret rc Return status code
1880 static int phantom_init_cmdpeg ( struct phantom_nic *phantom ) {
1883 unsigned int retries;
1884 uint32_t cmdpeg_state;
1885 uint32_t last_cmdpeg_state = 0;
1887 /* Check for a previous initialisation. This could have
1888 * happened if, for example, the BIOS used the UNDI API to
1889 * drive the NIC prior to a full PXE boot.
1891 cmdpeg_state = phantom_readl ( phantom, UNM_NIC_REG_CMDPEG_STATE );
1892 if ( cmdpeg_state == UNM_NIC_REG_CMDPEG_STATE_INITIALIZE_ACK ) {
1893 DBGC ( phantom, "Phantom %p command PEG already initialized\n",
1895 /* Unhalt the PEGs. Previous firmware (e.g. BOFM) may
1896 * have halted the PEGs to prevent internal bus
1897 * collisions when the BIOS re-reads the expansion ROM.
1899 phantom_unhalt_pegs ( phantom );
1903 /* If this was a cold boot, check that the hardware came up ok */
1904 cold_boot = phantom_readl ( phantom, UNM_CAM_RAM_COLD_BOOT );
1905 if ( cold_boot == UNM_CAM_RAM_COLD_BOOT_MAGIC ) {
1906 DBGC ( phantom, "Phantom %p coming up from cold boot\n",
1908 sw_reset = phantom_readl ( phantom, UNM_ROMUSB_GLB_SW_RESET );
1909 if ( sw_reset != UNM_ROMUSB_GLB_SW_RESET_MAGIC ) {
1910 DBGC ( phantom, "Phantom %p reset failed: %08x\n",
1911 phantom, sw_reset );
1915 DBGC ( phantom, "Phantom %p coming up from warm boot "
1916 "(%08x)\n", phantom, cold_boot );
1918 /* Clear cold-boot flag */
1919 phantom_writel ( phantom, 0, UNM_CAM_RAM_COLD_BOOT );
1921 /* Set port modes */
1922 phantom_writel ( phantom, UNM_CAM_RAM_PORT_MODE_AUTO_NEG_1G,
1923 UNM_CAM_RAM_WOL_PORT_MODE );
1925 /* Pass dummy DMA area to card */
1926 phantom_write_hilo ( phantom, 0,
1927 UNM_NIC_REG_DUMMY_BUF_ADDR_LO,
1928 UNM_NIC_REG_DUMMY_BUF_ADDR_HI );
1929 phantom_writel ( phantom, UNM_NIC_REG_DUMMY_BUF_INIT,
1930 UNM_NIC_REG_DUMMY_BUF );
1932 /* Tell the hardware that tuning is complete */
1933 phantom_writel ( phantom, UNM_ROMUSB_GLB_PEGTUNE_DONE_MAGIC,
1934 UNM_ROMUSB_GLB_PEGTUNE_DONE );
1936 /* Wait for command PEG to finish initialising */
1937 DBGC ( phantom, "Phantom %p initialising command PEG (will take up to "
1938 "%d seconds)...\n", phantom, PHN_CMDPEG_INIT_TIMEOUT_SEC );
1939 for ( retries = 0; retries < PHN_CMDPEG_INIT_TIMEOUT_SEC; retries++ ) {
1940 cmdpeg_state = phantom_readl ( phantom,
1941 UNM_NIC_REG_CMDPEG_STATE );
1942 if ( cmdpeg_state != last_cmdpeg_state ) {
1943 DBGC ( phantom, "Phantom %p command PEG state is "
1944 "%08x after %d seconds...\n",
1945 phantom, cmdpeg_state, retries );
1946 last_cmdpeg_state = cmdpeg_state;
1948 if ( cmdpeg_state == UNM_NIC_REG_CMDPEG_STATE_INITIALIZED ) {
1949 /* Acknowledge the PEG initialisation */
1950 phantom_writel ( phantom,
1951 UNM_NIC_REG_CMDPEG_STATE_INITIALIZE_ACK,
1952 UNM_NIC_REG_CMDPEG_STATE );
1958 DBGC ( phantom, "Phantom %p timed out waiting for command PEG to "
1959 "initialise (status %08x)\n", phantom, cmdpeg_state );
1964 * Read Phantom MAC address
1966 * @v phanton_port Phantom NIC
1967 * @v hw_addr Buffer to fill with MAC address
1969 static void phantom_get_macaddr ( struct phantom_nic *phantom,
1970 uint8_t *hw_addr ) {
1972 uint8_t mac_addr[2][ETH_ALEN];
1975 unsigned long offset;
1978 /* Read the three dwords that include this MAC address and one other */
1979 offset = ( UNM_CAM_RAM_MAC_ADDRS +
1980 ( 12 * ( phantom->port / 2 ) ) );
1981 for ( i = 0 ; i < 3 ; i++, offset += 4 ) {
1982 u.dwords[i] = phantom_readl ( phantom, offset );
1985 /* Copy out the relevant MAC address */
1986 for ( i = 0 ; i < ETH_ALEN ; i++ ) {
1987 hw_addr[ ETH_ALEN - i - 1 ] =
1988 u.mac_addr[ phantom->port & 1 ][i];
1990 DBGC ( phantom, "Phantom %p MAC address is %s\n",
1991 phantom, eth_ntoa ( hw_addr ) );
1995 * Check Phantom is enabled for boot
1997 * @v phanton_port Phantom NIC
1998 * @ret rc Return status code
2000 * This is something of an ugly hack to accommodate an OEM
2001 * requirement. The NIC has only one expansion ROM BAR, rather than
2002 * one per port. To allow individual ports to be selectively
2003 * enabled/disabled for PXE boot (as required), we must therefore
2004 * leave the expansion ROM always enabled, and place the per-port
2005 * enable/disable logic within the iPXE driver.
2007 static int phantom_check_boot_enable ( struct phantom_nic *phantom ) {
2008 unsigned long boot_enable;
2010 boot_enable = phantom_readl ( phantom, UNM_CAM_RAM_BOOT_ENABLE );
2011 if ( ! ( boot_enable & ( 1 << phantom->port ) ) ) {
2012 DBGC ( phantom, "Phantom %p PXE boot is disabled\n",
2021 * Initialise Phantom receive PEG
2023 * @v phantom Phantom NIC
2024 * @ret rc Return status code
2026 static int phantom_init_rcvpeg ( struct phantom_nic *phantom ) {
2027 unsigned int retries;
2028 uint32_t rcvpeg_state;
2029 uint32_t last_rcvpeg_state = 0;
2031 DBGC ( phantom, "Phantom %p initialising receive PEG (will take up to "
2032 "%d seconds)...\n", phantom, PHN_RCVPEG_INIT_TIMEOUT_SEC );
2033 for ( retries = 0; retries < PHN_RCVPEG_INIT_TIMEOUT_SEC; retries++ ) {
2034 rcvpeg_state = phantom_readl ( phantom,
2035 UNM_NIC_REG_RCVPEG_STATE );
2036 if ( rcvpeg_state != last_rcvpeg_state ) {
2037 DBGC ( phantom, "Phantom %p receive PEG state is "
2038 "%08x after %d seconds...\n",
2039 phantom, rcvpeg_state, retries );
2040 last_rcvpeg_state = rcvpeg_state;
2042 if ( rcvpeg_state == UNM_NIC_REG_RCVPEG_STATE_INITIALIZED )
2047 DBGC ( phantom, "Phantom %p timed out waiting for receive PEG to "
2048 "initialise (status %08x)\n", phantom, rcvpeg_state );
2057 * @ret rc Return status code
2059 static int phantom_probe ( struct pci_device *pci ) {
2060 struct net_device *netdev;
2061 struct phantom_nic *phantom;
2062 struct settings *parent_settings;
2065 /* Allocate Phantom device */
2066 netdev = alloc_etherdev ( sizeof ( *phantom ) );
2069 goto err_alloc_etherdev;
2071 netdev_init ( netdev, &phantom_operations );
2072 phantom = netdev_priv ( netdev );
2073 pci_set_drvdata ( pci, netdev );
2074 netdev->dev = &pci->dev;
2075 memset ( phantom, 0, sizeof ( *phantom ) );
2076 phantom->port = PCI_FUNC ( pci->busdevfn );
2077 assert ( phantom->port < PHN_MAX_NUM_PORTS );
2078 settings_init ( &phantom->settings,
2079 &phantom_settings_operations,
2080 &netdev->refcnt, &phantom_settings_scope );
2082 /* Fix up PCI device */
2083 adjust_pci_device ( pci );
2086 if ( ( rc = phantom_map_crb ( phantom, pci ) ) != 0 )
2089 /* BUG5945 - need to hack PCI config space on P3 B1 silicon.
2090 * B2 will have this fixed; remove this hack when B1 is no
2093 if ( PCI_FUNC ( pci->busdevfn ) == 0 ) {
2095 for ( i = 0 ; i < 8 ; i++ ) {
2098 PCI_BUSDEVFN ( PCI_BUS ( pci->busdevfn ),
2099 PCI_SLOT ( pci->busdevfn ), i );
2100 pci_read_config_dword ( pci, 0xc8, &temp );
2101 pci_read_config_dword ( pci, 0xc8, &temp );
2102 pci_write_config_dword ( pci, 0xc8, 0xf1000 );
2104 pci->busdevfn = PCI_BUSDEVFN ( PCI_BUS ( pci->busdevfn ),
2105 PCI_SLOT ( pci->busdevfn ), 0 );
2108 /* Initialise the command PEG */
2109 if ( ( rc = phantom_init_cmdpeg ( phantom ) ) != 0 )
2110 goto err_init_cmdpeg;
2112 /* Initialise the receive PEG */
2113 if ( ( rc = phantom_init_rcvpeg ( phantom ) ) != 0 )
2114 goto err_init_rcvpeg;
2116 /* Read MAC addresses */
2117 phantom_get_macaddr ( phantom, netdev->hw_addr );
2119 /* Skip if boot disabled on NIC */
2120 if ( ( rc = phantom_check_boot_enable ( phantom ) ) != 0 )
2121 goto err_check_boot_enable;
2123 /* Register network devices */
2124 if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
2125 DBGC ( phantom, "Phantom %p could not register net device: "
2126 "%s\n", phantom, strerror ( rc ) );
2127 goto err_register_netdev;
2130 /* Register settings blocks */
2131 parent_settings = netdev_settings ( netdev );
2132 if ( ( rc = register_settings ( &phantom->settings,
2133 parent_settings, "clp" ) ) != 0 ) {
2134 DBGC ( phantom, "Phantom %p could not register settings: "
2135 "%s\n", phantom, strerror ( rc ) );
2136 goto err_register_settings;
2141 unregister_settings ( &phantom->settings );
2142 err_register_settings:
2143 unregister_netdev ( netdev );
2144 err_register_netdev:
2145 err_check_boot_enable:
2149 netdev_nullify ( netdev );
2150 netdev_put ( netdev );
2160 static void phantom_remove ( struct pci_device *pci ) {
2161 struct net_device *netdev = pci_get_drvdata ( pci );
2162 struct phantom_nic *phantom = netdev_priv ( netdev );
2164 unregister_settings ( &phantom->settings );
2165 unregister_netdev ( netdev );
2166 netdev_nullify ( netdev );
2167 netdev_put ( netdev );
2170 /** Phantom PCI IDs */
2171 static struct pci_device_id phantom_nics[] = {
2172 PCI_ROM ( 0x4040, 0x0100, "nx", "NX", 0 ),
2175 /** Phantom PCI driver */
2176 struct pci_driver phantom_driver __pci_driver = {
2177 .ids = phantom_nics,
2178 .id_count = ( sizeof ( phantom_nics ) / sizeof ( phantom_nics[0] ) ),
2179 .probe = phantom_probe,
2180 .remove = phantom_remove,