qemu/roms/ipxe/src/drivers/net/ath/ath9k/ath9k_eeprom.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
   5  * Original from Linux kernel 3.0.1
   6  *
   7  * Permission to use, copy, modify, and/or distribute this software for any
   8  * purpose with or without fee is hereby granted, provided that the above
   9  * copyright notice and this permission notice appear in all copies.
  10  *
  11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18  */
  19
  20 #include <ipxe/io.h>
  21
  22 #include "hw.h"
  23
  24 static inline u16 ath9k_hw_fbin2freq(u8 fbin, int is2GHz)
  25 {
  26         if (fbin == AR5416_BCHAN_UNUSED)
  27                 return fbin;
  28
  29         return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
  30 }
  31
  32 void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val)
  33 {
  34         REG_WRITE(ah, reg, val);
  35
  36         if (ah->config.analog_shiftreg)
  37                 udelay(100);
  38 }
  39
  40 void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask,
  41                                u32 shift, u32 val)
  42 {
  43         u32 regVal;
  44
  45         regVal = REG_READ(ah, reg) & ~mask;
  46         regVal |= (val << shift) & mask;
  47
  48         REG_WRITE(ah, reg, regVal);
  49
  50         if (ah->config.analog_shiftreg)
  51                 udelay(100);
  52 }
  53
  54 int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
  55                              int16_t targetLeft, int16_t targetRight)
  56 {
  57         int16_t rv;
  58
  59         if (srcRight == srcLeft) {
  60                 rv = targetLeft;
  61         } else {
  62                 rv = (int16_t) (((target - srcLeft) * targetRight +
  63                                  (srcRight - target) * targetLeft) /
  64                                 (srcRight - srcLeft));
  65         }
  66         return rv;
  67 }
  68
  69 int ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
  70                                     u16 *indexL, u16 *indexR)
  71 {
  72         u16 i;
  73
  74         if (target <= pList[0]) {
  75                 *indexL = *indexR = 0;
  76                 return 1;
  77         }
  78         if (target >= pList[listSize - 1]) {
  79                 *indexL = *indexR = (u16) (listSize - 1);
  80                 return 1;
  81         }
  82
  83         for (i = 0; i < listSize - 1; i++) {
  84                 if (pList[i] == target) {
  85                         *indexL = *indexR = i;
  86                         return 1;
  87                 }
  88                 if (target < pList[i + 1]) {
  89                         *indexL = i;
  90                         *indexR = (u16) (i + 1);
  91                         return 0;
  92                 }
  93         }
  94         return 0;
  95 }
  96
  97 void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data,
  98                                   int eep_start_loc, int size)
  99 {
 100         int i = 0, j, addr;
 101         u32 addrdata[8];
 102         u32 data[8];
 103
 104         for (addr = 0; addr < size; addr++) {
 105                 addrdata[i] = AR5416_EEPROM_OFFSET +
 106                         ((addr + eep_start_loc) << AR5416_EEPROM_S);
 107                 i++;
 108                 if (i == 8) {
 109                         REG_READ_MULTI(ah, addrdata, data, i);
 110
 111                         for (j = 0; j < i; j++) {
 112                                 *eep_data = data[j];
 113                                 eep_data++;
 114                         }
 115                         i = 0;
 116                 }
 117         }
 118
 119         if (i != 0) {
 120                 REG_READ_MULTI(ah, addrdata, data, i);
 121
 122                 for (j = 0; j < i; j++) {
 123                         *eep_data = data[j];
 124                         eep_data++;
 125                 }
 126         }
 127 }
 128
 129 int ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data)
 130 {
 131         return common->bus_ops->eeprom_read(common, off, data);
 132 }
 133
 134 void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
 135                              u8 *pVpdList, u16 numIntercepts,
 136                              u8 *pRetVpdList)
 137 {
 138         u16 i, k;
 139         u8 currPwr = pwrMin;
 140         u16 idxL = 0, idxR = 0;
 141
 142         for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
 143                 ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
 144                                                numIntercepts, &(idxL),
 145                                                &(idxR));
 146                 if (idxR < 1)
 147                         idxR = 1;
 148                 if (idxL == numIntercepts - 1)
 149                         idxL = (u16) (numIntercepts - 2);
 150                 if (pPwrList[idxL] == pPwrList[idxR])
 151                         k = pVpdList[idxL];
 152                 else
 153                         k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] +
 154                                    (pPwrList[idxR] - currPwr) * pVpdList[idxL]) /
 155                                   (pPwrList[idxR] - pPwrList[idxL]));
 156                 pRetVpdList[i] = (u8) k;
 157                 currPwr += 2;
 158         }
 159 }
 160
 161 void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah,
 162                                        struct ath9k_channel *chan,
 163                                        struct cal_target_power_leg *powInfo,
 164                                        u16 numChannels,
 165                                        struct cal_target_power_leg *pNewPower,
 166                                        u16 numRates, int isExtTarget)
 167 {
 168         struct chan_centers centers;
 169         u16 clo, chi;
 170         int i;
 171         int matchIndex = -1, lowIndex = -1;
 172         u16 freq;
 173
 174         ath9k_hw_get_channel_centers(ah, chan, &centers);
 175         freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
 176
 177         if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
 178                                        IS_CHAN_2GHZ(chan))) {
 179                 matchIndex = 0;
 180         } else {
 181                 for (i = 0; (i < numChannels) &&
 182                              (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
 183                         if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
 184                                                        IS_CHAN_2GHZ(chan))) {
 185                                 matchIndex = i;
 186                                 break;
 187                         } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
 188                                                 IS_CHAN_2GHZ(chan)) && i > 0 &&
 189                                    freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
 190                                                 IS_CHAN_2GHZ(chan))) {
 191                                 lowIndex = i - 1;
 192                                 break;
 193                         }
 194                 }
 195                 if ((matchIndex == -1) && (lowIndex == -1))
 196                         matchIndex = i - 1;
 197         }
 198
 199         if (matchIndex != -1) {
 200                 *pNewPower = powInfo[matchIndex];
 201         } else {
 202                 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
 203                                          IS_CHAN_2GHZ(chan));
 204                 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
 205                                          IS_CHAN_2GHZ(chan));
 206
 207                 for (i = 0; i < numRates; i++) {
 208                         pNewPower->tPow2x[i] =
 209                                 (u8)ath9k_hw_interpolate(freq, clo, chi,
 210                                                 powInfo[lowIndex].tPow2x[i],
 211                                                 powInfo[lowIndex + 1].tPow2x[i]);
 212                 }
 213         }
 214 }
 215
 216 void ath9k_hw_get_target_powers(struct ath_hw *ah,
 217                                 struct ath9k_channel *chan,
 218                                 struct cal_target_power_ht *powInfo,
 219                                 u16 numChannels,
 220                                 struct cal_target_power_ht *pNewPower,
 221                                 u16 numRates, int isHt40Target)
 222 {
 223         struct chan_centers centers;
 224         u16 clo, chi;
 225         int i;
 226         int matchIndex = -1, lowIndex = -1;
 227         u16 freq;
 228
 229         ath9k_hw_get_channel_centers(ah, chan, &centers);
 230         freq = isHt40Target ? centers.synth_center : centers.ctl_center;
 231
 232         if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
 233                 matchIndex = 0;
 234         } else {
 235                 for (i = 0; (i < numChannels) &&
 236                              (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
 237                         if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
 238                                                        IS_CHAN_2GHZ(chan))) {
 239                                 matchIndex = i;
 240                                 break;
 241                         } else
 242                                 if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
 243                                                 IS_CHAN_2GHZ(chan)) && i > 0 &&
 244                                     freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
 245                                                 IS_CHAN_2GHZ(chan))) {
 246                                         lowIndex = i - 1;
 247                                         break;
 248                                 }
 249                 }
 250                 if ((matchIndex == -1) && (lowIndex == -1))
 251                         matchIndex = i - 1;
 252         }
 253
 254         if (matchIndex != -1) {
 255                 *pNewPower = powInfo[matchIndex];
 256         } else {
 257                 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
 258                                          IS_CHAN_2GHZ(chan));
 259                 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
 260                                          IS_CHAN_2GHZ(chan));
 261
 262                 for (i = 0; i < numRates; i++) {
 263                         pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq,
 264                                                 clo, chi,
 265                                                 powInfo[lowIndex].tPow2x[i],
 266                                                 powInfo[lowIndex + 1].tPow2x[i]);
 267                 }
 268         }
 269 }
 270
 271 u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
 272                                 int is2GHz, int num_band_edges)
 273 {
 274         u16 twiceMaxEdgePower = MAX_RATE_POWER;
 275         int i;
 276
 277         for (i = 0; (i < num_band_edges) &&
 278                      (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
 279                 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
 280                         twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
 281                         break;
 282                 } else if ((i > 0) &&
 283                            (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
 284                                                       is2GHz))) {
 285                         if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
 286                                                is2GHz) < freq &&
 287                             CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
 288                                 twiceMaxEdgePower =
 289                                         CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
 290                         }
 291                         break;
 292                 }
 293         }
 294
 295         return twiceMaxEdgePower;
 296 }
 297
 298 void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
 299 {
 300         struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
 301
 302         switch (ar5416_get_ntxchains(ah->txchainmask)) {
 303         case 1:
 304                 break;
 305         case 2:
 306                 regulatory->max_power_level += INCREASE_MAXPOW_BY_TWO_CHAIN;
 307                 break;
 308         case 3:
 309                 regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
 310                 break;
 311         default:
 312                 DBG2("ath9k: "
 313                         "Invalid chainmask configuration\n");
 314                 break;
 315         }
 316 }
 317
 318 void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,
 319                                 struct ath9k_channel *chan,
 320                                 void *pRawDataSet,
 321                                 u8 *bChans, u16 availPiers,
 322                                 u16 tPdGainOverlap,
 323                                 u16 *pPdGainBoundaries, u8 *pPDADCValues,
 324                                 u16 numXpdGains)
 325 {
 326         int i, j, k;
 327         int16_t ss;
 328         u16 idxL = 0, idxR = 0, numPiers;
 329         static u8 vpdTableL[AR5416_NUM_PD_GAINS]
 330                 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
 331         static u8 vpdTableR[AR5416_NUM_PD_GAINS]
 332                 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
 333         static u8 vpdTableI[AR5416_NUM_PD_GAINS]
 334                 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
 335
 336         u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
 337         u8 minPwrT4[AR5416_NUM_PD_GAINS];
 338         u8 maxPwrT4[AR5416_NUM_PD_GAINS];
 339         int16_t vpdStep;
 340         int16_t tmpVal;
 341         u16 sizeCurrVpdTable, maxIndex, tgtIndex;
 342         int match;
 343         int16_t minDelta = 0;
 344         struct chan_centers centers;
 345         int pdgain_boundary_default;
 346         struct cal_data_per_freq *data_def = pRawDataSet;
 347         struct cal_data_per_freq_4k *data_4k = pRawDataSet;
 348         struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet;
 349         int eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah);
 350         int intercepts;
 351
 352         if (AR_SREV_9287(ah))
 353                 intercepts = AR9287_PD_GAIN_ICEPTS;
 354         else
 355                 intercepts = AR5416_PD_GAIN_ICEPTS;
 356
 357         memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS);
 358         ath9k_hw_get_channel_centers(ah, chan, &centers);
 359
 360         for (numPiers = 0; numPiers < availPiers; numPiers++) {
 361                 if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
 362                         break;
 363         }
 364
 365         match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
 366                                                              IS_CHAN_2GHZ(chan)),
 367                                                bChans, numPiers, &idxL, &idxR);
 368
 369         if (match) {
 370                 if (AR_SREV_9287(ah)) {
 371                         /* FIXME: array overrun? */
 372                         for (i = 0; i < numXpdGains; i++) {
 373                                 minPwrT4[i] = data_9287[idxL].pwrPdg[i][0];
 374                                 maxPwrT4[i] = data_9287[idxL].pwrPdg[i][4];
 375                                 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
 376                                                 data_9287[idxL].pwrPdg[i],
 377                                                 data_9287[idxL].vpdPdg[i],
 378                                                 intercepts,
 379                                                 vpdTableI[i]);
 380                         }
 381                 } else if (eeprom_4k) {
 382                         for (i = 0; i < numXpdGains; i++) {
 383                                 minPwrT4[i] = data_4k[idxL].pwrPdg[i][0];
 384                                 maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4];
 385                                 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
 386                                                 data_4k[idxL].pwrPdg[i],
 387                                                 data_4k[idxL].vpdPdg[i],
 388                                                 intercepts,
 389                                                 vpdTableI[i]);
 390                         }
 391                 } else {
 392                         for (i = 0; i < numXpdGains; i++) {
 393                                 minPwrT4[i] = data_def[idxL].pwrPdg[i][0];
 394                                 maxPwrT4[i] = data_def[idxL].pwrPdg[i][4];
 395                                 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
 396                                                 data_def[idxL].pwrPdg[i],
 397                                                 data_def[idxL].vpdPdg[i],
 398                                                 intercepts,
 399                                                 vpdTableI[i]);
 400                         }
 401                 }
 402         } else {
 403                 for (i = 0; i < numXpdGains; i++) {
 404                         if (AR_SREV_9287(ah)) {
 405                                 pVpdL = data_9287[idxL].vpdPdg[i];
 406                                 pPwrL = data_9287[idxL].pwrPdg[i];
 407                                 pVpdR = data_9287[idxR].vpdPdg[i];
 408                                 pPwrR = data_9287[idxR].pwrPdg[i];
 409                         } else if (eeprom_4k) {
 410                                 pVpdL = data_4k[idxL].vpdPdg[i];
 411                                 pPwrL = data_4k[idxL].pwrPdg[i];
 412                                 pVpdR = data_4k[idxR].vpdPdg[i];
 413                                 pPwrR = data_4k[idxR].pwrPdg[i];
 414                         } else {
 415                                 pVpdL = data_def[idxL].vpdPdg[i];
 416                                 pPwrL = data_def[idxL].pwrPdg[i];
 417                                 pVpdR = data_def[idxR].vpdPdg[i];
 418                                 pPwrR = data_def[idxR].pwrPdg[i];
 419                         }
 420
 421                         minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
 422
 423                         maxPwrT4[i] =
 424                                 min(pPwrL[intercepts - 1],
 425                                     pPwrR[intercepts - 1]);
 426
 427
 428                         ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
 429                                                 pPwrL, pVpdL,
 430                                                 intercepts,
 431                                                 vpdTableL[i]);
 432                         ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
 433                                                 pPwrR, pVpdR,
 434                                                 intercepts,
 435                                                 vpdTableR[i]);
 436
 437                         for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
 438                                 vpdTableI[i][j] =
 439                                         (u8)(ath9k_hw_interpolate((u16)
 440                                              FREQ2FBIN(centers.
 441                                                        synth_center,
 442                                                        IS_CHAN_2GHZ
 443                                                        (chan)),
 444                                              bChans[idxL], bChans[idxR],
 445                                              vpdTableL[i][j], vpdTableR[i][j]));
 446                         }
 447                 }
 448         }
 449
 450         k = 0;
 451
 452         for (i = 0; i < numXpdGains; i++) {
 453                 if (i == (numXpdGains - 1))
 454                         pPdGainBoundaries[i] =
 455                                 (u16)(maxPwrT4[i] / 2);
 456                 else
 457                         pPdGainBoundaries[i] =
 458                                 (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
 459
 460                 pPdGainBoundaries[i] =
 461                         min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
 462
 463                 if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
 464                         minDelta = pPdGainBoundaries[0] - 23;
 465                         pPdGainBoundaries[0] = 23;
 466                 } else {
 467                         minDelta = 0;
 468                 }
 469
 470                 if (i == 0) {
 471                         if (AR_SREV_9280_20_OR_LATER(ah))
 472                                 ss = (int16_t)(0 - (minPwrT4[i] / 2));
 473                         else
 474                                 ss = 0;
 475                 } else {
 476                         ss = (int16_t)((pPdGainBoundaries[i - 1] -
 477                                         (minPwrT4[i] / 2)) -
 478                                        tPdGainOverlap + 1 + minDelta);
 479                 }
 480                 vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
 481                 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
 482
 483                 while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
 484                         tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
 485                         pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
 486                         ss++;
 487                 }
 488
 489                 sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
 490                 tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
 491                                 (minPwrT4[i] / 2));
 492                 maxIndex = (tgtIndex < sizeCurrVpdTable) ?
 493                         tgtIndex : sizeCurrVpdTable;
 494
 495                 while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
 496                         pPDADCValues[k++] = vpdTableI[i][ss++];
 497                 }
 498
 499                 vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
 500                                     vpdTableI[i][sizeCurrVpdTable - 2]);
 501                 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
 502
 503                 if (tgtIndex >= maxIndex) {
 504                         while ((ss <= tgtIndex) &&
 505                                (k < (AR5416_NUM_PDADC_VALUES - 1))) {
 506                                 tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
 507                                                     (ss - maxIndex + 1) * vpdStep));
 508                                 pPDADCValues[k++] = (u8)((tmpVal > 255) ?
 509                                                          255 : tmpVal);
 510                                 ss++;
 511                         }
 512                 }
 513         }
 514
 515         if (eeprom_4k)
 516                 pdgain_boundary_default = 58;
 517         else
 518                 pdgain_boundary_default = pPdGainBoundaries[i - 1];
 519
 520         while (i < AR5416_PD_GAINS_IN_MASK) {
 521                 pPdGainBoundaries[i] = pdgain_boundary_default;
 522                 i++;
 523         }
 524
 525         while (k < AR5416_NUM_PDADC_VALUES) {
 526                 pPDADCValues[k] = pPDADCValues[k - 1];
 527                 k++;
 528         }
 529 }
 530
 531 int ath9k_hw_eeprom_init(struct ath_hw *ah)
 532 {
 533         int status;
 534
 535         if (AR_SREV_9300_20_OR_LATER(ah))
 536                 ah->eep_ops = &eep_ar9300_ops;
 537         else if (AR_SREV_9287(ah)) {
 538                 ah->eep_ops = &eep_ar9287_ops;
 539         } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
 540                 ah->eep_ops = &eep_4k_ops;
 541         } else {
 542                 ah->eep_ops = &eep_def_ops;
 543         }
 544
 545         if (!ah->eep_ops->fill_eeprom(ah))
 546                 return -EIO;
 547
 548         status = ah->eep_ops->check_eeprom(ah);
 549
 550         return status;
 551 }