2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
5 * Original from Linux kernel 3.0.1
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 FILE_LICENCE ( BSD2 );
26 #include <ipxe/net80211.h>
28 /* This block of functions are from kernel.h v3.0.1 */
29 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
30 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
31 #define BITS_PER_BYTE 8
32 #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
33 #define BIT(nr) (1UL << (nr))
35 #define min(x, y) ({ \
36 typeof(x) _min1 = (x); \
37 typeof(y) _min2 = (y); \
38 (void) (&_min1 == &_min2); \
39 _min1 < _min2 ? _min1 : _min2; })
40 #define max(x, y) ({ \
41 typeof(x) _max1 = (x); \
42 typeof(y) _max2 = (y); \
43 (void) (&_max1 == &_max2); \
44 _max1 > _max2 ? _max1 : _max2; })
47 if (sizeof(x) == sizeof(long)) { \
49 ret = (__x < 0) ? -__x : __x; \
52 ret = (__x < 0) ? -__x : __x; \
57 #define ___constant_swab16(x) ((uint16_t)( \
58 (((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \
59 (((uint16_t)(x) & (uint16_t)0xff00U) >> 8)))
60 #define ___constant_swab32(x) ((uint32_t)( \
61 (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
62 (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
63 (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
64 (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
65 #define __swab16(x) ___constant_swab16(x)
66 #define __swab32(x) ___constant_swab32(x)
67 #define swab16 __swab16
68 #define swab32 __swab32
70 static inline int32_t sign_extend32(uint32_t value, int index)
72 uint8_t shift = 31 - index;
73 return (int32_t)(value << shift) >> shift;
76 static inline u16 __get_unaligned_le16(const u8 *p)
78 return p[0] | p[1] << 8;
80 static inline u32 __get_unaligned_le32(const u8 *p)
82 return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24;
84 static inline u16 get_unaligned_le16(const void *p)
86 return __get_unaligned_le16((const u8 *)p);
88 static inline u32 get_unaligned_le32(const void *p)
90 return __get_unaligned_le32((const u8 *)p);
92 /* End Kernel Block */
95 * The key cache is used for h/w cipher state and also for
96 * tracking station state such as the current tx antenna.
97 * We also setup a mapping table between key cache slot indices
98 * and station state to short-circuit node lookups on rx.
99 * Different parts have different size key caches. We handle
100 * up to ATH_KEYMAX entries (could dynamically allocate state).
102 #define ATH_KEYMAX 128 /* max key cache size we handle */
104 static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
108 unsigned int longcal_timer;
109 unsigned int shortcal_timer;
110 unsigned int resetcal_timer;
111 unsigned int checkani_timer;
115 struct ath_cycle_counters {
122 enum ath_device_state {
133 struct reg_dmn_pair_mapping {
139 struct ath_regulatory {
147 struct reg_dmn_pair_mapping *regpair;
150 enum ath_crypt_caps {
151 ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0),
152 ATH_CRYPT_CAP_MIC_COMBINED = BIT(1),
159 u8 kv_val[16]; /* TK */
160 u8 kv_mic[8]; /* Michael MIC key */
161 u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
162 * supports both MIC keys in the same key cache entry;
163 * in that case, kv_mic is the RX key) */
168 ATH_CIPHER_AES_OCB = 1,
169 ATH_CIPHER_AES_CCM = 2,
177 * struct ath_ops - Register read/write operations
179 * @read: Register read
180 * @multi_read: Multiple register read
181 * @write: Register write
182 * @enable_write_buffer: Enable multiple register writes
183 * @write_flush: flush buffered register writes and disable buffering
186 unsigned int (*read)(void *, u32 reg_offset);
187 void (*multi_read)(void *, u32 *addr, u32 *val, u16 count);
188 void (*write)(void *, u32 val, u32 reg_offset);
189 void (*enable_write_buffer)(void *);
190 void (*write_flush) (void *);
191 u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
200 struct net80211_device *dev;
202 enum ath_device_state state;
208 u8 macaddr[ETH_ALEN];
209 u8 curbssid[ETH_ALEN];
210 u8 bssidmask[ETH_ALEN];
218 enum ath_crypt_caps crypt_caps;
220 unsigned int clockrate;
222 struct ath_cycle_counters cc_ani;
223 struct ath_cycle_counters cc_survey;
225 struct ath_regulatory regulatory;
226 const struct ath_ops *ops;
227 const struct ath_bus_ops *bus_ops;
232 struct io_buffer *ath_rxbuf_alloc(struct ath_common *common,
236 void ath_hw_setbssidmask(struct ath_common *common);
237 int ath_hw_keyreset(struct ath_common *common, u16 entry);
238 void ath_hw_cycle_counters_update(struct ath_common *common);
239 int32_t ath_hw_get_listen_time(struct ath_common *common);