2 * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
4 * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
5 * Munro, in turn based on the Linux kernel's PCI implementation.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or any later version.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 FILE_LICENCE ( GPL2_OR_LATER );
30 #include <ipxe/tables.h>
31 #include <ipxe/device.h>
40 static void pcibus_remove ( struct root_device *rootdev );
46 * @v reg PCI register number
47 * @ret bar Base address register
49 * Reads the specified PCI base address register, including the flags
50 * portion. 64-bit BARs will be handled automatically. If the value
51 * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
52 * high dword is non-zero on a 32-bit platform), then the value
53 * returned will be zero plus the flags for a 64-bit BAR. Unreachable
54 * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
56 static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
60 pci_read_config_dword ( pci, reg, &low );
61 if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) )
62 == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){
63 pci_read_config_dword ( pci, reg + 4, &high );
65 if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
66 return ( ( ( uint64_t ) high << 32 ) | low );
68 DBGC ( pci, PCI_FMT " unhandled 64-bit BAR "
70 PCI_ARGS ( pci ), high, low );
71 return PCI_BASE_ADDRESS_MEM_TYPE_64;
79 * Find the start of a PCI BAR
82 * @v reg PCI register number
83 * @ret start BAR start address
85 * Reads the specified PCI base address register, and returns the
86 * address portion of the BAR (i.e. without the flags).
88 * If the address exceeds the size of an unsigned long (i.e. if a
89 * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
90 * return value will be zero.
92 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
95 bar = pci_bar ( pci, reg );
96 if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){
97 return ( bar & PCI_BASE_ADDRESS_MEM_MASK );
99 return ( bar & PCI_BASE_ADDRESS_IO_MASK );
104 * Read membase and ioaddr for a PCI device
108 * This scans through all PCI BARs on the specified device. The first
109 * valid memory BAR is recorded as pci_device::membase, and the first
110 * valid IO BAR is recorded as pci_device::ioaddr.
112 * 64-bit BARs are handled automatically. On a 32-bit platform, if a
113 * 64-bit BAR has a non-zero high dword, it will be regarded as
116 static void pci_read_bases ( struct pci_device *pci ) {
120 for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
121 bar = pci_bar ( pci, reg );
122 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
125 ( bar & PCI_BASE_ADDRESS_IO_MASK );
127 if ( ! pci->membase )
129 ( bar & PCI_BASE_ADDRESS_MEM_MASK );
130 /* Skip next BAR if 64-bit */
131 if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
142 * Set device to be a busmaster in case BIOS neglected to do so. Also
143 * adjust PCI latency timer to a reasonable value, 32.
145 void adjust_pci_device ( struct pci_device *pci ) {
146 unsigned short new_command, pci_command;
147 unsigned char pci_latency;
149 pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
150 new_command = ( pci_command | PCI_COMMAND_MASTER |
151 PCI_COMMAND_MEM | PCI_COMMAND_IO );
152 if ( pci_command != new_command ) {
153 DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
154 "PCI command %04x->%04x\n",
155 PCI_ARGS ( pci ), pci_command, new_command );
156 pci_write_config_word ( pci, PCI_COMMAND, new_command );
159 pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
160 if ( pci_latency < 32 ) {
161 DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
162 "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
163 pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
168 * Read PCI device configuration
171 * @ret rc Return status code
173 int pci_read_config ( struct pci_device *pci ) {
178 /* Ignore all but the first function on non-multifunction devices */
179 if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
180 busdevfn = pci->busdevfn;
181 pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
182 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
183 pci->busdevfn = busdevfn;
184 if ( ! ( hdrtype & 0x80 ) )
188 /* Check for physical device presence */
189 pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
190 if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
193 /* Populate struct pci_device */
194 pci->vendor = ( tmp & 0xffff );
195 pci->device = ( tmp >> 16 );
196 pci_read_config_dword ( pci, PCI_REVISION, &tmp );
197 pci->class = ( tmp >> 8 );
198 pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, &pci->irq );
199 pci_read_bases ( pci );
201 /* Initialise generic device component */
202 snprintf ( pci->dev.name, sizeof ( pci->dev.name ),
203 "PCI%02x:%02x.%x", PCI_BUS ( pci->busdevfn ),
204 PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
205 pci->dev.desc.bus_type = BUS_TYPE_PCI;
206 pci->dev.desc.location = pci->busdevfn;
207 pci->dev.desc.vendor = pci->vendor;
208 pci->dev.desc.device = pci->device;
209 pci->dev.desc.class = pci->class;
210 pci->dev.desc.ioaddr = pci->ioaddr;
211 pci->dev.desc.irq = pci->irq;
212 INIT_LIST_HEAD ( &pci->dev.siblings );
213 INIT_LIST_HEAD ( &pci->dev.children );
219 * Find next device on PCI bus
221 * @v pci PCI device to fill in
222 * @v busdevfn Starting bus:dev.fn address
223 * @ret busdevfn Bus:dev.fn address of next PCI device, or negative error
225 int pci_find_next ( struct pci_device *pci, unsigned int busdevfn ) {
226 static unsigned int end;
229 /* Determine number of PCI buses */
231 end = PCI_BUSDEVFN ( pci_num_bus(), 0, 0 );
233 /* Find next PCI device, if any */
234 for ( ; busdevfn < end ; busdevfn++ ) {
235 memset ( pci, 0, sizeof ( *pci ) );
236 pci_init ( pci, busdevfn );
237 if ( ( rc = pci_read_config ( pci ) ) == 0 )
245 * Find driver for PCI device
248 * @ret rc Return status code
250 int pci_find_driver ( struct pci_device *pci ) {
251 struct pci_driver *driver;
252 struct pci_device_id *id;
255 for_each_table_entry ( driver, PCI_DRIVERS ) {
256 for ( i = 0 ; i < driver->id_count ; i++ ) {
257 id = &driver->ids[i];
258 if ( ( id->vendor != PCI_ANY_ID ) &&
259 ( id->vendor != pci->vendor ) )
261 if ( ( id->device != PCI_ANY_ID ) &&
262 ( id->device != pci->device ) )
264 pci_set_driver ( pci, driver, id );
275 * @ret rc Return status code
277 * Searches for a driver for the PCI device. If a driver is found,
278 * its probe() routine is called.
280 int pci_probe ( struct pci_device *pci ) {
283 DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
284 PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
285 DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
286 PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
288 if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
289 DBGC ( pci, PCI_FMT " probe failed: %s\n",
290 PCI_ARGS ( pci ), strerror ( rc ) );
298 * Remove a PCI device
302 void pci_remove ( struct pci_device *pci ) {
303 pci->driver->remove ( pci );
304 DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
310 * @v rootdev PCI bus root device
312 * Scans the PCI bus for devices and registers all devices it can
315 static int pcibus_probe ( struct root_device *rootdev ) {
316 struct pci_device *pci = NULL;
320 for ( busdevfn = 0 ; 1 ; busdevfn++ ) {
322 /* Allocate struct pci_device */
324 pci = malloc ( sizeof ( *pci ) );
330 /* Find next PCI device, if any */
331 busdevfn = pci_find_next ( pci, busdevfn );
335 /* Look for a driver */
336 if ( ( rc = pci_find_driver ( pci ) ) != 0 ) {
337 DBGC ( pci, PCI_FMT " (%04x:%04x) has no driver\n",
338 PCI_ARGS ( pci ), pci->vendor, pci->device );
342 /* Add to device hierarchy */
343 pci->dev.parent = &rootdev->dev;
344 list_add ( &pci->dev.siblings, &rootdev->dev.children);
346 /* Look for a driver */
347 if ( ( rc = pci_probe ( pci ) ) == 0 ) {
348 /* pcidev registered, we can drop our ref */
351 /* Not registered; re-use struct pci_device */
352 list_del ( &pci->dev.siblings );
361 pcibus_remove ( rootdev );
366 * Remove PCI root bus
368 * @v rootdev PCI bus root device
370 static void pcibus_remove ( struct root_device *rootdev ) {
371 struct pci_device *pci;
372 struct pci_device *tmp;
374 list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
377 list_del ( &pci->dev.siblings );
382 /** PCI bus root device driver */
383 static struct root_driver pci_root_driver = {
384 .probe = pcibus_probe,
385 .remove = pcibus_remove,
388 /** PCI bus root device */
389 struct root_device pci_root_device __root_device = {
390 .dev = { .name = "PCI" },
391 .driver = &pci_root_driver,