1 /******************************************************************************
2 * Copyright (c) 2004, 2008 IBM Corporation
4 * This program and the accompanying materials
5 * are made available under the terms of the BSD License
6 * which accompanies this distribution, and is available at
7 * http://www.opensource.org/licenses/bsd-license.php
10 * IBM Corporation - initial implementation
11 *****************************************************************************/
22 #include "calculatecrc.h"
31 uint64_t exception_stack_frame;
33 typedef void (*pInterruptFunc_t) (void);
35 pInterruptFunc_t vectorTable[0x2E << 1];
37 extern void proceedInterrupt(void);
39 /* Prototypes for functions in this file: */
40 void c_interrupt(uint64_t vecNum);
41 void set_exceptionVector(int num, void *func);
42 int io_getchar(char *ch);
43 void early_c_entry(uint64_t start_addr);
47 exception_forward(void)
51 if (*(uint64_t *) XVECT_M_HANDLER) {
55 printf("\r\n exception %llx ", gVecNum);
56 asm volatile ("mfsrr0 %0":"=r" (val):);
57 printf("\r\nSRR0 = %08llx%08llx ", val >> 32, val);
58 asm volatile ("mfsrr1 %0":"=r" (val):);
59 printf(" SRR1 = %08llx%08llx ", val >> 32, val);
61 asm volatile ("mfsprg %0,2":"=r" (val):);
62 printf("\r\nSPRG2 = %08llx%08llx ", val >> 32, val);
63 asm volatile ("mfsprg %0,3":"=r" (val):);
64 printf(" SPRG3 = %08llx%08llx \r\n", val >> 32, val);
69 c_interrupt(uint64_t vecNum)
72 if (vectorTable[vecNum >> 7]) {
73 vectorTable[vecNum >> 7] ();
80 set_exceptionVector(int num, void *func)
82 vectorTable[num >> 7] = (pInterruptFunc_t) func;
88 // read ID register: only if it is a PC87427, enable serial2
89 store8_ci(0xf400002e, 0x20);
90 if (load8_ci(0xf400002f) != 0xf2) {
103 if ((load8_ci(uart + 5) & 0x01)) {
104 *ch = load8_ci(uart);
111 void copy_from_flash(uint64_t cnt, uint64_t src, uint64_t dest);
113 const uint32_t CrcTableHigh[16] = {
114 0x00000000, 0x4C11DB70, 0x9823B6E0, 0xD4326D90,
115 0x34867077, 0x7897AB07, 0xACA5C697, 0xE0B41DE7,
116 0x690CE0EE, 0x251D3B9E, 0xF12F560E, 0xBD3E8D7E,
117 0x5D8A9099, 0x119B4BE9, 0xC5A92679, 0x89B8FD09
119 const uint32_t CrcTableLow[16] = {
120 0x00000000, 0x04C11DB7, 0x09823B6E, 0x0D4326D9,
121 0x130476DC, 0x17C56B6B, 0x1A864DB2, 0x1E475005,
122 0x2608EDB8, 0x22C9F00F, 0x2F8AD6D6, 0x2B4BCB61,
123 0x350C9B64, 0x31CD86D3, 0x3C8EA00A, 0x384FBDBD
127 check_flash_image(unsigned long rombase, unsigned long length,
128 unsigned long start_crc)
131 uint32_t AccumCRC = start_crc;
134 while (length-- > 0) {
135 val = load8_ci(rombase++);
136 Temp = ((AccumCRC >> 24) ^ val) & 0x000000ff;
138 AccumCRC ^= CrcTableHigh[Temp / 16];
139 AccumCRC ^= CrcTableLow[Temp % 16];
146 load_file(uint64_t destAddr, char *name, uint64_t maxSize, uint64_t romfs_base)
148 uint64_t *src, *dest, cnt;
149 struct romfs_lookup_t fileInfo;
150 c_romfs_lookup(name, romfs_base, &fileInfo);
154 cnt = (fileInfo.size_data + 7) / 8;
156 dest = (uint64_t *) destAddr;
157 src = (uint64_t *) fileInfo.addr_data;
159 store64_ci((uint64_t) dest, *src);
163 flush_cache((void *) destAddr, fileInfo.size_data);
166 /***************************************************************************
167 * Function: early_c_entry
171 **************************************************************************/
173 early_c_entry(uint64_t start_addr)
175 struct romfs_lookup_t fileInfo;
177 void (*ofw_start) (uint64_t, uint64_t, uint64_t, uint64_t, uint64_t);
179 exception_stack_frame = 0;
180 /* destination for the flash image; we copy it to RAM
181 * because from flash it is much too slow
182 * the flash is copied at 224MB - 4MB (max flash size)
183 * at 224MB starts SLOF
184 * at 256MB is the SLOF load-base */
185 uint64_t romfs_base = 0xe000000 - 0x400000;
186 // romfs header values
187 struct stH *header = (struct stH *) (start_addr + 0x28);
188 //since we cannot read the fh_magic directly from flash as a string, we need to copy it to memory
189 uint64_t magic_val = 0;
190 uint64_t startVal = 0;
191 uint64_t flashlen = 0;
192 unsigned long ofw_addr;
196 flashlen = load64_ci((uint64_t) (&header->flashlen));
198 //copy fh_magic to magic_val since, we cannot use it as a string from flash
199 magic_val = load64_ci((uint64_t) (header->magic));
201 printf(" Check ROM = ");
202 if (strncmp((char *) &magic_val, FLASHFS_MAGIC, 8) == 0) {
203 // somehow, the first 8 bytes in flashfs are overwritten, if booting from drone...
204 // so if we find "IMG1" in the first 4 bytes, we skip the CRC check...
205 startVal = load64_ci((uint64_t) start_addr);
206 if (strncmp((char *) &startVal, "IMG1", 4) == 0) {
208 ("start from RAM detected, skipping CRC check!\r\n");
209 // for romfs accesses (c_romfs_lookup) to work, we must fix the first uint64_t to the value we expect...
210 store64_ci((uint64_t) start_addr, 0xd8);
212 //checking CRC in flash, we must use cache_inhibit
213 // since the crc is included as the last 32 bits in the image, the resulting crc should be 0
215 check_flash_image((uint64_t) start_addr,
217 (&header->flashlen)),
222 printf("failed!\r\n");
228 ("failed (magic string is \"%.8s\" should be \"%.8s\")\r\n",
229 (char *) &magic_val, FLASHFS_MAGIC);
233 printf(" Press \"s\" to enter Open Firmware.\r\n\r\n");
235 if ((start_addr > 0xF0000000) && u4Flag)
238 /* here we have real ram avail -> hopefully
239 * copy flash to ram; size is in 64 byte blocks */
244 copy_from_flash(flashlen, start_addr, romfs_base);
245 /* takeover sometimes fails if the image running on the system
246 * has a different size; flushing the cache helps, because it is
247 * the right thing to do anyway */
248 flush_cache((void *) romfs_base, flashlen * 64);
250 c_romfs_lookup("bootinfo", romfs_base, &fileInfo);
251 boot_info = (uint64_t *) fileInfo.addr_data;
252 boot_info[1] = start_addr;
253 load_file(0x100, "xvect", 0, romfs_base);
254 load_file(SLAVELOOP_LOADBASE, "stageS", 0, romfs_base);
255 c_romfs_lookup("ofw_main", romfs_base, &fileInfo);
257 elf_load_file((void *) fileInfo.addr_data, &ofw_addr,
260 (void (*)(uint64_t, uint64_t, uint64_t, uint64_t, uint64_t))
262 // re-enable the cursor
263 printf("%s%s", TERM_CTRL_RESET, TERM_CTRL_CRSON);
265 * r3 = R3 Effective address of the device tree image. Note: this
266 * address must be 8-byte aligned in memory.
267 * r4 = implementation dependent
269 * r6 = 0x65504150 -- ePAPR magic value-to distinguish from
270 * non-ePAPR-compliant firmware
271 * r7 = implementation dependent
273 asm volatile("isync; sync;" : : : "memory");
274 ofw_start(0, romfs_base, 0, 0, 0);