Add qemu 2.4.0
[kvmfornfv.git] / qemu / include / hw / bt.h
1 /*
2  * QEMU Bluetooth HCI helpers.
3  *
4  * Copyright (C) 2007 OpenMoko, Inc.
5  * Written by Andrzej Zaborowski <andrew@openedhand.com>
6  *
7  * Useful definitions taken from BlueZ project's headers.
8  * Copyright (C) 2000-2001  Qualcomm Incorporated
9  * Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
10  * Copyright (C) 2002-2006  Marcel Holtmann <marcel@holtmann.org>
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, see <http://www.gnu.org/licenses/>.
24  */
25
26 #ifndef HW_BT_H
27 #define HW_BT_H 1
28
29 #include "hw/irq.h"
30
31 /* BD Address */
32 typedef struct {
33     uint8_t b[6];
34 } QEMU_PACKED bdaddr_t;
35
36 #define BDADDR_ANY      (&(bdaddr_t) {{0, 0, 0, 0, 0, 0}})
37 #define BDADDR_ALL      (&(bdaddr_t) {{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}})
38 #define BDADDR_LOCAL    (&(bdaddr_t) {{0, 0, 0, 0xff, 0xff, 0xff}})
39
40 /* Copy, swap, convert BD Address */
41 static inline int bacmp(const bdaddr_t *ba1, const bdaddr_t *ba2)
42 {
43     return memcmp(ba1, ba2, sizeof(bdaddr_t));
44 }
45 static inline void bacpy(bdaddr_t *dst, const bdaddr_t *src)
46 {
47     memcpy(dst, src, sizeof(bdaddr_t));
48 }
49
50 #define BAINIT(orig)    { .b = {                \
51     (orig)->b[0], (orig)->b[1], (orig)->b[2],   \
52     (orig)->b[3], (orig)->b[4], (orig)->b[5],   \
53 }, }
54
55 /* The twisted structures of a bluetooth environment */
56 struct bt_device_s;
57 struct bt_scatternet_s;
58 struct bt_piconet_s;
59 struct bt_link_s;
60
61 struct bt_scatternet_s {
62     struct bt_device_s *slave;
63 };
64
65 struct bt_link_s {
66     struct bt_device_s *slave, *host;
67     uint16_t handle;            /* Master (host) side handle */
68     uint16_t acl_interval;
69     enum {
70         acl_active,
71         acl_hold,
72         acl_sniff,
73         acl_parked,
74     } acl_mode;
75 };
76
77 struct bt_device_s {
78     int lt_addr;
79     bdaddr_t bd_addr;
80     int mtu;
81     int setup;
82     struct bt_scatternet_s *net;
83
84     uint8_t key[16];
85     int key_present;
86     uint8_t class[3];
87
88     uint8_t reject_reason;
89
90     uint64_t lmp_caps;
91     const char *lmp_name;
92     void (*lmp_connection_request)(struct bt_link_s *link);
93     void (*lmp_connection_complete)(struct bt_link_s *link);
94     void (*lmp_disconnect_master)(struct bt_link_s *link);
95     void (*lmp_disconnect_slave)(struct bt_link_s *link);
96     void (*lmp_acl_data)(struct bt_link_s *link, const uint8_t *data,
97                     int start, int len);
98     void (*lmp_acl_resp)(struct bt_link_s *link, const uint8_t *data,
99                     int start, int len);
100     void (*lmp_mode_change)(struct bt_link_s *link);
101
102     void (*handle_destroy)(struct bt_device_s *device);
103     struct bt_device_s *next;   /* Next in the piconet/scatternet */
104
105     int inquiry_scan;
106     int page_scan;
107
108     uint16_t clkoff;    /* Note: Always little-endian */
109 };
110
111 extern struct HCIInfo null_hci;
112 /* bt.c */
113 void bt_device_init(struct bt_device_s *dev, struct bt_scatternet_s *net);
114 void bt_device_done(struct bt_device_s *dev);
115 struct bt_scatternet_s *qemu_find_bt_vlan(int id);
116
117 /* bt-hci.c */
118 struct HCIInfo *bt_new_hci(struct bt_scatternet_s *net);
119 struct HCIInfo *hci_init(const char *str);
120
121 /* bt-vhci.c */
122 void bt_vhci_init(struct HCIInfo *info);
123
124 /* bt-hci-csr.c */
125 enum {
126     csrhci_pin_reset,
127     csrhci_pin_wakeup,
128     __csrhci_pins,
129 };
130 qemu_irq *csrhci_pins_get(CharDriverState *chr);
131 CharDriverState *uart_hci_init(qemu_irq wakeup);
132
133 /* bt-l2cap.c */
134 struct bt_l2cap_device_s;
135 struct bt_l2cap_conn_params_s;
136 struct bt_l2cap_psm_s;
137 void bt_l2cap_device_init(struct bt_l2cap_device_s *dev,
138                 struct bt_scatternet_s *net);
139 void bt_l2cap_device_done(struct bt_l2cap_device_s *dev);
140 void bt_l2cap_psm_register(struct bt_l2cap_device_s *dev, int psm,
141                 int min_mtu, int (*new_channel)(struct bt_l2cap_device_s *dev,
142                         struct bt_l2cap_conn_params_s *params));
143
144 struct bt_l2cap_device_s {
145     struct bt_device_s device;
146     struct bt_l2cap_psm_s *first_psm;
147 };
148
149 struct bt_l2cap_conn_params_s {
150     /* Input */
151     uint8_t *(*sdu_out)(struct bt_l2cap_conn_params_s *chan, int len);
152     void (*sdu_submit)(struct bt_l2cap_conn_params_s *chan);
153     int remote_mtu;
154     /* Output */
155     void *opaque;
156     void (*sdu_in)(void *opaque, const uint8_t *data, int len);
157     void (*close)(void *opaque);
158 };
159
160 enum bt_l2cap_psm_predef {
161     BT_PSM_SDP          = 0x0001,
162     BT_PSM_RFCOMM       = 0x0003,
163     BT_PSM_TELEPHONY    = 0x0005,
164     BT_PSM_TCS          = 0x0007,
165     BT_PSM_BNEP         = 0x000f,
166     BT_PSM_HID_CTRL     = 0x0011,
167     BT_PSM_HID_INTR     = 0x0013,
168     BT_PSM_UPNP         = 0x0015,
169     BT_PSM_AVCTP        = 0x0017,
170     BT_PSM_AVDTP        = 0x0019,
171 };
172
173 /* bt-sdp.c */
174 void bt_l2cap_sdp_init(struct bt_l2cap_device_s *dev);
175
176 /* bt-hid.c */
177 struct bt_device_s *bt_mouse_init(struct bt_scatternet_s *net);
178 struct bt_device_s *bt_tablet_init(struct bt_scatternet_s *net);
179 struct bt_device_s *bt_keyboard_init(struct bt_scatternet_s *net);
180
181 /* Link Management Protocol layer defines */
182
183 #define LLID_ACLU_CONT          0x1
184 #define LLID_ACLU_START         0x2
185 #define LLID_ACLC               0x3
186
187 enum lmp_pdu_type {
188     LMP_NAME_REQ                = 0x0001,
189     LMP_NAME_RES                = 0x0002,
190     LMP_ACCEPTED                = 0x0003,
191     LMP_NOT_ACCEPTED            = 0x0004,
192     LMP_CLKOFFSET_REQ           = 0x0005,
193     LMP_CLKOFFSET_RES           = 0x0006,
194     LMP_DETACH                  = 0x0007,
195     LMP_IN_RAND                 = 0x0008,
196     LMP_COMB_KEY                = 0x0009,
197     LMP_UNIT_KEY                = 0x000a,
198     LMP_AU_RAND                 = 0x000b,
199     LMP_SRES                    = 0x000c,
200     LMP_TEMP_RAND               = 0x000d,
201     LMP_TEMP_KEY                = 0x000e,
202     LMP_CRYPT_MODE_REQ          = 0x000f,
203     LMP_CRYPT_KEY_SIZE_REQ      = 0x0010,
204     LMP_START_ENCRYPT_REQ       = 0x0011,
205     LMP_STOP_ENCRYPT_REQ        = 0x0012,
206     LMP_SWITCH_REQ              = 0x0013,
207     LMP_HOLD                    = 0x0014,
208     LMP_HOLD_REQ                = 0x0015,
209     LMP_SNIFF_REQ               = 0x0017,
210     LMP_UNSNIFF_REQ             = 0x0018,
211     LMP_LMP_PARK_REQ            = 0x0019,
212     LMP_SET_BCAST_SCAN_WND      = 0x001b,
213     LMP_MODIFY_BEACON           = 0x001c,
214     LMP_UNPARK_BD_ADDR_REQ      = 0x001d,
215     LMP_UNPARK_PM_ADDR_REQ      = 0x001e,
216     LMP_INCR_POWER_REQ          = 0x001f,
217     LMP_DECR_POWER_REQ          = 0x0020,
218     LMP_MAX_POWER               = 0x0021,
219     LMP_MIN_POWER               = 0x0022,
220     LMP_AUTO_RATE               = 0x0023,
221     LMP_PREFERRED_RATE          = 0x0024,
222     LMP_VERSION_REQ             = 0x0025,
223     LMP_VERSION_RES             = 0x0026,
224     LMP_FEATURES_REQ            = 0x0027,
225     LMP_FEATURES_RES            = 0x0028,
226     LMP_QUALITY_OF_SERVICE      = 0x0029,
227     LMP_QOS_REQ                 = 0x002a,
228     LMP_RM_SCO_LINK_REQ         = 0x002b,
229     LMP_SCO_LINK_REQ            = 0x002c,
230     LMP_MAX_SLOT                = 0x002d,
231     LMP_MAX_SLOT_REQ            = 0x002e,
232     LMP_TIMING_ACCURACY_REQ     = 0x002f,
233     LMP_TIMING_ACCURACY_RES     = 0x0030,
234     LMP_SETUP_COMPLETE          = 0x0031,
235     LMP_USE_SEMIPERM_KEY        = 0x0032,
236     LMP_HOST_CONNECTION_REQ     = 0x0033,
237     LMP_SLOT_OFFSET             = 0x0034,
238     LMP_PAGE_MODE_REQ           = 0x0035,
239     LMP_PAGE_SCAN_MODE_REQ      = 0x0036,
240     LMP_SUPERVISION_TIMEOUT     = 0x0037,
241     LMP_TEST_ACTIVATE           = 0x0038,
242     LMP_TEST_CONTROL            = 0x0039,
243     LMP_CRYPT_KEY_MASK_REQ      = 0x003a,
244     LMP_CRYPT_KEY_MASK_RES      = 0x003b,
245     LMP_SET_AFH                 = 0x003c,
246     LMP_ACCEPTED_EXT            = 0x7f01,
247     LMP_NOT_ACCEPTED_EXT        = 0x7f02,
248     LMP_FEATURES_REQ_EXT        = 0x7f03,
249     LMP_FEATURES_RES_EXT        = 0x7f04,
250     LMP_PACKET_TYPE_TBL_REQ     = 0x7f0b,
251     LMP_ESCO_LINK_REQ           = 0x7f0c,
252     LMP_RM_ESCO_LINK_REQ        = 0x7f0d,
253     LMP_CHANNEL_CLASS_REQ       = 0x7f10,
254     LMP_CHANNEL_CLASS           = 0x7f11,
255 };
256
257 /* Host Controller Interface layer defines */
258
259 enum hci_packet_type {
260     HCI_COMMAND_PKT             = 0x01,
261     HCI_ACLDATA_PKT             = 0x02,
262     HCI_SCODATA_PKT             = 0x03,
263     HCI_EVENT_PKT               = 0x04,
264     HCI_VENDOR_PKT              = 0xff,
265 };
266
267 enum bt_packet_type {
268     HCI_2DH1    = 1 << 1,
269     HCI_3DH1    = 1 << 2,
270     HCI_DM1     = 1 << 3,
271     HCI_DH1     = 1 << 4,
272     HCI_2DH3    = 1 << 8,
273     HCI_3DH3    = 1 << 9,
274     HCI_DM3     = 1 << 10,
275     HCI_DH3     = 1 << 11,
276     HCI_2DH5    = 1 << 12,
277     HCI_3DH5    = 1 << 13,
278     HCI_DM5     = 1 << 14,
279     HCI_DH5     = 1 << 15,
280 };
281
282 enum sco_packet_type {
283     HCI_HV1     = 1 << 5,
284     HCI_HV2     = 1 << 6,
285     HCI_HV3     = 1 << 7,
286 };
287
288 enum ev_packet_type {
289     HCI_EV3     = 1 << 3,
290     HCI_EV4     = 1 << 4,
291     HCI_EV5     = 1 << 5,
292     HCI_2EV3    = 1 << 6,
293     HCI_3EV3    = 1 << 7,
294     HCI_2EV5    = 1 << 8,
295     HCI_3EV5    = 1 << 9,
296 };
297
298 enum hci_error_code {
299     HCI_SUCCESS                         = 0x00,
300     HCI_UNKNOWN_COMMAND                 = 0x01,
301     HCI_NO_CONNECTION                   = 0x02,
302     HCI_HARDWARE_FAILURE                = 0x03,
303     HCI_PAGE_TIMEOUT                    = 0x04,
304     HCI_AUTHENTICATION_FAILURE          = 0x05,
305     HCI_PIN_OR_KEY_MISSING              = 0x06,
306     HCI_MEMORY_FULL                     = 0x07,
307     HCI_CONNECTION_TIMEOUT              = 0x08,
308     HCI_MAX_NUMBER_OF_CONNECTIONS       = 0x09,
309     HCI_MAX_NUMBER_OF_SCO_CONNECTIONS   = 0x0a,
310     HCI_ACL_CONNECTION_EXISTS           = 0x0b,
311     HCI_COMMAND_DISALLOWED              = 0x0c,
312     HCI_REJECTED_LIMITED_RESOURCES      = 0x0d,
313     HCI_REJECTED_SECURITY               = 0x0e,
314     HCI_REJECTED_PERSONAL               = 0x0f,
315     HCI_HOST_TIMEOUT                    = 0x10,
316     HCI_UNSUPPORTED_FEATURE             = 0x11,
317     HCI_INVALID_PARAMETERS              = 0x12,
318     HCI_OE_USER_ENDED_CONNECTION        = 0x13,
319     HCI_OE_LOW_RESOURCES                = 0x14,
320     HCI_OE_POWER_OFF                    = 0x15,
321     HCI_CONNECTION_TERMINATED           = 0x16,
322     HCI_REPEATED_ATTEMPTS               = 0x17,
323     HCI_PAIRING_NOT_ALLOWED             = 0x18,
324     HCI_UNKNOWN_LMP_PDU                 = 0x19,
325     HCI_UNSUPPORTED_REMOTE_FEATURE      = 0x1a,
326     HCI_SCO_OFFSET_REJECTED             = 0x1b,
327     HCI_SCO_INTERVAL_REJECTED           = 0x1c,
328     HCI_AIR_MODE_REJECTED               = 0x1d,
329     HCI_INVALID_LMP_PARAMETERS          = 0x1e,
330     HCI_UNSPECIFIED_ERROR               = 0x1f,
331     HCI_UNSUPPORTED_LMP_PARAMETER_VALUE = 0x20,
332     HCI_ROLE_CHANGE_NOT_ALLOWED         = 0x21,
333     HCI_LMP_RESPONSE_TIMEOUT            = 0x22,
334     HCI_LMP_ERROR_TRANSACTION_COLLISION = 0x23,
335     HCI_LMP_PDU_NOT_ALLOWED             = 0x24,
336     HCI_ENCRYPTION_MODE_NOT_ACCEPTED    = 0x25,
337     HCI_UNIT_LINK_KEY_USED              = 0x26,
338     HCI_QOS_NOT_SUPPORTED               = 0x27,
339     HCI_INSTANT_PASSED                  = 0x28,
340     HCI_PAIRING_NOT_SUPPORTED           = 0x29,
341     HCI_TRANSACTION_COLLISION           = 0x2a,
342     HCI_QOS_UNACCEPTABLE_PARAMETER      = 0x2c,
343     HCI_QOS_REJECTED                    = 0x2d,
344     HCI_CLASSIFICATION_NOT_SUPPORTED    = 0x2e,
345     HCI_INSUFFICIENT_SECURITY           = 0x2f,
346     HCI_PARAMETER_OUT_OF_RANGE          = 0x30,
347     HCI_ROLE_SWITCH_PENDING             = 0x32,
348     HCI_SLOT_VIOLATION                  = 0x34,
349     HCI_ROLE_SWITCH_FAILED              = 0x35,
350 };
351
352 enum acl_flag_bits {
353     ACL_CONT            = 1 << 0,
354     ACL_START           = 1 << 1,
355     ACL_ACTIVE_BCAST    = 1 << 2,
356     ACL_PICO_BCAST      = 1 << 3,
357 };
358
359 enum baseband_link_type {
360     SCO_LINK            = 0x00,
361     ACL_LINK            = 0x01,
362 };
363
364 enum lmp_feature_bits0 {
365     LMP_3SLOT           = 1 << 0,
366     LMP_5SLOT           = 1 << 1,
367     LMP_ENCRYPT         = 1 << 2,
368     LMP_SOFFSET         = 1 << 3,
369     LMP_TACCURACY       = 1 << 4,
370     LMP_RSWITCH         = 1 << 5,
371     LMP_HOLD_MODE       = 1 << 6,
372     LMP_SNIFF_MODE      = 1 << 7,
373 };
374
375 enum lmp_feature_bits1 {
376     LMP_PARK            = 1 << 0,
377     LMP_RSSI            = 1 << 1,
378     LMP_QUALITY         = 1 << 2,
379     LMP_SCO             = 1 << 3,
380     LMP_HV2             = 1 << 4,
381     LMP_HV3             = 1 << 5,
382     LMP_ULAW            = 1 << 6,
383     LMP_ALAW            = 1 << 7,
384 };
385
386 enum lmp_feature_bits2 {
387     LMP_CVSD            = 1 << 0,
388     LMP_PSCHEME         = 1 << 1,
389     LMP_PCONTROL        = 1 << 2,
390     LMP_TRSP_SCO        = 1 << 3,
391     LMP_BCAST_ENC       = 1 << 7,
392 };
393
394 enum lmp_feature_bits3 {
395     LMP_EDR_ACL_2M      = 1 << 1,
396     LMP_EDR_ACL_3M      = 1 << 2,
397     LMP_ENH_ISCAN       = 1 << 3,
398     LMP_ILACE_ISCAN     = 1 << 4,
399     LMP_ILACE_PSCAN     = 1 << 5,
400     LMP_RSSI_INQ        = 1 << 6,
401     LMP_ESCO            = 1 << 7,
402 };
403
404 enum lmp_feature_bits4 {
405     LMP_EV4             = 1 << 0,
406     LMP_EV5             = 1 << 1,
407     LMP_AFH_CAP_SLV     = 1 << 3,
408     LMP_AFH_CLS_SLV     = 1 << 4,
409     LMP_EDR_3SLOT       = 1 << 7,
410 };
411
412 enum lmp_feature_bits5 {
413     LMP_EDR_5SLOT       = 1 << 0,
414     LMP_SNIFF_SUBR      = 1 << 1,
415     LMP_AFH_CAP_MST     = 1 << 3,
416     LMP_AFH_CLS_MST     = 1 << 4,
417     LMP_EDR_ESCO_2M     = 1 << 5,
418     LMP_EDR_ESCO_3M     = 1 << 6,
419     LMP_EDR_3S_ESCO     = 1 << 7,
420 };
421
422 enum lmp_feature_bits6 {
423     LMP_EXT_INQ         = 1 << 0,
424 };
425
426 enum lmp_feature_bits7 {
427     LMP_EXT_FEAT        = 1 << 7,
428 };
429
430 enum hci_link_policy {
431     HCI_LP_RSWITCH      = 1 << 0,
432     HCI_LP_HOLD         = 1 << 1,
433     HCI_LP_SNIFF        = 1 << 2,
434     HCI_LP_PARK         = 1 << 3,
435 };
436
437 enum hci_link_mode {
438     HCI_LM_ACCEPT       = 1 << 15,
439     HCI_LM_MASTER       = 1 << 0,
440     HCI_LM_AUTH         = 1 << 1,
441     HCI_LM_ENCRYPT      = 1 << 2,
442     HCI_LM_TRUSTED      = 1 << 3,
443     HCI_LM_RELIABLE     = 1 << 4,
444     HCI_LM_SECURE       = 1 << 5,
445 };
446
447 /* HCI Commands */
448
449 /* Link Control */
450 #define OGF_LINK_CTL            0x01
451
452 #define OCF_INQUIRY                     0x0001
453 typedef struct {
454     uint8_t     lap[3];
455     uint8_t     length;         /* 1.28s units */
456     uint8_t     num_rsp;
457 } QEMU_PACKED inquiry_cp;
458 #define INQUIRY_CP_SIZE 5
459
460 typedef struct {
461     uint8_t             status;
462     bdaddr_t    bdaddr;
463 } QEMU_PACKED status_bdaddr_rp;
464 #define STATUS_BDADDR_RP_SIZE 7
465
466 #define OCF_INQUIRY_CANCEL              0x0002
467
468 #define OCF_PERIODIC_INQUIRY            0x0003
469 typedef struct {
470     uint16_t    max_period;     /* 1.28s units */
471     uint16_t    min_period;     /* 1.28s units */
472     uint8_t     lap[3];
473     uint8_t     length;         /* 1.28s units */
474     uint8_t     num_rsp;
475 } QEMU_PACKED periodic_inquiry_cp;
476 #define PERIODIC_INQUIRY_CP_SIZE 9
477
478 #define OCF_EXIT_PERIODIC_INQUIRY       0x0004
479
480 #define OCF_CREATE_CONN                 0x0005
481 typedef struct {
482     bdaddr_t    bdaddr;
483     uint16_t    pkt_type;
484     uint8_t     pscan_rep_mode;
485     uint8_t     pscan_mode;
486     uint16_t    clock_offset;
487     uint8_t     role_switch;
488 } QEMU_PACKED create_conn_cp;
489 #define CREATE_CONN_CP_SIZE 13
490
491 #define OCF_DISCONNECT                  0x0006
492 typedef struct {
493     uint16_t    handle;
494     uint8_t     reason;
495 } QEMU_PACKED disconnect_cp;
496 #define DISCONNECT_CP_SIZE 3
497
498 #define OCF_ADD_SCO                     0x0007
499 typedef struct {
500     uint16_t    handle;
501     uint16_t    pkt_type;
502 } QEMU_PACKED add_sco_cp;
503 #define ADD_SCO_CP_SIZE 4
504
505 #define OCF_CREATE_CONN_CANCEL          0x0008
506 typedef struct {
507     uint8_t     status;
508     bdaddr_t    bdaddr;
509 } QEMU_PACKED create_conn_cancel_cp;
510 #define CREATE_CONN_CANCEL_CP_SIZE 6
511
512 typedef struct {
513     uint8_t     status;
514     bdaddr_t    bdaddr;
515 } QEMU_PACKED create_conn_cancel_rp;
516 #define CREATE_CONN_CANCEL_RP_SIZE 7
517
518 #define OCF_ACCEPT_CONN_REQ             0x0009
519 typedef struct {
520     bdaddr_t    bdaddr;
521     uint8_t     role;
522 } QEMU_PACKED accept_conn_req_cp;
523 #define ACCEPT_CONN_REQ_CP_SIZE 7
524
525 #define OCF_REJECT_CONN_REQ             0x000A
526 typedef struct {
527     bdaddr_t    bdaddr;
528     uint8_t     reason;
529 } QEMU_PACKED reject_conn_req_cp;
530 #define REJECT_CONN_REQ_CP_SIZE 7
531
532 #define OCF_LINK_KEY_REPLY              0x000B
533 typedef struct {
534     bdaddr_t    bdaddr;
535     uint8_t     link_key[16];
536 } QEMU_PACKED link_key_reply_cp;
537 #define LINK_KEY_REPLY_CP_SIZE 22
538
539 #define OCF_LINK_KEY_NEG_REPLY          0x000C
540
541 #define OCF_PIN_CODE_REPLY              0x000D
542 typedef struct {
543     bdaddr_t    bdaddr;
544     uint8_t     pin_len;
545     uint8_t     pin_code[16];
546 } QEMU_PACKED pin_code_reply_cp;
547 #define PIN_CODE_REPLY_CP_SIZE 23
548
549 #define OCF_PIN_CODE_NEG_REPLY          0x000E
550
551 #define OCF_SET_CONN_PTYPE              0x000F
552 typedef struct {
553     uint16_t     handle;
554     uint16_t     pkt_type;
555 } QEMU_PACKED set_conn_ptype_cp;
556 #define SET_CONN_PTYPE_CP_SIZE 4
557
558 #define OCF_AUTH_REQUESTED              0x0011
559 typedef struct {
560     uint16_t     handle;
561 } QEMU_PACKED auth_requested_cp;
562 #define AUTH_REQUESTED_CP_SIZE 2
563
564 #define OCF_SET_CONN_ENCRYPT            0x0013
565 typedef struct {
566     uint16_t    handle;
567     uint8_t     encrypt;
568 } QEMU_PACKED set_conn_encrypt_cp;
569 #define SET_CONN_ENCRYPT_CP_SIZE 3
570
571 #define OCF_CHANGE_CONN_LINK_KEY        0x0015
572 typedef struct {
573     uint16_t    handle;
574 } QEMU_PACKED change_conn_link_key_cp;
575 #define CHANGE_CONN_LINK_KEY_CP_SIZE 2
576
577 #define OCF_MASTER_LINK_KEY             0x0017
578 typedef struct {
579     uint8_t     key_flag;
580 } QEMU_PACKED master_link_key_cp;
581 #define MASTER_LINK_KEY_CP_SIZE 1
582
583 #define OCF_REMOTE_NAME_REQ             0x0019
584 typedef struct {
585     bdaddr_t    bdaddr;
586     uint8_t     pscan_rep_mode;
587     uint8_t     pscan_mode;
588     uint16_t    clock_offset;
589 } QEMU_PACKED remote_name_req_cp;
590 #define REMOTE_NAME_REQ_CP_SIZE 10
591
592 #define OCF_REMOTE_NAME_REQ_CANCEL      0x001A
593 typedef struct {
594     bdaddr_t    bdaddr;
595 } QEMU_PACKED remote_name_req_cancel_cp;
596 #define REMOTE_NAME_REQ_CANCEL_CP_SIZE 6
597
598 typedef struct {
599     uint8_t             status;
600     bdaddr_t    bdaddr;
601 } QEMU_PACKED remote_name_req_cancel_rp;
602 #define REMOTE_NAME_REQ_CANCEL_RP_SIZE 7
603
604 #define OCF_READ_REMOTE_FEATURES        0x001B
605 typedef struct {
606     uint16_t    handle;
607 } QEMU_PACKED read_remote_features_cp;
608 #define READ_REMOTE_FEATURES_CP_SIZE 2
609
610 #define OCF_READ_REMOTE_EXT_FEATURES    0x001C
611 typedef struct {
612     uint16_t    handle;
613     uint8_t     page_num;
614 } QEMU_PACKED read_remote_ext_features_cp;
615 #define READ_REMOTE_EXT_FEATURES_CP_SIZE 3
616
617 #define OCF_READ_REMOTE_VERSION         0x001D
618 typedef struct {
619     uint16_t    handle;
620 } QEMU_PACKED read_remote_version_cp;
621 #define READ_REMOTE_VERSION_CP_SIZE 2
622
623 #define OCF_READ_CLOCK_OFFSET           0x001F
624 typedef struct {
625     uint16_t    handle;
626 } QEMU_PACKED read_clock_offset_cp;
627 #define READ_CLOCK_OFFSET_CP_SIZE 2
628
629 #define OCF_READ_LMP_HANDLE             0x0020
630 typedef struct {
631     uint16_t    handle;
632 } QEMU_PACKED read_lmp_handle_cp;
633 #define READ_LMP_HANDLE_CP_SIZE 2
634
635 typedef struct {
636     uint8_t     status;
637     uint16_t    handle;
638     uint8_t     lmp_handle;
639     uint32_t    reserved;
640 } QEMU_PACKED read_lmp_handle_rp;
641 #define READ_LMP_HANDLE_RP_SIZE 8
642
643 #define OCF_SETUP_SYNC_CONN             0x0028
644 typedef struct {
645     uint16_t    handle;
646     uint32_t    tx_bandwidth;
647     uint32_t    rx_bandwidth;
648     uint16_t    max_latency;
649     uint16_t    voice_setting;
650     uint8_t     retrans_effort;
651     uint16_t    pkt_type;
652 } QEMU_PACKED setup_sync_conn_cp;
653 #define SETUP_SYNC_CONN_CP_SIZE 17
654
655 #define OCF_ACCEPT_SYNC_CONN_REQ        0x0029
656 typedef struct {
657     bdaddr_t    bdaddr;
658     uint32_t    tx_bandwidth;
659     uint32_t    rx_bandwidth;
660     uint16_t    max_latency;
661     uint16_t    voice_setting;
662     uint8_t     retrans_effort;
663     uint16_t    pkt_type;
664 } QEMU_PACKED accept_sync_conn_req_cp;
665 #define ACCEPT_SYNC_CONN_REQ_CP_SIZE 21
666
667 #define OCF_REJECT_SYNC_CONN_REQ        0x002A
668 typedef struct {
669     bdaddr_t    bdaddr;
670     uint8_t     reason;
671 } QEMU_PACKED reject_sync_conn_req_cp;
672 #define REJECT_SYNC_CONN_REQ_CP_SIZE 7
673
674 /* Link Policy */
675 #define OGF_LINK_POLICY         0x02
676
677 #define OCF_HOLD_MODE                   0x0001
678 typedef struct {
679     uint16_t    handle;
680     uint16_t    max_interval;
681     uint16_t    min_interval;
682 } QEMU_PACKED hold_mode_cp;
683 #define HOLD_MODE_CP_SIZE 6
684
685 #define OCF_SNIFF_MODE                  0x0003
686 typedef struct {
687     uint16_t    handle;
688     uint16_t    max_interval;
689     uint16_t    min_interval;
690     uint16_t    attempt;
691     uint16_t    timeout;
692 } QEMU_PACKED sniff_mode_cp;
693 #define SNIFF_MODE_CP_SIZE 10
694
695 #define OCF_EXIT_SNIFF_MODE             0x0004
696 typedef struct {
697     uint16_t    handle;
698 } QEMU_PACKED exit_sniff_mode_cp;
699 #define EXIT_SNIFF_MODE_CP_SIZE 2
700
701 #define OCF_PARK_MODE                   0x0005
702 typedef struct {
703     uint16_t    handle;
704     uint16_t    max_interval;
705     uint16_t    min_interval;
706 } QEMU_PACKED park_mode_cp;
707 #define PARK_MODE_CP_SIZE 6
708
709 #define OCF_EXIT_PARK_MODE              0x0006
710 typedef struct {
711     uint16_t    handle;
712 } QEMU_PACKED exit_park_mode_cp;
713 #define EXIT_PARK_MODE_CP_SIZE 2
714
715 #define OCF_QOS_SETUP                   0x0007
716 typedef struct {
717     uint8_t     service_type;           /* 1 = best effort */
718     uint32_t    token_rate;             /* Byte per seconds */
719     uint32_t    peak_bandwidth;         /* Byte per seconds */
720     uint32_t    latency;                /* Microseconds */
721     uint32_t    delay_variation;        /* Microseconds */
722 } QEMU_PACKED hci_qos;
723 #define HCI_QOS_CP_SIZE 17
724 typedef struct {
725     uint16_t    handle;
726     uint8_t     flags;                  /* Reserved */
727     hci_qos     qos;
728 } QEMU_PACKED qos_setup_cp;
729 #define QOS_SETUP_CP_SIZE (3 + HCI_QOS_CP_SIZE)
730
731 #define OCF_ROLE_DISCOVERY              0x0009
732 typedef struct {
733     uint16_t    handle;
734 } QEMU_PACKED role_discovery_cp;
735 #define ROLE_DISCOVERY_CP_SIZE 2
736 typedef struct {
737     uint8_t     status;
738     uint16_t    handle;
739     uint8_t     role;
740 } QEMU_PACKED role_discovery_rp;
741 #define ROLE_DISCOVERY_RP_SIZE 4
742
743 #define OCF_SWITCH_ROLE                 0x000B
744 typedef struct {
745     bdaddr_t    bdaddr;
746     uint8_t     role;
747 } QEMU_PACKED switch_role_cp;
748 #define SWITCH_ROLE_CP_SIZE 7
749
750 #define OCF_READ_LINK_POLICY            0x000C
751 typedef struct {
752     uint16_t    handle;
753 } QEMU_PACKED read_link_policy_cp;
754 #define READ_LINK_POLICY_CP_SIZE 2
755 typedef struct {
756     uint8_t     status;
757     uint16_t    handle;
758     uint16_t    policy;
759 } QEMU_PACKED read_link_policy_rp;
760 #define READ_LINK_POLICY_RP_SIZE 5
761
762 #define OCF_WRITE_LINK_POLICY           0x000D
763 typedef struct {
764     uint16_t    handle;
765     uint16_t    policy;
766 } QEMU_PACKED write_link_policy_cp;
767 #define WRITE_LINK_POLICY_CP_SIZE 4
768 typedef struct {
769     uint8_t     status;
770     uint16_t    handle;
771 } QEMU_PACKED write_link_policy_rp;
772 #define WRITE_LINK_POLICY_RP_SIZE 3
773
774 #define OCF_READ_DEFAULT_LINK_POLICY    0x000E
775
776 #define OCF_WRITE_DEFAULT_LINK_POLICY   0x000F
777
778 #define OCF_FLOW_SPECIFICATION          0x0010
779
780 #define OCF_SNIFF_SUBRATE               0x0011
781 typedef struct {
782     uint16_t    handle;
783     uint16_t    max_remote_latency;
784     uint16_t    max_local_latency;
785     uint16_t    min_remote_timeout;
786     uint16_t    min_local_timeout;
787 } QEMU_PACKED sniff_subrate_cp;
788 #define SNIFF_SUBRATE_CP_SIZE 10
789
790 /* Host Controller and Baseband */
791 #define OGF_HOST_CTL            0x03
792
793 #define OCF_SET_EVENT_MASK              0x0001
794 typedef struct {
795     uint8_t     mask[8];
796 } QEMU_PACKED set_event_mask_cp;
797 #define SET_EVENT_MASK_CP_SIZE 8
798
799 #define OCF_RESET                       0x0003
800
801 #define OCF_SET_EVENT_FLT               0x0005
802 typedef struct {
803     uint8_t     flt_type;
804     uint8_t     cond_type;
805     uint8_t     condition[0];
806 } QEMU_PACKED set_event_flt_cp;
807 #define SET_EVENT_FLT_CP_SIZE 2
808
809 enum bt_filter_type {
810     FLT_CLEAR_ALL               = 0x00,
811     FLT_INQ_RESULT              = 0x01,
812     FLT_CONN_SETUP              = 0x02,
813 };
814 enum inq_result_cond_type {
815     INQ_RESULT_RETURN_ALL       = 0x00,
816     INQ_RESULT_RETURN_CLASS     = 0x01,
817     INQ_RESULT_RETURN_BDADDR    = 0x02,
818 };
819 enum conn_setup_cond_type {
820     CONN_SETUP_ALLOW_ALL        = 0x00,
821     CONN_SETUP_ALLOW_CLASS      = 0x01,
822     CONN_SETUP_ALLOW_BDADDR     = 0x02,
823 };
824 enum conn_setup_cond {
825     CONN_SETUP_AUTO_OFF         = 0x01,
826     CONN_SETUP_AUTO_ON          = 0x02,
827 };
828
829 #define OCF_FLUSH                       0x0008
830 typedef struct {
831     uint16_t    handle;
832 } QEMU_PACKED flush_cp;
833 #define FLUSH_CP_SIZE 2
834
835 typedef struct {
836     uint8_t     status;
837     uint16_t    handle;
838 } QEMU_PACKED flush_rp;
839 #define FLUSH_RP_SIZE 3
840
841 #define OCF_READ_PIN_TYPE               0x0009
842 typedef struct {
843     uint8_t     status;
844     uint8_t     pin_type;
845 } QEMU_PACKED read_pin_type_rp;
846 #define READ_PIN_TYPE_RP_SIZE 2
847
848 #define OCF_WRITE_PIN_TYPE              0x000A
849 typedef struct {
850     uint8_t     pin_type;
851 } QEMU_PACKED write_pin_type_cp;
852 #define WRITE_PIN_TYPE_CP_SIZE 1
853
854 #define OCF_CREATE_NEW_UNIT_KEY         0x000B
855
856 #define OCF_READ_STORED_LINK_KEY        0x000D
857 typedef struct {
858     bdaddr_t    bdaddr;
859     uint8_t     read_all;
860 } QEMU_PACKED read_stored_link_key_cp;
861 #define READ_STORED_LINK_KEY_CP_SIZE 7
862 typedef struct {
863     uint8_t     status;
864     uint16_t    max_keys;
865     uint16_t    num_keys;
866 } QEMU_PACKED read_stored_link_key_rp;
867 #define READ_STORED_LINK_KEY_RP_SIZE 5
868
869 #define OCF_WRITE_STORED_LINK_KEY       0x0011
870 typedef struct {
871     uint8_t     num_keys;
872     /* variable length part */
873 } QEMU_PACKED write_stored_link_key_cp;
874 #define WRITE_STORED_LINK_KEY_CP_SIZE 1
875 typedef struct {
876     uint8_t     status;
877     uint8_t     num_keys;
878 } QEMU_PACKED write_stored_link_key_rp;
879 #define READ_WRITE_LINK_KEY_RP_SIZE 2
880
881 #define OCF_DELETE_STORED_LINK_KEY      0x0012
882 typedef struct {
883     bdaddr_t    bdaddr;
884     uint8_t     delete_all;
885 } QEMU_PACKED delete_stored_link_key_cp;
886 #define DELETE_STORED_LINK_KEY_CP_SIZE 7
887 typedef struct {
888     uint8_t     status;
889     uint16_t    num_keys;
890 } QEMU_PACKED delete_stored_link_key_rp;
891 #define DELETE_STORED_LINK_KEY_RP_SIZE 3
892
893 #define OCF_CHANGE_LOCAL_NAME           0x0013
894 typedef struct {
895     char        name[248];
896 } QEMU_PACKED change_local_name_cp;
897 #define CHANGE_LOCAL_NAME_CP_SIZE 248 
898
899 #define OCF_READ_LOCAL_NAME             0x0014
900 typedef struct {
901     uint8_t     status;
902     char        name[248];
903 } QEMU_PACKED read_local_name_rp;
904 #define READ_LOCAL_NAME_RP_SIZE 249 
905
906 #define OCF_READ_CONN_ACCEPT_TIMEOUT    0x0015
907 typedef struct {
908     uint8_t     status;
909     uint16_t    timeout;
910 } QEMU_PACKED read_conn_accept_timeout_rp;
911 #define READ_CONN_ACCEPT_TIMEOUT_RP_SIZE 3
912
913 #define OCF_WRITE_CONN_ACCEPT_TIMEOUT   0x0016
914 typedef struct {
915     uint16_t    timeout;
916 } QEMU_PACKED write_conn_accept_timeout_cp;
917 #define WRITE_CONN_ACCEPT_TIMEOUT_CP_SIZE 2
918
919 #define OCF_READ_PAGE_TIMEOUT           0x0017
920 typedef struct {
921     uint8_t     status;
922     uint16_t    timeout;
923 } QEMU_PACKED read_page_timeout_rp;
924 #define READ_PAGE_TIMEOUT_RP_SIZE 3
925
926 #define OCF_WRITE_PAGE_TIMEOUT          0x0018
927 typedef struct {
928     uint16_t    timeout;
929 } QEMU_PACKED write_page_timeout_cp;
930 #define WRITE_PAGE_TIMEOUT_CP_SIZE 2
931
932 #define OCF_READ_SCAN_ENABLE            0x0019
933 typedef struct {
934     uint8_t     status;
935     uint8_t     enable;
936 } QEMU_PACKED read_scan_enable_rp;
937 #define READ_SCAN_ENABLE_RP_SIZE 2
938
939 #define OCF_WRITE_SCAN_ENABLE           0x001A
940 typedef struct {
941     uint8_t     scan_enable;
942 } QEMU_PACKED write_scan_enable_cp;
943 #define WRITE_SCAN_ENABLE_CP_SIZE 1
944
945 enum scan_enable_bits {
946     SCAN_DISABLED               = 0,
947     SCAN_INQUIRY                = 1 << 0,
948     SCAN_PAGE                   = 1 << 1,
949 };
950
951 #define OCF_READ_PAGE_ACTIVITY          0x001B
952 typedef struct {
953     uint8_t     status;
954     uint16_t    interval;
955     uint16_t    window;
956 } QEMU_PACKED read_page_activity_rp;
957 #define READ_PAGE_ACTIVITY_RP_SIZE 5
958
959 #define OCF_WRITE_PAGE_ACTIVITY         0x001C
960 typedef struct {
961     uint16_t    interval;
962     uint16_t    window;
963 } QEMU_PACKED write_page_activity_cp;
964 #define WRITE_PAGE_ACTIVITY_CP_SIZE 4
965
966 #define OCF_READ_INQ_ACTIVITY           0x001D
967 typedef struct {
968     uint8_t     status;
969     uint16_t    interval;
970     uint16_t    window;
971 } QEMU_PACKED read_inq_activity_rp;
972 #define READ_INQ_ACTIVITY_RP_SIZE 5
973
974 #define OCF_WRITE_INQ_ACTIVITY          0x001E
975 typedef struct {
976     uint16_t    interval;
977     uint16_t    window;
978 } QEMU_PACKED write_inq_activity_cp;
979 #define WRITE_INQ_ACTIVITY_CP_SIZE 4
980
981 #define OCF_READ_AUTH_ENABLE            0x001F
982
983 #define OCF_WRITE_AUTH_ENABLE           0x0020
984
985 #define AUTH_DISABLED           0x00
986 #define AUTH_ENABLED            0x01
987
988 #define OCF_READ_ENCRYPT_MODE           0x0021
989
990 #define OCF_WRITE_ENCRYPT_MODE          0x0022
991
992 #define ENCRYPT_DISABLED        0x00
993 #define ENCRYPT_P2P             0x01
994 #define ENCRYPT_BOTH            0x02
995
996 #define OCF_READ_CLASS_OF_DEV           0x0023
997 typedef struct {
998     uint8_t     status;
999     uint8_t     dev_class[3];
1000 } QEMU_PACKED read_class_of_dev_rp;
1001 #define READ_CLASS_OF_DEV_RP_SIZE 4 
1002
1003 #define OCF_WRITE_CLASS_OF_DEV          0x0024
1004 typedef struct {
1005     uint8_t     dev_class[3];
1006 } QEMU_PACKED write_class_of_dev_cp;
1007 #define WRITE_CLASS_OF_DEV_CP_SIZE 3
1008
1009 #define OCF_READ_VOICE_SETTING          0x0025
1010 typedef struct {
1011     uint8_t     status;
1012     uint16_t    voice_setting;
1013 } QEMU_PACKED read_voice_setting_rp;
1014 #define READ_VOICE_SETTING_RP_SIZE 3
1015
1016 #define OCF_WRITE_VOICE_SETTING         0x0026
1017 typedef struct {
1018     uint16_t    voice_setting;
1019 } QEMU_PACKED write_voice_setting_cp;
1020 #define WRITE_VOICE_SETTING_CP_SIZE 2
1021
1022 #define OCF_READ_AUTOMATIC_FLUSH_TIMEOUT        0x0027
1023
1024 #define OCF_WRITE_AUTOMATIC_FLUSH_TIMEOUT       0x0028
1025
1026 #define OCF_READ_NUM_BROADCAST_RETRANS  0x0029
1027
1028 #define OCF_WRITE_NUM_BROADCAST_RETRANS 0x002A
1029
1030 #define OCF_READ_HOLD_MODE_ACTIVITY     0x002B
1031
1032 #define OCF_WRITE_HOLD_MODE_ACTIVITY    0x002C
1033
1034 #define OCF_READ_TRANSMIT_POWER_LEVEL   0x002D
1035 typedef struct {
1036     uint16_t    handle;
1037     uint8_t     type;
1038 } QEMU_PACKED read_transmit_power_level_cp;
1039 #define READ_TRANSMIT_POWER_LEVEL_CP_SIZE 3
1040 typedef struct {
1041     uint8_t     status;
1042     uint16_t    handle;
1043     int8_t      level;
1044 } QEMU_PACKED read_transmit_power_level_rp;
1045 #define READ_TRANSMIT_POWER_LEVEL_RP_SIZE 4
1046
1047 #define OCF_HOST_BUFFER_SIZE            0x0033
1048 typedef struct {
1049     uint16_t    acl_mtu;
1050     uint8_t     sco_mtu;
1051     uint16_t    acl_max_pkt;
1052     uint16_t    sco_max_pkt;
1053 } QEMU_PACKED host_buffer_size_cp;
1054 #define HOST_BUFFER_SIZE_CP_SIZE 7
1055
1056 #define OCF_HOST_NUMBER_OF_COMPLETED_PACKETS    0x0035
1057
1058 #define OCF_READ_LINK_SUPERVISION_TIMEOUT       0x0036
1059 typedef struct {
1060     uint8_t     status;
1061     uint16_t    handle;
1062     uint16_t    link_sup_to;
1063 } QEMU_PACKED read_link_supervision_timeout_rp;
1064 #define READ_LINK_SUPERVISION_TIMEOUT_RP_SIZE 5
1065
1066 #define OCF_WRITE_LINK_SUPERVISION_TIMEOUT      0x0037
1067 typedef struct {
1068     uint16_t    handle;
1069     uint16_t    link_sup_to;
1070 } QEMU_PACKED write_link_supervision_timeout_cp;
1071 #define WRITE_LINK_SUPERVISION_TIMEOUT_CP_SIZE 4
1072 typedef struct {
1073     uint8_t     status;
1074     uint16_t    handle;
1075 } QEMU_PACKED write_link_supervision_timeout_rp;
1076 #define WRITE_LINK_SUPERVISION_TIMEOUT_RP_SIZE 3
1077
1078 #define OCF_READ_NUM_SUPPORTED_IAC      0x0038
1079
1080 #define MAX_IAC_LAP 0x40
1081 #define OCF_READ_CURRENT_IAC_LAP        0x0039
1082 typedef struct {
1083     uint8_t     status;
1084     uint8_t     num_current_iac;
1085     uint8_t     lap[MAX_IAC_LAP][3];
1086 } QEMU_PACKED read_current_iac_lap_rp;
1087 #define READ_CURRENT_IAC_LAP_RP_SIZE 2+3*MAX_IAC_LAP
1088
1089 #define OCF_WRITE_CURRENT_IAC_LAP       0x003A
1090 typedef struct {
1091     uint8_t     num_current_iac;
1092     uint8_t     lap[MAX_IAC_LAP][3];
1093 } QEMU_PACKED write_current_iac_lap_cp;
1094 #define WRITE_CURRENT_IAC_LAP_CP_SIZE 1+3*MAX_IAC_LAP
1095
1096 #define OCF_READ_PAGE_SCAN_PERIOD_MODE  0x003B
1097
1098 #define OCF_WRITE_PAGE_SCAN_PERIOD_MODE 0x003C
1099
1100 #define OCF_READ_PAGE_SCAN_MODE         0x003D
1101
1102 #define OCF_WRITE_PAGE_SCAN_MODE        0x003E
1103
1104 #define OCF_SET_AFH_CLASSIFICATION      0x003F
1105 typedef struct {
1106     uint8_t     map[10];
1107 } QEMU_PACKED set_afh_classification_cp;
1108 #define SET_AFH_CLASSIFICATION_CP_SIZE 10
1109 typedef struct {
1110     uint8_t     status;
1111 } QEMU_PACKED set_afh_classification_rp;
1112 #define SET_AFH_CLASSIFICATION_RP_SIZE 1
1113
1114 #define OCF_READ_INQUIRY_SCAN_TYPE      0x0042
1115 typedef struct {
1116     uint8_t     status;
1117     uint8_t     type;
1118 } QEMU_PACKED read_inquiry_scan_type_rp;
1119 #define READ_INQUIRY_SCAN_TYPE_RP_SIZE 2
1120
1121 #define OCF_WRITE_INQUIRY_SCAN_TYPE     0x0043
1122 typedef struct {
1123     uint8_t     type;
1124 } QEMU_PACKED write_inquiry_scan_type_cp;
1125 #define WRITE_INQUIRY_SCAN_TYPE_CP_SIZE 1
1126 typedef struct {
1127     uint8_t     status;
1128 } QEMU_PACKED write_inquiry_scan_type_rp;
1129 #define WRITE_INQUIRY_SCAN_TYPE_RP_SIZE 1
1130
1131 #define OCF_READ_INQUIRY_MODE           0x0044
1132 typedef struct {
1133     uint8_t     status;
1134     uint8_t     mode;
1135 } QEMU_PACKED read_inquiry_mode_rp;
1136 #define READ_INQUIRY_MODE_RP_SIZE 2
1137
1138 #define OCF_WRITE_INQUIRY_MODE          0x0045
1139 typedef struct {
1140     uint8_t     mode;
1141 } QEMU_PACKED write_inquiry_mode_cp;
1142 #define WRITE_INQUIRY_MODE_CP_SIZE 1
1143 typedef struct {
1144     uint8_t     status;
1145 } QEMU_PACKED write_inquiry_mode_rp;
1146 #define WRITE_INQUIRY_MODE_RP_SIZE 1
1147
1148 #define OCF_READ_PAGE_SCAN_TYPE         0x0046
1149
1150 #define OCF_WRITE_PAGE_SCAN_TYPE        0x0047
1151
1152 #define OCF_READ_AFH_MODE               0x0048
1153 typedef struct {
1154     uint8_t     status;
1155     uint8_t     mode;
1156 } QEMU_PACKED read_afh_mode_rp;
1157 #define READ_AFH_MODE_RP_SIZE 2
1158
1159 #define OCF_WRITE_AFH_MODE              0x0049
1160 typedef struct {
1161     uint8_t     mode;
1162 } QEMU_PACKED write_afh_mode_cp;
1163 #define WRITE_AFH_MODE_CP_SIZE 1
1164 typedef struct {
1165     uint8_t     status;
1166 } QEMU_PACKED write_afh_mode_rp;
1167 #define WRITE_AFH_MODE_RP_SIZE 1
1168
1169 #define OCF_READ_EXT_INQUIRY_RESPONSE   0x0051
1170 typedef struct {
1171     uint8_t     status;
1172     uint8_t     fec;
1173     uint8_t     data[240];
1174 } QEMU_PACKED read_ext_inquiry_response_rp;
1175 #define READ_EXT_INQUIRY_RESPONSE_RP_SIZE 242
1176
1177 #define OCF_WRITE_EXT_INQUIRY_RESPONSE  0x0052
1178 typedef struct {
1179     uint8_t     fec;
1180     uint8_t     data[240];
1181 } QEMU_PACKED write_ext_inquiry_response_cp;
1182 #define WRITE_EXT_INQUIRY_RESPONSE_CP_SIZE 241
1183 typedef struct {
1184     uint8_t     status;
1185 } QEMU_PACKED write_ext_inquiry_response_rp;
1186 #define WRITE_EXT_INQUIRY_RESPONSE_RP_SIZE 1
1187
1188 /* Informational Parameters */
1189 #define OGF_INFO_PARAM          0x04
1190
1191 #define OCF_READ_LOCAL_VERSION          0x0001
1192 typedef struct {
1193     uint8_t     status;
1194     uint8_t     hci_ver;
1195     uint16_t    hci_rev;
1196     uint8_t     lmp_ver;
1197     uint16_t    manufacturer;
1198     uint16_t    lmp_subver;
1199 } QEMU_PACKED read_local_version_rp;
1200 #define READ_LOCAL_VERSION_RP_SIZE 9
1201
1202 #define OCF_READ_LOCAL_COMMANDS         0x0002
1203 typedef struct {
1204     uint8_t     status;
1205     uint8_t     commands[64];
1206 } QEMU_PACKED read_local_commands_rp;
1207 #define READ_LOCAL_COMMANDS_RP_SIZE 65
1208
1209 #define OCF_READ_LOCAL_FEATURES         0x0003
1210 typedef struct {
1211     uint8_t     status;
1212     uint8_t     features[8];
1213 } QEMU_PACKED read_local_features_rp;
1214 #define READ_LOCAL_FEATURES_RP_SIZE 9
1215
1216 #define OCF_READ_LOCAL_EXT_FEATURES     0x0004
1217 typedef struct {
1218     uint8_t     page_num;
1219 } QEMU_PACKED read_local_ext_features_cp;
1220 #define READ_LOCAL_EXT_FEATURES_CP_SIZE 1
1221 typedef struct {
1222     uint8_t     status;
1223     uint8_t     page_num;
1224     uint8_t     max_page_num;
1225     uint8_t     features[8];
1226 } QEMU_PACKED read_local_ext_features_rp;
1227 #define READ_LOCAL_EXT_FEATURES_RP_SIZE 11
1228
1229 #define OCF_READ_BUFFER_SIZE            0x0005
1230 typedef struct {
1231     uint8_t     status;
1232     uint16_t    acl_mtu;
1233     uint8_t     sco_mtu;
1234     uint16_t    acl_max_pkt;
1235     uint16_t    sco_max_pkt;
1236 } QEMU_PACKED read_buffer_size_rp;
1237 #define READ_BUFFER_SIZE_RP_SIZE 8
1238
1239 #define OCF_READ_COUNTRY_CODE           0x0007
1240 typedef struct {
1241     uint8_t     status;
1242     uint8_t     country_code;
1243 } QEMU_PACKED read_country_code_rp;
1244 #define READ_COUNTRY_CODE_RP_SIZE 2
1245
1246 #define OCF_READ_BD_ADDR                0x0009
1247 typedef struct {
1248     uint8_t     status;
1249     bdaddr_t    bdaddr;
1250 } QEMU_PACKED read_bd_addr_rp;
1251 #define READ_BD_ADDR_RP_SIZE 7
1252
1253 /* Status params */
1254 #define OGF_STATUS_PARAM        0x05
1255
1256 #define OCF_READ_FAILED_CONTACT_COUNTER         0x0001
1257 typedef struct {
1258     uint8_t     status;
1259     uint16_t    handle;
1260     uint8_t     counter;
1261 } QEMU_PACKED read_failed_contact_counter_rp;
1262 #define READ_FAILED_CONTACT_COUNTER_RP_SIZE 4
1263
1264 #define OCF_RESET_FAILED_CONTACT_COUNTER        0x0002
1265 typedef struct {
1266     uint8_t     status;
1267     uint16_t    handle;
1268 } QEMU_PACKED reset_failed_contact_counter_rp;
1269 #define RESET_FAILED_CONTACT_COUNTER_RP_SIZE 4
1270
1271 #define OCF_READ_LINK_QUALITY           0x0003
1272 typedef struct {
1273     uint16_t    handle;
1274 } QEMU_PACKED read_link_quality_cp;
1275 #define READ_LINK_QUALITY_CP_SIZE 4
1276
1277 typedef struct {
1278     uint8_t     status;
1279     uint16_t    handle;
1280     uint8_t     link_quality;
1281 } QEMU_PACKED read_link_quality_rp;
1282 #define READ_LINK_QUALITY_RP_SIZE 4
1283
1284 #define OCF_READ_RSSI                   0x0005
1285 typedef struct {
1286     uint8_t     status;
1287     uint16_t    handle;
1288     int8_t      rssi;
1289 } QEMU_PACKED read_rssi_rp;
1290 #define READ_RSSI_RP_SIZE 4
1291
1292 #define OCF_READ_AFH_MAP                0x0006
1293 typedef struct {
1294     uint8_t     status;
1295     uint16_t    handle;
1296     uint8_t     mode;
1297     uint8_t     map[10];
1298 } QEMU_PACKED read_afh_map_rp;
1299 #define READ_AFH_MAP_RP_SIZE 14
1300
1301 #define OCF_READ_CLOCK                  0x0007
1302 typedef struct {
1303     uint16_t    handle;
1304     uint8_t     which_clock;
1305 } QEMU_PACKED read_clock_cp;
1306 #define READ_CLOCK_CP_SIZE 3
1307 typedef struct {
1308     uint8_t     status;
1309     uint16_t    handle;
1310     uint32_t    clock;
1311     uint16_t    accuracy;
1312 } QEMU_PACKED read_clock_rp;
1313 #define READ_CLOCK_RP_SIZE 9
1314
1315 /* Testing commands */
1316 #define OGF_TESTING_CMD         0x3e
1317
1318 /* Vendor specific commands */
1319 #define OGF_VENDOR_CMD          0x3f
1320
1321 /* HCI Events */
1322
1323 #define EVT_INQUIRY_COMPLETE            0x01
1324
1325 #define EVT_INQUIRY_RESULT              0x02
1326 typedef struct {
1327     uint8_t     num_responses;
1328     bdaddr_t    bdaddr;
1329     uint8_t     pscan_rep_mode;
1330     uint8_t     pscan_period_mode;
1331     uint8_t     pscan_mode;
1332     uint8_t     dev_class[3];
1333     uint16_t    clock_offset;
1334 } QEMU_PACKED inquiry_info;
1335 #define INQUIRY_INFO_SIZE 14
1336
1337 #define EVT_CONN_COMPLETE               0x03
1338 typedef struct {
1339     uint8_t     status;
1340     uint16_t    handle;
1341     bdaddr_t    bdaddr;
1342     uint8_t     link_type;
1343     uint8_t     encr_mode;
1344 } QEMU_PACKED evt_conn_complete;
1345 #define EVT_CONN_COMPLETE_SIZE 11
1346
1347 #define EVT_CONN_REQUEST                0x04
1348 typedef struct {
1349     bdaddr_t    bdaddr;
1350     uint8_t     dev_class[3];
1351     uint8_t     link_type;
1352 } QEMU_PACKED evt_conn_request;
1353 #define EVT_CONN_REQUEST_SIZE 10
1354
1355 #define EVT_DISCONN_COMPLETE            0x05
1356 typedef struct {
1357     uint8_t     status;
1358     uint16_t    handle;
1359     uint8_t     reason;
1360 } QEMU_PACKED evt_disconn_complete;
1361 #define EVT_DISCONN_COMPLETE_SIZE 4
1362
1363 #define EVT_AUTH_COMPLETE               0x06
1364 typedef struct {
1365     uint8_t     status;
1366     uint16_t    handle;
1367 } QEMU_PACKED evt_auth_complete;
1368 #define EVT_AUTH_COMPLETE_SIZE 3
1369
1370 #define EVT_REMOTE_NAME_REQ_COMPLETE    0x07
1371 typedef struct {
1372     uint8_t     status;
1373     bdaddr_t    bdaddr;
1374     char        name[248];
1375 } QEMU_PACKED evt_remote_name_req_complete;
1376 #define EVT_REMOTE_NAME_REQ_COMPLETE_SIZE 255
1377
1378 #define EVT_ENCRYPT_CHANGE              0x08
1379 typedef struct {
1380     uint8_t     status;
1381     uint16_t    handle;
1382     uint8_t     encrypt;
1383 } QEMU_PACKED evt_encrypt_change;
1384 #define EVT_ENCRYPT_CHANGE_SIZE 5
1385
1386 #define EVT_CHANGE_CONN_LINK_KEY_COMPLETE       0x09
1387 typedef struct {
1388     uint8_t     status;
1389     uint16_t    handle;
1390 }  QEMU_PACKED evt_change_conn_link_key_complete;
1391 #define EVT_CHANGE_CONN_LINK_KEY_COMPLETE_SIZE 3
1392
1393 #define EVT_MASTER_LINK_KEY_COMPLETE            0x0A
1394 typedef struct {
1395     uint8_t     status;
1396     uint16_t    handle;
1397     uint8_t     key_flag;
1398 } QEMU_PACKED evt_master_link_key_complete;
1399 #define EVT_MASTER_LINK_KEY_COMPLETE_SIZE 4
1400
1401 #define EVT_READ_REMOTE_FEATURES_COMPLETE       0x0B
1402 typedef struct {
1403     uint8_t     status;
1404     uint16_t    handle;
1405     uint8_t     features[8];
1406 } QEMU_PACKED evt_read_remote_features_complete;
1407 #define EVT_READ_REMOTE_FEATURES_COMPLETE_SIZE 11
1408
1409 #define EVT_READ_REMOTE_VERSION_COMPLETE        0x0C
1410 typedef struct {
1411     uint8_t     status;
1412     uint16_t    handle;
1413     uint8_t     lmp_ver;
1414     uint16_t    manufacturer;
1415     uint16_t    lmp_subver;
1416 } QEMU_PACKED evt_read_remote_version_complete;
1417 #define EVT_READ_REMOTE_VERSION_COMPLETE_SIZE 8
1418
1419 #define EVT_QOS_SETUP_COMPLETE          0x0D
1420 typedef struct {
1421     uint8_t     status;
1422     uint16_t    handle;
1423     uint8_t     flags;                  /* Reserved */
1424     hci_qos     qos;
1425 } QEMU_PACKED evt_qos_setup_complete;
1426 #define EVT_QOS_SETUP_COMPLETE_SIZE (4 + HCI_QOS_CP_SIZE)
1427
1428 #define EVT_CMD_COMPLETE                0x0E
1429 typedef struct {
1430     uint8_t     ncmd;
1431     uint16_t    opcode;
1432 } QEMU_PACKED evt_cmd_complete;
1433 #define EVT_CMD_COMPLETE_SIZE 3
1434
1435 #define EVT_CMD_STATUS                  0x0F
1436 typedef struct {
1437     uint8_t     status;
1438     uint8_t     ncmd;
1439     uint16_t    opcode;
1440 } QEMU_PACKED evt_cmd_status;
1441 #define EVT_CMD_STATUS_SIZE 4
1442
1443 #define EVT_HARDWARE_ERROR              0x10
1444 typedef struct {
1445     uint8_t     code;
1446 } QEMU_PACKED evt_hardware_error;
1447 #define EVT_HARDWARE_ERROR_SIZE 1
1448
1449 #define EVT_FLUSH_OCCURRED              0x11
1450 typedef struct {
1451     uint16_t    handle;
1452 } QEMU_PACKED evt_flush_occurred;
1453 #define EVT_FLUSH_OCCURRED_SIZE 2
1454
1455 #define EVT_ROLE_CHANGE                 0x12
1456 typedef struct {
1457     uint8_t     status;
1458     bdaddr_t    bdaddr;
1459     uint8_t     role;
1460 } QEMU_PACKED evt_role_change;
1461 #define EVT_ROLE_CHANGE_SIZE 8
1462
1463 #define EVT_NUM_COMP_PKTS               0x13
1464 typedef struct {
1465     uint8_t     num_hndl;
1466     struct {
1467         uint16_t handle;
1468         uint16_t num_packets;
1469     } connection[0];
1470 } QEMU_PACKED evt_num_comp_pkts;
1471 #define EVT_NUM_COMP_PKTS_SIZE(num_hndl) (1 + 4 * (num_hndl))
1472
1473 #define EVT_MODE_CHANGE                 0x14
1474 typedef struct {
1475     uint8_t     status;
1476     uint16_t    handle;
1477     uint8_t     mode;
1478     uint16_t    interval;
1479 } QEMU_PACKED evt_mode_change;
1480 #define EVT_MODE_CHANGE_SIZE 6
1481
1482 #define EVT_RETURN_LINK_KEYS            0x15
1483 typedef struct {
1484     uint8_t     num_keys;
1485     /* variable length part */
1486 } QEMU_PACKED evt_return_link_keys;
1487 #define EVT_RETURN_LINK_KEYS_SIZE 1
1488
1489 #define EVT_PIN_CODE_REQ                0x16
1490 typedef struct {
1491     bdaddr_t    bdaddr;
1492 } QEMU_PACKED evt_pin_code_req;
1493 #define EVT_PIN_CODE_REQ_SIZE 6
1494
1495 #define EVT_LINK_KEY_REQ                0x17
1496 typedef struct {
1497     bdaddr_t    bdaddr;
1498 } QEMU_PACKED evt_link_key_req;
1499 #define EVT_LINK_KEY_REQ_SIZE 6
1500
1501 #define EVT_LINK_KEY_NOTIFY             0x18
1502 typedef struct {
1503     bdaddr_t    bdaddr;
1504     uint8_t     link_key[16];
1505     uint8_t     key_type;
1506 } QEMU_PACKED evt_link_key_notify;
1507 #define EVT_LINK_KEY_NOTIFY_SIZE 23
1508
1509 #define EVT_LOOPBACK_COMMAND            0x19
1510
1511 #define EVT_DATA_BUFFER_OVERFLOW        0x1A
1512 typedef struct {
1513     uint8_t     link_type;
1514 } QEMU_PACKED evt_data_buffer_overflow;
1515 #define EVT_DATA_BUFFER_OVERFLOW_SIZE 1
1516
1517 #define EVT_MAX_SLOTS_CHANGE            0x1B
1518 typedef struct {
1519     uint16_t    handle;
1520     uint8_t     max_slots;
1521 } QEMU_PACKED evt_max_slots_change;
1522 #define EVT_MAX_SLOTS_CHANGE_SIZE 3
1523
1524 #define EVT_READ_CLOCK_OFFSET_COMPLETE  0x1C
1525 typedef struct {
1526     uint8_t     status;
1527     uint16_t    handle;
1528     uint16_t    clock_offset;
1529 } QEMU_PACKED evt_read_clock_offset_complete;
1530 #define EVT_READ_CLOCK_OFFSET_COMPLETE_SIZE 5
1531
1532 #define EVT_CONN_PTYPE_CHANGED          0x1D
1533 typedef struct {
1534     uint8_t     status;
1535     uint16_t    handle;
1536     uint16_t    ptype;
1537 } QEMU_PACKED evt_conn_ptype_changed;
1538 #define EVT_CONN_PTYPE_CHANGED_SIZE 5
1539
1540 #define EVT_QOS_VIOLATION               0x1E
1541 typedef struct {
1542     uint16_t    handle;
1543 } QEMU_PACKED evt_qos_violation;
1544 #define EVT_QOS_VIOLATION_SIZE 2
1545
1546 #define EVT_PSCAN_REP_MODE_CHANGE       0x20
1547 typedef struct {
1548     bdaddr_t    bdaddr;
1549     uint8_t     pscan_rep_mode;
1550 } QEMU_PACKED evt_pscan_rep_mode_change;
1551 #define EVT_PSCAN_REP_MODE_CHANGE_SIZE 7
1552
1553 #define EVT_FLOW_SPEC_COMPLETE          0x21
1554 typedef struct {
1555     uint8_t     status;
1556     uint16_t    handle;
1557     uint8_t     flags;
1558     uint8_t     direction;
1559     hci_qos     qos;
1560 } QEMU_PACKED evt_flow_spec_complete;
1561 #define EVT_FLOW_SPEC_COMPLETE_SIZE (5 + HCI_QOS_CP_SIZE)
1562
1563 #define EVT_INQUIRY_RESULT_WITH_RSSI    0x22
1564 typedef struct {
1565     uint8_t     num_responses;
1566     bdaddr_t    bdaddr;
1567     uint8_t     pscan_rep_mode;
1568     uint8_t     pscan_period_mode;
1569     uint8_t     dev_class[3];
1570     uint16_t    clock_offset;
1571     int8_t      rssi;
1572 } QEMU_PACKED inquiry_info_with_rssi;
1573 #define INQUIRY_INFO_WITH_RSSI_SIZE 15
1574 typedef struct {
1575     uint8_t     num_responses;
1576     bdaddr_t    bdaddr;
1577     uint8_t     pscan_rep_mode;
1578     uint8_t     pscan_period_mode;
1579     uint8_t     pscan_mode;
1580     uint8_t     dev_class[3];
1581     uint16_t    clock_offset;
1582     int8_t      rssi;
1583 } QEMU_PACKED inquiry_info_with_rssi_and_pscan_mode;
1584 #define INQUIRY_INFO_WITH_RSSI_AND_PSCAN_MODE_SIZE 16
1585
1586 #define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE   0x23
1587 typedef struct {
1588     uint8_t     status;
1589     uint16_t    handle;
1590     uint8_t     page_num;
1591     uint8_t     max_page_num;
1592     uint8_t     features[8];
1593 } QEMU_PACKED evt_read_remote_ext_features_complete;
1594 #define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE_SIZE 13
1595
1596 #define EVT_SYNC_CONN_COMPLETE          0x2C
1597 typedef struct {
1598     uint8_t     status;
1599     uint16_t    handle;
1600     bdaddr_t    bdaddr;
1601     uint8_t     link_type;
1602     uint8_t     trans_interval;
1603     uint8_t     retrans_window;
1604     uint16_t    rx_pkt_len;
1605     uint16_t    tx_pkt_len;
1606     uint8_t     air_mode;
1607 } QEMU_PACKED evt_sync_conn_complete;
1608 #define EVT_SYNC_CONN_COMPLETE_SIZE 17
1609
1610 #define EVT_SYNC_CONN_CHANGED           0x2D
1611 typedef struct {
1612     uint8_t     status;
1613     uint16_t    handle;
1614     uint8_t     trans_interval;
1615     uint8_t     retrans_window;
1616     uint16_t    rx_pkt_len;
1617     uint16_t    tx_pkt_len;
1618 } QEMU_PACKED evt_sync_conn_changed;
1619 #define EVT_SYNC_CONN_CHANGED_SIZE 9
1620
1621 #define EVT_SNIFF_SUBRATE               0x2E
1622 typedef struct {
1623     uint8_t     status;
1624     uint16_t    handle;
1625     uint16_t    max_remote_latency;
1626     uint16_t    max_local_latency;
1627     uint16_t    min_remote_timeout;
1628     uint16_t    min_local_timeout;
1629 } QEMU_PACKED evt_sniff_subrate;
1630 #define EVT_SNIFF_SUBRATE_SIZE 11
1631
1632 #define EVT_EXTENDED_INQUIRY_RESULT     0x2F
1633 typedef struct {
1634     bdaddr_t    bdaddr;
1635     uint8_t     pscan_rep_mode;
1636     uint8_t     pscan_period_mode;
1637     uint8_t     dev_class[3];
1638     uint16_t    clock_offset;
1639     int8_t      rssi;
1640     uint8_t     data[240];
1641 } QEMU_PACKED extended_inquiry_info;
1642 #define EXTENDED_INQUIRY_INFO_SIZE 254
1643
1644 #define EVT_TESTING                     0xFE
1645
1646 #define EVT_VENDOR                      0xFF
1647
1648 /* Command opcode pack/unpack */
1649 #define cmd_opcode_pack(ogf, ocf)       (uint16_t)((ocf & 0x03ff)|(ogf << 10))
1650 #define cmd_opcode_ogf(op)              (op >> 10)
1651 #define cmd_opcode_ocf(op)              (op & 0x03ff)
1652
1653 /* ACL handle and flags pack/unpack */
1654 #define acl_handle_pack(h, f)   (uint16_t)(((h) & 0x0fff)|((f) << 12))
1655 #define acl_handle(h)           ((h) & 0x0fff)
1656 #define acl_flags(h)            ((h) >> 12)
1657
1658 /* HCI Packet structures */
1659 #define HCI_COMMAND_HDR_SIZE    3
1660 #define HCI_EVENT_HDR_SIZE      2
1661 #define HCI_ACL_HDR_SIZE        4
1662 #define HCI_SCO_HDR_SIZE        3
1663
1664 struct hci_command_hdr {
1665     uint16_t    opcode;         /* OCF & OGF */
1666     uint8_t     plen;
1667 } QEMU_PACKED;
1668
1669 struct hci_event_hdr {
1670     uint8_t     evt;
1671     uint8_t     plen;
1672 } QEMU_PACKED;
1673
1674 struct hci_acl_hdr {
1675     uint16_t    handle;         /* Handle & Flags(PB, BC) */
1676     uint16_t    dlen;
1677 } QEMU_PACKED;
1678
1679 struct hci_sco_hdr {
1680     uint16_t    handle;
1681     uint8_t     dlen;
1682 } QEMU_PACKED;
1683
1684 /* L2CAP layer defines */
1685
1686 enum bt_l2cap_lm_bits {
1687     L2CAP_LM_MASTER     = 1 << 0,
1688     L2CAP_LM_AUTH       = 1 << 1,
1689     L2CAP_LM_ENCRYPT    = 1 << 2,
1690     L2CAP_LM_TRUSTED    = 1 << 3,
1691     L2CAP_LM_RELIABLE   = 1 << 4,
1692     L2CAP_LM_SECURE     = 1 << 5,
1693 };
1694
1695 enum bt_l2cap_cid_predef {
1696     L2CAP_CID_INVALID   = 0x0000,
1697     L2CAP_CID_SIGNALLING= 0x0001,
1698     L2CAP_CID_GROUP     = 0x0002,
1699     L2CAP_CID_ALLOC     = 0x0040,
1700 };
1701
1702 /* L2CAP command codes */
1703 enum bt_l2cap_cmd {
1704     L2CAP_COMMAND_REJ   = 1,
1705     L2CAP_CONN_REQ,
1706     L2CAP_CONN_RSP,
1707     L2CAP_CONF_REQ,
1708     L2CAP_CONF_RSP,
1709     L2CAP_DISCONN_REQ,
1710     L2CAP_DISCONN_RSP,
1711     L2CAP_ECHO_REQ,
1712     L2CAP_ECHO_RSP,
1713     L2CAP_INFO_REQ,
1714     L2CAP_INFO_RSP,
1715 };
1716
1717 enum bt_l2cap_sar_bits {
1718     L2CAP_SAR_NO_SEG    = 0,
1719     L2CAP_SAR_START,
1720     L2CAP_SAR_END,
1721     L2CAP_SAR_CONT,
1722 };
1723
1724 /* L2CAP structures */
1725 typedef struct {
1726     uint16_t    len;
1727     uint16_t    cid;
1728     uint8_t     data[0];
1729 } QEMU_PACKED l2cap_hdr;
1730 #define L2CAP_HDR_SIZE 4
1731
1732 typedef struct {
1733     uint8_t     code;
1734     uint8_t     ident;
1735     uint16_t    len;
1736 } QEMU_PACKED l2cap_cmd_hdr;
1737 #define L2CAP_CMD_HDR_SIZE 4
1738
1739 typedef struct {
1740     uint16_t    reason;
1741 } QEMU_PACKED l2cap_cmd_rej;
1742 #define L2CAP_CMD_REJ_SIZE 2
1743
1744 typedef struct {
1745     uint16_t    dcid;
1746     uint16_t    scid;
1747 } QEMU_PACKED l2cap_cmd_rej_cid;
1748 #define L2CAP_CMD_REJ_CID_SIZE 4
1749
1750 /* reject reason */
1751 enum bt_l2cap_rej_reason {
1752     L2CAP_REJ_CMD_NOT_UNDERSTOOD = 0,
1753     L2CAP_REJ_SIG_TOOBIG,
1754     L2CAP_REJ_CID_INVAL,
1755 };
1756
1757 typedef struct {
1758     uint16_t    psm;
1759     uint16_t    scid;
1760 } QEMU_PACKED l2cap_conn_req;
1761 #define L2CAP_CONN_REQ_SIZE 4
1762
1763 typedef struct {
1764     uint16_t    dcid;
1765     uint16_t    scid;
1766     uint16_t    result;
1767     uint16_t    status;
1768 } QEMU_PACKED l2cap_conn_rsp;
1769 #define L2CAP_CONN_RSP_SIZE 8
1770
1771 /* connect result */
1772 enum bt_l2cap_conn_res {
1773     L2CAP_CR_SUCCESS    = 0,
1774     L2CAP_CR_PEND,
1775     L2CAP_CR_BAD_PSM,
1776     L2CAP_CR_SEC_BLOCK,
1777     L2CAP_CR_NO_MEM,
1778 };
1779
1780 /* connect status */
1781 enum bt_l2cap_conn_stat {
1782     L2CAP_CS_NO_INFO    = 0,
1783     L2CAP_CS_AUTHEN_PEND,
1784     L2CAP_CS_AUTHOR_PEND,
1785 };
1786
1787 typedef struct {
1788     uint16_t    dcid;
1789     uint16_t    flags;
1790     uint8_t     data[0];
1791 } QEMU_PACKED l2cap_conf_req;
1792 #define L2CAP_CONF_REQ_SIZE(datalen) (4 + (datalen))
1793
1794 typedef struct {
1795     uint16_t    scid;
1796     uint16_t    flags;
1797     uint16_t    result;
1798     uint8_t     data[0];
1799 } QEMU_PACKED l2cap_conf_rsp;
1800 #define L2CAP_CONF_RSP_SIZE(datalen) (6 + datalen)
1801
1802 enum bt_l2cap_conf_res {
1803     L2CAP_CONF_SUCCESS  = 0,
1804     L2CAP_CONF_UNACCEPT,
1805     L2CAP_CONF_REJECT,
1806     L2CAP_CONF_UNKNOWN,
1807 };
1808
1809 typedef struct {
1810     uint8_t     type;
1811     uint8_t     len;
1812     uint8_t     val[0];
1813 } QEMU_PACKED l2cap_conf_opt;
1814 #define L2CAP_CONF_OPT_SIZE 2
1815
1816 enum bt_l2cap_conf_val {
1817     L2CAP_CONF_MTU      = 1,
1818     L2CAP_CONF_FLUSH_TO,
1819     L2CAP_CONF_QOS,
1820     L2CAP_CONF_RFC,
1821     L2CAP_CONF_RFC_MODE = L2CAP_CONF_RFC,
1822 };
1823
1824 typedef struct {
1825     uint8_t     flags;
1826     uint8_t     service_type;
1827     uint32_t    token_rate;
1828     uint32_t    token_bucket_size;
1829     uint32_t    peak_bandwidth;
1830     uint32_t    latency;
1831     uint32_t    delay_variation;
1832 } QEMU_PACKED l2cap_conf_opt_qos;
1833 #define L2CAP_CONF_OPT_QOS_SIZE 22
1834
1835 enum bt_l2cap_conf_opt_qos_st {
1836     L2CAP_CONF_QOS_NO_TRAFFIC = 0x00,
1837     L2CAP_CONF_QOS_BEST_EFFORT,
1838     L2CAP_CONF_QOS_GUARANTEED,
1839 };
1840
1841 #define L2CAP_CONF_QOS_WILDCARD 0xffffffff
1842
1843 enum bt_l2cap_mode {
1844     L2CAP_MODE_BASIC    = 0,
1845     L2CAP_MODE_RETRANS  = 1,
1846     L2CAP_MODE_FLOWCTL  = 2,
1847 };
1848
1849 typedef struct {
1850     uint16_t    dcid;
1851     uint16_t    scid;
1852 } QEMU_PACKED l2cap_disconn_req;
1853 #define L2CAP_DISCONN_REQ_SIZE 4
1854
1855 typedef struct {
1856     uint16_t    dcid;
1857     uint16_t    scid;
1858 } QEMU_PACKED l2cap_disconn_rsp;
1859 #define L2CAP_DISCONN_RSP_SIZE 4
1860
1861 typedef struct {
1862     uint16_t    type;
1863 } QEMU_PACKED l2cap_info_req;
1864 #define L2CAP_INFO_REQ_SIZE 2
1865
1866 typedef struct {
1867     uint16_t    type;
1868     uint16_t    result;
1869     uint8_t     data[0];
1870 } QEMU_PACKED l2cap_info_rsp;
1871 #define L2CAP_INFO_RSP_SIZE 4
1872
1873 /* info type */
1874 enum bt_l2cap_info_type {
1875     L2CAP_IT_CL_MTU     = 1,
1876     L2CAP_IT_FEAT_MASK,
1877 };
1878
1879 /* info result */
1880 enum bt_l2cap_info_result {
1881     L2CAP_IR_SUCCESS    = 0,
1882     L2CAP_IR_NOTSUPP,
1883 };
1884
1885 /* Service Discovery Protocol defines */
1886 /* Note that all multibyte values in lower layer protocols (above in this file)
1887  * are little-endian while SDP is big-endian.  */
1888
1889 /* Protocol UUIDs */
1890 enum sdp_proto_uuid {
1891     SDP_UUID            = 0x0001,
1892     UDP_UUID            = 0x0002,
1893     RFCOMM_UUID         = 0x0003,
1894     TCP_UUID            = 0x0004,
1895     TCS_BIN_UUID        = 0x0005,
1896     TCS_AT_UUID         = 0x0006,
1897     OBEX_UUID           = 0x0008,
1898     IP_UUID             = 0x0009,
1899     FTP_UUID            = 0x000a,
1900     HTTP_UUID           = 0x000c,
1901     WSP_UUID            = 0x000e,
1902     BNEP_UUID           = 0x000f,
1903     UPNP_UUID           = 0x0010,
1904     HIDP_UUID           = 0x0011,
1905     HCRP_CTRL_UUID      = 0x0012,
1906     HCRP_DATA_UUID      = 0x0014,
1907     HCRP_NOTE_UUID      = 0x0016,
1908     AVCTP_UUID          = 0x0017,
1909     AVDTP_UUID          = 0x0019,
1910     CMTP_UUID           = 0x001b,
1911     UDI_UUID            = 0x001d,
1912     MCAP_CTRL_UUID      = 0x001e,
1913     MCAP_DATA_UUID      = 0x001f,
1914     L2CAP_UUID          = 0x0100,
1915 };
1916
1917 /*
1918  * Service class identifiers of standard services and service groups
1919  */
1920 enum service_class_id {
1921     SDP_SERVER_SVCLASS_ID               = 0x1000,
1922     BROWSE_GRP_DESC_SVCLASS_ID          = 0x1001,
1923     PUBLIC_BROWSE_GROUP                 = 0x1002,
1924     SERIAL_PORT_SVCLASS_ID              = 0x1101,
1925     LAN_ACCESS_SVCLASS_ID               = 0x1102,
1926     DIALUP_NET_SVCLASS_ID               = 0x1103,
1927     IRMC_SYNC_SVCLASS_ID                = 0x1104,
1928     OBEX_OBJPUSH_SVCLASS_ID             = 0x1105,
1929     OBEX_FILETRANS_SVCLASS_ID           = 0x1106,
1930     IRMC_SYNC_CMD_SVCLASS_ID            = 0x1107,
1931     HEADSET_SVCLASS_ID                  = 0x1108,
1932     CORDLESS_TELEPHONY_SVCLASS_ID       = 0x1109,
1933     AUDIO_SOURCE_SVCLASS_ID             = 0x110a,
1934     AUDIO_SINK_SVCLASS_ID               = 0x110b,
1935     AV_REMOTE_TARGET_SVCLASS_ID         = 0x110c,
1936     ADVANCED_AUDIO_SVCLASS_ID           = 0x110d,
1937     AV_REMOTE_SVCLASS_ID                = 0x110e,
1938     VIDEO_CONF_SVCLASS_ID               = 0x110f,
1939     INTERCOM_SVCLASS_ID                 = 0x1110,
1940     FAX_SVCLASS_ID                      = 0x1111,
1941     HEADSET_AGW_SVCLASS_ID              = 0x1112,
1942     WAP_SVCLASS_ID                      = 0x1113,
1943     WAP_CLIENT_SVCLASS_ID               = 0x1114,
1944     PANU_SVCLASS_ID                     = 0x1115,
1945     NAP_SVCLASS_ID                      = 0x1116,
1946     GN_SVCLASS_ID                       = 0x1117,
1947     DIRECT_PRINTING_SVCLASS_ID          = 0x1118,
1948     REFERENCE_PRINTING_SVCLASS_ID       = 0x1119,
1949     IMAGING_SVCLASS_ID                  = 0x111a,
1950     IMAGING_RESPONDER_SVCLASS_ID        = 0x111b,
1951     IMAGING_ARCHIVE_SVCLASS_ID          = 0x111c,
1952     IMAGING_REFOBJS_SVCLASS_ID          = 0x111d,
1953     HANDSFREE_SVCLASS_ID                = 0x111e,
1954     HANDSFREE_AGW_SVCLASS_ID            = 0x111f,
1955     DIRECT_PRT_REFOBJS_SVCLASS_ID       = 0x1120,
1956     REFLECTED_UI_SVCLASS_ID             = 0x1121,
1957     BASIC_PRINTING_SVCLASS_ID           = 0x1122,
1958     PRINTING_STATUS_SVCLASS_ID          = 0x1123,
1959     HID_SVCLASS_ID                      = 0x1124,
1960     HCR_SVCLASS_ID                      = 0x1125,
1961     HCR_PRINT_SVCLASS_ID                = 0x1126,
1962     HCR_SCAN_SVCLASS_ID                 = 0x1127,
1963     CIP_SVCLASS_ID                      = 0x1128,
1964     VIDEO_CONF_GW_SVCLASS_ID            = 0x1129,
1965     UDI_MT_SVCLASS_ID                   = 0x112a,
1966     UDI_TA_SVCLASS_ID                   = 0x112b,
1967     AV_SVCLASS_ID                       = 0x112c,
1968     SAP_SVCLASS_ID                      = 0x112d,
1969     PBAP_PCE_SVCLASS_ID                 = 0x112e,
1970     PBAP_PSE_SVCLASS_ID                 = 0x112f,
1971     PBAP_SVCLASS_ID                     = 0x1130,
1972     PNP_INFO_SVCLASS_ID                 = 0x1200,
1973     GENERIC_NETWORKING_SVCLASS_ID       = 0x1201,
1974     GENERIC_FILETRANS_SVCLASS_ID        = 0x1202,
1975     GENERIC_AUDIO_SVCLASS_ID            = 0x1203,
1976     GENERIC_TELEPHONY_SVCLASS_ID        = 0x1204,
1977     UPNP_SVCLASS_ID                     = 0x1205,
1978     UPNP_IP_SVCLASS_ID                  = 0x1206,
1979     UPNP_PAN_SVCLASS_ID                 = 0x1300,
1980     UPNP_LAP_SVCLASS_ID                 = 0x1301,
1981     UPNP_L2CAP_SVCLASS_ID               = 0x1302,
1982     VIDEO_SOURCE_SVCLASS_ID             = 0x1303,
1983     VIDEO_SINK_SVCLASS_ID               = 0x1304,
1984     VIDEO_DISTRIBUTION_SVCLASS_ID       = 0x1305,
1985     MDP_SVCLASS_ID                      = 0x1400,
1986     MDP_SOURCE_SVCLASS_ID               = 0x1401,
1987     MDP_SINK_SVCLASS_ID                 = 0x1402,
1988     APPLE_AGENT_SVCLASS_ID              = 0x2112,
1989 };
1990
1991 /*
1992  * Standard profile descriptor identifiers; note these
1993  * may be identical to some of the service classes defined above
1994  */
1995 #define SDP_SERVER_PROFILE_ID           SDP_SERVER_SVCLASS_ID
1996 #define BROWSE_GRP_DESC_PROFILE_ID      BROWSE_GRP_DESC_SVCLASS_ID
1997 #define SERIAL_PORT_PROFILE_ID          SERIAL_PORT_SVCLASS_ID
1998 #define LAN_ACCESS_PROFILE_ID           LAN_ACCESS_SVCLASS_ID
1999 #define DIALUP_NET_PROFILE_ID           DIALUP_NET_SVCLASS_ID
2000 #define IRMC_SYNC_PROFILE_ID            IRMC_SYNC_SVCLASS_ID
2001 #define OBEX_OBJPUSH_PROFILE_ID         OBEX_OBJPUSH_SVCLASS_ID
2002 #define OBEX_FILETRANS_PROFILE_ID       OBEX_FILETRANS_SVCLASS_ID
2003 #define IRMC_SYNC_CMD_PROFILE_ID        IRMC_SYNC_CMD_SVCLASS_ID
2004 #define HEADSET_PROFILE_ID              HEADSET_SVCLASS_ID
2005 #define CORDLESS_TELEPHONY_PROFILE_ID   CORDLESS_TELEPHONY_SVCLASS_ID
2006 #define AUDIO_SOURCE_PROFILE_ID         AUDIO_SOURCE_SVCLASS_ID
2007 #define AUDIO_SINK_PROFILE_ID           AUDIO_SINK_SVCLASS_ID
2008 #define AV_REMOTE_TARGET_PROFILE_ID     AV_REMOTE_TARGET_SVCLASS_ID
2009 #define ADVANCED_AUDIO_PROFILE_ID       ADVANCED_AUDIO_SVCLASS_ID
2010 #define AV_REMOTE_PROFILE_ID            AV_REMOTE_SVCLASS_ID
2011 #define VIDEO_CONF_PROFILE_ID           VIDEO_CONF_SVCLASS_ID
2012 #define INTERCOM_PROFILE_ID             INTERCOM_SVCLASS_ID
2013 #define FAX_PROFILE_ID                  FAX_SVCLASS_ID
2014 #define HEADSET_AGW_PROFILE_ID          HEADSET_AGW_SVCLASS_ID
2015 #define WAP_PROFILE_ID                  WAP_SVCLASS_ID
2016 #define WAP_CLIENT_PROFILE_ID           WAP_CLIENT_SVCLASS_ID
2017 #define PANU_PROFILE_ID                 PANU_SVCLASS_ID
2018 #define NAP_PROFILE_ID                  NAP_SVCLASS_ID
2019 #define GN_PROFILE_ID                   GN_SVCLASS_ID
2020 #define DIRECT_PRINTING_PROFILE_ID      DIRECT_PRINTING_SVCLASS_ID
2021 #define REFERENCE_PRINTING_PROFILE_ID   REFERENCE_PRINTING_SVCLASS_ID
2022 #define IMAGING_PROFILE_ID              IMAGING_SVCLASS_ID
2023 #define IMAGING_RESPONDER_PROFILE_ID    IMAGING_RESPONDER_SVCLASS_ID
2024 #define IMAGING_ARCHIVE_PROFILE_ID      IMAGING_ARCHIVE_SVCLASS_ID
2025 #define IMAGING_REFOBJS_PROFILE_ID      IMAGING_REFOBJS_SVCLASS_ID
2026 #define HANDSFREE_PROFILE_ID            HANDSFREE_SVCLASS_ID
2027 #define HANDSFREE_AGW_PROFILE_ID        HANDSFREE_AGW_SVCLASS_ID
2028 #define DIRECT_PRT_REFOBJS_PROFILE_ID   DIRECT_PRT_REFOBJS_SVCLASS_ID
2029 #define REFLECTED_UI_PROFILE_ID         REFLECTED_UI_SVCLASS_ID
2030 #define BASIC_PRINTING_PROFILE_ID       BASIC_PRINTING_SVCLASS_ID
2031 #define PRINTING_STATUS_PROFILE_ID      PRINTING_STATUS_SVCLASS_ID
2032 #define HID_PROFILE_ID                  HID_SVCLASS_ID
2033 #define HCR_PROFILE_ID                  HCR_SCAN_SVCLASS_ID
2034 #define HCR_PRINT_PROFILE_ID            HCR_PRINT_SVCLASS_ID
2035 #define HCR_SCAN_PROFILE_ID             HCR_SCAN_SVCLASS_ID
2036 #define CIP_PROFILE_ID                  CIP_SVCLASS_ID
2037 #define VIDEO_CONF_GW_PROFILE_ID        VIDEO_CONF_GW_SVCLASS_ID
2038 #define UDI_MT_PROFILE_ID               UDI_MT_SVCLASS_ID
2039 #define UDI_TA_PROFILE_ID               UDI_TA_SVCLASS_ID
2040 #define AV_PROFILE_ID                   AV_SVCLASS_ID
2041 #define SAP_PROFILE_ID                  SAP_SVCLASS_ID
2042 #define PBAP_PCE_PROFILE_ID             PBAP_PCE_SVCLASS_ID
2043 #define PBAP_PSE_PROFILE_ID             PBAP_PSE_SVCLASS_ID
2044 #define PBAP_PROFILE_ID                 PBAP_SVCLASS_ID
2045 #define PNP_INFO_PROFILE_ID             PNP_INFO_SVCLASS_ID
2046 #define GENERIC_NETWORKING_PROFILE_ID   GENERIC_NETWORKING_SVCLASS_ID
2047 #define GENERIC_FILETRANS_PROFILE_ID    GENERIC_FILETRANS_SVCLASS_ID
2048 #define GENERIC_AUDIO_PROFILE_ID        GENERIC_AUDIO_SVCLASS_ID
2049 #define GENERIC_TELEPHONY_PROFILE_ID    GENERIC_TELEPHONY_SVCLASS_ID
2050 #define UPNP_PROFILE_ID                 UPNP_SVCLASS_ID
2051 #define UPNP_IP_PROFILE_ID              UPNP_IP_SVCLASS_ID
2052 #define UPNP_PAN_PROFILE_ID             UPNP_PAN_SVCLASS_ID
2053 #define UPNP_LAP_PROFILE_ID             UPNP_LAP_SVCLASS_ID
2054 #define UPNP_L2CAP_PROFILE_ID           UPNP_L2CAP_SVCLASS_ID
2055 #define VIDEO_SOURCE_PROFILE_ID         VIDEO_SOURCE_SVCLASS_ID
2056 #define VIDEO_SINK_PROFILE_ID           VIDEO_SINK_SVCLASS_ID
2057 #define VIDEO_DISTRIBUTION_PROFILE_ID   VIDEO_DISTRIBUTION_SVCLASS_ID
2058 #define MDP_PROFILE_ID                  MDP_SVCLASS_ID
2059 #define MDP_SOURCE_PROFILE_ID           MDP_SROUCE_SVCLASS_ID
2060 #define MDP_SINK_PROFILE_ID             MDP_SINK_SVCLASS_ID
2061 #define APPLE_AGENT_PROFILE_ID          APPLE_AGENT_SVCLASS_ID
2062
2063 /* Data Representation */
2064 enum bt_sdp_data_type {
2065     SDP_DTYPE_NIL       = 0 << 3,
2066     SDP_DTYPE_UINT      = 1 << 3,
2067     SDP_DTYPE_SINT      = 2 << 3,
2068     SDP_DTYPE_UUID      = 3 << 3,
2069     SDP_DTYPE_STRING    = 4 << 3,
2070     SDP_DTYPE_BOOL      = 5 << 3,
2071     SDP_DTYPE_SEQ       = 6 << 3,
2072     SDP_DTYPE_ALT       = 7 << 3,
2073     SDP_DTYPE_URL       = 8 << 3,
2074 };
2075
2076 enum bt_sdp_data_size {
2077     SDP_DSIZE_1         = 0,
2078     SDP_DSIZE_2,
2079     SDP_DSIZE_4,
2080     SDP_DSIZE_8,
2081     SDP_DSIZE_16,
2082     SDP_DSIZE_NEXT1,
2083     SDP_DSIZE_NEXT2,
2084     SDP_DSIZE_NEXT4,
2085     SDP_DSIZE_MASK = SDP_DSIZE_NEXT4,
2086 };
2087
2088 enum bt_sdp_cmd {
2089     SDP_ERROR_RSP               = 0x01,
2090     SDP_SVC_SEARCH_REQ          = 0x02,
2091     SDP_SVC_SEARCH_RSP          = 0x03,
2092     SDP_SVC_ATTR_REQ            = 0x04,
2093     SDP_SVC_ATTR_RSP            = 0x05,
2094     SDP_SVC_SEARCH_ATTR_REQ     = 0x06,
2095     SDP_SVC_SEARCH_ATTR_RSP     = 0x07,
2096 };
2097
2098 enum bt_sdp_errorcode {
2099     SDP_INVALID_VERSION         = 0x0001,
2100     SDP_INVALID_RECORD_HANDLE   = 0x0002,
2101     SDP_INVALID_SYNTAX          = 0x0003,
2102     SDP_INVALID_PDU_SIZE        = 0x0004,
2103     SDP_INVALID_CSTATE          = 0x0005,
2104 };
2105
2106 /*
2107  * String identifiers are based on the SDP spec stating that
2108  * "base attribute id of the primary (universal) language must be 0x0100"
2109  *
2110  * Other languages should have their own offset; e.g.:
2111  * #define XXXLangBase yyyy
2112  * #define AttrServiceName_XXX  0x0000+XXXLangBase
2113  */
2114 #define SDP_PRIMARY_LANG_BASE           0x0100
2115
2116 enum bt_sdp_attribute_id {
2117     SDP_ATTR_RECORD_HANDLE                      = 0x0000,
2118     SDP_ATTR_SVCLASS_ID_LIST                    = 0x0001,
2119     SDP_ATTR_RECORD_STATE                       = 0x0002,
2120     SDP_ATTR_SERVICE_ID                         = 0x0003,
2121     SDP_ATTR_PROTO_DESC_LIST                    = 0x0004,
2122     SDP_ATTR_BROWSE_GRP_LIST                    = 0x0005,
2123     SDP_ATTR_LANG_BASE_ATTR_ID_LIST             = 0x0006,
2124     SDP_ATTR_SVCINFO_TTL                        = 0x0007,
2125     SDP_ATTR_SERVICE_AVAILABILITY               = 0x0008,
2126     SDP_ATTR_PFILE_DESC_LIST                    = 0x0009,
2127     SDP_ATTR_DOC_URL                            = 0x000a,
2128     SDP_ATTR_CLNT_EXEC_URL                      = 0x000b,
2129     SDP_ATTR_ICON_URL                           = 0x000c,
2130     SDP_ATTR_ADD_PROTO_DESC_LIST                = 0x000d,
2131
2132     SDP_ATTR_SVCNAME_PRIMARY                    = SDP_PRIMARY_LANG_BASE + 0,
2133     SDP_ATTR_SVCDESC_PRIMARY                    = SDP_PRIMARY_LANG_BASE + 1,
2134     SDP_ATTR_SVCPROV_PRIMARY                    = SDP_PRIMARY_LANG_BASE + 2,
2135
2136     SDP_ATTR_GROUP_ID                           = 0x0200,
2137     SDP_ATTR_IP_SUBNET                          = 0x0200,
2138
2139     /* SDP */
2140     SDP_ATTR_VERSION_NUM_LIST                   = 0x0200,
2141     SDP_ATTR_SVCDB_STATE                        = 0x0201,
2142
2143     SDP_ATTR_SERVICE_VERSION                    = 0x0300,
2144     SDP_ATTR_EXTERNAL_NETWORK                   = 0x0301,
2145     SDP_ATTR_SUPPORTED_DATA_STORES_LIST         = 0x0301,
2146     SDP_ATTR_FAX_CLASS1_SUPPORT                 = 0x0302,
2147     SDP_ATTR_REMOTE_AUDIO_VOLUME_CONTROL        = 0x0302,
2148     SDP_ATTR_FAX_CLASS20_SUPPORT                = 0x0303,
2149     SDP_ATTR_SUPPORTED_FORMATS_LIST             = 0x0303,
2150     SDP_ATTR_FAX_CLASS2_SUPPORT                 = 0x0304,
2151     SDP_ATTR_AUDIO_FEEDBACK_SUPPORT             = 0x0305,
2152     SDP_ATTR_NETWORK_ADDRESS                    = 0x0306,
2153     SDP_ATTR_WAP_GATEWAY                        = 0x0307,
2154     SDP_ATTR_HOMEPAGE_URL                       = 0x0308,
2155     SDP_ATTR_WAP_STACK_TYPE                     = 0x0309,
2156     SDP_ATTR_SECURITY_DESC                      = 0x030a,
2157     SDP_ATTR_NET_ACCESS_TYPE                    = 0x030b,
2158     SDP_ATTR_MAX_NET_ACCESSRATE                 = 0x030c,
2159     SDP_ATTR_IP4_SUBNET                         = 0x030d,
2160     SDP_ATTR_IP6_SUBNET                         = 0x030e,
2161     SDP_ATTR_SUPPORTED_CAPABILITIES             = 0x0310,
2162     SDP_ATTR_SUPPORTED_FEATURES                 = 0x0311,
2163     SDP_ATTR_SUPPORTED_FUNCTIONS                = 0x0312,
2164     SDP_ATTR_TOTAL_IMAGING_DATA_CAPACITY        = 0x0313,
2165     SDP_ATTR_SUPPORTED_REPOSITORIES             = 0x0314,
2166
2167     /* PnP Information */
2168     SDP_ATTR_SPECIFICATION_ID                   = 0x0200,
2169     SDP_ATTR_VENDOR_ID                          = 0x0201,
2170     SDP_ATTR_PRODUCT_ID                         = 0x0202,
2171     SDP_ATTR_VERSION                            = 0x0203,
2172     SDP_ATTR_PRIMARY_RECORD                     = 0x0204,
2173     SDP_ATTR_VENDOR_ID_SOURCE                   = 0x0205,
2174
2175     /* BT HID */
2176     SDP_ATTR_DEVICE_RELEASE_NUMBER              = 0x0200,
2177     SDP_ATTR_PARSER_VERSION                     = 0x0201,
2178     SDP_ATTR_DEVICE_SUBCLASS                    = 0x0202,
2179     SDP_ATTR_COUNTRY_CODE                       = 0x0203,
2180     SDP_ATTR_VIRTUAL_CABLE                      = 0x0204,
2181     SDP_ATTR_RECONNECT_INITIATE                 = 0x0205,
2182     SDP_ATTR_DESCRIPTOR_LIST                    = 0x0206,
2183     SDP_ATTR_LANG_ID_BASE_LIST                  = 0x0207,
2184     SDP_ATTR_SDP_DISABLE                        = 0x0208,
2185     SDP_ATTR_BATTERY_POWER                      = 0x0209,
2186     SDP_ATTR_REMOTE_WAKEUP                      = 0x020a,
2187     SDP_ATTR_PROFILE_VERSION                    = 0x020b,
2188     SDP_ATTR_SUPERVISION_TIMEOUT                = 0x020c,
2189     SDP_ATTR_NORMALLY_CONNECTABLE               = 0x020d,
2190     SDP_ATTR_BOOT_DEVICE                        = 0x020e,
2191 };
2192
2193 #endif