qemu/hw/sd/milkymist-memcard.c

   1 /*
   2  *  QEMU model of the Milkymist SD Card Controller.
   3  *
   4  *  Copyright (c) 2010 Michael Walle <michael@walle.cc>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  *
  19  *
  20  * Specification available at:
  21  *   http://www.milkymist.org/socdoc/memcard.pdf
  22  */
  23
  24 #include "qemu/osdep.h"
  25 #include "hw/hw.h"
  26 #include "hw/sysbus.h"
  27 #include "sysemu/sysemu.h"
  28 #include "trace.h"
  29 #include "qemu/error-report.h"
  30 #include "sysemu/block-backend.h"
  31 #include "sysemu/blockdev.h"
  32 #include "hw/sd/sd.h"
  33
  34 enum {
  35     ENABLE_CMD_TX   = (1<<0),
  36     ENABLE_CMD_RX   = (1<<1),
  37     ENABLE_DAT_TX   = (1<<2),
  38     ENABLE_DAT_RX   = (1<<3),
  39 };
  40
  41 enum {
  42     PENDING_CMD_TX   = (1<<0),
  43     PENDING_CMD_RX   = (1<<1),
  44     PENDING_DAT_TX   = (1<<2),
  45     PENDING_DAT_RX   = (1<<3),
  46 };
  47
  48 enum {
  49     START_CMD_TX    = (1<<0),
  50     START_DAT_RX    = (1<<1),
  51 };
  52
  53 enum {
  54     R_CLK2XDIV = 0,
  55     R_ENABLE,
  56     R_PENDING,
  57     R_START,
  58     R_CMD,
  59     R_DAT,
  60     R_MAX
  61 };
  62
  63 #define TYPE_MILKYMIST_MEMCARD "milkymist-memcard"
  64 #define MILKYMIST_MEMCARD(obj) \
  65     OBJECT_CHECK(MilkymistMemcardState, (obj), TYPE_MILKYMIST_MEMCARD)
  66
  67 struct MilkymistMemcardState {
  68     SysBusDevice parent_obj;
  69
  70     MemoryRegion regs_region;
  71     SDState *card;
  72
  73     int command_write_ptr;
  74     int response_read_ptr;
  75     int response_len;
  76     int ignore_next_cmd;
  77     int enabled;
  78     uint8_t command[6];
  79     uint8_t response[17];
  80     uint32_t regs[R_MAX];
  81 };
  82 typedef struct MilkymistMemcardState MilkymistMemcardState;
  83
  84 static void update_pending_bits(MilkymistMemcardState *s)
  85 {
  86     /* transmits are instantaneous, thus tx pending bits are never set */
  87     s->regs[R_PENDING] = 0;
  88     /* if rx is enabled the corresponding pending bits are always set */
  89     if (s->regs[R_ENABLE] & ENABLE_CMD_RX) {
  90         s->regs[R_PENDING] |= PENDING_CMD_RX;
  91     }
  92     if (s->regs[R_ENABLE] & ENABLE_DAT_RX) {
  93         s->regs[R_PENDING] |= PENDING_DAT_RX;
  94     }
  95 }
  96
  97 static void memcard_sd_command(MilkymistMemcardState *s)
  98 {
  99     SDRequest req;
 100
 101     req.cmd = s->command[0] & 0x3f;
 102     req.arg = (s->command[1] << 24) | (s->command[2] << 16)
 103               | (s->command[3] << 8) | s->command[4];
 104     req.crc = s->command[5];
 105
 106     s->response[0] = req.cmd;
 107     s->response_len = sd_do_command(s->card, &req, s->response+1);
 108     s->response_read_ptr = 0;
 109
 110     if (s->response_len == 16) {
 111         /* R2 response */
 112         s->response[0] = 0x3f;
 113         s->response_len += 1;
 114     } else if (s->response_len == 4) {
 115         /* no crc calculation, insert dummy byte */
 116         s->response[5] = 0;
 117         s->response_len += 2;
 118     }
 119
 120     if (req.cmd == 0) {
 121         /* next write is a dummy byte to clock the initialization of the sd
 122          * card */
 123         s->ignore_next_cmd = 1;
 124     }
 125 }
 126
 127 static uint64_t memcard_read(void *opaque, hwaddr addr,
 128                              unsigned size)
 129 {
 130     MilkymistMemcardState *s = opaque;
 131     uint32_t r = 0;
 132
 133     addr >>= 2;
 134     switch (addr) {
 135     case R_CMD:
 136         if (!s->enabled) {
 137             r = 0xff;
 138         } else {
 139             r = s->response[s->response_read_ptr++];
 140             if (s->response_read_ptr > s->response_len) {
 141                 error_report("milkymist_memcard: "
 142                         "read more cmd bytes than available. Clipping.");
 143                 s->response_read_ptr = 0;
 144             }
 145         }
 146         break;
 147     case R_DAT:
 148         if (!s->enabled) {
 149             r = 0xffffffff;
 150         } else {
 151             r = 0;
 152             r |= sd_read_data(s->card) << 24;
 153             r |= sd_read_data(s->card) << 16;
 154             r |= sd_read_data(s->card) << 8;
 155             r |= sd_read_data(s->card);
 156         }
 157         break;
 158     case R_CLK2XDIV:
 159     case R_ENABLE:
 160     case R_PENDING:
 161     case R_START:
 162         r = s->regs[addr];
 163         break;
 164
 165     default:
 166         error_report("milkymist_memcard: read access to unknown register 0x"
 167                 TARGET_FMT_plx, addr << 2);
 168         break;
 169     }
 170
 171     trace_milkymist_memcard_memory_read(addr << 2, r);
 172
 173     return r;
 174 }
 175
 176 static void memcard_write(void *opaque, hwaddr addr, uint64_t value,
 177                           unsigned size)
 178 {
 179     MilkymistMemcardState *s = opaque;
 180
 181     trace_milkymist_memcard_memory_write(addr, value);
 182
 183     addr >>= 2;
 184     switch (addr) {
 185     case R_PENDING:
 186         /* clear rx pending bits */
 187         s->regs[R_PENDING] &= ~(value & (PENDING_CMD_RX | PENDING_DAT_RX));
 188         update_pending_bits(s);
 189         break;
 190     case R_CMD:
 191         if (!s->enabled) {
 192             break;
 193         }
 194         if (s->ignore_next_cmd) {
 195             s->ignore_next_cmd = 0;
 196             break;
 197         }
 198         s->command[s->command_write_ptr] = value & 0xff;
 199         s->command_write_ptr = (s->command_write_ptr + 1) % 6;
 200         if (s->command_write_ptr == 0) {
 201             memcard_sd_command(s);
 202         }
 203         break;
 204     case R_DAT:
 205         if (!s->enabled) {
 206             break;
 207         }
 208         sd_write_data(s->card, (value >> 24) & 0xff);
 209         sd_write_data(s->card, (value >> 16) & 0xff);
 210         sd_write_data(s->card, (value >> 8) & 0xff);
 211         sd_write_data(s->card, value & 0xff);
 212         break;
 213     case R_ENABLE:
 214         s->regs[addr] = value;
 215         update_pending_bits(s);
 216         break;
 217     case R_CLK2XDIV:
 218     case R_START:
 219         s->regs[addr] = value;
 220         break;
 221
 222     default:
 223         error_report("milkymist_memcard: write access to unknown register 0x"
 224                 TARGET_FMT_plx, addr << 2);
 225         break;
 226     }
 227 }
 228
 229 static const MemoryRegionOps memcard_mmio_ops = {
 230     .read = memcard_read,
 231     .write = memcard_write,
 232     .valid = {
 233         .min_access_size = 4,
 234         .max_access_size = 4,
 235     },
 236     .endianness = DEVICE_NATIVE_ENDIAN,
 237 };
 238
 239 static void milkymist_memcard_reset(DeviceState *d)
 240 {
 241     MilkymistMemcardState *s = MILKYMIST_MEMCARD(d);
 242     int i;
 243
 244     s->command_write_ptr = 0;
 245     s->response_read_ptr = 0;
 246     s->response_len = 0;
 247
 248     for (i = 0; i < R_MAX; i++) {
 249         s->regs[i] = 0;
 250     }
 251 }
 252
 253 static int milkymist_memcard_init(SysBusDevice *dev)
 254 {
 255     MilkymistMemcardState *s = MILKYMIST_MEMCARD(dev);
 256     DriveInfo *dinfo;
 257     BlockBackend *blk;
 258
 259     /* FIXME use a qdev drive property instead of drive_get_next() */
 260     dinfo = drive_get_next(IF_SD);
 261     blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
 262     s->card = sd_init(blk, false);
 263     if (s->card == NULL) {
 264         return -1;
 265     }
 266
 267     s->enabled = blk && blk_is_inserted(blk);
 268
 269     memory_region_init_io(&s->regs_region, OBJECT(s), &memcard_mmio_ops, s,
 270             "milkymist-memcard", R_MAX * 4);
 271     sysbus_init_mmio(dev, &s->regs_region);
 272
 273     return 0;
 274 }
 275
 276 static const VMStateDescription vmstate_milkymist_memcard = {
 277     .name = "milkymist-memcard",
 278     .version_id = 1,
 279     .minimum_version_id = 1,
 280     .fields = (VMStateField[]) {
 281         VMSTATE_INT32(command_write_ptr, MilkymistMemcardState),
 282         VMSTATE_INT32(response_read_ptr, MilkymistMemcardState),
 283         VMSTATE_INT32(response_len, MilkymistMemcardState),
 284         VMSTATE_INT32(ignore_next_cmd, MilkymistMemcardState),
 285         VMSTATE_INT32(enabled, MilkymistMemcardState),
 286         VMSTATE_UINT8_ARRAY(command, MilkymistMemcardState, 6),
 287         VMSTATE_UINT8_ARRAY(response, MilkymistMemcardState, 17),
 288         VMSTATE_UINT32_ARRAY(regs, MilkymistMemcardState, R_MAX),
 289         VMSTATE_END_OF_LIST()
 290     }
 291 };
 292
 293 static void milkymist_memcard_class_init(ObjectClass *klass, void *data)
 294 {
 295     DeviceClass *dc = DEVICE_CLASS(klass);
 296     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 297
 298     k->init = milkymist_memcard_init;
 299     dc->reset = milkymist_memcard_reset;
 300     dc->vmsd = &vmstate_milkymist_memcard;
 301     /* Reason: init() method uses drive_get_next() */
 302     dc->cannot_instantiate_with_device_add_yet = true;
 303 }
 304
 305 static const TypeInfo milkymist_memcard_info = {
 306     .name          = TYPE_MILKYMIST_MEMCARD,
 307     .parent        = TYPE_SYS_BUS_DEVICE,
 308     .instance_size = sizeof(MilkymistMemcardState),
 309     .class_init    = milkymist_memcard_class_init,
 310 };
 311
 312 static void milkymist_memcard_register_types(void)
 313 {
 314     type_register_static(&milkymist_memcard_info);
 315 }
 316
 317 type_init(milkymist_memcard_register_types)