Add qemu 2.4.0
[kvmfornfv.git] / qemu / hw / i386 / acpi-dsdt.dsl
1 /*
2  * Bochs/QEMU ACPI DSDT ASL definition
3  *
4  * Copyright (c) 2006 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License version 2 as published by the Free Software Foundation.
9  *
10  * This library is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * Lesser General Public License for more details.
14  *
15  * You should have received a copy of the GNU Lesser General Public
16  * License along with this library; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18  */
19
20 ACPI_EXTRACT_ALL_CODE AcpiDsdtAmlCode
21
22 DefinitionBlock (
23     "acpi-dsdt.aml",    // Output Filename
24     "DSDT",             // Signature
25     0x01,               // DSDT Compliance Revision
26     "BXPC",             // OEMID
27     "BXDSDT",           // TABLE ID
28     0x1                 // OEM Revision
29     )
30 {
31
32 #include "acpi-dsdt-dbug.dsl"
33
34     Scope(\_SB) {
35         Device(PCI0) {
36             Name(_HID, EisaId("PNP0A03"))
37             Name(_ADR, 0x00)
38             Name(_UID, 1)
39 //#define PX13 S0B_
40 //            External(PX13, DeviceObj)
41         }
42     }
43
44 #include "acpi-dsdt-hpet.dsl"
45
46
47 /****************************************************************
48  * PIIX4 PM
49  ****************************************************************/
50
51     Scope(\_SB.PCI0) {
52         Device(PX13) {
53             Name(_ADR, 0x00010003)
54             OperationRegion(P13C, PCI_Config, 0x00, 0xff)
55         }
56     }
57
58
59 /****************************************************************
60  * PIIX3 ISA bridge
61  ****************************************************************/
62
63     Scope(\_SB.PCI0) {
64
65         External(ISA, DeviceObj)
66
67         Device(ISA) {
68             Name(_ADR, 0x00010000)
69
70             /* PIIX PCI to ISA irq remapping */
71             OperationRegion(P40C, PCI_Config, 0x60, 0x04)
72
73             /* enable bits */
74             Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) {
75                 Offset(0x5f),
76                 , 7,
77                 LPEN, 1,         // LPT
78                 Offset(0x67),
79                 , 3,
80                 CAEN, 1,         // COM1
81                 , 3,
82                 CBEN, 1,         // COM2
83             }
84             Name(FDEN, 1)
85         }
86     }
87
88 #include "acpi-dsdt-isa.dsl"
89
90
91 /****************************************************************
92  * PCI hotplug
93  ****************************************************************/
94
95     Scope(\_SB.PCI0) {
96         OperationRegion(PCST, SystemIO, 0xae00, 0x08)
97         Field(PCST, DWordAcc, NoLock, WriteAsZeros) {
98             PCIU, 32,
99             PCID, 32,
100         }
101
102         OperationRegion(SEJ, SystemIO, 0xae08, 0x04)
103         Field(SEJ, DWordAcc, NoLock, WriteAsZeros) {
104             B0EJ, 32,
105         }
106
107         OperationRegion(BNMR, SystemIO, 0xae10, 0x04)
108         Field(BNMR, DWordAcc, NoLock, WriteAsZeros) {
109             BNUM, 32,
110         }
111
112         /* Lock to protect access to fields above. */
113         Mutex(BLCK, 0)
114
115         /* Methods called by bulk generated PCI devices below */
116
117         /* Methods called by hotplug devices */
118         Method(PCEJ, 2, NotSerialized) {
119             // _EJ0 method - eject callback
120             Acquire(BLCK, 0xFFFF)
121             Store(Arg0, BNUM)
122             Store(ShiftLeft(1, Arg1), B0EJ)
123             Release(BLCK)
124             Return (0x0)
125         }
126
127         /* Hotplug notification method supplied by SSDT */
128         External(\_SB.PCI0.PCNT, MethodObj)
129     }
130
131
132 /****************************************************************
133  * PCI IRQs
134  ****************************************************************/
135
136     Scope(\_SB) {
137         Scope(PCI0) {
138             Method (_PRT, 0) {
139                 Store(Package(128) {}, Local0)
140                 Store(Zero, Local1)
141                 While(LLess(Local1, 128)) {
142                     // slot = pin >> 2
143                     Store(ShiftRight(Local1, 2), Local2)
144
145                     // lnk = (slot + pin) & 3
146                     Store(And(Add(Local1, Local2), 3), Local3)
147                     If (LEqual(Local3, 0)) {
148                         Store(Package(4) { Zero, Zero, LNKD, Zero }, Local4)
149                     }
150                     If (LEqual(Local3, 1)) {
151                         // device 1 is the power-management device, needs SCI
152                         If (LEqual(Local1, 4)) {
153                             Store(Package(4) { Zero, Zero, LNKS, Zero }, Local4)
154                         } Else {
155                             Store(Package(4) { Zero, Zero, LNKA, Zero }, Local4)
156                         }
157                     }
158                     If (LEqual(Local3, 2)) {
159                         Store(Package(4) { Zero, Zero, LNKB, Zero }, Local4)
160                     }
161                     If (LEqual(Local3, 3)) {
162                         Store(Package(4) { Zero, Zero, LNKC, Zero }, Local4)
163                     }
164
165                     // Complete the interrupt routing entry:
166                     //    Package(4) { 0x[slot]FFFF, [pin], [link], 0) }
167
168                     Store(Or(ShiftLeft(Local2, 16), 0xFFFF), Index(Local4, 0))
169                     Store(And(Local1, 3),                    Index(Local4, 1))
170                     Store(Local4,                            Index(Local0, Local1))
171
172                     Increment(Local1)
173                 }
174
175                 Return(Local0)
176             }
177         }
178
179         Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
180             PRQ0,   8,
181             PRQ1,   8,
182             PRQ2,   8,
183             PRQ3,   8
184         }
185
186         Method(IQST, 1, NotSerialized) {
187             // _STA method - get status
188             If (And(0x80, Arg0)) {
189                 Return (0x09)
190             }
191             Return (0x0B)
192         }
193         Method(IQCR, 1, Serialized) {
194             // _CRS method - get current settings
195             Name(PRR0, ResourceTemplate() {
196                 Interrupt(, Level, ActiveHigh, Shared) { 0 }
197             })
198             CreateDWordField(PRR0, 0x05, PRRI)
199             If (LLess(Arg0, 0x80)) {
200                 Store(Arg0, PRRI)
201             }
202             Return (PRR0)
203         }
204
205 #define define_link(link, uid, reg)                             \
206         Device(link) {                                          \
207             Name(_HID, EISAID("PNP0C0F"))                       \
208             Name(_UID, uid)                                     \
209             Name(_PRS, ResourceTemplate() {                     \
210                 Interrupt(, Level, ActiveHigh, Shared) {        \
211                     5, 10, 11                                   \
212                 }                                               \
213             })                                                  \
214             Method(_STA, 0, NotSerialized) {                    \
215                 Return (IQST(reg))                              \
216             }                                                   \
217             Method(_DIS, 0, NotSerialized) {                    \
218                 Or(reg, 0x80, reg)                              \
219             }                                                   \
220             Method(_CRS, 0, NotSerialized) {                    \
221                 Return (IQCR(reg))                              \
222             }                                                   \
223             Method(_SRS, 1, NotSerialized) {                    \
224                 CreateDWordField(Arg0, 0x05, PRRI)              \
225                 Store(PRRI, reg)                                \
226             }                                                   \
227         }
228
229         define_link(LNKA, 0, PRQ0)
230         define_link(LNKB, 1, PRQ1)
231         define_link(LNKC, 2, PRQ2)
232         define_link(LNKD, 3, PRQ3)
233
234         Device(LNKS) {
235             Name(_HID, EISAID("PNP0C0F"))
236             Name(_UID, 4)
237             Name(_PRS, ResourceTemplate() {
238                 Interrupt(, Level, ActiveHigh, Shared) { 9 }
239             })
240
241             // The SCI cannot be disabled and is always attached to GSI 9,
242             // so these are no-ops.  We only need this link to override the
243             // polarity to active high and match the content of the MADT.
244             Method(_STA, 0, NotSerialized) { Return (0x0b) }
245             Method(_DIS, 0, NotSerialized) { }
246             Method(_CRS, 0, NotSerialized) { Return (_PRS) }
247             Method(_SRS, 1, NotSerialized) { }
248         }
249     }
250
251 #include "hw/acpi/pc-hotplug.h"
252 #define CPU_STATUS_BASE PIIX4_CPU_HOTPLUG_IO_BASE
253 #include "acpi-dsdt-cpu-hotplug.dsl"
254 #include "acpi-dsdt-mem-hotplug.dsl"
255
256
257 /****************************************************************
258  * General purpose events
259  ****************************************************************/
260     Scope(\_GPE) {
261         Name(_HID, "ACPI0006")
262
263         Method(_L00) {
264         }
265         Method(_E01) {
266             // PCI hotplug event
267             Acquire(\_SB.PCI0.BLCK, 0xFFFF)
268             \_SB.PCI0.PCNT()
269             Release(\_SB.PCI0.BLCK)
270         }
271         Method(_E02) {
272             // CPU hotplug event
273             \_SB.PRSC()
274         }
275         Method(_E03) {
276             // Memory hotplug event
277             \_SB.PCI0.MEMORY_HOTPLUG_DEVICE.MEMORY_SLOT_SCAN_METHOD()
278         }
279         Method(_L04) {
280         }
281         Method(_L05) {
282         }
283         Method(_L06) {
284         }
285         Method(_L07) {
286         }
287         Method(_L08) {
288         }
289         Method(_L09) {
290         }
291         Method(_L0A) {
292         }
293         Method(_L0B) {
294         }
295         Method(_L0C) {
296         }
297         Method(_L0D) {
298         }
299         Method(_L0E) {
300         }
301         Method(_L0F) {
302         }
303     }
304 }