qemu/hw/acpi/ich9.c

   1 /*
   2  * ACPI implementation
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   6  *                    VA Linux Systems Japan K.K.
   7  * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   8  *
   9  * This is based on acpi.c.
  10  *
  11  * This library is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU Lesser General Public
  13  * License version 2 as published by the Free Software Foundation.
  14  *
  15  * This library is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * Lesser General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU Lesser General Public
  21  * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22  *
  23  * Contributions after 2012-01-13 are licensed under the terms of the
  24  * GNU GPL, version 2 or (at your option) any later version.
  25  */
  26 #include "qemu/osdep.h"
  27 #include "hw/hw.h"
  28 #include "qapi/error.h"
  29 #include "qapi/visitor.h"
  30 #include "hw/i386/pc.h"
  31 #include "hw/pci/pci.h"
  32 #include "qemu/timer.h"
  33 #include "sysemu/sysemu.h"
  34 #include "hw/acpi/acpi.h"
  35 #include "hw/acpi/tco.h"
  36 #include "sysemu/kvm.h"
  37 #include "exec/address-spaces.h"
  38
  39 #include "hw/i386/ich9.h"
  40 #include "hw/mem/pc-dimm.h"
  41
  42 //#define DEBUG
  43
  44 #ifdef DEBUG
  45 #define ICH9_DEBUG(fmt, ...) \
  46 do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
  47 #else
  48 #define ICH9_DEBUG(fmt, ...)    do { } while (0)
  49 #endif
  50
  51 static void ich9_pm_update_sci_fn(ACPIREGS *regs)
  52 {
  53     ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
  54     acpi_update_sci(&pm->acpi_regs, pm->irq);
  55 }
  56
  57 static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
  58 {
  59     ICH9LPCPMRegs *pm = opaque;
  60     return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
  61 }
  62
  63 static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
  64                             unsigned width)
  65 {
  66     ICH9LPCPMRegs *pm = opaque;
  67     acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
  68     acpi_update_sci(&pm->acpi_regs, pm->irq);
  69 }
  70
  71 static const MemoryRegionOps ich9_gpe_ops = {
  72     .read = ich9_gpe_readb,
  73     .write = ich9_gpe_writeb,
  74     .valid.min_access_size = 1,
  75     .valid.max_access_size = 4,
  76     .impl.min_access_size = 1,
  77     .impl.max_access_size = 1,
  78     .endianness = DEVICE_LITTLE_ENDIAN,
  79 };
  80
  81 static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
  82 {
  83     ICH9LPCPMRegs *pm = opaque;
  84     switch (addr) {
  85     case 0:
  86         return pm->smi_en;
  87     case 4:
  88         return pm->smi_sts;
  89     default:
  90         return 0;
  91     }
  92 }
  93
  94 static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
  95                             unsigned width)
  96 {
  97     ICH9LPCPMRegs *pm = opaque;
  98     TCOIORegs *tr = &pm->tco_regs;
  99     uint64_t tco_en;
 100
 101     switch (addr) {
 102     case 0:
 103         tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
 104         /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
 105         if (tr->tco.cnt1 & TCO_LOCK) {
 106             val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
 107         }
 108         pm->smi_en &= ~pm->smi_en_wmask;
 109         pm->smi_en |= (val & pm->smi_en_wmask);
 110         break;
 111     }
 112 }
 113
 114 static const MemoryRegionOps ich9_smi_ops = {
 115     .read = ich9_smi_readl,
 116     .write = ich9_smi_writel,
 117     .valid.min_access_size = 4,
 118     .valid.max_access_size = 4,
 119     .endianness = DEVICE_LITTLE_ENDIAN,
 120 };
 121
 122 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
 123 {
 124     ICH9_DEBUG("to 0x%x\n", pm_io_base);
 125
 126     assert((pm_io_base & ICH9_PMIO_MASK) == 0);
 127
 128     pm->pm_io_base = pm_io_base;
 129     memory_region_transaction_begin();
 130     memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
 131     memory_region_set_address(&pm->io, pm->pm_io_base);
 132     memory_region_transaction_commit();
 133 }
 134
 135 static int ich9_pm_post_load(void *opaque, int version_id)
 136 {
 137     ICH9LPCPMRegs *pm = opaque;
 138     uint32_t pm_io_base = pm->pm_io_base;
 139     pm->pm_io_base = 0;
 140     ich9_pm_iospace_update(pm, pm_io_base);
 141     return 0;
 142 }
 143
 144 #define VMSTATE_GPE_ARRAY(_field, _state)                            \
 145  {                                                                   \
 146      .name       = (stringify(_field)),                              \
 147      .version_id = 0,                                                \
 148      .num        = ICH9_PMIO_GPE0_LEN,                               \
 149      .info       = &vmstate_info_uint8,                              \
 150      .size       = sizeof(uint8_t),                                  \
 151      .flags      = VMS_ARRAY | VMS_POINTER,                          \
 152      .offset     = vmstate_offset_pointer(_state, _field, uint8_t),  \
 153  }
 154
 155 static bool vmstate_test_use_memhp(void *opaque)
 156 {
 157     ICH9LPCPMRegs *s = opaque;
 158     return s->acpi_memory_hotplug.is_enabled;
 159 }
 160
 161 static const VMStateDescription vmstate_memhp_state = {
 162     .name = "ich9_pm/memhp",
 163     .version_id = 1,
 164     .minimum_version_id = 1,
 165     .minimum_version_id_old = 1,
 166     .needed = vmstate_test_use_memhp,
 167     .fields      = (VMStateField[]) {
 168         VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
 169         VMSTATE_END_OF_LIST()
 170     }
 171 };
 172
 173 static bool vmstate_test_use_tco(void *opaque)
 174 {
 175     ICH9LPCPMRegs *s = opaque;
 176     return s->enable_tco;
 177 }
 178
 179 static const VMStateDescription vmstate_tco_io_state = {
 180     .name = "ich9_pm/tco",
 181     .version_id = 1,
 182     .minimum_version_id = 1,
 183     .minimum_version_id_old = 1,
 184     .needed = vmstate_test_use_tco,
 185     .fields      = (VMStateField[]) {
 186         VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
 187                        TCOIORegs),
 188         VMSTATE_END_OF_LIST()
 189     }
 190 };
 191
 192 const VMStateDescription vmstate_ich9_pm = {
 193     .name = "ich9_pm",
 194     .version_id = 1,
 195     .minimum_version_id = 1,
 196     .post_load = ich9_pm_post_load,
 197     .fields = (VMStateField[]) {
 198         VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
 199         VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
 200         VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
 201         VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
 202         VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
 203         VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
 204         VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
 205         VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
 206         VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
 207         VMSTATE_END_OF_LIST()
 208     },
 209     .subsections = (const VMStateDescription*[]) {
 210         &vmstate_memhp_state,
 211         &vmstate_tco_io_state,
 212         NULL
 213     }
 214 };
 215
 216 static void pm_reset(void *opaque)
 217 {
 218     ICH9LPCPMRegs *pm = opaque;
 219     ich9_pm_iospace_update(pm, 0);
 220
 221     acpi_pm1_evt_reset(&pm->acpi_regs);
 222     acpi_pm1_cnt_reset(&pm->acpi_regs);
 223     acpi_pm_tmr_reset(&pm->acpi_regs);
 224     acpi_gpe_reset(&pm->acpi_regs);
 225
 226     pm->smi_en = 0;
 227     if (!pm->smm_enabled) {
 228         /* Mark SMM as already inited to prevent SMM from running. */
 229         pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
 230     }
 231     pm->smi_en_wmask = ~0;
 232
 233     acpi_update_sci(&pm->acpi_regs, pm->irq);
 234 }
 235
 236 static void pm_powerdown_req(Notifier *n, void *opaque)
 237 {
 238     ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
 239
 240     acpi_pm1_evt_power_down(&pm->acpi_regs);
 241 }
 242
 243 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
 244                   bool smm_enabled,
 245                   qemu_irq sci_irq)
 246 {
 247     memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
 248     memory_region_set_enabled(&pm->io, false);
 249     memory_region_add_subregion(pci_address_space_io(lpc_pci),
 250                                 0, &pm->io);
 251
 252     acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 253     acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 254     acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
 255                       pm->s4_val);
 256
 257     acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
 258     memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
 259                           "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
 260     memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
 261
 262     memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
 263                           "acpi-smi", 8);
 264     memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
 265
 266     pm->smm_enabled = smm_enabled;
 267
 268     pm->enable_tco = true;
 269     acpi_pm_tco_init(&pm->tco_regs, &pm->io);
 270
 271     pm->irq = sci_irq;
 272     qemu_register_reset(pm_reset, pm);
 273     pm->powerdown_notifier.notify = pm_powerdown_req;
 274     qemu_register_powerdown_notifier(&pm->powerdown_notifier);
 275
 276     acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
 277                           &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
 278
 279     if (pm->acpi_memory_hotplug.is_enabled) {
 280         acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
 281                                  &pm->acpi_memory_hotplug);
 282     }
 283 }
 284
 285 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
 286                                  void *opaque, Error **errp)
 287 {
 288     ICH9LPCPMRegs *pm = opaque;
 289     uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
 290
 291     visit_type_uint32(v, name, &value, errp);
 292 }
 293
 294 static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp)
 295 {
 296     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 297
 298     return s->pm.acpi_memory_hotplug.is_enabled;
 299 }
 300
 301 static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
 302                                                Error **errp)
 303 {
 304     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 305
 306     s->pm.acpi_memory_hotplug.is_enabled = value;
 307 }
 308
 309 static void ich9_pm_get_disable_s3(Object *obj, Visitor *v, const char *name,
 310                                    void *opaque, Error **errp)
 311 {
 312     ICH9LPCPMRegs *pm = opaque;
 313     uint8_t value = pm->disable_s3;
 314
 315     visit_type_uint8(v, name, &value, errp);
 316 }
 317
 318 static void ich9_pm_set_disable_s3(Object *obj, Visitor *v, const char *name,
 319                                    void *opaque, Error **errp)
 320 {
 321     ICH9LPCPMRegs *pm = opaque;
 322     Error *local_err = NULL;
 323     uint8_t value;
 324
 325     visit_type_uint8(v, name, &value, &local_err);
 326     if (local_err) {
 327         goto out;
 328     }
 329     pm->disable_s3 = value;
 330 out:
 331     error_propagate(errp, local_err);
 332 }
 333
 334 static void ich9_pm_get_disable_s4(Object *obj, Visitor *v, const char *name,
 335                                    void *opaque, Error **errp)
 336 {
 337     ICH9LPCPMRegs *pm = opaque;
 338     uint8_t value = pm->disable_s4;
 339
 340     visit_type_uint8(v, name, &value, errp);
 341 }
 342
 343 static void ich9_pm_set_disable_s4(Object *obj, Visitor *v, const char *name,
 344                                    void *opaque, Error **errp)
 345 {
 346     ICH9LPCPMRegs *pm = opaque;
 347     Error *local_err = NULL;
 348     uint8_t value;
 349
 350     visit_type_uint8(v, name, &value, &local_err);
 351     if (local_err) {
 352         goto out;
 353     }
 354     pm->disable_s4 = value;
 355 out:
 356     error_propagate(errp, local_err);
 357 }
 358
 359 static void ich9_pm_get_s4_val(Object *obj, Visitor *v, const char *name,
 360                                void *opaque, Error **errp)
 361 {
 362     ICH9LPCPMRegs *pm = opaque;
 363     uint8_t value = pm->s4_val;
 364
 365     visit_type_uint8(v, name, &value, errp);
 366 }
 367
 368 static void ich9_pm_set_s4_val(Object *obj, Visitor *v, const char *name,
 369                                void *opaque, Error **errp)
 370 {
 371     ICH9LPCPMRegs *pm = opaque;
 372     Error *local_err = NULL;
 373     uint8_t value;
 374
 375     visit_type_uint8(v, name, &value, &local_err);
 376     if (local_err) {
 377         goto out;
 378     }
 379     pm->s4_val = value;
 380 out:
 381     error_propagate(errp, local_err);
 382 }
 383
 384 static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
 385 {
 386     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 387     return s->pm.enable_tco;
 388 }
 389
 390 static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
 391 {
 392     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 393     s->pm.enable_tco = value;
 394 }
 395
 396 void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp)
 397 {
 398     static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
 399     pm->acpi_memory_hotplug.is_enabled = true;
 400     pm->disable_s3 = 0;
 401     pm->disable_s4 = 0;
 402     pm->s4_val = 2;
 403
 404     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
 405                                    &pm->pm_io_base, errp);
 406     object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
 407                         ich9_pm_get_gpe0_blk,
 408                         NULL, NULL, pm, NULL);
 409     object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
 410                                    &gpe0_len, errp);
 411     object_property_add_bool(obj, "memory-hotplug-support",
 412                              ich9_pm_get_memory_hotplug_support,
 413                              ich9_pm_set_memory_hotplug_support,
 414                              NULL);
 415     object_property_add(obj, ACPI_PM_PROP_S3_DISABLED, "uint8",
 416                         ich9_pm_get_disable_s3,
 417                         ich9_pm_set_disable_s3,
 418                         NULL, pm, NULL);
 419     object_property_add(obj, ACPI_PM_PROP_S4_DISABLED, "uint8",
 420                         ich9_pm_get_disable_s4,
 421                         ich9_pm_set_disable_s4,
 422                         NULL, pm, NULL);
 423     object_property_add(obj, ACPI_PM_PROP_S4_VAL, "uint8",
 424                         ich9_pm_get_s4_val,
 425                         ich9_pm_set_s4_val,
 426                         NULL, pm, NULL);
 427     object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
 428                              ich9_pm_get_enable_tco,
 429                              ich9_pm_set_enable_tco,
 430                              NULL);
 431 }
 432
 433 void ich9_pm_device_plug_cb(ICH9LPCPMRegs *pm, DeviceState *dev, Error **errp)
 434 {
 435     if (pm->acpi_memory_hotplug.is_enabled &&
 436         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 437         acpi_memory_plug_cb(&pm->acpi_regs, pm->irq, &pm->acpi_memory_hotplug,
 438                             dev, errp);
 439     } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 440         acpi_cpu_plug_cb(&pm->acpi_regs, pm->irq, &pm->gpe_cpu, dev, errp);
 441     } else {
 442         error_setg(errp, "acpi: device plug request for not supported device"
 443                    " type: %s", object_get_typename(OBJECT(dev)));
 444     }
 445 }
 446
 447 void ich9_pm_device_unplug_request_cb(ICH9LPCPMRegs *pm, DeviceState *dev,
 448                                       Error **errp)
 449 {
 450     if (pm->acpi_memory_hotplug.is_enabled &&
 451         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 452         acpi_memory_unplug_request_cb(&pm->acpi_regs, pm->irq,
 453                                       &pm->acpi_memory_hotplug, dev, errp);
 454     } else {
 455         error_setg(errp, "acpi: device unplug request for not supported device"
 456                    " type: %s", object_get_typename(OBJECT(dev)));
 457     }
 458 }
 459
 460 void ich9_pm_device_unplug_cb(ICH9LPCPMRegs *pm, DeviceState *dev,
 461                               Error **errp)
 462 {
 463     if (pm->acpi_memory_hotplug.is_enabled &&
 464         object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 465         acpi_memory_unplug_cb(&pm->acpi_memory_hotplug, dev, errp);
 466     } else {
 467         error_setg(errp, "acpi: device unplug for not supported device"
 468                    " type: %s", object_get_typename(OBJECT(dev)));
 469     }
 470 }
 471
 472 void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
 473 {
 474     ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
 475
 476     acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
 477 }