kernel/sound/soc/sunxi/sun4i-codec.c

   1 /*
   2  * Copyright 2014 Emilio López <emilio@elopez.com.ar>
   3  * Copyright 2014 Jon Smirl <jonsmirl@gmail.com>
   4  * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
   5  * Copyright 2015 Adam Sampson <ats@offog.org>
   6  *
   7  * Based on the Allwinner SDK driver, released under the GPL.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  */
  19
  20 #include <linux/init.h>
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/delay.h>
  25 #include <linux/slab.h>
  26 #include <linux/of.h>
  27 #include <linux/of_platform.h>
  28 #include <linux/of_address.h>
  29 #include <linux/clk.h>
  30 #include <linux/regmap.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/pcm.h>
  34 #include <sound/pcm_params.h>
  35 #include <sound/soc.h>
  36 #include <sound/tlv.h>
  37 #include <sound/initval.h>
  38 #include <sound/dmaengine_pcm.h>
  39
  40 /* Codec DAC register offsets and bit fields */
  41 #define SUN4I_CODEC_DAC_DPC                     (0x00)
  42 #define SUN4I_CODEC_DAC_DPC_EN_DA                       (31)
  43 #define SUN4I_CODEC_DAC_DPC_DVOL                        (12)
  44 #define SUN4I_CODEC_DAC_FIFOC                   (0x04)
  45 #define SUN4I_CODEC_DAC_FIFOC_DAC_FS                    (29)
  46 #define SUN4I_CODEC_DAC_FIFOC_FIR_VERSION               (28)
  47 #define SUN4I_CODEC_DAC_FIFOC_SEND_LASAT                (26)
  48 #define SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE              (24)
  49 #define SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT               (21)
  50 #define SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL             (8)
  51 #define SUN4I_CODEC_DAC_FIFOC_MONO_EN                   (6)
  52 #define SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS            (5)
  53 #define SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN                (4)
  54 #define SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH                (0)
  55 #define SUN4I_CODEC_DAC_FIFOS                   (0x08)
  56 #define SUN4I_CODEC_DAC_TXDATA                  (0x0c)
  57 #define SUN4I_CODEC_DAC_ACTL                    (0x10)
  58 #define SUN4I_CODEC_DAC_ACTL_DACAENR                    (31)
  59 #define SUN4I_CODEC_DAC_ACTL_DACAENL                    (30)
  60 #define SUN4I_CODEC_DAC_ACTL_MIXEN                      (29)
  61 #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS                  (15)
  62 #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS                  (14)
  63 #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS                  (13)
  64 #define SUN4I_CODEC_DAC_ACTL_DACPAS                     (8)
  65 #define SUN4I_CODEC_DAC_ACTL_MIXPAS                     (7)
  66 #define SUN4I_CODEC_DAC_ACTL_PA_MUTE                    (6)
  67 #define SUN4I_CODEC_DAC_ACTL_PA_VOL                     (0)
  68 #define SUN4I_CODEC_DAC_TUNE                    (0x14)
  69 #define SUN4I_CODEC_DAC_DEBUG                   (0x18)
  70
  71 /* Codec ADC register offsets and bit fields */
  72 #define SUN4I_CODEC_ADC_FIFOC                   (0x1c)
  73 #define SUN4I_CODEC_ADC_FIFOC_EN_AD                     (28)
  74 #define SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE              (24)
  75 #define SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL             (8)
  76 #define SUN4I_CODEC_ADC_FIFOC_MONO_EN                   (7)
  77 #define SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS            (6)
  78 #define SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN                (4)
  79 #define SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH                (0)
  80 #define SUN4I_CODEC_ADC_FIFOS                   (0x20)
  81 #define SUN4I_CODEC_ADC_RXDATA                  (0x24)
  82 #define SUN4I_CODEC_ADC_ACTL                    (0x28)
  83 #define SUN4I_CODEC_ADC_ACTL_ADC_R_EN                   (31)
  84 #define SUN4I_CODEC_ADC_ACTL_ADC_L_EN                   (30)
  85 #define SUN4I_CODEC_ADC_ACTL_PREG1EN                    (29)
  86 #define SUN4I_CODEC_ADC_ACTL_PREG2EN                    (28)
  87 #define SUN4I_CODEC_ADC_ACTL_VMICEN                     (27)
  88 #define SUN4I_CODEC_ADC_ACTL_VADCG                      (20)
  89 #define SUN4I_CODEC_ADC_ACTL_ADCIS                      (17)
  90 #define SUN4I_CODEC_ADC_ACTL_PA_EN                      (4)
  91 #define SUN4I_CODEC_ADC_ACTL_DDE                        (3)
  92 #define SUN4I_CODEC_ADC_DEBUG                   (0x2c)
  93
  94 /* Other various ADC registers */
  95 #define SUN4I_CODEC_DAC_TXCNT                   (0x30)
  96 #define SUN4I_CODEC_ADC_RXCNT                   (0x34)
  97 #define SUN4I_CODEC_AC_SYS_VERI                 (0x38)
  98 #define SUN4I_CODEC_AC_MIC_PHONE_CAL            (0x3c)
  99
 100 struct sun4i_codec {
 101         struct device   *dev;
 102         struct regmap   *regmap;
 103         struct clk      *clk_apb;
 104         struct clk      *clk_module;
 105
 106         struct snd_dmaengine_dai_dma_data       playback_dma_data;
 107 };
 108
 109 static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
 110 {
 111         /*
 112          * FIXME: according to the BSP, we might need to drive a PA
 113          *        GPIO high here on some boards
 114          */
 115
 116         /* Flush TX FIFO */
 117         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 118                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
 119                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
 120
 121         /* Enable DAC DRQ */
 122         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 123                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
 124                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
 125 }
 126
 127 static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
 128 {
 129         /*
 130          * FIXME: according to the BSP, we might need to drive a PA
 131          *        GPIO low here on some boards
 132          */
 133
 134         /* Disable DAC DRQ */
 135         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 136                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
 137                            0);
 138 }
 139
 140 static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
 141                                struct snd_soc_dai *dai)
 142 {
 143         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 144         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 145
 146         if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
 147                 return -ENOTSUPP;
 148
 149         switch (cmd) {
 150         case SNDRV_PCM_TRIGGER_START:
 151         case SNDRV_PCM_TRIGGER_RESUME:
 152         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 153                 sun4i_codec_start_playback(scodec);
 154                 break;
 155
 156         case SNDRV_PCM_TRIGGER_STOP:
 157         case SNDRV_PCM_TRIGGER_SUSPEND:
 158         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 159                 sun4i_codec_stop_playback(scodec);
 160                 break;
 161
 162         default:
 163                 return -EINVAL;
 164         }
 165
 166         return 0;
 167 }
 168
 169 static int sun4i_codec_prepare(struct snd_pcm_substream *substream,
 170                                struct snd_soc_dai *dai)
 171 {
 172         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 173         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 174         u32 val;
 175
 176         if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
 177                 return -ENOTSUPP;
 178
 179         /* Flush the TX FIFO */
 180         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 181                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
 182                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
 183
 184         /* Set TX FIFO Empty Trigger Level */
 185         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 186                            0x3f << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL,
 187                            0xf << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL);
 188
 189         if (substream->runtime->rate > 32000)
 190                 /* Use 64 bits FIR filter */
 191                 val = 0;
 192         else
 193                 /* Use 32 bits FIR filter */
 194                 val = BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION);
 195
 196         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 197                            BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION),
 198                            val);
 199
 200         /* Send zeros when we have an underrun */
 201         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 202                            BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT),
 203                            0);
 204
 205         return 0;
 206 }
 207
 208 static unsigned long sun4i_codec_get_mod_freq(struct snd_pcm_hw_params *params)
 209 {
 210         unsigned int rate = params_rate(params);
 211
 212         switch (rate) {
 213         case 176400:
 214         case 88200:
 215         case 44100:
 216         case 33075:
 217         case 22050:
 218         case 14700:
 219         case 11025:
 220         case 7350:
 221                 return 22579200;
 222
 223         case 192000:
 224         case 96000:
 225         case 48000:
 226         case 32000:
 227         case 24000:
 228         case 16000:
 229         case 12000:
 230         case 8000:
 231                 return 24576000;
 232
 233         default:
 234                 return 0;
 235         }
 236 }
 237
 238 static int sun4i_codec_get_hw_rate(struct snd_pcm_hw_params *params)
 239 {
 240         unsigned int rate = params_rate(params);
 241
 242         switch (rate) {
 243         case 192000:
 244         case 176400:
 245                 return 6;
 246
 247         case 96000:
 248         case 88200:
 249                 return 7;
 250
 251         case 48000:
 252         case 44100:
 253                 return 0;
 254
 255         case 32000:
 256         case 33075:
 257                 return 1;
 258
 259         case 24000:
 260         case 22050:
 261                 return 2;
 262
 263         case 16000:
 264         case 14700:
 265                 return 3;
 266
 267         case 12000:
 268         case 11025:
 269                 return 4;
 270
 271         case 8000:
 272         case 7350:
 273                 return 5;
 274
 275         default:
 276                 return -EINVAL;
 277         }
 278 }
 279
 280 static int sun4i_codec_hw_params(struct snd_pcm_substream *substream,
 281                                  struct snd_pcm_hw_params *params,
 282                                  struct snd_soc_dai *dai)
 283 {
 284         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 285         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 286         unsigned long clk_freq;
 287         int ret, hwrate;
 288         u32 val;
 289
 290         if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
 291                 return -ENOTSUPP;
 292
 293         clk_freq = sun4i_codec_get_mod_freq(params);
 294         if (!clk_freq)
 295                 return -EINVAL;
 296
 297         ret = clk_set_rate(scodec->clk_module, clk_freq);
 298         if (ret)
 299                 return ret;
 300
 301         hwrate = sun4i_codec_get_hw_rate(params);
 302         if (hwrate < 0)
 303                 return hwrate;
 304
 305         /* Set DAC sample rate */
 306         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 307                            7 << SUN4I_CODEC_DAC_FIFOC_DAC_FS,
 308                            hwrate << SUN4I_CODEC_DAC_FIFOC_DAC_FS);
 309
 310         /* Set the number of channels we want to use */
 311         if (params_channels(params) == 1)
 312                 val = BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN);
 313         else
 314                 val = 0;
 315
 316         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 317                            BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN),
 318                            val);
 319
 320         /* Set the number of sample bits to either 16 or 24 bits */
 321         if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
 322                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 323                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
 324                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
 325
 326                 /* Set TX FIFO mode to padding the LSBs with 0 */
 327                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 328                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
 329                                    0);
 330
 331                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 332         } else {
 333                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 334                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
 335                                    0);
 336
 337                 /* Set TX FIFO mode to repeat the MSB */
 338                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 339                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
 340                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
 341
 342                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static int sun4i_codec_startup(struct snd_pcm_substream *substream,
 349                                struct snd_soc_dai *dai)
 350 {
 351         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 352         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 353
 354         /*
 355          * Stop issuing DRQ when we have room for less than 16 samples
 356          * in our TX FIFO
 357          */
 358         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 359                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT,
 360                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
 361
 362         return clk_prepare_enable(scodec->clk_module);
 363 }
 364
 365 static void sun4i_codec_shutdown(struct snd_pcm_substream *substream,
 366                                  struct snd_soc_dai *dai)
 367 {
 368         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 369         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 370
 371         clk_disable_unprepare(scodec->clk_module);
 372 }
 373
 374 static const struct snd_soc_dai_ops sun4i_codec_dai_ops = {
 375         .startup        = sun4i_codec_startup,
 376         .shutdown       = sun4i_codec_shutdown,
 377         .trigger        = sun4i_codec_trigger,
 378         .hw_params      = sun4i_codec_hw_params,
 379         .prepare        = sun4i_codec_prepare,
 380 };
 381
 382 static struct snd_soc_dai_driver sun4i_codec_dai = {
 383         .name   = "Codec",
 384         .ops    = &sun4i_codec_dai_ops,
 385         .playback = {
 386                 .stream_name    = "Codec Playback",
 387                 .channels_min   = 1,
 388                 .channels_max   = 2,
 389                 .rate_min       = 8000,
 390                 .rate_max       = 192000,
 391                 .rates          = SNDRV_PCM_RATE_8000_48000 |
 392                                   SNDRV_PCM_RATE_96000 |
 393                                   SNDRV_PCM_RATE_192000,
 394                 .formats        = SNDRV_PCM_FMTBIT_S16_LE |
 395                                   SNDRV_PCM_FMTBIT_S32_LE,
 396                 .sig_bits       = 24,
 397         },
 398 };
 399
 400 /*** Codec ***/
 401 static const struct snd_kcontrol_new sun4i_codec_pa_mute =
 402         SOC_DAPM_SINGLE("Switch", SUN4I_CODEC_DAC_ACTL,
 403                         SUN4I_CODEC_DAC_ACTL_PA_MUTE, 1, 0);
 404
 405 static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale, -6300, 100, 1);
 406
 407 static const struct snd_kcontrol_new sun4i_codec_widgets[] = {
 408         SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
 409                        SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
 410                        sun4i_codec_pa_volume_scale),
 411 };
 412
 413 static const struct snd_kcontrol_new sun4i_codec_left_mixer_controls[] = {
 414         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 415                         SUN4I_CODEC_DAC_ACTL_LDACLMIXS, 1, 0),
 416 };
 417
 418 static const struct snd_kcontrol_new sun4i_codec_right_mixer_controls[] = {
 419         SOC_DAPM_SINGLE("Right DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 420                         SUN4I_CODEC_DAC_ACTL_RDACRMIXS, 1, 0),
 421         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 422                         SUN4I_CODEC_DAC_ACTL_LDACRMIXS, 1, 0),
 423 };
 424
 425 static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = {
 426         SOC_DAPM_SINGLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 427                         SUN4I_CODEC_DAC_ACTL_DACPAS, 1, 0),
 428         SOC_DAPM_SINGLE("Mixer Playback Switch", SUN4I_CODEC_DAC_ACTL,
 429                         SUN4I_CODEC_DAC_ACTL_MIXPAS, 1, 0),
 430 };
 431
 432 static const struct snd_soc_dapm_widget sun4i_codec_dapm_widgets[] = {
 433         /* Digital parts of the DACs */
 434         SND_SOC_DAPM_SUPPLY("DAC", SUN4I_CODEC_DAC_DPC,
 435                             SUN4I_CODEC_DAC_DPC_EN_DA, 0,
 436                             NULL, 0),
 437
 438         /* Analog parts of the DACs */
 439         SND_SOC_DAPM_DAC("Left DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
 440                          SUN4I_CODEC_DAC_ACTL_DACAENL, 0),
 441         SND_SOC_DAPM_DAC("Right DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
 442                          SUN4I_CODEC_DAC_ACTL_DACAENR, 0),
 443
 444         /* Mixers */
 445         SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
 446                            sun4i_codec_left_mixer_controls,
 447                            ARRAY_SIZE(sun4i_codec_left_mixer_controls)),
 448         SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
 449                            sun4i_codec_right_mixer_controls,
 450                            ARRAY_SIZE(sun4i_codec_right_mixer_controls)),
 451
 452         /* Global Mixer Enable */
 453         SND_SOC_DAPM_SUPPLY("Mixer Enable", SUN4I_CODEC_DAC_ACTL,
 454                             SUN4I_CODEC_DAC_ACTL_MIXEN, 0, NULL, 0),
 455
 456         /* Power Amplifier */
 457         SND_SOC_DAPM_MIXER("Power Amplifier", SUN4I_CODEC_ADC_ACTL,
 458                            SUN4I_CODEC_ADC_ACTL_PA_EN, 0,
 459                            sun4i_codec_pa_mixer_controls,
 460                            ARRAY_SIZE(sun4i_codec_pa_mixer_controls)),
 461         SND_SOC_DAPM_SWITCH("Power Amplifier Mute", SND_SOC_NOPM, 0, 0,
 462                             &sun4i_codec_pa_mute),
 463
 464         SND_SOC_DAPM_OUTPUT("HP Right"),
 465         SND_SOC_DAPM_OUTPUT("HP Left"),
 466 };
 467
 468 static const struct snd_soc_dapm_route sun4i_codec_dapm_routes[] = {
 469         /* Left DAC Routes */
 470         { "Left DAC", NULL, "DAC" },
 471
 472         /* Right DAC Routes */
 473         { "Right DAC", NULL, "DAC" },
 474
 475         /* Right Mixer Routes */
 476         { "Right Mixer", NULL, "Mixer Enable" },
 477         { "Right Mixer", "Left DAC Playback Switch", "Left DAC" },
 478         { "Right Mixer", "Right DAC Playback Switch", "Right DAC" },
 479
 480         /* Left Mixer Routes */
 481         { "Left Mixer", NULL, "Mixer Enable" },
 482         { "Left Mixer", "Left DAC Playback Switch", "Left DAC" },
 483
 484         /* Power Amplifier Routes */
 485         { "Power Amplifier", "Mixer Playback Switch", "Left Mixer" },
 486         { "Power Amplifier", "Mixer Playback Switch", "Right Mixer" },
 487         { "Power Amplifier", "DAC Playback Switch", "Left DAC" },
 488         { "Power Amplifier", "DAC Playback Switch", "Right DAC" },
 489
 490         /* Headphone Output Routes */
 491         { "Power Amplifier Mute", "Switch", "Power Amplifier" },
 492         { "HP Right", NULL, "Power Amplifier Mute" },
 493         { "HP Left", NULL, "Power Amplifier Mute" },
 494 };
 495
 496 static struct snd_soc_codec_driver sun4i_codec_codec = {
 497         .controls               = sun4i_codec_widgets,
 498         .num_controls           = ARRAY_SIZE(sun4i_codec_widgets),
 499         .dapm_widgets           = sun4i_codec_dapm_widgets,
 500         .num_dapm_widgets       = ARRAY_SIZE(sun4i_codec_dapm_widgets),
 501         .dapm_routes            = sun4i_codec_dapm_routes,
 502         .num_dapm_routes        = ARRAY_SIZE(sun4i_codec_dapm_routes),
 503 };
 504
 505 static const struct snd_soc_component_driver sun4i_codec_component = {
 506         .name = "sun4i-codec",
 507 };
 508
 509 #define SUN4I_CODEC_RATES       SNDRV_PCM_RATE_8000_192000
 510 #define SUN4I_CODEC_FORMATS     (SNDRV_PCM_FMTBIT_S16_LE | \
 511                                  SNDRV_PCM_FMTBIT_S32_LE)
 512
 513 static int sun4i_codec_dai_probe(struct snd_soc_dai *dai)
 514 {
 515         struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
 516         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
 517
 518         snd_soc_dai_init_dma_data(dai, &scodec->playback_dma_data,
 519                                   NULL);
 520
 521         return 0;
 522 }
 523
 524 static struct snd_soc_dai_driver dummy_cpu_dai = {
 525         .name   = "sun4i-codec-cpu-dai",
 526         .probe  = sun4i_codec_dai_probe,
 527         .playback = {
 528                 .stream_name    = "Playback",
 529                 .channels_min   = 1,
 530                 .channels_max   = 2,
 531                 .rates          = SUN4I_CODEC_RATES,
 532                 .formats        = SUN4I_CODEC_FORMATS,
 533                 .sig_bits       = 24,
 534         },
 535 };
 536
 537 static const struct regmap_config sun4i_codec_regmap_config = {
 538         .reg_bits       = 32,
 539         .reg_stride     = 4,
 540         .val_bits       = 32,
 541         .max_register   = SUN4I_CODEC_AC_MIC_PHONE_CAL,
 542 };
 543
 544 static const struct of_device_id sun4i_codec_of_match[] = {
 545         { .compatible = "allwinner,sun4i-a10-codec" },
 546         { .compatible = "allwinner,sun7i-a20-codec" },
 547         {}
 548 };
 549 MODULE_DEVICE_TABLE(of, sun4i_codec_of_match);
 550
 551 static struct snd_soc_dai_link *sun4i_codec_create_link(struct device *dev,
 552                                                         int *num_links)
 553 {
 554         struct snd_soc_dai_link *link = devm_kzalloc(dev, sizeof(*link),
 555                                                      GFP_KERNEL);
 556         if (!link)
 557                 return NULL;
 558
 559         link->name              = "cdc";
 560         link->stream_name       = "CDC PCM";
 561         link->codec_dai_name    = "Codec";
 562         link->cpu_dai_name      = dev_name(dev);
 563         link->codec_name        = dev_name(dev);
 564         link->platform_name     = dev_name(dev);
 565         link->dai_fmt           = SND_SOC_DAIFMT_I2S;
 566
 567         *num_links = 1;
 568
 569         return link;
 570 };
 571
 572 static struct snd_soc_card *sun4i_codec_create_card(struct device *dev)
 573 {
 574         struct snd_soc_card *card;
 575
 576         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
 577         if (!card)
 578                 return NULL;
 579
 580         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
 581         if (!card->dai_link)
 582                 return NULL;
 583
 584         card->dev               = dev;
 585         card->name              = "sun4i-codec";
 586
 587         return card;
 588 };
 589
 590 static int sun4i_codec_probe(struct platform_device *pdev)
 591 {
 592         struct snd_soc_card *card;
 593         struct sun4i_codec *scodec;
 594         struct resource *res;
 595         void __iomem *base;
 596         int ret;
 597
 598         scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
 599         if (!scodec)
 600                 return -ENOMEM;
 601
 602         scodec->dev = &pdev->dev;
 603
 604         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 605         base = devm_ioremap_resource(&pdev->dev, res);
 606         if (IS_ERR(base)) {
 607                 dev_err(&pdev->dev, "Failed to map the registers\n");
 608                 return PTR_ERR(base);
 609         }
 610
 611         scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
 612                                              &sun4i_codec_regmap_config);
 613         if (IS_ERR(scodec->regmap)) {
 614                 dev_err(&pdev->dev, "Failed to create our regmap\n");
 615                 return PTR_ERR(scodec->regmap);
 616         }
 617
 618         /* Get the clocks from the DT */
 619         scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
 620         if (IS_ERR(scodec->clk_apb)) {
 621                 dev_err(&pdev->dev, "Failed to get the APB clock\n");
 622                 return PTR_ERR(scodec->clk_apb);
 623         }
 624
 625         scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
 626         if (IS_ERR(scodec->clk_module)) {
 627                 dev_err(&pdev->dev, "Failed to get the module clock\n");
 628                 return PTR_ERR(scodec->clk_module);
 629         }
 630
 631         /* Enable the bus clock */
 632         if (clk_prepare_enable(scodec->clk_apb)) {
 633                 dev_err(&pdev->dev, "Failed to enable the APB clock\n");
 634                 return -EINVAL;
 635         }
 636
 637         /* DMA configuration for TX FIFO */
 638         scodec->playback_dma_data.addr = res->start + SUN4I_CODEC_DAC_TXDATA;
 639         scodec->playback_dma_data.maxburst = 4;
 640         scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 641
 642         ret = snd_soc_register_codec(&pdev->dev, &sun4i_codec_codec,
 643                                      &sun4i_codec_dai, 1);
 644         if (ret) {
 645                 dev_err(&pdev->dev, "Failed to register our codec\n");
 646                 goto err_clk_disable;
 647         }
 648
 649         ret = devm_snd_soc_register_component(&pdev->dev,
 650                                               &sun4i_codec_component,
 651                                               &dummy_cpu_dai, 1);
 652         if (ret) {
 653                 dev_err(&pdev->dev, "Failed to register our DAI\n");
 654                 goto err_unregister_codec;
 655         }
 656
 657         ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
 658         if (ret) {
 659                 dev_err(&pdev->dev, "Failed to register against DMAEngine\n");
 660                 goto err_unregister_codec;
 661         }
 662
 663         card = sun4i_codec_create_card(&pdev->dev);
 664         if (!card) {
 665                 dev_err(&pdev->dev, "Failed to create our card\n");
 666                 goto err_unregister_codec;
 667         }
 668
 669         platform_set_drvdata(pdev, card);
 670         snd_soc_card_set_drvdata(card, scodec);
 671
 672         ret = snd_soc_register_card(card);
 673         if (ret) {
 674                 dev_err(&pdev->dev, "Failed to register our card\n");
 675                 goto err_unregister_codec;
 676         }
 677
 678         return 0;
 679
 680 err_unregister_codec:
 681         snd_soc_unregister_codec(&pdev->dev);
 682 err_clk_disable:
 683         clk_disable_unprepare(scodec->clk_apb);
 684         return ret;
 685 }
 686
 687 static int sun4i_codec_remove(struct platform_device *pdev)
 688 {
 689         struct snd_soc_card *card = platform_get_drvdata(pdev);
 690         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
 691
 692         snd_soc_unregister_card(card);
 693         snd_soc_unregister_codec(&pdev->dev);
 694         clk_disable_unprepare(scodec->clk_apb);
 695
 696         return 0;
 697 }
 698
 699 static struct platform_driver sun4i_codec_driver = {
 700         .driver = {
 701                 .name = "sun4i-codec",
 702                 .of_match_table = sun4i_codec_of_match,
 703         },
 704         .probe = sun4i_codec_probe,
 705         .remove = sun4i_codec_remove,
 706 };
 707 module_platform_driver(sun4i_codec_driver);
 708
 709 MODULE_DESCRIPTION("Allwinner A10 codec driver");
 710 MODULE_AUTHOR("Emilio López <emilio@elopez.com.ar>");
 711 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
 712 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
 713 MODULE_LICENSE("GPL");