kernel/sound/pci/hda/hda_intel.c

   1 /*
   2  *
   3  *  hda_intel.c - Implementation of primary alsa driver code base
   4  *                for Intel HD Audio.
   5  *
   6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
   7  *
   8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   9  *                     PeiSen Hou <pshou@realtek.com.tw>
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the Free
  13  *  Software Foundation; either version 2 of the License, or (at your option)
  14  *  any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but WITHOUT
  17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  *  more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License along with
  22  *  this program; if not, write to the Free Software Foundation, Inc., 59
  23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  24  *
  25  *  CONTACTS:
  26  *
  27  *  Matt Jared          matt.jared@intel.com
  28  *  Andy Kopp           andy.kopp@intel.com
  29  *  Dan Kogan           dan.d.kogan@intel.com
  30  *
  31  *  CHANGES:
  32  *
  33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
  34  *
  35  */
  36
  37 #include <linux/delay.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/init.h>
  44 #include <linux/slab.h>
  45 #include <linux/pci.h>
  46 #include <linux/mutex.h>
  47 #include <linux/io.h>
  48 #include <linux/pm_runtime.h>
  49 #include <linux/clocksource.h>
  50 #include <linux/time.h>
  51 #include <linux/completion.h>
  52
  53 #ifdef CONFIG_X86
  54 /* for snoop control */
  55 #include <asm/pgtable.h>
  56 #include <asm/cacheflush.h>
  57 #endif
  58 #include <sound/core.h>
  59 #include <sound/initval.h>
  60 #include <linux/vgaarb.h>
  61 #include <linux/vga_switcheroo.h>
  62 #include <linux/firmware.h>
  63 #include "hda_codec.h"
  64 #include "hda_controller.h"
  65 #include "hda_intel.h"
  66
  67 /* position fix mode */
  68 enum {
  69         POS_FIX_AUTO,
  70         POS_FIX_LPIB,
  71         POS_FIX_POSBUF,
  72         POS_FIX_VIACOMBO,
  73         POS_FIX_COMBO,
  74 };
  75
  76 /* Defines for ATI HD Audio support in SB450 south bridge */
  77 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
  78 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02
  79
  80 /* Defines for Nvidia HDA support */
  81 #define NVIDIA_HDA_TRANSREG_ADDR      0x4e
  82 #define NVIDIA_HDA_ENABLE_COHBITS     0x0f
  83 #define NVIDIA_HDA_ISTRM_COH          0x4d
  84 #define NVIDIA_HDA_OSTRM_COH          0x4c
  85 #define NVIDIA_HDA_ENABLE_COHBIT      0x01
  86
  87 /* Defines for Intel SCH HDA snoop control */
  88 #define INTEL_SCH_HDA_DEVC      0x78
  89 #define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)
  90
  91 /* Define IN stream 0 FIFO size offset in VIA controller */
  92 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
  93 /* Define VIA HD Audio Device ID*/
  94 #define VIA_HDAC_DEVICE_ID              0x3288
  95
  96 /* max number of SDs */
  97 /* ICH, ATI and VIA have 4 playback and 4 capture */
  98 #define ICH6_NUM_CAPTURE        4
  99 #define ICH6_NUM_PLAYBACK       4
 100
 101 /* ULI has 6 playback and 5 capture */
 102 #define ULI_NUM_CAPTURE         5
 103 #define ULI_NUM_PLAYBACK        6
 104
 105 /* ATI HDMI may have up to 8 playbacks and 0 capture */
 106 #define ATIHDMI_NUM_CAPTURE     0
 107 #define ATIHDMI_NUM_PLAYBACK    8
 108
 109 /* TERA has 4 playback and 3 capture */
 110 #define TERA_NUM_CAPTURE        3
 111 #define TERA_NUM_PLAYBACK       4
 112
 113
 114 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
 115 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
 116 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
 117 static char *model[SNDRV_CARDS];
 118 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 119 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 120 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 121 static int probe_only[SNDRV_CARDS];
 122 static int jackpoll_ms[SNDRV_CARDS];
 123 static bool single_cmd;
 124 static int enable_msi = -1;
 125 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 126 static char *patch[SNDRV_CARDS];
 127 #endif
 128 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 129 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
 130                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
 131 #endif
 132
 133 module_param_array(index, int, NULL, 0444);
 134 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
 135 module_param_array(id, charp, NULL, 0444);
 136 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
 137 module_param_array(enable, bool, NULL, 0444);
 138 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
 139 module_param_array(model, charp, NULL, 0444);
 140 MODULE_PARM_DESC(model, "Use the given board model.");
 141 module_param_array(position_fix, int, NULL, 0444);
 142 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
 143                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
 144 module_param_array(bdl_pos_adj, int, NULL, 0644);
 145 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
 146 module_param_array(probe_mask, int, NULL, 0444);
 147 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
 148 module_param_array(probe_only, int, NULL, 0444);
 149 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
 150 module_param_array(jackpoll_ms, int, NULL, 0444);
 151 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
 152 module_param(single_cmd, bool, 0444);
 153 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
 154                  "(for debugging only).");
 155 module_param(enable_msi, bint, 0444);
 156 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
 157 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 158 module_param_array(patch, charp, NULL, 0444);
 159 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
 160 #endif
 161 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 162 module_param_array(beep_mode, bool, NULL, 0444);
 163 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
 164                             "(0=off, 1=on) (default=1).");
 165 #endif
 166
 167 #ifdef CONFIG_PM
 168 static int param_set_xint(const char *val, const struct kernel_param *kp);
 169 static struct kernel_param_ops param_ops_xint = {
 170         .set = param_set_xint,
 171         .get = param_get_int,
 172 };
 173 #define param_check_xint param_check_int
 174
 175 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
 176 module_param(power_save, xint, 0644);
 177 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
 178                  "(in second, 0 = disable).");
 179
 180 /* reset the HD-audio controller in power save mode.
 181  * this may give more power-saving, but will take longer time to
 182  * wake up.
 183  */
 184 static bool power_save_controller = 1;
 185 module_param(power_save_controller, bool, 0644);
 186 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
 187 #else
 188 #define power_save      0
 189 #endif /* CONFIG_PM */
 190
 191 static int align_buffer_size = -1;
 192 module_param(align_buffer_size, bint, 0644);
 193 MODULE_PARM_DESC(align_buffer_size,
 194                 "Force buffer and period sizes to be multiple of 128 bytes.");
 195
 196 #ifdef CONFIG_X86
 197 static int hda_snoop = -1;
 198 module_param_named(snoop, hda_snoop, bint, 0444);
 199 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
 200 #else
 201 #define hda_snoop               true
 202 #endif
 203
 204
 205 MODULE_LICENSE("GPL");
 206 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
 207                          "{Intel, ICH6M},"
 208                          "{Intel, ICH7},"
 209                          "{Intel, ESB2},"
 210                          "{Intel, ICH8},"
 211                          "{Intel, ICH9},"
 212                          "{Intel, ICH10},"
 213                          "{Intel, PCH},"
 214                          "{Intel, CPT},"
 215                          "{Intel, PPT},"
 216                          "{Intel, LPT},"
 217                          "{Intel, LPT_LP},"
 218                          "{Intel, WPT_LP},"
 219                          "{Intel, SPT},"
 220                          "{Intel, SPT_LP},"
 221                          "{Intel, HPT},"
 222                          "{Intel, PBG},"
 223                          "{Intel, SCH},"
 224                          "{ATI, SB450},"
 225                          "{ATI, SB600},"
 226                          "{ATI, RS600},"
 227                          "{ATI, RS690},"
 228                          "{ATI, RS780},"
 229                          "{ATI, R600},"
 230                          "{ATI, RV630},"
 231                          "{ATI, RV610},"
 232                          "{ATI, RV670},"
 233                          "{ATI, RV635},"
 234                          "{ATI, RV620},"
 235                          "{ATI, RV770},"
 236                          "{VIA, VT8251},"
 237                          "{VIA, VT8237A},"
 238                          "{SiS, SIS966},"
 239                          "{ULI, M5461}}");
 240 MODULE_DESCRIPTION("Intel HDA driver");
 241
 242 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
 243 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
 244 #define SUPPORT_VGA_SWITCHEROO
 245 #endif
 246 #endif
 247
 248
 249 /*
 250  */
 251
 252 /* driver types */
 253 enum {
 254         AZX_DRIVER_ICH,
 255         AZX_DRIVER_PCH,
 256         AZX_DRIVER_SCH,
 257         AZX_DRIVER_HDMI,
 258         AZX_DRIVER_ATI,
 259         AZX_DRIVER_ATIHDMI,
 260         AZX_DRIVER_ATIHDMI_NS,
 261         AZX_DRIVER_VIA,
 262         AZX_DRIVER_SIS,
 263         AZX_DRIVER_ULI,
 264         AZX_DRIVER_NVIDIA,
 265         AZX_DRIVER_TERA,
 266         AZX_DRIVER_CTX,
 267         AZX_DRIVER_CTHDA,
 268         AZX_DRIVER_CMEDIA,
 269         AZX_DRIVER_GENERIC,
 270         AZX_NUM_DRIVERS, /* keep this as last entry */
 271 };
 272
 273 #define azx_get_snoop_type(chip) \
 274         (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
 275 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
 276
 277 /* quirks for old Intel chipsets */
 278 #define AZX_DCAPS_INTEL_ICH \
 279         (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
 280
 281 /* quirks for Intel PCH */
 282 #define AZX_DCAPS_INTEL_PCH_NOPM \
 283         (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
 284          AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
 285
 286 #define AZX_DCAPS_INTEL_PCH \
 287         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
 288
 289 #define AZX_DCAPS_INTEL_HASWELL \
 290         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
 291          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
 292          AZX_DCAPS_SNOOP_TYPE(SCH))
 293
 294 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
 295 #define AZX_DCAPS_INTEL_BROADWELL \
 296         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
 297          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
 298          AZX_DCAPS_SNOOP_TYPE(SCH))
 299
 300 #define AZX_DCAPS_INTEL_BAYTRAIL \
 301         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)
 302
 303 #define AZX_DCAPS_INTEL_BRASWELL \
 304         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)
 305
 306 #define AZX_DCAPS_INTEL_SKYLAKE \
 307         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
 308          AZX_DCAPS_I915_POWERWELL)
 309
 310 /* quirks for ATI SB / AMD Hudson */
 311 #define AZX_DCAPS_PRESET_ATI_SB \
 312         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
 313          AZX_DCAPS_SNOOP_TYPE(ATI))
 314
 315 /* quirks for ATI/AMD HDMI */
 316 #define AZX_DCAPS_PRESET_ATI_HDMI \
 317         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
 318          AZX_DCAPS_NO_MSI64)
 319
 320 /* quirks for ATI HDMI with snoop off */
 321 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
 322         (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
 323
 324 /* quirks for Nvidia */
 325 #define AZX_DCAPS_PRESET_NVIDIA \
 326         (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
 327          AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
 328          AZX_DCAPS_SNOOP_TYPE(NVIDIA))
 329
 330 #define AZX_DCAPS_PRESET_CTHDA \
 331         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
 332          AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
 333
 334 /*
 335  * VGA-switcher support
 336  */
 337 #ifdef SUPPORT_VGA_SWITCHEROO
 338 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
 339 #else
 340 #define use_vga_switcheroo(chip)        0
 341 #endif
 342
 343 #define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
 344                                         ((pci)->device == 0x0c0c) || \
 345                                         ((pci)->device == 0x0d0c) || \
 346                                         ((pci)->device == 0x160c))
 347
 348 static char *driver_short_names[] = {
 349         [AZX_DRIVER_ICH] = "HDA Intel",
 350         [AZX_DRIVER_PCH] = "HDA Intel PCH",
 351         [AZX_DRIVER_SCH] = "HDA Intel MID",
 352         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
 353         [AZX_DRIVER_ATI] = "HDA ATI SB",
 354         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
 355         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
 356         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
 357         [AZX_DRIVER_SIS] = "HDA SIS966",
 358         [AZX_DRIVER_ULI] = "HDA ULI M5461",
 359         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
 360         [AZX_DRIVER_TERA] = "HDA Teradici",
 361         [AZX_DRIVER_CTX] = "HDA Creative",
 362         [AZX_DRIVER_CTHDA] = "HDA Creative",
 363         [AZX_DRIVER_CMEDIA] = "HDA C-Media",
 364         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
 365 };
 366
 367 #ifdef CONFIG_X86
 368 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
 369 {
 370         int pages;
 371
 372         if (azx_snoop(chip))
 373                 return;
 374         if (!dmab || !dmab->area || !dmab->bytes)
 375                 return;
 376
 377 #ifdef CONFIG_SND_DMA_SGBUF
 378         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
 379                 struct snd_sg_buf *sgbuf = dmab->private_data;
 380                 if (chip->driver_type == AZX_DRIVER_CMEDIA)
 381                         return; /* deal with only CORB/RIRB buffers */
 382                 if (on)
 383                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
 384                 else
 385                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
 386                 return;
 387         }
 388 #endif
 389
 390         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
 391         if (on)
 392                 set_memory_wc((unsigned long)dmab->area, pages);
 393         else
 394                 set_memory_wb((unsigned long)dmab->area, pages);
 395 }
 396
 397 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 398                                  bool on)
 399 {
 400         __mark_pages_wc(chip, buf, on);
 401 }
 402 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 403                                    struct snd_pcm_substream *substream, bool on)
 404 {
 405         if (azx_dev->wc_marked != on) {
 406                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
 407                 azx_dev->wc_marked = on;
 408         }
 409 }
 410 #else
 411 /* NOP for other archs */
 412 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 413                                  bool on)
 414 {
 415 }
 416 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 417                                    struct snd_pcm_substream *substream, bool on)
 418 {
 419 }
 420 #endif
 421
 422 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 423
 424 /*
 425  * initialize the PCI registers
 426  */
 427 /* update bits in a PCI register byte */
 428 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
 429                             unsigned char mask, unsigned char val)
 430 {
 431         unsigned char data;
 432
 433         pci_read_config_byte(pci, reg, &data);
 434         data &= ~mask;
 435         data |= (val & mask);
 436         pci_write_config_byte(pci, reg, data);
 437 }
 438
 439 static void azx_init_pci(struct azx *chip)
 440 {
 441         int snoop_type = azx_get_snoop_type(chip);
 442
 443         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
 444          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
 445          * Ensuring these bits are 0 clears playback static on some HD Audio
 446          * codecs.
 447          * The PCI register TCSEL is defined in the Intel manuals.
 448          */
 449         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
 450                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
 451                 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
 452         }
 453
 454         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
 455          * we need to enable snoop.
 456          */
 457         if (snoop_type == AZX_SNOOP_TYPE_ATI) {
 458                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
 459                         azx_snoop(chip));
 460                 update_pci_byte(chip->pci,
 461                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
 462                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
 463         }
 464
 465         /* For NVIDIA HDA, enable snoop */
 466         if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
 467                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
 468                         azx_snoop(chip));
 469                 update_pci_byte(chip->pci,
 470                                 NVIDIA_HDA_TRANSREG_ADDR,
 471                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
 472                 update_pci_byte(chip->pci,
 473                                 NVIDIA_HDA_ISTRM_COH,
 474                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 475                 update_pci_byte(chip->pci,
 476                                 NVIDIA_HDA_OSTRM_COH,
 477                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 478         }
 479
 480         /* Enable SCH/PCH snoop if needed */
 481         if (snoop_type == AZX_SNOOP_TYPE_SCH) {
 482                 unsigned short snoop;
 483                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 484                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
 485                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
 486                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
 487                         if (!azx_snoop(chip))
 488                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
 489                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
 490                         pci_read_config_word(chip->pci,
 491                                 INTEL_SCH_HDA_DEVC, &snoop);
 492                 }
 493                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
 494                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
 495                         "Disabled" : "Enabled");
 496         }
 497 }
 498
 499 /* calculate runtime delay from LPIB */
 500 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
 501                                    unsigned int pos)
 502 {
 503         struct snd_pcm_substream *substream = azx_dev->substream;
 504         int stream = substream->stream;
 505         unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
 506         int delay;
 507
 508         if (stream == SNDRV_PCM_STREAM_PLAYBACK)
 509                 delay = pos - lpib_pos;
 510         else
 511                 delay = lpib_pos - pos;
 512         if (delay < 0) {
 513                 if (delay >= azx_dev->delay_negative_threshold)
 514                         delay = 0;
 515                 else
 516                         delay += azx_dev->bufsize;
 517         }
 518
 519         if (delay >= azx_dev->period_bytes) {
 520                 dev_info(chip->card->dev,
 521                          "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
 522                          delay, azx_dev->period_bytes);
 523                 delay = 0;
 524                 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
 525                 chip->get_delay[stream] = NULL;
 526         }
 527
 528         return bytes_to_frames(substream->runtime, delay);
 529 }
 530
 531 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
 532
 533 /* called from IRQ */
 534 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
 535 {
 536         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 537         int ok;
 538
 539         ok = azx_position_ok(chip, azx_dev);
 540         if (ok == 1) {
 541                 azx_dev->irq_pending = 0;
 542                 return ok;
 543         } else if (ok == 0) {
 544                 /* bogus IRQ, process it later */
 545                 azx_dev->irq_pending = 1;
 546                 schedule_work(&hda->irq_pending_work);
 547         }
 548         return 0;
 549 }
 550
 551 /*
 552  * Check whether the current DMA position is acceptable for updating
 553  * periods.  Returns non-zero if it's OK.
 554  *
 555  * Many HD-audio controllers appear pretty inaccurate about
 556  * the update-IRQ timing.  The IRQ is issued before actually the
 557  * data is processed.  So, we need to process it afterwords in a
 558  * workqueue.
 559  */
 560 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
 561 {
 562         struct snd_pcm_substream *substream = azx_dev->substream;
 563         int stream = substream->stream;
 564         u32 wallclk;
 565         unsigned int pos;
 566
 567         wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
 568         if (wallclk < (azx_dev->period_wallclk * 2) / 3)
 569                 return -1;      /* bogus (too early) interrupt */
 570
 571         if (chip->get_position[stream])
 572                 pos = chip->get_position[stream](chip, azx_dev);
 573         else { /* use the position buffer as default */
 574                 pos = azx_get_pos_posbuf(chip, azx_dev);
 575                 if (!pos || pos == (u32)-1) {
 576                         dev_info(chip->card->dev,
 577                                  "Invalid position buffer, using LPIB read method instead.\n");
 578                         chip->get_position[stream] = azx_get_pos_lpib;
 579                         pos = azx_get_pos_lpib(chip, azx_dev);
 580                         chip->get_delay[stream] = NULL;
 581                 } else {
 582                         chip->get_position[stream] = azx_get_pos_posbuf;
 583                         if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
 584                                 chip->get_delay[stream] = azx_get_delay_from_lpib;
 585                 }
 586         }
 587
 588         if (pos >= azx_dev->bufsize)
 589                 pos = 0;
 590
 591         if (WARN_ONCE(!azx_dev->period_bytes,
 592                       "hda-intel: zero azx_dev->period_bytes"))
 593                 return -1; /* this shouldn't happen! */
 594         if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
 595             pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
 596                 /* NG - it's below the first next period boundary */
 597                 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
 598         azx_dev->start_wallclk += wallclk;
 599         return 1; /* OK, it's fine */
 600 }
 601
 602 /*
 603  * The work for pending PCM period updates.
 604  */
 605 static void azx_irq_pending_work(struct work_struct *work)
 606 {
 607         struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
 608         struct azx *chip = &hda->chip;
 609         int i, pending, ok;
 610
 611         if (!hda->irq_pending_warned) {
 612                 dev_info(chip->card->dev,
 613                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
 614                          chip->card->number);
 615                 hda->irq_pending_warned = 1;
 616         }
 617
 618         for (;;) {
 619                 pending = 0;
 620                 spin_lock_irq(&chip->reg_lock);
 621                 for (i = 0; i < chip->num_streams; i++) {
 622                         struct azx_dev *azx_dev = &chip->azx_dev[i];
 623                         if (!azx_dev->irq_pending ||
 624                             !azx_dev->substream ||
 625                             !azx_dev->running)
 626                                 continue;
 627                         ok = azx_position_ok(chip, azx_dev);
 628                         if (ok > 0) {
 629                                 azx_dev->irq_pending = 0;
 630                                 spin_unlock(&chip->reg_lock);
 631                                 snd_pcm_period_elapsed(azx_dev->substream);
 632                                 spin_lock(&chip->reg_lock);
 633                         } else if (ok < 0) {
 634                                 pending = 0;    /* too early */
 635                         } else
 636                                 pending++;
 637                 }
 638                 spin_unlock_irq(&chip->reg_lock);
 639                 if (!pending)
 640                         return;
 641                 msleep(1);
 642         }
 643 }
 644
 645 /* clear irq_pending flags and assure no on-going workq */
 646 static void azx_clear_irq_pending(struct azx *chip)
 647 {
 648         int i;
 649
 650         spin_lock_irq(&chip->reg_lock);
 651         for (i = 0; i < chip->num_streams; i++)
 652                 chip->azx_dev[i].irq_pending = 0;
 653         spin_unlock_irq(&chip->reg_lock);
 654 }
 655
 656 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
 657 {
 658         if (request_irq(chip->pci->irq, azx_interrupt,
 659                         chip->msi ? 0 : IRQF_SHARED,
 660                         KBUILD_MODNAME, chip)) {
 661                 dev_err(chip->card->dev,
 662                         "unable to grab IRQ %d, disabling device\n",
 663                         chip->pci->irq);
 664                 if (do_disconnect)
 665                         snd_card_disconnect(chip->card);
 666                 return -1;
 667         }
 668         chip->irq = chip->pci->irq;
 669         pci_intx(chip->pci, !chip->msi);
 670         return 0;
 671 }
 672
 673 /* get the current DMA position with correction on VIA chips */
 674 static unsigned int azx_via_get_position(struct azx *chip,
 675                                          struct azx_dev *azx_dev)
 676 {
 677         unsigned int link_pos, mini_pos, bound_pos;
 678         unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
 679         unsigned int fifo_size;
 680
 681         link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB);
 682         if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 683                 /* Playback, no problem using link position */
 684                 return link_pos;
 685         }
 686
 687         /* Capture */
 688         /* For new chipset,
 689          * use mod to get the DMA position just like old chipset
 690          */
 691         mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
 692         mod_dma_pos %= azx_dev->period_bytes;
 693
 694         /* azx_dev->fifo_size can't get FIFO size of in stream.
 695          * Get from base address + offset.
 696          */
 697         fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
 698
 699         if (azx_dev->insufficient) {
 700                 /* Link position never gather than FIFO size */
 701                 if (link_pos <= fifo_size)
 702                         return 0;
 703
 704                 azx_dev->insufficient = 0;
 705         }
 706
 707         if (link_pos <= fifo_size)
 708                 mini_pos = azx_dev->bufsize + link_pos - fifo_size;
 709         else
 710                 mini_pos = link_pos - fifo_size;
 711
 712         /* Find nearest previous boudary */
 713         mod_mini_pos = mini_pos % azx_dev->period_bytes;
 714         mod_link_pos = link_pos % azx_dev->period_bytes;
 715         if (mod_link_pos >= fifo_size)
 716                 bound_pos = link_pos - mod_link_pos;
 717         else if (mod_dma_pos >= mod_mini_pos)
 718                 bound_pos = mini_pos - mod_mini_pos;
 719         else {
 720                 bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
 721                 if (bound_pos >= azx_dev->bufsize)
 722                         bound_pos = 0;
 723         }
 724
 725         /* Calculate real DMA position we want */
 726         return bound_pos + mod_dma_pos;
 727 }
 728
 729 #ifdef CONFIG_PM
 730 static DEFINE_MUTEX(card_list_lock);
 731 static LIST_HEAD(card_list);
 732
 733 static void azx_add_card_list(struct azx *chip)
 734 {
 735         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 736         mutex_lock(&card_list_lock);
 737         list_add(&hda->list, &card_list);
 738         mutex_unlock(&card_list_lock);
 739 }
 740
 741 static void azx_del_card_list(struct azx *chip)
 742 {
 743         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 744         mutex_lock(&card_list_lock);
 745         list_del_init(&hda->list);
 746         mutex_unlock(&card_list_lock);
 747 }
 748
 749 /* trigger power-save check at writing parameter */
 750 static int param_set_xint(const char *val, const struct kernel_param *kp)
 751 {
 752         struct hda_intel *hda;
 753         struct azx *chip;
 754         int prev = power_save;
 755         int ret = param_set_int(val, kp);
 756
 757         if (ret || prev == power_save)
 758                 return ret;
 759
 760         mutex_lock(&card_list_lock);
 761         list_for_each_entry(hda, &card_list, list) {
 762                 chip = &hda->chip;
 763                 if (!chip->bus || chip->disabled)
 764                         continue;
 765                 snd_hda_set_power_save(chip->bus, power_save * 1000);
 766         }
 767         mutex_unlock(&card_list_lock);
 768         return 0;
 769 }
 770 #else
 771 #define azx_add_card_list(chip) /* NOP */
 772 #define azx_del_card_list(chip) /* NOP */
 773 #endif /* CONFIG_PM */
 774
 775 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
 776 /*
 777  * power management
 778  */
 779 static int azx_suspend(struct device *dev)
 780 {
 781         struct snd_card *card = dev_get_drvdata(dev);
 782         struct azx *chip;
 783         struct hda_intel *hda;
 784
 785         if (!card)
 786                 return 0;
 787
 788         chip = card->private_data;
 789         hda = container_of(chip, struct hda_intel, chip);
 790         if (chip->disabled || hda->init_failed)
 791                 return 0;
 792
 793         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 794         azx_clear_irq_pending(chip);
 795         azx_stop_chip(chip);
 796         azx_enter_link_reset(chip);
 797         if (chip->irq >= 0) {
 798                 free_irq(chip->irq, chip);
 799                 chip->irq = -1;
 800         }
 801
 802         if (chip->msi)
 803                 pci_disable_msi(chip->pci);
 804         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 805                 hda_display_power(hda, false);
 806         return 0;
 807 }
 808
 809 static int azx_resume(struct device *dev)
 810 {
 811         struct pci_dev *pci = to_pci_dev(dev);
 812         struct snd_card *card = dev_get_drvdata(dev);
 813         struct azx *chip;
 814         struct hda_intel *hda;
 815
 816         if (!card)
 817                 return 0;
 818
 819         chip = card->private_data;
 820         hda = container_of(chip, struct hda_intel, chip);
 821         if (chip->disabled || hda->init_failed)
 822                 return 0;
 823
 824         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
 825                 hda_display_power(hda, true);
 826                 haswell_set_bclk(hda);
 827         }
 828         if (chip->msi)
 829                 if (pci_enable_msi(pci) < 0)
 830                         chip->msi = 0;
 831         if (azx_acquire_irq(chip, 1) < 0)
 832                 return -EIO;
 833         azx_init_pci(chip);
 834
 835         azx_init_chip(chip, true);
 836
 837         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 838         return 0;
 839 }
 840 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
 841
 842 #ifdef CONFIG_PM
 843 static int azx_runtime_suspend(struct device *dev)
 844 {
 845         struct snd_card *card = dev_get_drvdata(dev);
 846         struct azx *chip;
 847         struct hda_intel *hda;
 848
 849         if (!card)
 850                 return 0;
 851
 852         chip = card->private_data;
 853         hda = container_of(chip, struct hda_intel, chip);
 854         if (chip->disabled || hda->init_failed)
 855                 return 0;
 856
 857         if (!azx_has_pm_runtime(chip))
 858                 return 0;
 859
 860         /* enable controller wake up event */
 861         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
 862                   STATESTS_INT_MASK);
 863
 864         azx_stop_chip(chip);
 865         azx_enter_link_reset(chip);
 866         azx_clear_irq_pending(chip);
 867         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 868                 hda_display_power(hda, false);
 869
 870         return 0;
 871 }
 872
 873 static int azx_runtime_resume(struct device *dev)
 874 {
 875         struct snd_card *card = dev_get_drvdata(dev);
 876         struct azx *chip;
 877         struct hda_intel *hda;
 878         struct hda_bus *bus;
 879         struct hda_codec *codec;
 880         int status;
 881
 882         if (!card)
 883                 return 0;
 884
 885         chip = card->private_data;
 886         hda = container_of(chip, struct hda_intel, chip);
 887         if (chip->disabled || hda->init_failed)
 888                 return 0;
 889
 890         if (!azx_has_pm_runtime(chip))
 891                 return 0;
 892
 893         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
 894                 hda_display_power(hda, true);
 895                 haswell_set_bclk(hda);
 896         }
 897
 898         /* Read STATESTS before controller reset */
 899         status = azx_readw(chip, STATESTS);
 900
 901         azx_init_pci(chip);
 902         azx_init_chip(chip, true);
 903
 904         bus = chip->bus;
 905         if (status && bus) {
 906                 list_for_each_codec(codec, bus)
 907                         if (status & (1 << codec->addr))
 908                                 schedule_delayed_work(&codec->jackpoll_work,
 909                                                       codec->jackpoll_interval);
 910         }
 911
 912         /* disable controller Wake Up event*/
 913         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
 914                         ~STATESTS_INT_MASK);
 915
 916         return 0;
 917 }
 918
 919 static int azx_runtime_idle(struct device *dev)
 920 {
 921         struct snd_card *card = dev_get_drvdata(dev);
 922         struct azx *chip;
 923         struct hda_intel *hda;
 924
 925         if (!card)
 926                 return 0;
 927
 928         chip = card->private_data;
 929         hda = container_of(chip, struct hda_intel, chip);
 930         if (chip->disabled || hda->init_failed)
 931                 return 0;
 932
 933         if (!power_save_controller || !azx_has_pm_runtime(chip) ||
 934             chip->bus->core.codec_powered)
 935                 return -EBUSY;
 936
 937         return 0;
 938 }
 939
 940 static const struct dev_pm_ops azx_pm = {
 941         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
 942         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
 943 };
 944
 945 #define AZX_PM_OPS      &azx_pm
 946 #else
 947 #define AZX_PM_OPS      NULL
 948 #endif /* CONFIG_PM */
 949
 950
 951 static int azx_probe_continue(struct azx *chip);
 952
 953 #ifdef SUPPORT_VGA_SWITCHEROO
 954 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
 955
 956 static void azx_vs_set_state(struct pci_dev *pci,
 957                              enum vga_switcheroo_state state)
 958 {
 959         struct snd_card *card = pci_get_drvdata(pci);
 960         struct azx *chip = card->private_data;
 961         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 962         bool disabled;
 963
 964         wait_for_completion(&hda->probe_wait);
 965         if (hda->init_failed)
 966                 return;
 967
 968         disabled = (state == VGA_SWITCHEROO_OFF);
 969         if (chip->disabled == disabled)
 970                 return;
 971
 972         if (!chip->bus) {
 973                 chip->disabled = disabled;
 974                 if (!disabled) {
 975                         dev_info(chip->card->dev,
 976                                  "Start delayed initialization\n");
 977                         if (azx_probe_continue(chip) < 0) {
 978                                 dev_err(chip->card->dev, "initialization error\n");
 979                                 hda->init_failed = true;
 980                         }
 981                 }
 982         } else {
 983                 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
 984                          disabled ? "Disabling" : "Enabling");
 985                 if (disabled) {
 986                         pm_runtime_put_sync_suspend(card->dev);
 987                         azx_suspend(card->dev);
 988                         /* when we get suspended by vga switcheroo we end up in D3cold,
 989                          * however we have no ACPI handle, so pci/acpi can't put us there,
 990                          * put ourselves there */
 991                         pci->current_state = PCI_D3cold;
 992                         chip->disabled = true;
 993                         if (snd_hda_lock_devices(chip->bus))
 994                                 dev_warn(chip->card->dev,
 995                                          "Cannot lock devices!\n");
 996                 } else {
 997                         snd_hda_unlock_devices(chip->bus);
 998                         pm_runtime_get_noresume(card->dev);
 999                         chip->disabled = false;
1000                         azx_resume(card->dev);
1001                 }
1002         }
1003 }
1004
1005 static bool azx_vs_can_switch(struct pci_dev *pci)
1006 {
1007         struct snd_card *card = pci_get_drvdata(pci);
1008         struct azx *chip = card->private_data;
1009         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1010
1011         wait_for_completion(&hda->probe_wait);
1012         if (hda->init_failed)
1013                 return false;
1014         if (chip->disabled || !chip->bus)
1015                 return true;
1016         if (snd_hda_lock_devices(chip->bus))
1017                 return false;
1018         snd_hda_unlock_devices(chip->bus);
1019         return true;
1020 }
1021
1022 static void init_vga_switcheroo(struct azx *chip)
1023 {
1024         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1025         struct pci_dev *p = get_bound_vga(chip->pci);
1026         if (p) {
1027                 dev_info(chip->card->dev,
1028                          "Handle VGA-switcheroo audio client\n");
1029                 hda->use_vga_switcheroo = 1;
1030                 pci_dev_put(p);
1031         }
1032 }
1033
1034 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1035         .set_gpu_state = azx_vs_set_state,
1036         .can_switch = azx_vs_can_switch,
1037 };
1038
1039 static int register_vga_switcheroo(struct azx *chip)
1040 {
1041         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1042         int err;
1043
1044         if (!hda->use_vga_switcheroo)
1045                 return 0;
1046         /* FIXME: currently only handling DIS controller
1047          * is there any machine with two switchable HDMI audio controllers?
1048          */
1049         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1050                                                     VGA_SWITCHEROO_DIS,
1051                                                     chip->bus != NULL);
1052         if (err < 0)
1053                 return err;
1054         hda->vga_switcheroo_registered = 1;
1055
1056         /* register as an optimus hdmi audio power domain */
1057         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1058                                                          &hda->hdmi_pm_domain);
1059         return 0;
1060 }
1061 #else
1062 #define init_vga_switcheroo(chip)               /* NOP */
1063 #define register_vga_switcheroo(chip)           0
1064 #define check_hdmi_disabled(pci)        false
1065 #endif /* SUPPORT_VGA_SWITCHER */
1066
1067 /*
1068  * destructor
1069  */
1070 static int azx_free(struct azx *chip)
1071 {
1072         struct pci_dev *pci = chip->pci;
1073         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1074         int i;
1075
1076         if (azx_has_pm_runtime(chip) && chip->running)
1077                 pm_runtime_get_noresume(&pci->dev);
1078
1079         azx_del_card_list(chip);
1080
1081         hda->init_failed = 1; /* to be sure */
1082         complete_all(&hda->probe_wait);
1083
1084         if (use_vga_switcheroo(hda)) {
1085                 if (chip->disabled && chip->bus)
1086                         snd_hda_unlock_devices(chip->bus);
1087                 if (hda->vga_switcheroo_registered)
1088                         vga_switcheroo_unregister_client(chip->pci);
1089         }
1090
1091         if (chip->initialized) {
1092                 azx_clear_irq_pending(chip);
1093                 for (i = 0; i < chip->num_streams; i++)
1094                         azx_stream_stop(chip, &chip->azx_dev[i]);
1095                 azx_stop_chip(chip);
1096         }
1097
1098         if (chip->irq >= 0)
1099                 free_irq(chip->irq, (void*)chip);
1100         if (chip->msi)
1101                 pci_disable_msi(chip->pci);
1102         iounmap(chip->remap_addr);
1103
1104         azx_free_stream_pages(chip);
1105         if (chip->region_requested)
1106                 pci_release_regions(chip->pci);
1107         pci_disable_device(chip->pci);
1108         kfree(chip->azx_dev);
1109 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1110         release_firmware(chip->fw);
1111 #endif
1112         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1113                 hda_display_power(hda, false);
1114                 hda_i915_exit(hda);
1115         }
1116         kfree(hda);
1117
1118         return 0;
1119 }
1120
1121 static int azx_dev_free(struct snd_device *device)
1122 {
1123         return azx_free(device->device_data);
1124 }
1125
1126 #ifdef SUPPORT_VGA_SWITCHEROO
1127 /*
1128  * Check of disabled HDMI controller by vga-switcheroo
1129  */
1130 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1131 {
1132         struct pci_dev *p;
1133
1134         /* check only discrete GPU */
1135         switch (pci->vendor) {
1136         case PCI_VENDOR_ID_ATI:
1137         case PCI_VENDOR_ID_AMD:
1138         case PCI_VENDOR_ID_NVIDIA:
1139                 if (pci->devfn == 1) {
1140                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1141                                                         pci->bus->number, 0);
1142                         if (p) {
1143                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1144                                         return p;
1145                                 pci_dev_put(p);
1146                         }
1147                 }
1148                 break;
1149         }
1150         return NULL;
1151 }
1152
1153 static bool check_hdmi_disabled(struct pci_dev *pci)
1154 {
1155         bool vga_inactive = false;
1156         struct pci_dev *p = get_bound_vga(pci);
1157
1158         if (p) {
1159                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1160                         vga_inactive = true;
1161                 pci_dev_put(p);
1162         }
1163         return vga_inactive;
1164 }
1165 #endif /* SUPPORT_VGA_SWITCHEROO */
1166
1167 /*
1168  * white/black-listing for position_fix
1169  */
1170 static struct snd_pci_quirk position_fix_list[] = {
1171         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1172         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1173         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1174         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1175         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1176         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1177         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1178         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1179         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1180         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1181         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1182         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1183         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1184         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1185         {}
1186 };
1187
1188 static int check_position_fix(struct azx *chip, int fix)
1189 {
1190         const struct snd_pci_quirk *q;
1191
1192         switch (fix) {
1193         case POS_FIX_AUTO:
1194         case POS_FIX_LPIB:
1195         case POS_FIX_POSBUF:
1196         case POS_FIX_VIACOMBO:
1197         case POS_FIX_COMBO:
1198                 return fix;
1199         }
1200
1201         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1202         if (q) {
1203                 dev_info(chip->card->dev,
1204                          "position_fix set to %d for device %04x:%04x\n",
1205                          q->value, q->subvendor, q->subdevice);
1206                 return q->value;
1207         }
1208
1209         /* Check VIA/ATI HD Audio Controller exist */
1210         if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1211                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1212                 return POS_FIX_VIACOMBO;
1213         }
1214         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1215                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1216                 return POS_FIX_LPIB;
1217         }
1218         return POS_FIX_AUTO;
1219 }
1220
1221 static void assign_position_fix(struct azx *chip, int fix)
1222 {
1223         static azx_get_pos_callback_t callbacks[] = {
1224                 [POS_FIX_AUTO] = NULL,
1225                 [POS_FIX_LPIB] = azx_get_pos_lpib,
1226                 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1227                 [POS_FIX_VIACOMBO] = azx_via_get_position,
1228                 [POS_FIX_COMBO] = azx_get_pos_lpib,
1229         };
1230
1231         chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1232
1233         /* combo mode uses LPIB only for playback */
1234         if (fix == POS_FIX_COMBO)
1235                 chip->get_position[1] = NULL;
1236
1237         if (fix == POS_FIX_POSBUF &&
1238             (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1239                 chip->get_delay[0] = chip->get_delay[1] =
1240                         azx_get_delay_from_lpib;
1241         }
1242
1243 }
1244
1245 /*
1246  * black-lists for probe_mask
1247  */
1248 static struct snd_pci_quirk probe_mask_list[] = {
1249         /* Thinkpad often breaks the controller communication when accessing
1250          * to the non-working (or non-existing) modem codec slot.
1251          */
1252         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1253         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1254         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1255         /* broken BIOS */
1256         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1257         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1258         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1259         /* forced codec slots */
1260         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1261         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1262         /* WinFast VP200 H (Teradici) user reported broken communication */
1263         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1264         {}
1265 };
1266
1267 #define AZX_FORCE_CODEC_MASK    0x100
1268
1269 static void check_probe_mask(struct azx *chip, int dev)
1270 {
1271         const struct snd_pci_quirk *q;
1272
1273         chip->codec_probe_mask = probe_mask[dev];
1274         if (chip->codec_probe_mask == -1) {
1275                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1276                 if (q) {
1277                         dev_info(chip->card->dev,
1278                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1279                                  q->value, q->subvendor, q->subdevice);
1280                         chip->codec_probe_mask = q->value;
1281                 }
1282         }
1283
1284         /* check forced option */
1285         if (chip->codec_probe_mask != -1 &&
1286             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1287                 chip->codec_mask = chip->codec_probe_mask & 0xff;
1288                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1289                          chip->codec_mask);
1290         }
1291 }
1292
1293 /*
1294  * white/black-list for enable_msi
1295  */
1296 static struct snd_pci_quirk msi_black_list[] = {
1297         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1298         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1299         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1300         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1301         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1302         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1303         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1304         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1305         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1306         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1307         {}
1308 };
1309
1310 static void check_msi(struct azx *chip)
1311 {
1312         const struct snd_pci_quirk *q;
1313
1314         if (enable_msi >= 0) {
1315                 chip->msi = !!enable_msi;
1316                 return;
1317         }
1318         chip->msi = 1;  /* enable MSI as default */
1319         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1320         if (q) {
1321                 dev_info(chip->card->dev,
1322                          "msi for device %04x:%04x set to %d\n",
1323                          q->subvendor, q->subdevice, q->value);
1324                 chip->msi = q->value;
1325                 return;
1326         }
1327
1328         /* NVidia chipsets seem to cause troubles with MSI */
1329         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1330                 dev_info(chip->card->dev, "Disabling MSI\n");
1331                 chip->msi = 0;
1332         }
1333 }
1334
1335 /* check the snoop mode availability */
1336 static void azx_check_snoop_available(struct azx *chip)
1337 {
1338         int snoop = hda_snoop;
1339
1340         if (snoop >= 0) {
1341                 dev_info(chip->card->dev, "Force to %s mode by module option\n",
1342                          snoop ? "snoop" : "non-snoop");
1343                 chip->snoop = snoop;
1344                 return;
1345         }
1346
1347         snoop = true;
1348         if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
1349             chip->driver_type == AZX_DRIVER_VIA) {
1350                 /* force to non-snoop mode for a new VIA controller
1351                  * when BIOS is set
1352                  */
1353                 u8 val;
1354                 pci_read_config_byte(chip->pci, 0x42, &val);
1355                 if (!(val & 0x80) && chip->pci->revision == 0x30)
1356                         snoop = false;
1357         }
1358
1359         if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
1360                 snoop = false;
1361
1362         chip->snoop = snoop;
1363         if (!snoop)
1364                 dev_info(chip->card->dev, "Force to non-snoop mode\n");
1365 }
1366
1367 static void azx_probe_work(struct work_struct *work)
1368 {
1369         struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1370         azx_probe_continue(&hda->chip);
1371 }
1372
1373 /*
1374  * constructor
1375  */
1376 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1377                       int dev, unsigned int driver_caps,
1378                       const struct hda_controller_ops *hda_ops,
1379                       struct azx **rchip)
1380 {
1381         static struct snd_device_ops ops = {
1382                 .dev_free = azx_dev_free,
1383         };
1384         struct hda_intel *hda;
1385         struct azx *chip;
1386         int err;
1387
1388         *rchip = NULL;
1389
1390         err = pci_enable_device(pci);
1391         if (err < 0)
1392                 return err;
1393
1394         hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1395         if (!hda) {
1396                 pci_disable_device(pci);
1397                 return -ENOMEM;
1398         }
1399
1400         chip = &hda->chip;
1401         spin_lock_init(&chip->reg_lock);
1402         mutex_init(&chip->open_mutex);
1403         chip->card = card;
1404         chip->pci = pci;
1405         chip->ops = hda_ops;
1406         chip->irq = -1;
1407         chip->driver_caps = driver_caps;
1408         chip->driver_type = driver_caps & 0xff;
1409         check_msi(chip);
1410         chip->dev_index = dev;
1411         chip->jackpoll_ms = jackpoll_ms;
1412         INIT_LIST_HEAD(&chip->pcm_list);
1413         INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1414         INIT_LIST_HEAD(&hda->list);
1415         init_vga_switcheroo(chip);
1416         init_completion(&hda->probe_wait);
1417
1418         assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1419
1420         check_probe_mask(chip, dev);
1421
1422         chip->single_cmd = single_cmd;
1423         azx_check_snoop_available(chip);
1424
1425         if (bdl_pos_adj[dev] < 0) {
1426                 switch (chip->driver_type) {
1427                 case AZX_DRIVER_ICH:
1428                 case AZX_DRIVER_PCH:
1429                         bdl_pos_adj[dev] = 1;
1430                         break;
1431                 default:
1432                         bdl_pos_adj[dev] = 32;
1433                         break;
1434                 }
1435         }
1436         chip->bdl_pos_adj = bdl_pos_adj;
1437
1438         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1439         if (err < 0) {
1440                 dev_err(card->dev, "Error creating device [card]!\n");
1441                 azx_free(chip);
1442                 return err;
1443         }
1444
1445         /* continue probing in work context as may trigger request module */
1446         INIT_WORK(&hda->probe_work, azx_probe_work);
1447
1448         *rchip = chip;
1449
1450         return 0;
1451 }
1452
1453 static int azx_first_init(struct azx *chip)
1454 {
1455         int dev = chip->dev_index;
1456         struct pci_dev *pci = chip->pci;
1457         struct snd_card *card = chip->card;
1458         int err;
1459         unsigned short gcap;
1460         unsigned int dma_bits = 64;
1461
1462 #if BITS_PER_LONG != 64
1463         /* Fix up base address on ULI M5461 */
1464         if (chip->driver_type == AZX_DRIVER_ULI) {
1465                 u16 tmp3;
1466                 pci_read_config_word(pci, 0x40, &tmp3);
1467                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1468                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1469         }
1470 #endif
1471
1472         err = pci_request_regions(pci, "ICH HD audio");
1473         if (err < 0)
1474                 return err;
1475         chip->region_requested = 1;
1476
1477         chip->addr = pci_resource_start(pci, 0);
1478         chip->remap_addr = pci_ioremap_bar(pci, 0);
1479         if (chip->remap_addr == NULL) {
1480                 dev_err(card->dev, "ioremap error\n");
1481                 return -ENXIO;
1482         }
1483
1484         if (chip->msi) {
1485                 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1486                         dev_dbg(card->dev, "Disabling 64bit MSI\n");
1487                         pci->no_64bit_msi = true;
1488                 }
1489                 if (pci_enable_msi(pci) < 0)
1490                         chip->msi = 0;
1491         }
1492
1493         if (azx_acquire_irq(chip, 0) < 0)
1494                 return -EBUSY;
1495
1496         pci_set_master(pci);
1497         synchronize_irq(chip->irq);
1498
1499         gcap = azx_readw(chip, GCAP);
1500         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1501
1502         /* AMD devices support 40 or 48bit DMA, take the safe one */
1503         if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1504                 dma_bits = 40;
1505
1506         /* disable SB600 64bit support for safety */
1507         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1508                 struct pci_dev *p_smbus;
1509                 dma_bits = 40;
1510                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1511                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1512                                          NULL);
1513                 if (p_smbus) {
1514                         if (p_smbus->revision < 0x30)
1515                                 gcap &= ~AZX_GCAP_64OK;
1516                         pci_dev_put(p_smbus);
1517                 }
1518         }
1519
1520         /* disable 64bit DMA address on some devices */
1521         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1522                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1523                 gcap &= ~AZX_GCAP_64OK;
1524         }
1525
1526         /* disable buffer size rounding to 128-byte multiples if supported */
1527         if (align_buffer_size >= 0)
1528                 chip->align_buffer_size = !!align_buffer_size;
1529         else {
1530                 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1531                         chip->align_buffer_size = 0;
1532                 else
1533                         chip->align_buffer_size = 1;
1534         }
1535
1536         /* allow 64bit DMA address if supported by H/W */
1537         if (!(gcap & AZX_GCAP_64OK))
1538                 dma_bits = 32;
1539         if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
1540                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
1541         } else {
1542                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1543                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1544         }
1545
1546         /* read number of streams from GCAP register instead of using
1547          * hardcoded value
1548          */
1549         chip->capture_streams = (gcap >> 8) & 0x0f;
1550         chip->playback_streams = (gcap >> 12) & 0x0f;
1551         if (!chip->playback_streams && !chip->capture_streams) {
1552                 /* gcap didn't give any info, switching to old method */
1553
1554                 switch (chip->driver_type) {
1555                 case AZX_DRIVER_ULI:
1556                         chip->playback_streams = ULI_NUM_PLAYBACK;
1557                         chip->capture_streams = ULI_NUM_CAPTURE;
1558                         break;
1559                 case AZX_DRIVER_ATIHDMI:
1560                 case AZX_DRIVER_ATIHDMI_NS:
1561                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1562                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1563                         break;
1564                 case AZX_DRIVER_GENERIC:
1565                 default:
1566                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1567                         chip->capture_streams = ICH6_NUM_CAPTURE;
1568                         break;
1569                 }
1570         }
1571         chip->capture_index_offset = 0;
1572         chip->playback_index_offset = chip->capture_streams;
1573         chip->num_streams = chip->playback_streams + chip->capture_streams;
1574         chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1575                                 GFP_KERNEL);
1576         if (!chip->azx_dev)
1577                 return -ENOMEM;
1578
1579         err = azx_alloc_stream_pages(chip);
1580         if (err < 0)
1581                 return err;
1582
1583         /* initialize streams */
1584         azx_init_stream(chip);
1585
1586         /* initialize chip */
1587         azx_init_pci(chip);
1588
1589         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1590                 struct hda_intel *hda;
1591
1592                 hda = container_of(chip, struct hda_intel, chip);
1593                 haswell_set_bclk(hda);
1594         }
1595
1596         azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1597
1598         /* codec detection */
1599         if (!chip->codec_mask) {
1600                 dev_err(card->dev, "no codecs found!\n");
1601                 return -ENODEV;
1602         }
1603
1604         strcpy(card->driver, "HDA-Intel");
1605         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1606                 sizeof(card->shortname));
1607         snprintf(card->longname, sizeof(card->longname),
1608                  "%s at 0x%lx irq %i",
1609                  card->shortname, chip->addr, chip->irq);
1610
1611         return 0;
1612 }
1613
1614 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1615 /* callback from request_firmware_nowait() */
1616 static void azx_firmware_cb(const struct firmware *fw, void *context)
1617 {
1618         struct snd_card *card = context;
1619         struct azx *chip = card->private_data;
1620         struct pci_dev *pci = chip->pci;
1621
1622         if (!fw) {
1623                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1624                 goto error;
1625         }
1626
1627         chip->fw = fw;
1628         if (!chip->disabled) {
1629                 /* continue probing */
1630                 if (azx_probe_continue(chip))
1631                         goto error;
1632         }
1633         return; /* OK */
1634
1635  error:
1636         snd_card_free(card);
1637         pci_set_drvdata(pci, NULL);
1638 }
1639 #endif
1640
1641 /*
1642  * HDA controller ops.
1643  */
1644
1645 /* PCI register access. */
1646 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1647 {
1648         writel(value, addr);
1649 }
1650
1651 static u32 pci_azx_readl(u32 __iomem *addr)
1652 {
1653         return readl(addr);
1654 }
1655
1656 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1657 {
1658         writew(value, addr);
1659 }
1660
1661 static u16 pci_azx_readw(u16 __iomem *addr)
1662 {
1663         return readw(addr);
1664 }
1665
1666 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1667 {
1668         writeb(value, addr);
1669 }
1670
1671 static u8 pci_azx_readb(u8 __iomem *addr)
1672 {
1673         return readb(addr);
1674 }
1675
1676 static int disable_msi_reset_irq(struct azx *chip)
1677 {
1678         int err;
1679
1680         free_irq(chip->irq, chip);
1681         chip->irq = -1;
1682         pci_disable_msi(chip->pci);
1683         chip->msi = 0;
1684         err = azx_acquire_irq(chip, 1);
1685         if (err < 0)
1686                 return err;
1687
1688         return 0;
1689 }
1690
1691 /* DMA page allocation helpers.  */
1692 static int dma_alloc_pages(struct azx *chip,
1693                            int type,
1694                            size_t size,
1695                            struct snd_dma_buffer *buf)
1696 {
1697         int err;
1698
1699         err = snd_dma_alloc_pages(type,
1700                                   chip->card->dev,
1701                                   size, buf);
1702         if (err < 0)
1703                 return err;
1704         mark_pages_wc(chip, buf, true);
1705         return 0;
1706 }
1707
1708 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1709 {
1710         mark_pages_wc(chip, buf, false);
1711         snd_dma_free_pages(buf);
1712 }
1713
1714 static int substream_alloc_pages(struct azx *chip,
1715                                  struct snd_pcm_substream *substream,
1716                                  size_t size)
1717 {
1718         struct azx_dev *azx_dev = get_azx_dev(substream);
1719         int ret;
1720
1721         mark_runtime_wc(chip, azx_dev, substream, false);
1722         azx_dev->bufsize = 0;
1723         azx_dev->period_bytes = 0;
1724         azx_dev->format_val = 0;
1725         ret = snd_pcm_lib_malloc_pages(substream, size);
1726         if (ret < 0)
1727                 return ret;
1728         mark_runtime_wc(chip, azx_dev, substream, true);
1729         return 0;
1730 }
1731
1732 static int substream_free_pages(struct azx *chip,
1733                                 struct snd_pcm_substream *substream)
1734 {
1735         struct azx_dev *azx_dev = get_azx_dev(substream);
1736         mark_runtime_wc(chip, azx_dev, substream, false);
1737         return snd_pcm_lib_free_pages(substream);
1738 }
1739
1740 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1741                              struct vm_area_struct *area)
1742 {
1743 #ifdef CONFIG_X86
1744         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1745         struct azx *chip = apcm->chip;
1746         if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1747                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1748 #endif
1749 }
1750
1751 static const struct hda_controller_ops pci_hda_ops = {
1752         .reg_writel = pci_azx_writel,
1753         .reg_readl = pci_azx_readl,
1754         .reg_writew = pci_azx_writew,
1755         .reg_readw = pci_azx_readw,
1756         .reg_writeb = pci_azx_writeb,
1757         .reg_readb = pci_azx_readb,
1758         .disable_msi_reset_irq = disable_msi_reset_irq,
1759         .dma_alloc_pages = dma_alloc_pages,
1760         .dma_free_pages = dma_free_pages,
1761         .substream_alloc_pages = substream_alloc_pages,
1762         .substream_free_pages = substream_free_pages,
1763         .pcm_mmap_prepare = pcm_mmap_prepare,
1764         .position_check = azx_position_check,
1765 };
1766
1767 static int azx_probe(struct pci_dev *pci,
1768                      const struct pci_device_id *pci_id)
1769 {
1770         static int dev;
1771         struct snd_card *card;
1772         struct hda_intel *hda;
1773         struct azx *chip;
1774         bool schedule_probe;
1775         int err;
1776
1777         if (dev >= SNDRV_CARDS)
1778                 return -ENODEV;
1779         if (!enable[dev]) {
1780                 dev++;
1781                 return -ENOENT;
1782         }
1783
1784         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1785                            0, &card);
1786         if (err < 0) {
1787                 dev_err(&pci->dev, "Error creating card!\n");
1788                 return err;
1789         }
1790
1791         err = azx_create(card, pci, dev, pci_id->driver_data,
1792                          &pci_hda_ops, &chip);
1793         if (err < 0)
1794                 goto out_free;
1795         card->private_data = chip;
1796         hda = container_of(chip, struct hda_intel, chip);
1797
1798         pci_set_drvdata(pci, card);
1799
1800         err = register_vga_switcheroo(chip);
1801         if (err < 0) {
1802                 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1803                 goto out_free;
1804         }
1805
1806         if (check_hdmi_disabled(pci)) {
1807                 dev_info(card->dev, "VGA controller is disabled\n");
1808                 dev_info(card->dev, "Delaying initialization\n");
1809                 chip->disabled = true;
1810         }
1811
1812         schedule_probe = !chip->disabled;
1813
1814 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1815         if (patch[dev] && *patch[dev]) {
1816                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1817                          patch[dev]);
1818                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1819                                               &pci->dev, GFP_KERNEL, card,
1820                                               azx_firmware_cb);
1821                 if (err < 0)
1822                         goto out_free;
1823                 schedule_probe = false; /* continued in azx_firmware_cb() */
1824         }
1825 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1826
1827 #ifndef CONFIG_SND_HDA_I915
1828         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1829                 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1830 #endif
1831
1832         if (schedule_probe)
1833                 schedule_work(&hda->probe_work);
1834
1835         dev++;
1836         if (chip->disabled)
1837                 complete_all(&hda->probe_wait);
1838         return 0;
1839
1840 out_free:
1841         snd_card_free(card);
1842         return err;
1843 }
1844
1845 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1846 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1847         [AZX_DRIVER_NVIDIA] = 8,
1848         [AZX_DRIVER_TERA] = 1,
1849 };
1850
1851 static int azx_probe_continue(struct azx *chip)
1852 {
1853         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1854         struct pci_dev *pci = chip->pci;
1855         int dev = chip->dev_index;
1856         int err;
1857
1858         /* Request power well for Haswell HDA controller and codec */
1859         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1860 #ifdef CONFIG_SND_HDA_I915
1861                 err = hda_i915_init(hda);
1862                 if (err < 0) {
1863                         /* if the controller is bound only with HDMI/DP
1864                          * (for HSW and BDW), we need to abort the probe;
1865                          * for other chips, still continue probing as other
1866                          * codecs can be on the same link.
1867                          */
1868                         if (CONTROLLER_IN_GPU(pci))
1869                                 goto out_free;
1870                         else
1871                                 goto skip_i915;
1872                 }
1873                 err = hda_display_power(hda, true);
1874                 if (err < 0) {
1875                         dev_err(chip->card->dev,
1876                                 "Cannot turn on display power on i915\n");
1877                         goto out_free;
1878                 }
1879 #endif
1880         }
1881
1882 #ifdef CONFIG_SND_HDA_I915
1883  skip_i915:
1884 #endif
1885         err = azx_first_init(chip);
1886         if (err < 0)
1887                 goto out_free;
1888
1889 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1890         chip->beep_mode = beep_mode[dev];
1891 #endif
1892
1893         /* create codec instances */
1894         err = azx_bus_create(chip, model[dev]);
1895         if (err < 0)
1896                 goto out_free;
1897
1898         err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
1899         if (err < 0)
1900                 goto out_free;
1901
1902 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1903         if (chip->fw) {
1904                 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1905                                          chip->fw->data);
1906                 if (err < 0)
1907                         goto out_free;
1908 #ifndef CONFIG_PM
1909                 release_firmware(chip->fw); /* no longer needed */
1910                 chip->fw = NULL;
1911 #endif
1912         }
1913 #endif
1914         if ((probe_only[dev] & 1) == 0) {
1915                 err = azx_codec_configure(chip);
1916                 if (err < 0)
1917                         goto out_free;
1918         }
1919
1920         err = snd_card_register(chip->card);
1921         if (err < 0)
1922                 goto out_free;
1923
1924         chip->running = 1;
1925         azx_add_card_list(chip);
1926         snd_hda_set_power_save(chip->bus, power_save * 1000);
1927         if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo)
1928                 pm_runtime_put_noidle(&pci->dev);
1929
1930 out_free:
1931         if (err < 0)
1932                 hda->init_failed = 1;
1933         complete_all(&hda->probe_wait);
1934         return err;
1935 }
1936
1937 static void azx_remove(struct pci_dev *pci)
1938 {
1939         struct snd_card *card = pci_get_drvdata(pci);
1940
1941         if (card)
1942                 snd_card_free(card);
1943 }
1944
1945 static void azx_shutdown(struct pci_dev *pci)
1946 {
1947         struct snd_card *card = pci_get_drvdata(pci);
1948         struct azx *chip;
1949
1950         if (!card)
1951                 return;
1952         chip = card->private_data;
1953         if (chip && chip->running)
1954                 azx_stop_chip(chip);
1955 }
1956
1957 /* PCI IDs */
1958 static const struct pci_device_id azx_ids[] = {
1959         /* CPT */
1960         { PCI_DEVICE(0x8086, 0x1c20),
1961           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1962         /* PBG */
1963         { PCI_DEVICE(0x8086, 0x1d20),
1964           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1965         /* Panther Point */
1966         { PCI_DEVICE(0x8086, 0x1e20),
1967           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1968         /* Lynx Point */
1969         { PCI_DEVICE(0x8086, 0x8c20),
1970           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1971         /* 9 Series */
1972         { PCI_DEVICE(0x8086, 0x8ca0),
1973           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1974         /* Wellsburg */
1975         { PCI_DEVICE(0x8086, 0x8d20),
1976           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1977         { PCI_DEVICE(0x8086, 0x8d21),
1978           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1979         /* Lynx Point-LP */
1980         { PCI_DEVICE(0x8086, 0x9c20),
1981           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1982         /* Lynx Point-LP */
1983         { PCI_DEVICE(0x8086, 0x9c21),
1984           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1985         /* Wildcat Point-LP */
1986         { PCI_DEVICE(0x8086, 0x9ca0),
1987           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1988         /* Sunrise Point */
1989         { PCI_DEVICE(0x8086, 0xa170),
1990           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
1991         /* Sunrise Point-LP */
1992         { PCI_DEVICE(0x8086, 0x9d70),
1993           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
1994         /* Haswell */
1995         { PCI_DEVICE(0x8086, 0x0a0c),
1996           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1997         { PCI_DEVICE(0x8086, 0x0c0c),
1998           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1999         { PCI_DEVICE(0x8086, 0x0d0c),
2000           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2001         /* Broadwell */
2002         { PCI_DEVICE(0x8086, 0x160c),
2003           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2004         /* 5 Series/3400 */
2005         { PCI_DEVICE(0x8086, 0x3b56),
2006           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2007         /* Poulsbo */
2008         { PCI_DEVICE(0x8086, 0x811b),
2009           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2010         /* Oaktrail */
2011         { PCI_DEVICE(0x8086, 0x080a),
2012           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2013         /* BayTrail */
2014         { PCI_DEVICE(0x8086, 0x0f04),
2015           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BAYTRAIL },
2016         /* Braswell */
2017         { PCI_DEVICE(0x8086, 0x2284),
2018           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2019         /* ICH6 */
2020         { PCI_DEVICE(0x8086, 0x2668),
2021           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2022         /* ICH7 */
2023         { PCI_DEVICE(0x8086, 0x27d8),
2024           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2025         /* ESB2 */
2026         { PCI_DEVICE(0x8086, 0x269a),
2027           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2028         /* ICH8 */
2029         { PCI_DEVICE(0x8086, 0x284b),
2030           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2031         /* ICH9 */
2032         { PCI_DEVICE(0x8086, 0x293e),
2033           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2034         /* ICH9 */
2035         { PCI_DEVICE(0x8086, 0x293f),
2036           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2037         /* ICH10 */
2038         { PCI_DEVICE(0x8086, 0x3a3e),
2039           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2040         /* ICH10 */
2041         { PCI_DEVICE(0x8086, 0x3a6e),
2042           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2043         /* Generic Intel */
2044         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2045           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2046           .class_mask = 0xffffff,
2047           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2048         /* ATI SB 450/600/700/800/900 */
2049         { PCI_DEVICE(0x1002, 0x437b),
2050           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2051         { PCI_DEVICE(0x1002, 0x4383),
2052           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2053         /* AMD Hudson */
2054         { PCI_DEVICE(0x1022, 0x780d),
2055           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2056         /* ATI HDMI */
2057         { PCI_DEVICE(0x1002, 0x1308),
2058           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2059         { PCI_DEVICE(0x1002, 0x793b),
2060           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2061         { PCI_DEVICE(0x1002, 0x7919),
2062           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2063         { PCI_DEVICE(0x1002, 0x960f),
2064           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2065         { PCI_DEVICE(0x1002, 0x970f),
2066           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2067         { PCI_DEVICE(0x1002, 0x9840),
2068           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2069         { PCI_DEVICE(0x1002, 0xaa00),
2070           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2071         { PCI_DEVICE(0x1002, 0xaa08),
2072           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2073         { PCI_DEVICE(0x1002, 0xaa10),
2074           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2075         { PCI_DEVICE(0x1002, 0xaa18),
2076           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2077         { PCI_DEVICE(0x1002, 0xaa20),
2078           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2079         { PCI_DEVICE(0x1002, 0xaa28),
2080           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2081         { PCI_DEVICE(0x1002, 0xaa30),
2082           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2083         { PCI_DEVICE(0x1002, 0xaa38),
2084           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2085         { PCI_DEVICE(0x1002, 0xaa40),
2086           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2087         { PCI_DEVICE(0x1002, 0xaa48),
2088           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2089         { PCI_DEVICE(0x1002, 0xaa50),
2090           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2091         { PCI_DEVICE(0x1002, 0xaa58),
2092           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2093         { PCI_DEVICE(0x1002, 0xaa60),
2094           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2095         { PCI_DEVICE(0x1002, 0xaa68),
2096           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2097         { PCI_DEVICE(0x1002, 0xaa80),
2098           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2099         { PCI_DEVICE(0x1002, 0xaa88),
2100           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2101         { PCI_DEVICE(0x1002, 0xaa90),
2102           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2103         { PCI_DEVICE(0x1002, 0xaa98),
2104           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2105         { PCI_DEVICE(0x1002, 0x9902),
2106           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2107         { PCI_DEVICE(0x1002, 0xaaa0),
2108           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2109         { PCI_DEVICE(0x1002, 0xaaa8),
2110           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2111         { PCI_DEVICE(0x1002, 0xaab0),
2112           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2113         { PCI_DEVICE(0x1002, 0xaac8),
2114           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2115         /* VIA VT8251/VT8237A */
2116         { PCI_DEVICE(0x1106, 0x3288),
2117           .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2118         /* VIA GFX VT7122/VX900 */
2119         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2120         /* VIA GFX VT6122/VX11 */
2121         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2122         /* SIS966 */
2123         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2124         /* ULI M5461 */
2125         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2126         /* NVIDIA MCP */
2127         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2128           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2129           .class_mask = 0xffffff,
2130           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2131         /* Teradici */
2132         { PCI_DEVICE(0x6549, 0x1200),
2133           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2134         { PCI_DEVICE(0x6549, 0x2200),
2135           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2136         /* Creative X-Fi (CA0110-IBG) */
2137         /* CTHDA chips */
2138         { PCI_DEVICE(0x1102, 0x0010),
2139           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2140         { PCI_DEVICE(0x1102, 0x0012),
2141           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2142 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2143         /* the following entry conflicts with snd-ctxfi driver,
2144          * as ctxfi driver mutates from HD-audio to native mode with
2145          * a special command sequence.
2146          */
2147         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2148           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2149           .class_mask = 0xffffff,
2150           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2151           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2152 #else
2153         /* this entry seems still valid -- i.e. without emu20kx chip */
2154         { PCI_DEVICE(0x1102, 0x0009),
2155           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2156           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2157 #endif
2158         /* CM8888 */
2159         { PCI_DEVICE(0x13f6, 0x5011),
2160           .driver_data = AZX_DRIVER_CMEDIA |
2161           AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2162         /* Vortex86MX */
2163         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2164         /* VMware HDAudio */
2165         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2166         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2167         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2168           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2169           .class_mask = 0xffffff,
2170           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2171         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2172           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2173           .class_mask = 0xffffff,
2174           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2175         { 0, }
2176 };
2177 MODULE_DEVICE_TABLE(pci, azx_ids);
2178
2179 /* pci_driver definition */
2180 static struct pci_driver azx_driver = {
2181         .name = KBUILD_MODNAME,
2182         .id_table = azx_ids,
2183         .probe = azx_probe,
2184         .remove = azx_remove,
2185         .shutdown = azx_shutdown,
2186         .driver = {
2187                 .pm = AZX_PM_OPS,
2188         },
2189 };
2190
2191 module_pci_driver(azx_driver);