4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/mod_devicetable.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/list.h>
26 #include <linux/compiler.h>
27 #include <linux/errno.h>
28 #include <linux/kobject.h>
29 #include <linux/atomic.h>
30 #include <linux/device.h>
32 #include <linux/resource_ext.h>
33 #include <uapi/linux/pci.h>
35 #include <linux/pci_ids.h>
38 * The PCI interface treats multi-function devices as independent
39 * devices. The slot/function address of each device is encoded
40 * in a single byte as follows:
45 * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h.
46 * In the interest of not exposing interfaces to user-space unnecessarily,
47 * the following kernel-only defines are being added here.
49 #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn))
50 /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
51 #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff)
53 /* pci_slot represents a physical slot */
55 struct pci_bus *bus; /* The bus this slot is on */
56 struct list_head list; /* node in list of slots on this bus */
57 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
58 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
62 static inline const char *pci_slot_name(const struct pci_slot *slot)
64 return kobject_name(&slot->kobj);
67 /* File state for mmap()s on /proc/bus/pci/X/Y */
73 /* This defines the direction arg to the DMA mapping routines. */
74 #define PCI_DMA_BIDIRECTIONAL 0
75 #define PCI_DMA_TODEVICE 1
76 #define PCI_DMA_FROMDEVICE 2
77 #define PCI_DMA_NONE 3
80 * For PCI devices, the region numbers are assigned this way:
83 /* #0-5: standard PCI resources */
85 PCI_STD_RESOURCE_END = 5,
87 /* #6: expansion ROM resource */
90 /* device specific resources */
93 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
96 /* resources assigned to buses behind the bridge */
97 #define PCI_BRIDGE_RESOURCE_NUM 4
100 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
101 PCI_BRIDGE_RESOURCE_NUM - 1,
103 /* total resources associated with a PCI device */
106 /* preserve this for compatibility */
107 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
110 typedef int __bitwise pci_power_t;
112 #define PCI_D0 ((pci_power_t __force) 0)
113 #define PCI_D1 ((pci_power_t __force) 1)
114 #define PCI_D2 ((pci_power_t __force) 2)
115 #define PCI_D3hot ((pci_power_t __force) 3)
116 #define PCI_D3cold ((pci_power_t __force) 4)
117 #define PCI_UNKNOWN ((pci_power_t __force) 5)
118 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
120 /* Remember to update this when the list above changes! */
121 extern const char *pci_power_names[];
123 static inline const char *pci_power_name(pci_power_t state)
125 return pci_power_names[1 + (int) state];
128 #define PCI_PM_D2_DELAY 200
129 #define PCI_PM_D3_WAIT 10
130 #define PCI_PM_D3COLD_WAIT 100
131 #define PCI_PM_BUS_WAIT 50
133 /** The pci_channel state describes connectivity between the CPU and
134 * the pci device. If some PCI bus between here and the pci device
135 * has crashed or locked up, this info is reflected here.
137 typedef unsigned int __bitwise pci_channel_state_t;
139 enum pci_channel_state {
140 /* I/O channel is in normal state */
141 pci_channel_io_normal = (__force pci_channel_state_t) 1,
143 /* I/O to channel is blocked */
144 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
146 /* PCI card is dead */
147 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
150 typedef unsigned int __bitwise pcie_reset_state_t;
152 enum pcie_reset_state {
153 /* Reset is NOT asserted (Use to deassert reset) */
154 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
156 /* Use #PERST to reset PCIe device */
157 pcie_warm_reset = (__force pcie_reset_state_t) 2,
159 /* Use PCIe Hot Reset to reset device */
160 pcie_hot_reset = (__force pcie_reset_state_t) 3
163 typedef unsigned short __bitwise pci_dev_flags_t;
165 /* INTX_DISABLE in PCI_COMMAND register disables MSI
168 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0),
169 /* Device configuration is irrevocably lost if disabled into D3 */
170 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1),
171 /* Provide indication device is assigned by a Virtual Machine Manager */
172 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2),
173 /* Flag for quirk use to store if quirk-specific ACS is enabled */
174 PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3),
175 /* Flag to indicate the device uses dma_alias_devfn */
176 PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4),
177 /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */
178 PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5),
179 /* Do not use bus resets for device */
180 PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6),
181 /* Do not use PM reset even if device advertises NoSoftRst- */
182 PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7),
183 /* Get VPD from function 0 VPD */
184 PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8),
187 enum pci_irq_reroute_variant {
188 INTEL_IRQ_REROUTE_VARIANT = 1,
189 MAX_IRQ_REROUTE_VARIANTS = 3
192 typedef unsigned short __bitwise pci_bus_flags_t;
194 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
195 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
198 /* These values come from the PCI Express Spec */
199 enum pcie_link_width {
200 PCIE_LNK_WIDTH_RESRV = 0x00,
208 PCIE_LNK_WIDTH_UNKNOWN = 0xFF,
211 /* Based on the PCI Hotplug Spec, but some values are made up by us */
213 PCI_SPEED_33MHz = 0x00,
214 PCI_SPEED_66MHz = 0x01,
215 PCI_SPEED_66MHz_PCIX = 0x02,
216 PCI_SPEED_100MHz_PCIX = 0x03,
217 PCI_SPEED_133MHz_PCIX = 0x04,
218 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
219 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
220 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
221 PCI_SPEED_66MHz_PCIX_266 = 0x09,
222 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
223 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
229 PCI_SPEED_66MHz_PCIX_533 = 0x11,
230 PCI_SPEED_100MHz_PCIX_533 = 0x12,
231 PCI_SPEED_133MHz_PCIX_533 = 0x13,
232 PCIE_SPEED_2_5GT = 0x14,
233 PCIE_SPEED_5_0GT = 0x15,
234 PCIE_SPEED_8_0GT = 0x16,
235 PCI_SPEED_UNKNOWN = 0xff,
238 struct pci_cap_saved_data {
245 struct pci_cap_saved_state {
246 struct hlist_node next;
247 struct pci_cap_saved_data cap;
250 struct pcie_link_state;
256 * The pci_dev structure is used to describe PCI devices.
259 struct list_head bus_list; /* node in per-bus list */
260 struct pci_bus *bus; /* bus this device is on */
261 struct pci_bus *subordinate; /* bus this device bridges to */
263 void *sysdata; /* hook for sys-specific extension */
264 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
265 struct pci_slot *slot; /* Physical slot this device is in */
267 unsigned int devfn; /* encoded device & function index */
268 unsigned short vendor;
269 unsigned short device;
270 unsigned short subsystem_vendor;
271 unsigned short subsystem_device;
272 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
273 u8 revision; /* PCI revision, low byte of class word */
274 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
275 u8 pcie_cap; /* PCIe capability offset */
276 u8 msi_cap; /* MSI capability offset */
277 u8 msix_cap; /* MSI-X capability offset */
278 u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */
279 u8 rom_base_reg; /* which config register controls the ROM */
280 u8 pin; /* which interrupt pin this device uses */
281 u16 pcie_flags_reg; /* cached PCIe Capabilities Register */
282 u8 dma_alias_devfn;/* devfn of DMA alias, if any */
284 struct pci_driver *driver; /* which driver has allocated this device */
285 u64 dma_mask; /* Mask of the bits of bus address this
286 device implements. Normally this is
287 0xffffffff. You only need to change
288 this if your device has broken DMA
289 or supports 64-bit transfers. */
291 struct device_dma_parameters dma_parms;
293 pci_power_t current_state; /* Current operating state. In ACPI-speak,
294 this is D0-D3, D0 being fully functional,
296 u8 pm_cap; /* PM capability offset */
297 unsigned int pme_support:5; /* Bitmask of states from which PME#
299 unsigned int pme_interrupt:1;
300 unsigned int pme_poll:1; /* Poll device's PME status bit */
301 unsigned int d1_support:1; /* Low power state D1 is supported */
302 unsigned int d2_support:1; /* Low power state D2 is supported */
303 unsigned int no_d1d2:1; /* D1 and D2 are forbidden */
304 unsigned int no_d3cold:1; /* D3cold is forbidden */
305 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */
306 unsigned int mmio_always_on:1; /* disallow turning off io/mem
307 decoding during bar sizing */
308 unsigned int wakeup_prepared:1;
309 unsigned int runtime_d3cold:1; /* whether go through runtime
310 D3cold, not set for devices
311 powered on/off by the
312 corresponding bridge */
313 unsigned int ignore_hotplug:1; /* Ignore hotplug events */
314 unsigned int d3_delay; /* D3->D0 transition time in ms */
315 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
317 #ifdef CONFIG_PCIEASPM
318 struct pcie_link_state *link_state; /* ASPM link state */
321 pci_channel_state_t error_state; /* current connectivity state */
322 struct device dev; /* Generic device interface */
324 int cfg_size; /* Size of configuration space */
327 * Instead of touching interrupt line and base address registers
328 * directly, use the values stored here. They might be different!
331 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
333 bool match_driver; /* Skip attaching driver */
334 /* These fields are used by common fixups */
335 unsigned int transparent:1; /* Subtractive decode PCI bridge */
336 unsigned int multifunction:1;/* Part of multi-function device */
337 /* keep track of device state */
338 unsigned int is_added:1;
339 unsigned int is_busmaster:1; /* device is busmaster */
340 unsigned int no_msi:1; /* device may not use msi */
341 unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */
342 unsigned int block_cfg_access:1; /* config space access is blocked */
343 unsigned int broken_parity_status:1; /* Device generates false positive parity */
344 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
345 unsigned int msi_enabled:1;
346 unsigned int msix_enabled:1;
347 unsigned int ari_enabled:1; /* ARI forwarding */
348 unsigned int is_managed:1;
349 unsigned int needs_freset:1; /* Dev requires fundamental reset */
350 unsigned int state_saved:1;
351 unsigned int is_physfn:1;
352 unsigned int is_virtfn:1;
353 unsigned int reset_fn:1;
354 unsigned int is_hotplug_bridge:1;
355 unsigned int __aer_firmware_first_valid:1;
356 unsigned int __aer_firmware_first:1;
357 unsigned int broken_intx_masking:1;
358 unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
359 unsigned int irq_managed:1;
360 pci_dev_flags_t dev_flags;
361 atomic_t enable_cnt; /* pci_enable_device has been called */
363 u32 saved_config_space[16]; /* config space saved at suspend time */
364 struct hlist_head saved_cap_space;
365 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
366 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
367 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
368 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
369 #ifdef CONFIG_PCI_MSI
370 struct list_head msi_list;
371 const struct attribute_group **msi_irq_groups;
374 #ifdef CONFIG_PCI_ATS
376 struct pci_sriov *sriov; /* SR-IOV capability related */
377 struct pci_dev *physfn; /* the PF this VF is associated with */
379 struct pci_ats *ats; /* Address Translation Service */
381 phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
382 size_t romlen; /* Length of ROM if it's not from the BAR */
383 char *driver_override; /* Driver name to force a match */
386 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
388 #ifdef CONFIG_PCI_IOV
395 struct pci_dev *pci_alloc_dev(struct pci_bus *bus);
397 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
398 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
400 static inline int pci_channel_offline(struct pci_dev *pdev)
402 return (pdev->error_state != pci_channel_io_normal);
405 struct pci_host_bridge {
407 struct pci_bus *bus; /* root bus */
408 struct list_head windows; /* resource_entry */
409 void (*release_fn)(struct pci_host_bridge *);
411 unsigned int ignore_reset_delay:1; /* for entire hierarchy */
414 #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
415 void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
416 void (*release_fn)(struct pci_host_bridge *),
419 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
422 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
423 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
424 * buses below host bridges or subtractive decode bridges) go in the list.
425 * Use pci_bus_for_each_resource() to iterate through all the resources.
429 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
430 * and there's no way to program the bridge with the details of the window.
431 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
432 * decode bit set, because they are explicit and can be programmed with _SRS.
434 #define PCI_SUBTRACTIVE_DECODE 0x1
436 struct pci_bus_resource {
437 struct list_head list;
438 struct resource *res;
442 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
445 struct list_head node; /* node in list of buses */
446 struct pci_bus *parent; /* parent bus this bridge is on */
447 struct list_head children; /* list of child buses */
448 struct list_head devices; /* list of devices on this bus */
449 struct pci_dev *self; /* bridge device as seen by parent */
450 struct list_head slots; /* list of slots on this bus */
451 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
452 struct list_head resources; /* address space routed to this bus */
453 struct resource busn_res; /* bus numbers routed to this bus */
455 struct pci_ops *ops; /* configuration access functions */
456 struct msi_controller *msi; /* MSI controller */
457 void *sysdata; /* hook for sys-specific extension */
458 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
460 unsigned char number; /* bus number */
461 unsigned char primary; /* number of primary bridge */
462 unsigned char max_bus_speed; /* enum pci_bus_speed */
463 unsigned char cur_bus_speed; /* enum pci_bus_speed */
464 #ifdef CONFIG_PCI_DOMAINS_GENERIC
470 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
471 pci_bus_flags_t bus_flags; /* inherited by child buses */
472 struct device *bridge;
474 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
475 struct bin_attribute *legacy_mem; /* legacy mem */
476 unsigned int is_added:1;
479 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
482 * Returns true if the PCI bus is root (behind host-PCI bridge),
485 * Some code assumes that "bus->self == NULL" means that bus is a root bus.
486 * This is incorrect because "virtual" buses added for SR-IOV (via
487 * virtfn_add_bus()) have "bus->self == NULL" but are not root buses.
489 static inline bool pci_is_root_bus(struct pci_bus *pbus)
491 return !(pbus->parent);
495 * pci_is_bridge - check if the PCI device is a bridge
498 * Return true if the PCI device is bridge whether it has subordinate
501 static inline bool pci_is_bridge(struct pci_dev *dev)
503 return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
504 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS;
507 static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
509 dev = pci_physfn(dev);
510 if (pci_is_root_bus(dev->bus))
513 return dev->bus->self;
516 struct device *pci_get_host_bridge_device(struct pci_dev *dev);
517 void pci_put_host_bridge_device(struct device *dev);
519 #ifdef CONFIG_PCI_MSI
520 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
522 return pci_dev->msi_enabled || pci_dev->msix_enabled;
525 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
529 * Error values that may be returned by PCI functions.
531 #define PCIBIOS_SUCCESSFUL 0x00
532 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
533 #define PCIBIOS_BAD_VENDOR_ID 0x83
534 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
535 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
536 #define PCIBIOS_SET_FAILED 0x88
537 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
540 * Translate above to generic errno for passing back through non-PCI code.
542 static inline int pcibios_err_to_errno(int err)
544 if (err <= PCIBIOS_SUCCESSFUL)
545 return err; /* Assume already errno */
548 case PCIBIOS_FUNC_NOT_SUPPORTED:
550 case PCIBIOS_BAD_VENDOR_ID:
552 case PCIBIOS_DEVICE_NOT_FOUND:
554 case PCIBIOS_BAD_REGISTER_NUMBER:
556 case PCIBIOS_SET_FAILED:
558 case PCIBIOS_BUFFER_TOO_SMALL:
565 /* Low-level architecture-dependent routines */
568 void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where);
569 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
570 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
574 * ACPI needs to be able to access PCI config space before we've done a
575 * PCI bus scan and created pci_bus structures.
577 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
578 int reg, int len, u32 *val);
579 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
580 int reg, int len, u32 val);
582 #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT
583 typedef u64 pci_bus_addr_t;
585 typedef u32 pci_bus_addr_t;
588 struct pci_bus_region {
589 pci_bus_addr_t start;
594 spinlock_t lock; /* protects list, index */
595 struct list_head list; /* for IDs added at runtime */
600 * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
601 * a set of callbacks in struct pci_error_handlers, that device driver
602 * will be notified of PCI bus errors, and will be driven to recovery
603 * when an error occurs.
606 typedef unsigned int __bitwise pci_ers_result_t;
608 enum pci_ers_result {
609 /* no result/none/not supported in device driver */
610 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
612 /* Device driver can recover without slot reset */
613 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
615 /* Device driver wants slot to be reset. */
616 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
618 /* Device has completely failed, is unrecoverable */
619 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
621 /* Device driver is fully recovered and operational */
622 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
624 /* No AER capabilities registered for the driver */
625 PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6,
628 /* PCI bus error event callbacks */
629 struct pci_error_handlers {
630 /* PCI bus error detected on this device */
631 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
632 enum pci_channel_state error);
634 /* MMIO has been re-enabled, but not DMA */
635 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
637 /* PCI Express link has been reset */
638 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
640 /* PCI slot has been reset */
641 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
643 /* PCI function reset prepare or completed */
644 void (*reset_notify)(struct pci_dev *dev, bool prepare);
646 /* Device driver may resume normal operations */
647 void (*resume)(struct pci_dev *dev);
653 struct list_head node;
655 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
656 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
657 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
658 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
659 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
660 int (*resume_early) (struct pci_dev *dev);
661 int (*resume) (struct pci_dev *dev); /* Device woken up */
662 void (*shutdown) (struct pci_dev *dev);
663 int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */
664 const struct pci_error_handlers *err_handler;
665 struct device_driver driver;
666 struct pci_dynids dynids;
669 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
672 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
673 * @_table: device table name
675 * This macro is deprecated and should not be used in new code.
677 #define DEFINE_PCI_DEVICE_TABLE(_table) \
678 const struct pci_device_id _table[]
681 * PCI_DEVICE - macro used to describe a specific pci device
682 * @vend: the 16 bit PCI Vendor ID
683 * @dev: the 16 bit PCI Device ID
685 * This macro is used to create a struct pci_device_id that matches a
686 * specific device. The subvendor and subdevice fields will be set to
689 #define PCI_DEVICE(vend,dev) \
690 .vendor = (vend), .device = (dev), \
691 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
694 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
695 * @vend: the 16 bit PCI Vendor ID
696 * @dev: the 16 bit PCI Device ID
697 * @subvend: the 16 bit PCI Subvendor ID
698 * @subdev: the 16 bit PCI Subdevice ID
700 * This macro is used to create a struct pci_device_id that matches a
701 * specific device with subsystem information.
703 #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \
704 .vendor = (vend), .device = (dev), \
705 .subvendor = (subvend), .subdevice = (subdev)
708 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
709 * @dev_class: the class, subclass, prog-if triple for this device
710 * @dev_class_mask: the class mask for this device
712 * This macro is used to create a struct pci_device_id that matches a
713 * specific PCI class. The vendor, device, subvendor, and subdevice
714 * fields will be set to PCI_ANY_ID.
716 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
717 .class = (dev_class), .class_mask = (dev_class_mask), \
718 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
719 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
722 * PCI_VDEVICE - macro used to describe a specific pci device in short form
723 * @vend: the vendor name
724 * @dev: the 16 bit PCI Device ID
726 * This macro is used to create a struct pci_device_id that matches a
727 * specific PCI device. The subvendor, and subdevice fields will be set
728 * to PCI_ANY_ID. The macro allows the next field to follow as the device
732 #define PCI_VDEVICE(vend, dev) \
733 .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \
734 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0
736 /* these external functions are only available when PCI support is enabled */
739 void pcie_bus_configure_settings(struct pci_bus *bus);
741 enum pcie_bus_config_types {
744 PCIE_BUS_PERFORMANCE,
748 extern enum pcie_bus_config_types pcie_bus_config;
750 extern struct bus_type pci_bus_type;
752 /* Do NOT directly access these two variables, unless you are arch-specific PCI
753 * code, or PCI core code. */
754 extern struct list_head pci_root_buses; /* list of all known PCI buses */
755 /* Some device drivers need know if PCI is initiated */
756 int no_pci_devices(void);
758 void pcibios_resource_survey_bus(struct pci_bus *bus);
759 void pcibios_add_bus(struct pci_bus *bus);
760 void pcibios_remove_bus(struct pci_bus *bus);
761 void pcibios_fixup_bus(struct pci_bus *);
762 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
763 /* Architecture-specific versions may override this (weak) */
764 char *pcibios_setup(char *str);
766 /* Used only when drivers/pci/setup.c is used */
767 resource_size_t pcibios_align_resource(void *, const struct resource *,
770 void pcibios_update_irq(struct pci_dev *, int irq);
772 /* Weak but can be overriden by arch */
773 void pci_fixup_cardbus(struct pci_bus *);
775 /* Generic PCI functions used internally */
777 void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
778 struct resource *res);
779 void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
780 struct pci_bus_region *region);
781 void pcibios_scan_specific_bus(int busn);
782 struct pci_bus *pci_find_bus(int domain, int busnr);
783 void pci_bus_add_devices(const struct pci_bus *bus);
784 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
785 struct pci_ops *ops, void *sysdata);
786 struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
787 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
788 struct pci_ops *ops, void *sysdata,
789 struct list_head *resources);
790 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
791 int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
792 void pci_bus_release_busn_res(struct pci_bus *b);
793 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
794 struct pci_ops *ops, void *sysdata,
795 struct list_head *resources);
796 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
798 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
799 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
801 struct hotplug_slot *hotplug);
802 void pci_destroy_slot(struct pci_slot *slot);
803 int pci_scan_slot(struct pci_bus *bus, int devfn);
804 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
805 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
806 unsigned int pci_scan_child_bus(struct pci_bus *bus);
807 void pci_bus_add_device(struct pci_dev *dev);
808 void pci_read_bridge_bases(struct pci_bus *child);
809 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
810 struct resource *res);
811 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin);
812 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
813 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
814 struct pci_dev *pci_dev_get(struct pci_dev *dev);
815 void pci_dev_put(struct pci_dev *dev);
816 void pci_remove_bus(struct pci_bus *b);
817 void pci_stop_and_remove_bus_device(struct pci_dev *dev);
818 void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev);
819 void pci_stop_root_bus(struct pci_bus *bus);
820 void pci_remove_root_bus(struct pci_bus *bus);
821 void pci_setup_cardbus(struct pci_bus *bus);
822 void pci_sort_breadthfirst(void);
823 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
824 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
825 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
827 /* Generic PCI functions exported to card drivers */
829 enum pci_lost_interrupt_reason {
830 PCI_LOST_IRQ_NO_INFORMATION = 0,
831 PCI_LOST_IRQ_DISABLE_MSI,
832 PCI_LOST_IRQ_DISABLE_MSIX,
833 PCI_LOST_IRQ_DISABLE_ACPI,
835 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
836 int pci_find_capability(struct pci_dev *dev, int cap);
837 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
838 int pci_find_ext_capability(struct pci_dev *dev, int cap);
839 int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap);
840 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
841 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
842 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
844 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
845 struct pci_dev *from);
846 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
847 unsigned int ss_vendor, unsigned int ss_device,
848 struct pci_dev *from);
849 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
850 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
852 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
855 return pci_get_domain_bus_and_slot(0, bus, devfn);
857 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
858 int pci_dev_present(const struct pci_device_id *ids);
860 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
862 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
863 int where, u16 *val);
864 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
865 int where, u32 *val);
866 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
868 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
870 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
873 int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
874 int where, int size, u32 *val);
875 int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn,
876 int where, int size, u32 val);
877 int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn,
878 int where, int size, u32 *val);
879 int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn,
880 int where, int size, u32 val);
882 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
884 static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
886 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
888 static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
890 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
892 static inline int pci_read_config_dword(const struct pci_dev *dev, int where,
895 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
897 static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val)
899 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
901 static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val)
903 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
905 static inline int pci_write_config_dword(const struct pci_dev *dev, int where,
908 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
911 int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
912 int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
913 int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
914 int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
915 int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
917 int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
920 static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
923 return pcie_capability_clear_and_set_word(dev, pos, 0, set);
926 static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
929 return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
932 static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
935 return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
938 static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
941 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
944 /* user-space driven config access */
945 int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
946 int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
947 int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
948 int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
949 int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
950 int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
952 int __must_check pci_enable_device(struct pci_dev *dev);
953 int __must_check pci_enable_device_io(struct pci_dev *dev);
954 int __must_check pci_enable_device_mem(struct pci_dev *dev);
955 int __must_check pci_reenable_device(struct pci_dev *);
956 int __must_check pcim_enable_device(struct pci_dev *pdev);
957 void pcim_pin_device(struct pci_dev *pdev);
959 static inline int pci_is_enabled(struct pci_dev *pdev)
961 return (atomic_read(&pdev->enable_cnt) > 0);
964 static inline int pci_is_managed(struct pci_dev *pdev)
966 return pdev->is_managed;
969 void pci_disable_device(struct pci_dev *dev);
971 extern unsigned int pcibios_max_latency;
972 void pci_set_master(struct pci_dev *dev);
973 void pci_clear_master(struct pci_dev *dev);
975 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
976 int pci_set_cacheline_size(struct pci_dev *dev);
977 #define HAVE_PCI_SET_MWI
978 int __must_check pci_set_mwi(struct pci_dev *dev);
979 int pci_try_set_mwi(struct pci_dev *dev);
980 void pci_clear_mwi(struct pci_dev *dev);
981 void pci_intx(struct pci_dev *dev, int enable);
982 bool pci_intx_mask_supported(struct pci_dev *dev);
983 bool pci_check_and_mask_intx(struct pci_dev *dev);
984 bool pci_check_and_unmask_intx(struct pci_dev *dev);
985 void pci_msi_off(struct pci_dev *dev);
986 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
987 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
988 int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask);
989 int pci_wait_for_pending_transaction(struct pci_dev *dev);
990 int pcix_get_max_mmrbc(struct pci_dev *dev);
991 int pcix_get_mmrbc(struct pci_dev *dev);
992 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
993 int pcie_get_readrq(struct pci_dev *dev);
994 int pcie_set_readrq(struct pci_dev *dev, int rq);
995 int pcie_get_mps(struct pci_dev *dev);
996 int pcie_set_mps(struct pci_dev *dev, int mps);
997 int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
998 enum pcie_link_width *width);
999 int __pci_reset_function(struct pci_dev *dev);
1000 int __pci_reset_function_locked(struct pci_dev *dev);
1001 int pci_reset_function(struct pci_dev *dev);
1002 int pci_try_reset_function(struct pci_dev *dev);
1003 int pci_probe_reset_slot(struct pci_slot *slot);
1004 int pci_reset_slot(struct pci_slot *slot);
1005 int pci_try_reset_slot(struct pci_slot *slot);
1006 int pci_probe_reset_bus(struct pci_bus *bus);
1007 int pci_reset_bus(struct pci_bus *bus);
1008 int pci_try_reset_bus(struct pci_bus *bus);
1009 void pci_reset_secondary_bus(struct pci_dev *dev);
1010 void pcibios_reset_secondary_bus(struct pci_dev *dev);
1011 void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
1012 void pci_update_resource(struct pci_dev *dev, int resno);
1013 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
1014 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
1015 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
1016 bool pci_device_is_present(struct pci_dev *pdev);
1017 void pci_ignore_hotplug(struct pci_dev *dev);
1019 /* ROM control related routines */
1020 int pci_enable_rom(struct pci_dev *pdev);
1021 void pci_disable_rom(struct pci_dev *pdev);
1022 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
1023 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
1024 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
1025 void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
1027 /* Power management related routines */
1028 int pci_save_state(struct pci_dev *dev);
1029 void pci_restore_state(struct pci_dev *dev);
1030 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
1031 int pci_load_saved_state(struct pci_dev *dev,
1032 struct pci_saved_state *state);
1033 int pci_load_and_free_saved_state(struct pci_dev *dev,
1034 struct pci_saved_state **state);
1035 struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap);
1036 struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev,
1038 int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size);
1039 int pci_add_ext_cap_save_buffer(struct pci_dev *dev,
1040 u16 cap, unsigned int size);
1041 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
1042 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
1043 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
1044 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
1045 void pci_pme_active(struct pci_dev *dev, bool enable);
1046 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1047 bool runtime, bool enable);
1048 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
1049 int pci_prepare_to_sleep(struct pci_dev *dev);
1050 int pci_back_from_sleep(struct pci_dev *dev);
1051 bool pci_dev_run_wake(struct pci_dev *dev);
1052 bool pci_check_pme_status(struct pci_dev *dev);
1053 void pci_pme_wakeup_bus(struct pci_bus *bus);
1055 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1058 return __pci_enable_wake(dev, state, false, enable);
1061 /* PCI Virtual Channel */
1062 int pci_save_vc_state(struct pci_dev *dev);
1063 void pci_restore_vc_state(struct pci_dev *dev);
1064 void pci_allocate_vc_save_buffers(struct pci_dev *dev);
1066 /* For use by arch with custom probe code */
1067 void set_pcie_port_type(struct pci_dev *pdev);
1068 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
1070 /* Functions for PCI Hotplug drivers to use */
1071 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
1072 unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
1073 unsigned int pci_rescan_bus(struct pci_bus *bus);
1074 void pci_lock_rescan_remove(void);
1075 void pci_unlock_rescan_remove(void);
1077 /* Vital product data routines */
1078 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
1079 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
1081 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
1082 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx);
1083 void pci_bus_assign_resources(const struct pci_bus *bus);
1084 void pci_bus_size_bridges(struct pci_bus *bus);
1085 int pci_claim_resource(struct pci_dev *, int);
1086 int pci_claim_bridge_resource(struct pci_dev *bridge, int i);
1087 void pci_assign_unassigned_resources(void);
1088 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
1089 void pci_assign_unassigned_bus_resources(struct pci_bus *bus);
1090 void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus);
1091 void pdev_enable_device(struct pci_dev *);
1092 int pci_enable_resources(struct pci_dev *, int mask);
1093 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
1094 int (*)(const struct pci_dev *, u8, u8));
1095 #define HAVE_PCI_REQ_REGIONS 2
1096 int __must_check pci_request_regions(struct pci_dev *, const char *);
1097 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
1098 void pci_release_regions(struct pci_dev *);
1099 int __must_check pci_request_region(struct pci_dev *, int, const char *);
1100 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
1101 void pci_release_region(struct pci_dev *, int);
1102 int pci_request_selected_regions(struct pci_dev *, int, const char *);
1103 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
1104 void pci_release_selected_regions(struct pci_dev *, int);
1106 /* drivers/pci/bus.c */
1107 struct pci_bus *pci_bus_get(struct pci_bus *bus);
1108 void pci_bus_put(struct pci_bus *bus);
1109 void pci_add_resource(struct list_head *resources, struct resource *res);
1110 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
1111 resource_size_t offset);
1112 void pci_free_resource_list(struct list_head *resources);
1113 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
1114 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
1115 void pci_bus_remove_resources(struct pci_bus *bus);
1117 #define pci_bus_for_each_resource(bus, res, i) \
1119 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
1122 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
1123 struct resource *res, resource_size_t size,
1124 resource_size_t align, resource_size_t min,
1125 unsigned long type_mask,
1126 resource_size_t (*alignf)(void *,
1127 const struct resource *,
1133 int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
1135 static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar)
1137 struct pci_bus_region region;
1139 pcibios_resource_to_bus(pdev->bus, ®ion, &pdev->resource[bar]);
1140 return region.start;
1143 /* Proper probing supporting hot-pluggable devices */
1144 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
1145 const char *mod_name);
1148 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
1150 #define pci_register_driver(driver) \
1151 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
1153 void pci_unregister_driver(struct pci_driver *dev);
1156 * module_pci_driver() - Helper macro for registering a PCI driver
1157 * @__pci_driver: pci_driver struct
1159 * Helper macro for PCI drivers which do not do anything special in module
1160 * init/exit. This eliminates a lot of boilerplate. Each module may only
1161 * use this macro once, and calling it replaces module_init() and module_exit()
1163 #define module_pci_driver(__pci_driver) \
1164 module_driver(__pci_driver, pci_register_driver, \
1165 pci_unregister_driver)
1167 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
1168 int pci_add_dynid(struct pci_driver *drv,
1169 unsigned int vendor, unsigned int device,
1170 unsigned int subvendor, unsigned int subdevice,
1171 unsigned int class, unsigned int class_mask,
1172 unsigned long driver_data);
1173 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
1174 struct pci_dev *dev);
1175 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
1178 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
1180 int pci_cfg_space_size(struct pci_dev *dev);
1181 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
1182 void pci_setup_bridge(struct pci_bus *bus);
1183 resource_size_t pcibios_window_alignment(struct pci_bus *bus,
1184 unsigned long type);
1185 resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
1187 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
1188 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
1190 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1191 unsigned int command_bits, u32 flags);
1192 /* kmem_cache style wrapper around pci_alloc_consistent() */
1194 #include <linux/pci-dma.h>
1195 #include <linux/dmapool.h>
1197 #define pci_pool dma_pool
1198 #define pci_pool_create(name, pdev, size, align, allocation) \
1199 dma_pool_create(name, &pdev->dev, size, align, allocation)
1200 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
1201 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
1202 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
1204 enum pci_dma_burst_strategy {
1205 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
1206 strategy_parameter is N/A */
1207 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
1209 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
1210 strategy_parameter byte boundaries */
1214 u32 vector; /* kernel uses to write allocated vector */
1215 u16 entry; /* driver uses to specify entry, OS writes */
1219 #ifdef CONFIG_PCI_MSI
1220 int pci_msi_vec_count(struct pci_dev *dev);
1221 void pci_msi_shutdown(struct pci_dev *dev);
1222 void pci_disable_msi(struct pci_dev *dev);
1223 int pci_msix_vec_count(struct pci_dev *dev);
1224 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec);
1225 void pci_msix_shutdown(struct pci_dev *dev);
1226 void pci_disable_msix(struct pci_dev *dev);
1227 void pci_restore_msi_state(struct pci_dev *dev);
1228 int pci_msi_enabled(void);
1229 int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec);
1230 static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
1232 int rc = pci_enable_msi_range(dev, nvec, nvec);
1237 int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
1238 int minvec, int maxvec);
1239 static inline int pci_enable_msix_exact(struct pci_dev *dev,
1240 struct msix_entry *entries, int nvec)
1242 int rc = pci_enable_msix_range(dev, entries, nvec, nvec);
1248 static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; }
1249 static inline void pci_msi_shutdown(struct pci_dev *dev) { }
1250 static inline void pci_disable_msi(struct pci_dev *dev) { }
1251 static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; }
1252 static inline int pci_enable_msix(struct pci_dev *dev,
1253 struct msix_entry *entries, int nvec)
1255 static inline void pci_msix_shutdown(struct pci_dev *dev) { }
1256 static inline void pci_disable_msix(struct pci_dev *dev) { }
1257 static inline void pci_restore_msi_state(struct pci_dev *dev) { }
1258 static inline int pci_msi_enabled(void) { return 0; }
1259 static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec,
1262 static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
1264 static inline int pci_enable_msix_range(struct pci_dev *dev,
1265 struct msix_entry *entries, int minvec, int maxvec)
1267 static inline int pci_enable_msix_exact(struct pci_dev *dev,
1268 struct msix_entry *entries, int nvec)
1272 #ifdef CONFIG_PCIEPORTBUS
1273 extern bool pcie_ports_disabled;
1274 extern bool pcie_ports_auto;
1276 #define pcie_ports_disabled true
1277 #define pcie_ports_auto false
1280 #ifdef CONFIG_PCIEASPM
1281 bool pcie_aspm_support_enabled(void);
1283 static inline bool pcie_aspm_support_enabled(void) { return false; }
1286 #ifdef CONFIG_PCIEAER
1287 void pci_no_aer(void);
1288 bool pci_aer_available(void);
1290 static inline void pci_no_aer(void) { }
1291 static inline bool pci_aer_available(void) { return false; }
1294 #ifdef CONFIG_PCIE_ECRC
1295 void pcie_set_ecrc_checking(struct pci_dev *dev);
1296 void pcie_ecrc_get_policy(char *str);
1298 static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
1299 static inline void pcie_ecrc_get_policy(char *str) { }
1302 #define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1)
1304 #ifdef CONFIG_HT_IRQ
1305 /* The functions a driver should call */
1306 int ht_create_irq(struct pci_dev *dev, int idx);
1307 void ht_destroy_irq(unsigned int irq);
1308 #endif /* CONFIG_HT_IRQ */
1310 void pci_cfg_access_lock(struct pci_dev *dev);
1311 bool pci_cfg_access_trylock(struct pci_dev *dev);
1312 void pci_cfg_access_unlock(struct pci_dev *dev);
1315 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1316 * a PCI domain is defined to be a set of PCI buses which share
1317 * configuration space.
1319 #ifdef CONFIG_PCI_DOMAINS
1320 extern int pci_domains_supported;
1321 int pci_get_new_domain_nr(void);
1323 enum { pci_domains_supported = 0 };
1324 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
1325 static inline int pci_proc_domain(struct pci_bus *bus) { return 0; }
1326 static inline int pci_get_new_domain_nr(void) { return -ENOSYS; }
1327 #endif /* CONFIG_PCI_DOMAINS */
1330 * Generic implementation for PCI domain support. If your
1331 * architecture does not need custom management of PCI
1332 * domains then this implementation will be used
1334 #ifdef CONFIG_PCI_DOMAINS_GENERIC
1335 static inline int pci_domain_nr(struct pci_bus *bus)
1337 return bus->domain_nr;
1339 void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent);
1341 static inline void pci_bus_assign_domain_nr(struct pci_bus *bus,
1342 struct device *parent)
1347 /* some architectures require additional setup to direct VGA traffic */
1348 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1349 unsigned int command_bits, u32 flags);
1350 void pci_register_set_vga_state(arch_set_vga_state_t func);
1352 #else /* CONFIG_PCI is not enabled */
1355 * If the system does not have PCI, clearly these return errors. Define
1356 * these as simple inline functions to avoid hair in drivers.
1359 #define _PCI_NOP(o, s, t) \
1360 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1362 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1364 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1365 _PCI_NOP(o, word, u16 x) \
1366 _PCI_NOP(o, dword, u32 x)
1367 _PCI_NOP_ALL(read, *)
1368 _PCI_NOP_ALL(write,)
1370 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1371 unsigned int device,
1372 struct pci_dev *from)
1375 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1376 unsigned int device,
1377 unsigned int ss_vendor,
1378 unsigned int ss_device,
1379 struct pci_dev *from)
1382 static inline struct pci_dev *pci_get_class(unsigned int class,
1383 struct pci_dev *from)
1386 #define pci_dev_present(ids) (0)
1387 #define no_pci_devices() (1)
1388 #define pci_dev_put(dev) do { } while (0)
1390 static inline void pci_set_master(struct pci_dev *dev) { }
1391 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
1392 static inline void pci_disable_device(struct pci_dev *dev) { }
1393 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1395 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1397 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1400 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1403 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1405 static inline int __pci_register_driver(struct pci_driver *drv,
1406 struct module *owner)
1408 static inline int pci_register_driver(struct pci_driver *drv)
1410 static inline void pci_unregister_driver(struct pci_driver *drv) { }
1411 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1413 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1416 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1419 /* Power management related routines */
1420 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
1421 static inline void pci_restore_state(struct pci_dev *dev) { }
1422 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1424 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1426 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1429 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1433 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1435 static inline void pci_release_regions(struct pci_dev *dev) { }
1437 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1439 static inline void pci_block_cfg_access(struct pci_dev *dev) { }
1440 static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
1442 static inline void pci_unblock_cfg_access(struct pci_dev *dev) { }
1444 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1446 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1449 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1453 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
1454 static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; }
1455 static inline int pci_get_new_domain_nr(void) { return -ENOSYS; }
1457 #define dev_is_pci(d) (false)
1458 #define dev_is_pf(d) (false)
1459 #define dev_num_vf(d) (0)
1460 #endif /* CONFIG_PCI */
1462 /* Include architecture-dependent settings and functions */
1464 #include <asm/pci.h>
1466 /* these helpers provide future and backwards compatibility
1467 * for accessing popular PCI BAR info */
1468 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1469 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1470 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1471 #define pci_resource_len(dev,bar) \
1472 ((pci_resource_start((dev), (bar)) == 0 && \
1473 pci_resource_end((dev), (bar)) == \
1474 pci_resource_start((dev), (bar))) ? 0 : \
1476 (pci_resource_end((dev), (bar)) - \
1477 pci_resource_start((dev), (bar)) + 1))
1479 /* Similar to the helpers above, these manipulate per-pci_dev
1480 * driver-specific data. They are really just a wrapper around
1481 * the generic device structure functions of these calls.
1483 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1485 return dev_get_drvdata(&pdev->dev);
1488 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1490 dev_set_drvdata(&pdev->dev, data);
1493 /* If you want to know what to call your pci_dev, ask this function.
1494 * Again, it's a wrapper around the generic device.
1496 static inline const char *pci_name(const struct pci_dev *pdev)
1498 return dev_name(&pdev->dev);
1502 /* Some archs don't want to expose struct resource to userland as-is
1503 * in sysfs and /proc
1505 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1506 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1507 const struct resource *rsrc, resource_size_t *start,
1508 resource_size_t *end)
1510 *start = rsrc->start;
1513 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1517 * The world is not perfect and supplies us with broken PCI devices.
1518 * For at least a part of these bugs we need a work-around, so both
1519 * generic (drivers/pci/quirks.c) and per-architecture code can define
1520 * fixup hooks to be called for particular buggy devices.
1524 u16 vendor; /* You can use PCI_ANY_ID here of course */
1525 u16 device; /* You can use PCI_ANY_ID here of course */
1526 u32 class; /* You can use PCI_ANY_ID here too */
1527 unsigned int class_shift; /* should be 0, 8, 16 */
1528 void (*hook)(struct pci_dev *dev);
1531 enum pci_fixup_pass {
1532 pci_fixup_early, /* Before probing BARs */
1533 pci_fixup_header, /* After reading configuration header */
1534 pci_fixup_final, /* Final phase of device fixups */
1535 pci_fixup_enable, /* pci_enable_device() time */
1536 pci_fixup_resume, /* pci_device_resume() */
1537 pci_fixup_suspend, /* pci_device_suspend() */
1538 pci_fixup_resume_early, /* pci_device_resume_early() */
1539 pci_fixup_suspend_late, /* pci_device_suspend_late() */
1542 /* Anonymous variables would be nice... */
1543 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \
1544 class_shift, hook) \
1545 static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \
1546 __attribute__((__section__(#section), aligned((sizeof(void *))))) \
1547 = { vendor, device, class, class_shift, hook };
1549 #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \
1550 class_shift, hook) \
1551 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1552 hook, vendor, device, class, class_shift, hook)
1553 #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \
1554 class_shift, hook) \
1555 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1556 hook, vendor, device, class, class_shift, hook)
1557 #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \
1558 class_shift, hook) \
1559 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1560 hook, vendor, device, class, class_shift, hook)
1561 #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \
1562 class_shift, hook) \
1563 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1564 hook, vendor, device, class, class_shift, hook)
1565 #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \
1566 class_shift, hook) \
1567 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1568 resume##hook, vendor, device, class, \
1570 #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \
1571 class_shift, hook) \
1572 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1573 resume_early##hook, vendor, device, \
1574 class, class_shift, hook)
1575 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \
1576 class_shift, hook) \
1577 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1578 suspend##hook, vendor, device, class, \
1580 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \
1581 class_shift, hook) \
1582 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \
1583 suspend_late##hook, vendor, device, \
1584 class, class_shift, hook)
1586 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1587 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1588 hook, vendor, device, PCI_ANY_ID, 0, hook)
1589 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1590 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1591 hook, vendor, device, PCI_ANY_ID, 0, hook)
1592 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1593 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1594 hook, vendor, device, PCI_ANY_ID, 0, hook)
1595 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1596 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1597 hook, vendor, device, PCI_ANY_ID, 0, hook)
1598 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1599 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1600 resume##hook, vendor, device, \
1601 PCI_ANY_ID, 0, hook)
1602 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1603 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1604 resume_early##hook, vendor, device, \
1605 PCI_ANY_ID, 0, hook)
1606 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1607 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1608 suspend##hook, vendor, device, \
1609 PCI_ANY_ID, 0, hook)
1610 #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \
1611 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \
1612 suspend_late##hook, vendor, device, \
1613 PCI_ANY_ID, 0, hook)
1615 #ifdef CONFIG_PCI_QUIRKS
1616 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1617 int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
1618 void pci_dev_specific_enable_acs(struct pci_dev *dev);
1620 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1621 struct pci_dev *dev) { }
1622 static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
1627 static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { }
1630 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1631 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1632 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1633 int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name);
1634 int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
1636 void pcim_iounmap_regions(struct pci_dev *pdev, int mask);
1638 extern int pci_pci_problems;
1639 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1640 #define PCIPCI_TRITON 2
1641 #define PCIPCI_NATOMA 4
1642 #define PCIPCI_VIAETBF 8
1643 #define PCIPCI_VSFX 16
1644 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1645 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1647 extern unsigned long pci_cardbus_io_size;
1648 extern unsigned long pci_cardbus_mem_size;
1649 extern u8 pci_dfl_cache_line_size;
1650 extern u8 pci_cache_line_size;
1652 extern unsigned long pci_hotplug_io_size;
1653 extern unsigned long pci_hotplug_mem_size;
1655 /* Architecture-specific versions may override these (weak) */
1656 void pcibios_disable_device(struct pci_dev *dev);
1657 void pcibios_set_master(struct pci_dev *dev);
1658 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1659 enum pcie_reset_state state);
1660 int pcibios_add_device(struct pci_dev *dev);
1661 void pcibios_release_device(struct pci_dev *dev);
1662 void pcibios_penalize_isa_irq(int irq, int active);
1664 #ifdef CONFIG_HIBERNATE_CALLBACKS
1665 extern struct dev_pm_ops pcibios_pm_ops;
1668 #ifdef CONFIG_PCI_MMCONFIG
1669 void __init pci_mmcfg_early_init(void);
1670 void __init pci_mmcfg_late_init(void);
1672 static inline void pci_mmcfg_early_init(void) { }
1673 static inline void pci_mmcfg_late_init(void) { }
1676 int pci_ext_cfg_avail(void);
1678 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1680 #ifdef CONFIG_PCI_IOV
1681 int pci_iov_virtfn_bus(struct pci_dev *dev, int id);
1682 int pci_iov_virtfn_devfn(struct pci_dev *dev, int id);
1684 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1685 void pci_disable_sriov(struct pci_dev *dev);
1686 int pci_num_vf(struct pci_dev *dev);
1687 int pci_vfs_assigned(struct pci_dev *dev);
1688 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
1689 int pci_sriov_get_totalvfs(struct pci_dev *dev);
1690 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno);
1692 static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id)
1696 static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id)
1700 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1702 static inline void pci_disable_sriov(struct pci_dev *dev) { }
1703 static inline int pci_num_vf(struct pci_dev *dev) { return 0; }
1704 static inline int pci_vfs_assigned(struct pci_dev *dev)
1706 static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
1708 static inline int pci_sriov_get_totalvfs(struct pci_dev *dev)
1710 static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
1714 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1715 void pci_hp_create_module_link(struct pci_slot *pci_slot);
1716 void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1720 * pci_pcie_cap - get the saved PCIe capability offset
1723 * PCIe capability offset is calculated at PCI device initialization
1724 * time and saved in the data structure. This function returns saved
1725 * PCIe capability offset. Using this instead of pci_find_capability()
1726 * reduces unnecessary search in the PCI configuration space. If you
1727 * need to calculate PCIe capability offset from raw device for some
1728 * reasons, please use pci_find_capability() instead.
1730 static inline int pci_pcie_cap(struct pci_dev *dev)
1732 return dev->pcie_cap;
1736 * pci_is_pcie - check if the PCI device is PCI Express capable
1739 * Returns: true if the PCI device is PCI Express capable, false otherwise.
1741 static inline bool pci_is_pcie(struct pci_dev *dev)
1743 return pci_pcie_cap(dev);
1747 * pcie_caps_reg - get the PCIe Capabilities Register
1750 static inline u16 pcie_caps_reg(const struct pci_dev *dev)
1752 return dev->pcie_flags_reg;
1756 * pci_pcie_type - get the PCIe device/port type
1759 static inline int pci_pcie_type(const struct pci_dev *dev)
1761 return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
1764 void pci_request_acs(void);
1765 bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
1766 bool pci_acs_path_enabled(struct pci_dev *start,
1767 struct pci_dev *end, u16 acs_flags);
1769 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1770 #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT)
1772 /* Large Resource Data Type Tag Item Names */
1773 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1774 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1775 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1777 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1778 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1779 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1781 /* Small Resource Data Type Tag Item Names */
1782 #define PCI_VPD_STIN_END 0x78 /* End */
1784 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1786 #define PCI_VPD_SRDT_TIN_MASK 0x78
1787 #define PCI_VPD_SRDT_LEN_MASK 0x07
1789 #define PCI_VPD_LRDT_TAG_SIZE 3
1790 #define PCI_VPD_SRDT_TAG_SIZE 1
1792 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1794 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1795 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1796 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1797 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
1800 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1801 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1803 * Returns the extracted Large Resource Data Type length.
1805 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1807 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1811 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1812 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1814 * Returns the extracted Small Resource Data Type length.
1816 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1818 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1822 * pci_vpd_info_field_size - Extracts the information field length
1823 * @lrdt: Pointer to the beginning of an information field header
1825 * Returns the extracted information field length.
1827 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1829 return info_field[2];
1833 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1834 * @buf: Pointer to buffered vpd data
1835 * @off: The offset into the buffer at which to begin the search
1836 * @len: The length of the vpd buffer
1837 * @rdt: The Resource Data Type to search for
1839 * Returns the index where the Resource Data Type was found or
1840 * -ENOENT otherwise.
1842 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1845 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1846 * @buf: Pointer to buffered vpd data
1847 * @off: The offset into the buffer at which to begin the search
1848 * @len: The length of the buffer area, relative to off, in which to search
1849 * @kw: The keyword to search for
1851 * Returns the index where the information field keyword was found or
1852 * -ENOENT otherwise.
1854 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1855 unsigned int len, const char *kw);
1857 /* PCI <-> OF binding helpers */
1860 void pci_set_of_node(struct pci_dev *dev);
1861 void pci_release_of_node(struct pci_dev *dev);
1862 void pci_set_bus_of_node(struct pci_bus *bus);
1863 void pci_release_bus_of_node(struct pci_bus *bus);
1865 /* Arch may override this (weak) */
1866 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
1868 static inline struct device_node *
1869 pci_device_to_OF_node(const struct pci_dev *pdev)
1871 return pdev ? pdev->dev.of_node : NULL;
1874 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
1876 return bus ? bus->dev.of_node : NULL;
1879 #else /* CONFIG_OF */
1880 static inline void pci_set_of_node(struct pci_dev *dev) { }
1881 static inline void pci_release_of_node(struct pci_dev *dev) { }
1882 static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
1883 static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
1884 static inline struct device_node *
1885 pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; }
1886 #endif /* CONFIG_OF */
1889 static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev)
1891 return pdev->dev.archdata.edev;
1895 int pci_for_each_dma_alias(struct pci_dev *pdev,
1896 int (*fn)(struct pci_dev *pdev,
1897 u16 alias, void *data), void *data);
1899 /* helper functions for operation of device flag */
1900 static inline void pci_set_dev_assigned(struct pci_dev *pdev)
1902 pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED;
1904 static inline void pci_clear_dev_assigned(struct pci_dev *pdev)
1906 pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED;
1908 static inline bool pci_is_dev_assigned(struct pci_dev *pdev)
1910 return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED;
1912 #endif /* LINUX_PCI_H */