Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / include / linux / mtd / pfow.h
1 /* Primary function overlay window definitions
2  * and service functions used by LPDDR chips
3  */
4 #ifndef __LINUX_MTD_PFOW_H
5 #define __LINUX_MTD_PFOW_H
6
7 #include <linux/mtd/qinfo.h>
8
9 /* PFOW registers addressing */
10 /* Address of symbol "P" */
11 #define PFOW_QUERY_STRING_P                     0x0000
12 /* Address of symbol "F" */
13 #define PFOW_QUERY_STRING_F                     0x0002
14 /* Address of symbol "O" */
15 #define PFOW_QUERY_STRING_O                     0x0004
16 /* Address of symbol "W" */
17 #define PFOW_QUERY_STRING_W                     0x0006
18 /* Identification info for LPDDR chip */
19 #define PFOW_MANUFACTURER_ID                    0x0020
20 #define PFOW_DEVICE_ID                          0x0022
21 /* Address in PFOW where prog buffer can can be found */
22 #define PFOW_PROGRAM_BUFFER_OFFSET              0x0040
23 /* Size of program buffer in words */
24 #define PFOW_PROGRAM_BUFFER_SIZE                0x0042
25 /* Address command code register */
26 #define PFOW_COMMAND_CODE                       0x0080
27 /* command data register */
28 #define PFOW_COMMAND_DATA                       0x0084
29 /* command address register lower address bits */
30 #define PFOW_COMMAND_ADDRESS_L                  0x0088
31 /* command address register upper address bits */
32 #define PFOW_COMMAND_ADDRESS_H                  0x008a
33 /* number of bytes to be proggrammed lower address bits */
34 #define PFOW_DATA_COUNT_L                       0x0090
35 /* number of bytes to be proggrammed higher address bits */
36 #define PFOW_DATA_COUNT_H                       0x0092
37 /* command execution register, the only possible value is 0x01 */
38 #define PFOW_COMMAND_EXECUTE                    0x00c0
39 /* 0x01 should be written at this address to clear buffer */
40 #define PFOW_CLEAR_PROGRAM_BUFFER               0x00c4
41 /* device program/erase suspend register */
42 #define PFOW_PROGRAM_ERASE_SUSPEND              0x00c8
43 /* device status register */
44 #define PFOW_DSR                                0x00cc
45
46 /* LPDDR memory device command codes */
47 /* They are possible values of PFOW command code register */
48 #define LPDDR_WORD_PROGRAM              0x0041
49 #define LPDDR_BUFF_PROGRAM              0x00E9
50 #define LPDDR_BLOCK_ERASE               0x0020
51 #define LPDDR_LOCK_BLOCK                0x0061
52 #define LPDDR_UNLOCK_BLOCK              0x0062
53 #define LPDDR_READ_BLOCK_LOCK_STATUS    0x0065
54 #define LPDDR_INFO_QUERY                0x0098
55 #define LPDDR_READ_OTP                  0x0097
56 #define LPDDR_PROG_OTP                  0x00C0
57 #define LPDDR_RESUME                    0x00D0
58
59 /* Defines possible value of PFOW command execution register */
60 #define LPDDR_START_EXECUTION                   0x0001
61
62 /* Defines possible value of PFOW program/erase suspend register */
63 #define LPDDR_SUSPEND                           0x0001
64
65 /* Possible values of PFOW device status register */
66 /* access R - read; RC read & clearable */
67 #define DSR_DPS                 (1<<1) /* RC; device protect status
68                                         * 0 - not protected 1 - locked */
69 #define DSR_PSS                 (1<<2) /* R; program suspend status;
70                                         * 0-prog in progress/completed,
71                                         * 1- prog suspended */
72 #define DSR_VPPS                (1<<3) /* RC; 0-Vpp OK, * 1-Vpp low */
73 #define DSR_PROGRAM_STATUS      (1<<4) /* RC; 0-successful, 1-error */
74 #define DSR_ERASE_STATUS        (1<<5) /* RC; erase or blank check status;
75                                         * 0-success erase/blank check,
76                                         * 1 blank check error */
77 #define DSR_ESS                 (1<<6) /* R; erase suspend status;
78                                         * 0-erase in progress/complete,
79                                         * 1 erase suspended */
80 #define DSR_READY_STATUS        (1<<7) /* R; Device status
81                                         * 0-busy,
82                                         * 1-ready */
83 #define DSR_RPS                 (0x3<<8) /* RC;  region program status
84                                         * 00 - Success,
85                                         * 01-re-program attempt in region with
86                                         * object mode data,
87                                         * 10-object mode program w attempt in
88                                         * region with control mode data
89                                         * 11-attempt to program invalid half
90                                         * with 0x41 command */
91 #define DSR_AOS                 (1<<12) /* RC; 1- AO related failure */
92 #define DSR_AVAILABLE           (1<<15) /* R; Device availbility
93                                         * 1 - Device available
94                                         * 0 - not available */
95
96 /* The superset of all possible error bits in DSR */
97 #define DSR_ERR                 0x133A
98
99 static inline void send_pfow_command(struct map_info *map,
100                                 unsigned long cmd_code, unsigned long adr,
101                                 unsigned long len, map_word *datum)
102 {
103         int bits_per_chip = map_bankwidth(map) * 8;
104
105         map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE);
106         map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)),
107                                 map->pfow_base + PFOW_COMMAND_ADDRESS_L);
108         map_write(map, CMD(adr>>bits_per_chip),
109                                 map->pfow_base + PFOW_COMMAND_ADDRESS_H);
110         if (len) {
111                 map_write(map, CMD(len & ((1<<bits_per_chip) - 1)),
112                                         map->pfow_base + PFOW_DATA_COUNT_L);
113                 map_write(map, CMD(len>>bits_per_chip),
114                                         map->pfow_base + PFOW_DATA_COUNT_H);
115         }
116         if (datum)
117                 map_write(map, *datum, map->pfow_base + PFOW_COMMAND_DATA);
118
119         /* Command execution start */
120         map_write(map, CMD(LPDDR_START_EXECUTION),
121                         map->pfow_base + PFOW_COMMAND_EXECUTE);
122 }
123
124 static inline void print_drs_error(unsigned dsr)
125 {
126         int prog_status = (dsr & DSR_RPS) >> 8;
127
128         if (!(dsr & DSR_AVAILABLE))
129                 printk(KERN_NOTICE"DSR.15: (0) Device not Available\n");
130         if (prog_status & 0x03)
131                 printk(KERN_NOTICE"DSR.9,8: (11) Attempt to program invalid "
132                                                 "half with 41h command\n");
133         else if (prog_status & 0x02)
134                 printk(KERN_NOTICE"DSR.9,8: (10) Object Mode Program attempt "
135                                         "in region with Control Mode data\n");
136         else if (prog_status &  0x01)
137                 printk(KERN_NOTICE"DSR.9,8: (01) Program attempt in region "
138                                                 "with Object Mode data\n");
139         if (!(dsr & DSR_READY_STATUS))
140                 printk(KERN_NOTICE"DSR.7: (0) Device is Busy\n");
141         if (dsr & DSR_ESS)
142                 printk(KERN_NOTICE"DSR.6: (1) Erase Suspended\n");
143         if (dsr & DSR_ERASE_STATUS)
144                 printk(KERN_NOTICE"DSR.5: (1) Erase/Blank check error\n");
145         if (dsr & DSR_PROGRAM_STATUS)
146                 printk(KERN_NOTICE"DSR.4: (1) Program Error\n");
147         if (dsr & DSR_VPPS)
148                 printk(KERN_NOTICE"DSR.3: (1) Vpp low detect, operation "
149                                         "aborted\n");
150         if (dsr & DSR_PSS)
151                 printk(KERN_NOTICE"DSR.2: (1) Program suspended\n");
152         if (dsr & DSR_DPS)
153                 printk(KERN_NOTICE"DSR.1: (1) Aborted Erase/Program attempt "
154                                         "on locked block\n");
155 }
156 #endif /* __LINUX_MTD_PFOW_H */