kernel/include/linux/mfd/tps80031.h

   1 /*
   2  * tps80031.h -- TI TPS80031 and TI TPS80032 PMIC driver.
   3  *
   4  * Copyright (c) 2012, NVIDIA Corporation.
   5  *
   6  * Author: Laxman Dewangan <ldewangan@nvidia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation version 2.
  11  *
  12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
  13  * whether express or implied; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  20  * 02111-1307, USA
  21  */
  22
  23 #ifndef __LINUX_MFD_TPS80031_H
  24 #define __LINUX_MFD_TPS80031_H
  25
  26 #include <linux/device.h>
  27 #include <linux/regmap.h>
  28
  29 /* Pull-ups/Pull-downs */
  30 #define TPS80031_CFG_INPUT_PUPD1                        0xF0
  31 #define TPS80031_CFG_INPUT_PUPD2                        0xF1
  32 #define TPS80031_CFG_INPUT_PUPD3                        0xF2
  33 #define TPS80031_CFG_INPUT_PUPD4                        0xF3
  34 #define TPS80031_CFG_LDO_PD1                            0xF4
  35 #define TPS80031_CFG_LDO_PD2                            0xF5
  36 #define TPS80031_CFG_SMPS_PD                            0xF6
  37
  38 /* Real Time Clock */
  39 #define TPS80031_SECONDS_REG                            0x00
  40 #define TPS80031_MINUTES_REG                            0x01
  41 #define TPS80031_HOURS_REG                              0x02
  42 #define TPS80031_DAYS_REG                               0x03
  43 #define TPS80031_MONTHS_REG                             0x04
  44 #define TPS80031_YEARS_REG                              0x05
  45 #define TPS80031_WEEKS_REG                              0x06
  46 #define TPS80031_ALARM_SECONDS_REG                      0x08
  47 #define TPS80031_ALARM_MINUTES_REG                      0x09
  48 #define TPS80031_ALARM_HOURS_REG                        0x0A
  49 #define TPS80031_ALARM_DAYS_REG                         0x0B
  50 #define TPS80031_ALARM_MONTHS_REG                       0x0C
  51 #define TPS80031_ALARM_YEARS_REG                        0x0D
  52 #define TPS80031_RTC_CTRL_REG                           0x10
  53 #define TPS80031_RTC_STATUS_REG                         0x11
  54 #define TPS80031_RTC_INTERRUPTS_REG                     0x12
  55 #define TPS80031_RTC_COMP_LSB_REG                       0x13
  56 #define TPS80031_RTC_COMP_MSB_REG                       0x14
  57 #define TPS80031_RTC_RESET_STATUS_REG                   0x16
  58
  59 /*PMC Master Module */
  60 #define TPS80031_PHOENIX_START_CONDITION                0x1F
  61 #define TPS80031_PHOENIX_MSK_TRANSITION                 0x20
  62 #define TPS80031_STS_HW_CONDITIONS                      0x21
  63 #define TPS80031_PHOENIX_LAST_TURNOFF_STS               0x22
  64 #define TPS80031_VSYSMIN_LO_THRESHOLD                   0x23
  65 #define TPS80031_VSYSMIN_HI_THRESHOLD                   0x24
  66 #define TPS80031_PHOENIX_DEV_ON                         0x25
  67 #define TPS80031_STS_PWR_GRP_STATE                      0x27
  68 #define TPS80031_PH_CFG_VSYSLOW                         0x28
  69 #define TPS80031_PH_STS_BOOT                            0x29
  70 #define TPS80031_PHOENIX_SENS_TRANSITION                0x2A
  71 #define TPS80031_PHOENIX_SEQ_CFG                        0x2B
  72 #define TPS80031_PRIMARY_WATCHDOG_CFG                   0X2C
  73 #define TPS80031_KEY_PRESS_DUR_CFG                      0X2D
  74 #define TPS80031_SMPS_LDO_SHORT_STS                     0x2E
  75
  76 /* PMC Slave Module - Broadcast */
  77 #define TPS80031_BROADCAST_ADDR_ALL                     0x31
  78 #define TPS80031_BROADCAST_ADDR_REF                     0x32
  79 #define TPS80031_BROADCAST_ADDR_PROV                    0x33
  80 #define TPS80031_BROADCAST_ADDR_CLK_RST                 0x34
  81
  82 /* PMC Slave Module  SMPS Regulators */
  83 #define TPS80031_SMPS4_CFG_TRANS                        0x41
  84 #define TPS80031_SMPS4_CFG_STATE                        0x42
  85 #define TPS80031_SMPS4_CFG_VOLTAGE                      0x44
  86 #define TPS80031_VIO_CFG_TRANS                          0x47
  87 #define TPS80031_VIO_CFG_STATE                          0x48
  88 #define TPS80031_VIO_CFG_FORCE                          0x49
  89 #define TPS80031_VIO_CFG_VOLTAGE                        0x4A
  90 #define TPS80031_VIO_CFG_STEP                           0x48
  91 #define TPS80031_SMPS1_CFG_TRANS                        0x53
  92 #define TPS80031_SMPS1_CFG_STATE                        0x54
  93 #define TPS80031_SMPS1_CFG_FORCE                        0x55
  94 #define TPS80031_SMPS1_CFG_VOLTAGE                      0x56
  95 #define TPS80031_SMPS1_CFG_STEP                         0x57
  96 #define TPS80031_SMPS2_CFG_TRANS                        0x59
  97 #define TPS80031_SMPS2_CFG_STATE                        0x5A
  98 #define TPS80031_SMPS2_CFG_FORCE                        0x5B
  99 #define TPS80031_SMPS2_CFG_VOLTAGE                      0x5C
 100 #define TPS80031_SMPS2_CFG_STEP                         0x5D
 101 #define TPS80031_SMPS3_CFG_TRANS                        0x65
 102 #define TPS80031_SMPS3_CFG_STATE                        0x66
 103 #define TPS80031_SMPS3_CFG_VOLTAGE                      0x68
 104
 105 /* PMC Slave Module  LDO Regulators */
 106 #define TPS80031_VANA_CFG_TRANS                         0x81
 107 #define TPS80031_VANA_CFG_STATE                         0x82
 108 #define TPS80031_VANA_CFG_VOLTAGE                       0x83
 109 #define TPS80031_LDO2_CFG_TRANS                         0x85
 110 #define TPS80031_LDO2_CFG_STATE                         0x86
 111 #define TPS80031_LDO2_CFG_VOLTAGE                       0x87
 112 #define TPS80031_LDO4_CFG_TRANS                         0x89
 113 #define TPS80031_LDO4_CFG_STATE                         0x8A
 114 #define TPS80031_LDO4_CFG_VOLTAGE                       0x8B
 115 #define TPS80031_LDO3_CFG_TRANS                         0x8D
 116 #define TPS80031_LDO3_CFG_STATE                         0x8E
 117 #define TPS80031_LDO3_CFG_VOLTAGE                       0x8F
 118 #define TPS80031_LDO6_CFG_TRANS                         0x91
 119 #define TPS80031_LDO6_CFG_STATE                         0x92
 120 #define TPS80031_LDO6_CFG_VOLTAGE                       0x93
 121 #define TPS80031_LDOLN_CFG_TRANS                        0x95
 122 #define TPS80031_LDOLN_CFG_STATE                        0x96
 123 #define TPS80031_LDOLN_CFG_VOLTAGE                      0x97
 124 #define TPS80031_LDO5_CFG_TRANS                         0x99
 125 #define TPS80031_LDO5_CFG_STATE                         0x9A
 126 #define TPS80031_LDO5_CFG_VOLTAGE                       0x9B
 127 #define TPS80031_LDO1_CFG_TRANS                         0x9D
 128 #define TPS80031_LDO1_CFG_STATE                         0x9E
 129 #define TPS80031_LDO1_CFG_VOLTAGE                       0x9F
 130 #define TPS80031_LDOUSB_CFG_TRANS                       0xA1
 131 #define TPS80031_LDOUSB_CFG_STATE                       0xA2
 132 #define TPS80031_LDOUSB_CFG_VOLTAGE                     0xA3
 133 #define TPS80031_LDO7_CFG_TRANS                         0xA5
 134 #define TPS80031_LDO7_CFG_STATE                         0xA6
 135 #define TPS80031_LDO7_CFG_VOLTAGE                       0xA7
 136
 137 /* PMC Slave Module  External Control */
 138 #define TPS80031_REGEN1_CFG_TRANS                       0xAE
 139 #define TPS80031_REGEN1_CFG_STATE                       0xAF
 140 #define TPS80031_REGEN2_CFG_TRANS                       0xB1
 141 #define TPS80031_REGEN2_CFG_STATE                       0xB2
 142 #define TPS80031_SYSEN_CFG_TRANS                        0xB4
 143 #define TPS80031_SYSEN_CFG_STATE                        0xB5
 144
 145 /* PMC Slave Module  Internal Control */
 146 #define TPS80031_NRESPWRON_CFG_TRANS                    0xB7
 147 #define TPS80031_NRESPWRON_CFG_STATE                    0xB8
 148 #define TPS80031_CLK32KAO_CFG_TRANS                     0xBA
 149 #define TPS80031_CLK32KAO_CFG_STATE                     0xBB
 150 #define TPS80031_CLK32KG_CFG_TRANS                      0xBD
 151 #define TPS80031_CLK32KG_CFG_STATE                      0xBE
 152 #define TPS80031_CLK32KAUDIO_CFG_TRANS                  0xC0
 153 #define TPS80031_CLK32KAUDIO_CFG_STATE                  0xC1
 154 #define TPS80031_VRTC_CFG_TRANS                         0xC3
 155 #define TPS80031_VRTC_CFG_STATE                         0xC4
 156 #define TPS80031_BIAS_CFG_TRANS                         0xC6
 157 #define TPS80031_BIAS_CFG_STATE                         0xC7
 158 #define TPS80031_VSYSMIN_HI_CFG_TRANS                   0xC9
 159 #define TPS80031_VSYSMIN_HI_CFG_STATE                   0xCA
 160 #define TPS80031_RC6MHZ_CFG_TRANS                       0xCC
 161 #define TPS80031_RC6MHZ_CFG_STATE                       0xCD
 162 #define TPS80031_TMP_CFG_TRANS                          0xCF
 163 #define TPS80031_TMP_CFG_STATE                          0xD0
 164
 165 /* PMC Slave Module  resources assignment */
 166 #define TPS80031_PREQ1_RES_ASS_A                        0xD7
 167 #define TPS80031_PREQ1_RES_ASS_B                        0xD8
 168 #define TPS80031_PREQ1_RES_ASS_C                        0xD9
 169 #define TPS80031_PREQ2_RES_ASS_A                        0xDA
 170 #define TPS80031_PREQ2_RES_ASS_B                        0xDB
 171 #define TPS80031_PREQ2_RES_ASS_C                        0xDC
 172 #define TPS80031_PREQ3_RES_ASS_A                        0xDD
 173 #define TPS80031_PREQ3_RES_ASS_B                        0xDE
 174 #define TPS80031_PREQ3_RES_ASS_C                        0xDF
 175
 176 /* PMC Slave Module  Miscellaneous */
 177 #define TPS80031_SMPS_OFFSET                            0xE0
 178 #define TPS80031_SMPS_MULT                              0xE3
 179 #define TPS80031_MISC1                                  0xE4
 180 #define TPS80031_MISC2                                  0xE5
 181 #define TPS80031_BBSPOR_CFG                             0xE6
 182 #define TPS80031_TMP_CFG                                0xE7
 183
 184 /* Battery Charging Controller and Indicator LED */
 185 #define TPS80031_CONTROLLER_CTRL2                       0xDA
 186 #define TPS80031_CONTROLLER_VSEL_COMP                   0xDB
 187 #define TPS80031_CHARGERUSB_VSYSREG                     0xDC
 188 #define TPS80031_CHARGERUSB_VICHRG_PC                   0xDD
 189 #define TPS80031_LINEAR_CHRG_STS                        0xDE
 190 #define TPS80031_CONTROLLER_INT_MASK                    0xE0
 191 #define TPS80031_CONTROLLER_CTRL1                       0xE1
 192 #define TPS80031_CONTROLLER_WDG                         0xE2
 193 #define TPS80031_CONTROLLER_STAT1                       0xE3
 194 #define TPS80031_CHARGERUSB_INT_STATUS                  0xE4
 195 #define TPS80031_CHARGERUSB_INT_MASK                    0xE5
 196 #define TPS80031_CHARGERUSB_STATUS_INT1                 0xE6
 197 #define TPS80031_CHARGERUSB_STATUS_INT2                 0xE7
 198 #define TPS80031_CHARGERUSB_CTRL1                       0xE8
 199 #define TPS80031_CHARGERUSB_CTRL2                       0xE9
 200 #define TPS80031_CHARGERUSB_CTRL3                       0xEA
 201 #define TPS80031_CHARGERUSB_STAT1                       0xEB
 202 #define TPS80031_CHARGERUSB_VOREG                       0xEC
 203 #define TPS80031_CHARGERUSB_VICHRG                      0xED
 204 #define TPS80031_CHARGERUSB_CINLIMIT                    0xEE
 205 #define TPS80031_CHARGERUSB_CTRLLIMIT1                  0xEF
 206 #define TPS80031_CHARGERUSB_CTRLLIMIT2                  0xF0
 207 #define TPS80031_LED_PWM_CTRL1                          0xF4
 208 #define TPS80031_LED_PWM_CTRL2                          0xF5
 209
 210 /* USB On-The-Go  */
 211 #define TPS80031_BACKUP_REG                             0xFA
 212 #define TPS80031_USB_VENDOR_ID_LSB                      0x00
 213 #define TPS80031_USB_VENDOR_ID_MSB                      0x01
 214 #define TPS80031_USB_PRODUCT_ID_LSB                     0x02
 215 #define TPS80031_USB_PRODUCT_ID_MSB                     0x03
 216 #define TPS80031_USB_VBUS_CTRL_SET                      0x04
 217 #define TPS80031_USB_VBUS_CTRL_CLR                      0x05
 218 #define TPS80031_USB_ID_CTRL_SET                        0x06
 219 #define TPS80031_USB_ID_CTRL_CLR                        0x07
 220 #define TPS80031_USB_VBUS_INT_SRC                       0x08
 221 #define TPS80031_USB_VBUS_INT_LATCH_SET                 0x09
 222 #define TPS80031_USB_VBUS_INT_LATCH_CLR                 0x0A
 223 #define TPS80031_USB_VBUS_INT_EN_LO_SET                 0x0B
 224 #define TPS80031_USB_VBUS_INT_EN_LO_CLR                 0x0C
 225 #define TPS80031_USB_VBUS_INT_EN_HI_SET                 0x0D
 226 #define TPS80031_USB_VBUS_INT_EN_HI_CLR                 0x0E
 227 #define TPS80031_USB_ID_INT_SRC                         0x0F
 228 #define TPS80031_USB_ID_INT_LATCH_SET                   0x10
 229 #define TPS80031_USB_ID_INT_LATCH_CLR                   0x11
 230 #define TPS80031_USB_ID_INT_EN_LO_SET                   0x12
 231 #define TPS80031_USB_ID_INT_EN_LO_CLR                   0x13
 232 #define TPS80031_USB_ID_INT_EN_HI_SET                   0x14
 233 #define TPS80031_USB_ID_INT_EN_HI_CLR                   0x15
 234 #define TPS80031_USB_OTG_ADP_CTRL                       0x16
 235 #define TPS80031_USB_OTG_ADP_HIGH                       0x17
 236 #define TPS80031_USB_OTG_ADP_LOW                        0x18
 237 #define TPS80031_USB_OTG_ADP_RISE                       0x19
 238 #define TPS80031_USB_OTG_REVISION                       0x1A
 239
 240 /* Gas Gauge */
 241 #define TPS80031_FG_REG_00                              0xC0
 242 #define TPS80031_FG_REG_01                              0xC1
 243 #define TPS80031_FG_REG_02                              0xC2
 244 #define TPS80031_FG_REG_03                              0xC3
 245 #define TPS80031_FG_REG_04                              0xC4
 246 #define TPS80031_FG_REG_05                              0xC5
 247 #define TPS80031_FG_REG_06                              0xC6
 248 #define TPS80031_FG_REG_07                              0xC7
 249 #define TPS80031_FG_REG_08                              0xC8
 250 #define TPS80031_FG_REG_09                              0xC9
 251 #define TPS80031_FG_REG_10                              0xCA
 252 #define TPS80031_FG_REG_11                              0xCB
 253
 254 /* General Purpose ADC */
 255 #define TPS80031_GPADC_CTRL                             0x2E
 256 #define TPS80031_GPADC_CTRL2                            0x2F
 257 #define TPS80031_RTSELECT_LSB                           0x32
 258 #define TPS80031_RTSELECT_ISB                           0x33
 259 #define TPS80031_RTSELECT_MSB                           0x34
 260 #define TPS80031_GPSELECT_ISB                           0x35
 261 #define TPS80031_CTRL_P1                                0x36
 262 #define TPS80031_RTCH0_LSB                              0x37
 263 #define TPS80031_RTCH0_MSB                              0x38
 264 #define TPS80031_RTCH1_LSB                              0x39
 265 #define TPS80031_RTCH1_MSB                              0x3A
 266 #define TPS80031_GPCH0_LSB                              0x3B
 267 #define TPS80031_GPCH0_MSB                              0x3C
 268
 269 /* SIM, MMC and Battery Detection */
 270 #define TPS80031_SIMDEBOUNCING                          0xEB
 271 #define TPS80031_SIMCTRL                                0xEC
 272 #define TPS80031_MMCDEBOUNCING                          0xED
 273 #define TPS80031_MMCCTRL                                0xEE
 274 #define TPS80031_BATDEBOUNCING                          0xEF
 275
 276 /* Vibrator Driver and PWMs */
 277 #define TPS80031_VIBCTRL                                0x9B
 278 #define TPS80031_VIBMODE                                0x9C
 279 #define TPS80031_PWM1ON                                 0xBA
 280 #define TPS80031_PWM1OFF                                0xBB
 281 #define TPS80031_PWM2ON                                 0xBD
 282 #define TPS80031_PWM2OFF                                0xBE
 283
 284 /* Control Interface */
 285 #define TPS80031_INT_STS_A                              0xD0
 286 #define TPS80031_INT_STS_B                              0xD1
 287 #define TPS80031_INT_STS_C                              0xD2
 288 #define TPS80031_INT_MSK_LINE_A                         0xD3
 289 #define TPS80031_INT_MSK_LINE_B                         0xD4
 290 #define TPS80031_INT_MSK_LINE_C                         0xD5
 291 #define TPS80031_INT_MSK_STS_A                          0xD6
 292 #define TPS80031_INT_MSK_STS_B                          0xD7
 293 #define TPS80031_INT_MSK_STS_C                          0xD8
 294 #define TPS80031_TOGGLE1                                0x90
 295 #define TPS80031_TOGGLE2                                0x91
 296 #define TPS80031_TOGGLE3                                0x92
 297 #define TPS80031_PWDNSTATUS1                            0x93
 298 #define TPS80031_PWDNSTATUS2                            0x94
 299 #define TPS80031_VALIDITY0                              0x17
 300 #define TPS80031_VALIDITY1                              0x18
 301 #define TPS80031_VALIDITY2                              0x19
 302 #define TPS80031_VALIDITY3                              0x1A
 303 #define TPS80031_VALIDITY4                              0x1B
 304 #define TPS80031_VALIDITY5                              0x1C
 305 #define TPS80031_VALIDITY6                              0x1D
 306 #define TPS80031_VALIDITY7                              0x1E
 307
 308 /* Version number related register */
 309 #define TPS80031_JTAGVERNUM                             0x87
 310 #define TPS80031_EPROM_REV                              0xDF
 311
 312 /* GPADC Trimming Bits. */
 313 #define TPS80031_GPADC_TRIM0                            0xCC
 314 #define TPS80031_GPADC_TRIM1                            0xCD
 315 #define TPS80031_GPADC_TRIM2                            0xCE
 316 #define TPS80031_GPADC_TRIM3                            0xCF
 317 #define TPS80031_GPADC_TRIM4                            0xD0
 318 #define TPS80031_GPADC_TRIM5                            0xD1
 319 #define TPS80031_GPADC_TRIM6                            0xD2
 320 #define TPS80031_GPADC_TRIM7                            0xD3
 321 #define TPS80031_GPADC_TRIM8                            0xD4
 322 #define TPS80031_GPADC_TRIM9                            0xD5
 323 #define TPS80031_GPADC_TRIM10                           0xD6
 324 #define TPS80031_GPADC_TRIM11                           0xD7
 325 #define TPS80031_GPADC_TRIM12                           0xD8
 326 #define TPS80031_GPADC_TRIM13                           0xD9
 327 #define TPS80031_GPADC_TRIM14                           0xDA
 328 #define TPS80031_GPADC_TRIM15                           0xDB
 329 #define TPS80031_GPADC_TRIM16                           0xDC
 330 #define TPS80031_GPADC_TRIM17                           0xDD
 331 #define TPS80031_GPADC_TRIM18                           0xDE
 332
 333 /* TPS80031_CONTROLLER_STAT1 bit fields */
 334 #define TPS80031_CONTROLLER_STAT1_BAT_TEMP              0
 335 #define TPS80031_CONTROLLER_STAT1_BAT_REMOVED           1
 336 #define TPS80031_CONTROLLER_STAT1_VBUS_DET              2
 337 #define TPS80031_CONTROLLER_STAT1_VAC_DET               3
 338 #define TPS80031_CONTROLLER_STAT1_FAULT_WDG             4
 339 #define TPS80031_CONTROLLER_STAT1_LINCH_GATED           6
 340 /* TPS80031_CONTROLLER_INT_MASK bit filed */
 341 #define TPS80031_CONTROLLER_INT_MASK_MVAC_DET           0
 342 #define TPS80031_CONTROLLER_INT_MASK_MVBUS_DET          1
 343 #define TPS80031_CONTROLLER_INT_MASK_MBAT_TEMP          2
 344 #define TPS80031_CONTROLLER_INT_MASK_MFAULT_WDG         3
 345 #define TPS80031_CONTROLLER_INT_MASK_MBAT_REMOVED       4
 346 #define TPS80031_CONTROLLER_INT_MASK_MLINCH_GATED       5
 347
 348 #define TPS80031_CHARGE_CONTROL_SUB_INT_MASK            0x3F
 349
 350 /* TPS80031_PHOENIX_DEV_ON bit field */
 351 #define TPS80031_DEVOFF                                 0x1
 352
 353 #define TPS80031_EXT_CONTROL_CFG_TRANS                  0
 354 #define TPS80031_EXT_CONTROL_CFG_STATE                  1
 355
 356 /* State register field */
 357 #define TPS80031_STATE_OFF                              0x00
 358 #define TPS80031_STATE_ON                               0x01
 359 #define TPS80031_STATE_MASK                             0x03
 360
 361 /* Trans register field */
 362 #define TPS80031_TRANS_ACTIVE_OFF                       0x00
 363 #define TPS80031_TRANS_ACTIVE_ON                        0x01
 364 #define TPS80031_TRANS_ACTIVE_MASK                      0x03
 365 #define TPS80031_TRANS_SLEEP_OFF                        0x00
 366 #define TPS80031_TRANS_SLEEP_ON                         0x04
 367 #define TPS80031_TRANS_SLEEP_MASK                       0x0C
 368 #define TPS80031_TRANS_OFF_OFF                          0x00
 369 #define TPS80031_TRANS_OFF_ACTIVE                       0x10
 370 #define TPS80031_TRANS_OFF_MASK                         0x30
 371
 372 #define TPS80031_EXT_PWR_REQ            (TPS80031_PWR_REQ_INPUT_PREQ1 | \
 373                                         TPS80031_PWR_REQ_INPUT_PREQ2 | \
 374                                         TPS80031_PWR_REQ_INPUT_PREQ3)
 375
 376 /* TPS80031_BBSPOR_CFG bit field */
 377 #define TPS80031_BBSPOR_CHG_EN                          0x8
 378 #define TPS80031_MAX_REGISTER                           0xFF
 379
 380 struct i2c_client;
 381
 382 /* Supported chips */
 383 enum chips {
 384         TPS80031 = 0x00000001,
 385         TPS80032 = 0x00000002,
 386 };
 387
 388 enum {
 389         TPS80031_INT_PWRON,
 390         TPS80031_INT_RPWRON,
 391         TPS80031_INT_SYS_VLOW,
 392         TPS80031_INT_RTC_ALARM,
 393         TPS80031_INT_RTC_PERIOD,
 394         TPS80031_INT_HOT_DIE,
 395         TPS80031_INT_VXX_SHORT,
 396         TPS80031_INT_SPDURATION,
 397         TPS80031_INT_WATCHDOG,
 398         TPS80031_INT_BAT,
 399         TPS80031_INT_SIM,
 400         TPS80031_INT_MMC,
 401         TPS80031_INT_RES,
 402         TPS80031_INT_GPADC_RT,
 403         TPS80031_INT_GPADC_SW2_EOC,
 404         TPS80031_INT_CC_AUTOCAL,
 405         TPS80031_INT_ID_WKUP,
 406         TPS80031_INT_VBUSS_WKUP,
 407         TPS80031_INT_ID,
 408         TPS80031_INT_VBUS,
 409         TPS80031_INT_CHRG_CTRL,
 410         TPS80031_INT_EXT_CHRG,
 411         TPS80031_INT_INT_CHRG,
 412         TPS80031_INT_RES2,
 413         TPS80031_INT_BAT_TEMP_OVRANGE,
 414         TPS80031_INT_BAT_REMOVED,
 415         TPS80031_INT_VBUS_DET,
 416         TPS80031_INT_VAC_DET,
 417         TPS80031_INT_FAULT_WDG,
 418         TPS80031_INT_LINCH_GATED,
 419
 420         /* Last interrupt id to get the end number */
 421         TPS80031_INT_NR,
 422 };
 423
 424 /* TPS80031 Slave IDs */
 425 #define TPS80031_NUM_SLAVES                             4
 426 #define TPS80031_SLAVE_ID0                              0
 427 #define TPS80031_SLAVE_ID1                              1
 428 #define TPS80031_SLAVE_ID2                              2
 429 #define TPS80031_SLAVE_ID3                              3
 430
 431 /* TPS80031 I2C addresses */
 432 #define TPS80031_I2C_ID0_ADDR                           0x12
 433 #define TPS80031_I2C_ID1_ADDR                           0x48
 434 #define TPS80031_I2C_ID2_ADDR                           0x49
 435 #define TPS80031_I2C_ID3_ADDR                           0x4A
 436
 437 enum {
 438         TPS80031_REGULATOR_VIO,
 439         TPS80031_REGULATOR_SMPS1,
 440         TPS80031_REGULATOR_SMPS2,
 441         TPS80031_REGULATOR_SMPS3,
 442         TPS80031_REGULATOR_SMPS4,
 443         TPS80031_REGULATOR_VANA,
 444         TPS80031_REGULATOR_LDO1,
 445         TPS80031_REGULATOR_LDO2,
 446         TPS80031_REGULATOR_LDO3,
 447         TPS80031_REGULATOR_LDO4,
 448         TPS80031_REGULATOR_LDO5,
 449         TPS80031_REGULATOR_LDO6,
 450         TPS80031_REGULATOR_LDO7,
 451         TPS80031_REGULATOR_LDOLN,
 452         TPS80031_REGULATOR_LDOUSB,
 453         TPS80031_REGULATOR_VBUS,
 454         TPS80031_REGULATOR_REGEN1,
 455         TPS80031_REGULATOR_REGEN2,
 456         TPS80031_REGULATOR_SYSEN,
 457         TPS80031_REGULATOR_MAX,
 458 };
 459
 460 /* Different configurations for the rails */
 461 enum {
 462         /* USBLDO input selection */
 463         TPS80031_USBLDO_INPUT_VSYS              = 0x00000001,
 464         TPS80031_USBLDO_INPUT_PMID              = 0x00000002,
 465
 466         /* LDO3 output mode */
 467         TPS80031_LDO3_OUTPUT_VIB                = 0x00000004,
 468
 469         /* VBUS configuration */
 470         TPS80031_VBUS_DISCHRG_EN_PDN            = 0x00000004,
 471         TPS80031_VBUS_SW_ONLY                   = 0x00000008,
 472         TPS80031_VBUS_SW_N_ID                   = 0x00000010,
 473 };
 474
 475 /* External controls requests */
 476 enum tps80031_ext_control {
 477         TPS80031_PWR_REQ_INPUT_NONE             = 0x00000000,
 478         TPS80031_PWR_REQ_INPUT_PREQ1            = 0x00000001,
 479         TPS80031_PWR_REQ_INPUT_PREQ2            = 0x00000002,
 480         TPS80031_PWR_REQ_INPUT_PREQ3            = 0x00000004,
 481         TPS80031_PWR_OFF_ON_SLEEP               = 0x00000008,
 482         TPS80031_PWR_ON_ON_SLEEP                = 0x00000010,
 483 };
 484
 485 enum tps80031_pupd_pins {
 486         TPS80031_PREQ1 = 0,
 487         TPS80031_PREQ2A,
 488         TPS80031_PREQ2B,
 489         TPS80031_PREQ2C,
 490         TPS80031_PREQ3,
 491         TPS80031_NRES_WARM,
 492         TPS80031_PWM_FORCE,
 493         TPS80031_CHRG_EXT_CHRG_STATZ,
 494         TPS80031_SIM,
 495         TPS80031_MMC,
 496         TPS80031_GPADC_START,
 497         TPS80031_DVSI2C_SCL,
 498         TPS80031_DVSI2C_SDA,
 499         TPS80031_CTLI2C_SCL,
 500         TPS80031_CTLI2C_SDA,
 501 };
 502
 503 enum tps80031_pupd_settings {
 504         TPS80031_PUPD_NORMAL,
 505         TPS80031_PUPD_PULLDOWN,
 506         TPS80031_PUPD_PULLUP,
 507 };
 508
 509 struct tps80031 {
 510         struct device           *dev;
 511         unsigned long           chip_info;
 512         int                     es_version;
 513         struct i2c_client       *clients[TPS80031_NUM_SLAVES];
 514         struct regmap           *regmap[TPS80031_NUM_SLAVES];
 515         struct regmap_irq_chip_data *irq_data;
 516 };
 517
 518 struct tps80031_pupd_init_data {
 519         int input_pin;
 520         int setting;
 521 };
 522
 523 /*
 524  * struct tps80031_regulator_platform_data - tps80031 regulator platform data.
 525  *
 526  * @reg_init_data: The regulator init data.
 527  * @ext_ctrl_flag: External control flag for sleep/power request control.
 528  * @config_flags: Configuration flag to configure the rails.
 529  *                It should be ORed of config enums.
 530  */
 531
 532 struct tps80031_regulator_platform_data {
 533         struct regulator_init_data *reg_init_data;
 534         unsigned int ext_ctrl_flag;
 535         unsigned int config_flags;
 536 };
 537
 538 struct tps80031_platform_data {
 539         int irq_base;
 540         bool use_power_off;
 541         struct tps80031_pupd_init_data *pupd_init_data;
 542         int pupd_init_data_size;
 543         struct tps80031_regulator_platform_data
 544                         *regulator_pdata[TPS80031_REGULATOR_MAX];
 545 };
 546
 547 static inline int tps80031_write(struct device *dev, int sid,
 548                 int reg, uint8_t val)
 549 {
 550         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 551
 552         return regmap_write(tps80031->regmap[sid], reg, val);
 553 }
 554
 555 static inline int tps80031_writes(struct device *dev, int sid, int reg,
 556                 int len, uint8_t *val)
 557 {
 558         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 559
 560         return regmap_bulk_write(tps80031->regmap[sid], reg, val, len);
 561 }
 562
 563 static inline int tps80031_read(struct device *dev, int sid,
 564                 int reg, uint8_t *val)
 565 {
 566         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 567         unsigned int ival;
 568         int ret;
 569
 570         ret = regmap_read(tps80031->regmap[sid], reg, &ival);
 571         if (ret < 0) {
 572                 dev_err(dev, "failed reading from reg 0x%02x\n", reg);
 573                 return ret;
 574         }
 575
 576         *val = ival;
 577         return ret;
 578 }
 579
 580 static inline int tps80031_reads(struct device *dev, int sid,
 581                 int reg, int len, uint8_t *val)
 582 {
 583         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 584
 585         return regmap_bulk_read(tps80031->regmap[sid], reg, val, len);
 586 }
 587
 588 static inline int tps80031_set_bits(struct device *dev, int sid,
 589                 int reg, uint8_t bit_mask)
 590 {
 591         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 592
 593         return regmap_update_bits(tps80031->regmap[sid], reg,
 594                                 bit_mask, bit_mask);
 595 }
 596
 597 static inline int tps80031_clr_bits(struct device *dev, int sid,
 598                 int reg, uint8_t bit_mask)
 599 {
 600         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 601
 602         return regmap_update_bits(tps80031->regmap[sid], reg, bit_mask, 0);
 603 }
 604
 605 static inline int tps80031_update(struct device *dev, int sid,
 606                 int reg, uint8_t val, uint8_t mask)
 607 {
 608         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 609
 610         return regmap_update_bits(tps80031->regmap[sid], reg, mask, val);
 611 }
 612
 613 static inline unsigned long tps80031_get_chip_info(struct device *dev)
 614 {
 615         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 616
 617         return tps80031->chip_info;
 618 }
 619
 620 static inline int tps80031_get_pmu_version(struct device *dev)
 621 {
 622         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 623
 624         return tps80031->es_version;
 625 }
 626
 627 static inline int tps80031_irq_get_virq(struct device *dev, int irq)
 628 {
 629         struct tps80031 *tps80031 = dev_get_drvdata(dev);
 630
 631         return regmap_irq_get_virq(tps80031->irq_data, irq);
 632 }
 633
 634 extern int tps80031_ext_power_req_config(struct device *dev,
 635                 unsigned long ext_ctrl_flag, int preq_bit,
 636                 int state_reg_add, int trans_reg_add);
 637 #endif /*__LINUX_MFD_TPS80031_H */