Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / include / dt-bindings / clock / r8a7791-clock.h
1 /*
2  * Copyright 2013 Ideas On Board SPRL
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  */
9
10 #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11 #define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13 /* CPG */
14 #define R8A7791_CLK_MAIN                0
15 #define R8A7791_CLK_PLL0                1
16 #define R8A7791_CLK_PLL1                2
17 #define R8A7791_CLK_PLL3                3
18 #define R8A7791_CLK_LB                  4
19 #define R8A7791_CLK_QSPI                5
20 #define R8A7791_CLK_SDH                 6
21 #define R8A7791_CLK_SD0                 7
22 #define R8A7791_CLK_Z                   8
23 #define R8A7791_CLK_RCAN                9
24 #define R8A7791_CLK_ADSP                10
25
26 /* MSTP0 */
27 #define R8A7791_CLK_MSIOF0              0
28
29 /* MSTP1 */
30 #define R8A7791_CLK_VCP0                1
31 #define R8A7791_CLK_VPC0                3
32 #define R8A7791_CLK_JPU                 6
33 #define R8A7791_CLK_SSP1                9
34 #define R8A7791_CLK_TMU1                11
35 #define R8A7791_CLK_3DG                 12
36 #define R8A7791_CLK_2DDMAC              15
37 #define R8A7791_CLK_FDP1_1              18
38 #define R8A7791_CLK_FDP1_0              19
39 #define R8A7791_CLK_TMU3                21
40 #define R8A7791_CLK_TMU2                22
41 #define R8A7791_CLK_CMT0                24
42 #define R8A7791_CLK_TMU0                25
43 #define R8A7791_CLK_VSP1_DU1            27
44 #define R8A7791_CLK_VSP1_DU0            28
45 #define R8A7791_CLK_VSP1_S              31
46
47 /* MSTP2 */
48 #define R8A7791_CLK_SCIFA2              2
49 #define R8A7791_CLK_SCIFA1              3
50 #define R8A7791_CLK_SCIFA0              4
51 #define R8A7791_CLK_MSIOF2              5
52 #define R8A7791_CLK_SCIFB0              6
53 #define R8A7791_CLK_SCIFB1              7
54 #define R8A7791_CLK_MSIOF1              8
55 #define R8A7791_CLK_SCIFB2              16
56 #define R8A7791_CLK_SYS_DMAC1           18
57 #define R8A7791_CLK_SYS_DMAC0           19
58
59 /* MSTP3 */
60 #define R8A7791_CLK_TPU0                4
61 #define R8A7791_CLK_SDHI2               11
62 #define R8A7791_CLK_SDHI1               12
63 #define R8A7791_CLK_SDHI0               14
64 #define R8A7791_CLK_MMCIF0              15
65 #define R8A7791_CLK_IIC0                18
66 #define R8A7791_CLK_PCIEC               19
67 #define R8A7791_CLK_IIC1                23
68 #define R8A7791_CLK_SSUSB               28
69 #define R8A7791_CLK_CMT1                29
70 #define R8A7791_CLK_USBDMAC0            30
71 #define R8A7791_CLK_USBDMAC1            31
72
73 /* MSTP5 */
74 #define R8A7791_CLK_AUDIO_DMAC1         1
75 #define R8A7791_CLK_AUDIO_DMAC0         2
76 #define R8A7791_CLK_ADSP_MOD            6
77 #define R8A7791_CLK_THERMAL             22
78 #define R8A7791_CLK_PWM                 23
79
80 /* MSTP7 */
81 #define R8A7791_CLK_EHCI                3
82 #define R8A7791_CLK_HSUSB               4
83 #define R8A7791_CLK_HSCIF2              13
84 #define R8A7791_CLK_SCIF5               14
85 #define R8A7791_CLK_SCIF4               15
86 #define R8A7791_CLK_HSCIF1              16
87 #define R8A7791_CLK_HSCIF0              17
88 #define R8A7791_CLK_SCIF3               18
89 #define R8A7791_CLK_SCIF2               19
90 #define R8A7791_CLK_SCIF1               20
91 #define R8A7791_CLK_SCIF0               21
92 #define R8A7791_CLK_DU1                 23
93 #define R8A7791_CLK_DU0                 24
94 #define R8A7791_CLK_LVDS0               26
95
96 /* MSTP8 */
97 #define R8A7791_CLK_IPMMU_SGX           0
98 #define R8A7791_CLK_MLB                 2
99 #define R8A7791_CLK_VIN2                9
100 #define R8A7791_CLK_VIN1                10
101 #define R8A7791_CLK_VIN0                11
102 #define R8A7791_CLK_ETHER               13
103 #define R8A7791_CLK_SATA1               14
104 #define R8A7791_CLK_SATA0               15
105
106 /* MSTP9 */
107 #define R8A7791_CLK_GPIO7               4
108 #define R8A7791_CLK_GPIO6               5
109 #define R8A7791_CLK_GPIO5               7
110 #define R8A7791_CLK_GPIO4               8
111 #define R8A7791_CLK_GPIO3               9
112 #define R8A7791_CLK_GPIO2               10
113 #define R8A7791_CLK_GPIO1               11
114 #define R8A7791_CLK_GPIO0               12
115 #define R8A7791_CLK_RCAN1               15
116 #define R8A7791_CLK_RCAN0               16
117 #define R8A7791_CLK_QSPI_MOD            17
118 #define R8A7791_CLK_I2C5                25
119 #define R8A7791_CLK_IICDVFS             26
120 #define R8A7791_CLK_I2C4                27
121 #define R8A7791_CLK_I2C3                28
122 #define R8A7791_CLK_I2C2                29
123 #define R8A7791_CLK_I2C1                30
124 #define R8A7791_CLK_I2C0                31
125
126 /* MSTP10 */
127 #define R8A7791_CLK_SSI_ALL             5
128 #define R8A7791_CLK_SSI9                6
129 #define R8A7791_CLK_SSI8                7
130 #define R8A7791_CLK_SSI7                8
131 #define R8A7791_CLK_SSI6                9
132 #define R8A7791_CLK_SSI5                10
133 #define R8A7791_CLK_SSI4                11
134 #define R8A7791_CLK_SSI3                12
135 #define R8A7791_CLK_SSI2                13
136 #define R8A7791_CLK_SSI1                14
137 #define R8A7791_CLK_SSI0                15
138 #define R8A7791_CLK_SCU_ALL             17
139 #define R8A7791_CLK_SCU_DVC1            18
140 #define R8A7791_CLK_SCU_DVC0            19
141 #define R8A7791_CLK_SCU_SRC9            22
142 #define R8A7791_CLK_SCU_SRC8            23
143 #define R8A7791_CLK_SCU_SRC7            24
144 #define R8A7791_CLK_SCU_SRC6            25
145 #define R8A7791_CLK_SCU_SRC5            26
146 #define R8A7791_CLK_SCU_SRC4            27
147 #define R8A7791_CLK_SCU_SRC3            28
148 #define R8A7791_CLK_SCU_SRC2            29
149 #define R8A7791_CLK_SCU_SRC1            30
150 #define R8A7791_CLK_SCU_SRC0            31
151
152 /* MSTP11 */
153 #define R8A7791_CLK_SCIFA3              6
154 #define R8A7791_CLK_SCIFA4              7
155 #define R8A7791_CLK_SCIFA5              8
156
157 #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */