kernel/drivers/video/fbdev/omap2/dss/hdmi5.c

   1 /*
   2  * HDMI driver for OMAP5
   3  *
   4  * Copyright (C) 2014 Texas Instruments Incorporated
   5  *
   6  * Authors:
   7  *      Yong Zhi
   8  *      Mythri pk
   9  *      Archit Taneja <archit@ti.com>
  10  *      Tomi Valkeinen <tomi.valkeinen@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms of the GNU General Public License version 2 as published by
  14  * the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along with
  22  * this program.  If not, see <http://www.gnu.org/licenses/>.
  23  */
  24
  25 #define DSS_SUBSYS_NAME "HDMI"
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/err.h>
  30 #include <linux/io.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/mutex.h>
  33 #include <linux/delay.h>
  34 #include <linux/string.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/pm_runtime.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39 #include <linux/regulator/consumer.h>
  40 #include <video/omapdss.h>
  41 #include <sound/omap-hdmi-audio.h>
  42
  43 #include "hdmi5_core.h"
  44 #include "dss.h"
  45 #include "dss_features.h"
  46
  47 static struct omap_hdmi hdmi;
  48
  49 static int hdmi_runtime_get(void)
  50 {
  51         int r;
  52
  53         DSSDBG("hdmi_runtime_get\n");
  54
  55         r = pm_runtime_get_sync(&hdmi.pdev->dev);
  56         WARN_ON(r < 0);
  57         if (r < 0)
  58                 return r;
  59
  60         return 0;
  61 }
  62
  63 static void hdmi_runtime_put(void)
  64 {
  65         int r;
  66
  67         DSSDBG("hdmi_runtime_put\n");
  68
  69         r = pm_runtime_put_sync(&hdmi.pdev->dev);
  70         WARN_ON(r < 0 && r != -ENOSYS);
  71 }
  72
  73 static irqreturn_t hdmi_irq_handler(int irq, void *data)
  74 {
  75         struct hdmi_wp_data *wp = data;
  76         u32 irqstatus;
  77
  78         irqstatus = hdmi_wp_get_irqstatus(wp);
  79         hdmi_wp_set_irqstatus(wp, irqstatus);
  80
  81         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  82                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  83                 u32 v;
  84                 /*
  85                  * If we get both connect and disconnect interrupts at the same
  86                  * time, turn off the PHY, clear interrupts, and restart, which
  87                  * raises connect interrupt if a cable is connected, or nothing
  88                  * if cable is not connected.
  89                  */
  90
  91                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  92
  93                 /*
  94                  * We always get bogus CONNECT & DISCONNECT interrupts when
  95                  * setting the PHY to LDOON. To ignore those, we force the RXDET
  96                  * line to 0 until the PHY power state has been changed.
  97                  */
  98                 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
  99                 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
 100                 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
 101                 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
 102
 103                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
 104                                 HDMI_IRQ_LINK_DISCONNECT);
 105
 106                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 107
 108                 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
 109
 110         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
 111                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
 112         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
 113                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 114         }
 115
 116         return IRQ_HANDLED;
 117 }
 118
 119 static int hdmi_init_regulator(void)
 120 {
 121         int r;
 122         struct regulator *reg;
 123
 124         if (hdmi.vdda_reg != NULL)
 125                 return 0;
 126
 127         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
 128         if (IS_ERR(reg)) {
 129                 DSSERR("can't get VDDA regulator\n");
 130                 return PTR_ERR(reg);
 131         }
 132
 133         if (regulator_can_change_voltage(reg)) {
 134                 r = regulator_set_voltage(reg, 1800000, 1800000);
 135                 if (r) {
 136                         devm_regulator_put(reg);
 137                         DSSWARN("can't set the regulator voltage\n");
 138                         return r;
 139                 }
 140         }
 141
 142         hdmi.vdda_reg = reg;
 143
 144         return 0;
 145 }
 146
 147 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
 148 {
 149         int r;
 150
 151         r = regulator_enable(hdmi.vdda_reg);
 152         if (r)
 153                 return r;
 154
 155         r = hdmi_runtime_get();
 156         if (r)
 157                 goto err_runtime_get;
 158
 159         /* Make selection of HDMI in DSS */
 160         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
 161
 162         hdmi.core_enabled = true;
 163
 164         return 0;
 165
 166 err_runtime_get:
 167         regulator_disable(hdmi.vdda_reg);
 168
 169         return r;
 170 }
 171
 172 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
 173 {
 174         hdmi.core_enabled = false;
 175
 176         hdmi_runtime_put();
 177         regulator_disable(hdmi.vdda_reg);
 178 }
 179
 180 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 181 {
 182         int r;
 183         struct omap_video_timings *p;
 184         struct omap_overlay_manager *mgr = hdmi.output.manager;
 185         struct dss_pll_clock_info hdmi_cinfo = { 0 };
 186
 187         r = hdmi_power_on_core(dssdev);
 188         if (r)
 189                 return r;
 190
 191         p = &hdmi.cfg.timings;
 192
 193         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
 194
 195         hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
 196
 197         /* disable and clear irqs */
 198         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 199         hdmi_wp_set_irqstatus(&hdmi.wp,
 200                         hdmi_wp_get_irqstatus(&hdmi.wp));
 201
 202         r = dss_pll_enable(&hdmi.pll.pll);
 203         if (r) {
 204                 DSSERR("Failed to enable PLL\n");
 205                 goto err_pll_enable;
 206         }
 207
 208         r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
 209         if (r) {
 210                 DSSERR("Failed to configure PLL\n");
 211                 goto err_pll_cfg;
 212         }
 213
 214         r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
 215                 hdmi_cinfo.clkout[0]);
 216         if (r) {
 217                 DSSDBG("Failed to start PHY\n");
 218                 goto err_phy_cfg;
 219         }
 220
 221         r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
 222         if (r)
 223                 goto err_phy_pwr;
 224
 225         hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
 226
 227         /* bypass TV gamma table */
 228         dispc_enable_gamma_table(0);
 229
 230         /* tv size */
 231         dss_mgr_set_timings(mgr, p);
 232
 233         r = hdmi_wp_video_start(&hdmi.wp);
 234         if (r)
 235                 goto err_vid_enable;
 236
 237         r = dss_mgr_enable(mgr);
 238         if (r)
 239                 goto err_mgr_enable;
 240
 241         hdmi_wp_set_irqenable(&hdmi.wp,
 242                         HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
 243
 244         return 0;
 245
 246 err_mgr_enable:
 247         hdmi_wp_video_stop(&hdmi.wp);
 248 err_vid_enable:
 249         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 250 err_phy_pwr:
 251 err_phy_cfg:
 252 err_pll_cfg:
 253         dss_pll_disable(&hdmi.pll.pll);
 254 err_pll_enable:
 255         hdmi_power_off_core(dssdev);
 256         return -EIO;
 257 }
 258
 259 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 260 {
 261         struct omap_overlay_manager *mgr = hdmi.output.manager;
 262
 263         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 264
 265         dss_mgr_disable(mgr);
 266
 267         hdmi_wp_video_stop(&hdmi.wp);
 268
 269         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 270
 271         dss_pll_disable(&hdmi.pll.pll);
 272
 273         hdmi_power_off_core(dssdev);
 274 }
 275
 276 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 277                                         struct omap_video_timings *timings)
 278 {
 279         struct omap_dss_device *out = &hdmi.output;
 280
 281         /* TODO: proper interlace support */
 282         if (timings->interlace)
 283                 return -EINVAL;
 284
 285         if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
 286                 return -EINVAL;
 287
 288         return 0;
 289 }
 290
 291 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 292                 struct omap_video_timings *timings)
 293 {
 294         mutex_lock(&hdmi.lock);
 295
 296         hdmi.cfg.timings = *timings;
 297
 298         dispc_set_tv_pclk(timings->pixelclock);
 299
 300         mutex_unlock(&hdmi.lock);
 301 }
 302
 303 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
 304                 struct omap_video_timings *timings)
 305 {
 306         *timings = hdmi.cfg.timings;
 307 }
 308
 309 static void hdmi_dump_regs(struct seq_file *s)
 310 {
 311         mutex_lock(&hdmi.lock);
 312
 313         if (hdmi_runtime_get()) {
 314                 mutex_unlock(&hdmi.lock);
 315                 return;
 316         }
 317
 318         hdmi_wp_dump(&hdmi.wp, s);
 319         hdmi_pll_dump(&hdmi.pll, s);
 320         hdmi_phy_dump(&hdmi.phy, s);
 321         hdmi5_core_dump(&hdmi.core, s);
 322
 323         hdmi_runtime_put();
 324         mutex_unlock(&hdmi.lock);
 325 }
 326
 327 static int read_edid(u8 *buf, int len)
 328 {
 329         int r;
 330         int idlemode;
 331
 332         mutex_lock(&hdmi.lock);
 333
 334         r = hdmi_runtime_get();
 335         BUG_ON(r);
 336
 337         idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 338         /* No-idle mode */
 339         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 340
 341         r = hdmi5_read_edid(&hdmi.core,  buf, len);
 342
 343         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
 344
 345         hdmi_runtime_put();
 346         mutex_unlock(&hdmi.lock);
 347
 348         return r;
 349 }
 350
 351 static int hdmi_display_enable(struct omap_dss_device *dssdev)
 352 {
 353         struct omap_dss_device *out = &hdmi.output;
 354         int r = 0;
 355
 356         DSSDBG("ENTER hdmi_display_enable\n");
 357
 358         mutex_lock(&hdmi.lock);
 359
 360         if (out == NULL || out->manager == NULL) {
 361                 DSSERR("failed to enable display: no output/manager\n");
 362                 r = -ENODEV;
 363                 goto err0;
 364         }
 365
 366         r = hdmi_power_on_full(dssdev);
 367         if (r) {
 368                 DSSERR("failed to power on device\n");
 369                 goto err0;
 370         }
 371
 372         hdmi.display_enabled = true;
 373
 374         mutex_unlock(&hdmi.lock);
 375         return 0;
 376
 377 err0:
 378         mutex_unlock(&hdmi.lock);
 379         return r;
 380 }
 381
 382 static void hdmi_display_disable(struct omap_dss_device *dssdev)
 383 {
 384         DSSDBG("Enter hdmi_display_disable\n");
 385
 386         mutex_lock(&hdmi.lock);
 387
 388         if (hdmi.audio_pdev && hdmi.audio_abort_cb)
 389                 hdmi.audio_abort_cb(&hdmi.audio_pdev->dev);
 390
 391         hdmi_power_off_full(dssdev);
 392
 393         hdmi.display_enabled = false;
 394
 395         mutex_unlock(&hdmi.lock);
 396 }
 397
 398 static int hdmi_core_enable(struct omap_dss_device *dssdev)
 399 {
 400         int r = 0;
 401
 402         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
 403
 404         mutex_lock(&hdmi.lock);
 405
 406         r = hdmi_power_on_core(dssdev);
 407         if (r) {
 408                 DSSERR("failed to power on device\n");
 409                 goto err0;
 410         }
 411
 412         mutex_unlock(&hdmi.lock);
 413         return 0;
 414
 415 err0:
 416         mutex_unlock(&hdmi.lock);
 417         return r;
 418 }
 419
 420 static void hdmi_core_disable(struct omap_dss_device *dssdev)
 421 {
 422         DSSDBG("Enter omapdss_hdmi_core_disable\n");
 423
 424         mutex_lock(&hdmi.lock);
 425
 426         hdmi_power_off_core(dssdev);
 427
 428         mutex_unlock(&hdmi.lock);
 429 }
 430
 431 static int hdmi_connect(struct omap_dss_device *dssdev,
 432                 struct omap_dss_device *dst)
 433 {
 434         struct omap_overlay_manager *mgr;
 435         int r;
 436
 437         r = hdmi_init_regulator();
 438         if (r)
 439                 return r;
 440
 441         mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
 442         if (!mgr)
 443                 return -ENODEV;
 444
 445         r = dss_mgr_connect(mgr, dssdev);
 446         if (r)
 447                 return r;
 448
 449         r = omapdss_output_set_device(dssdev, dst);
 450         if (r) {
 451                 DSSERR("failed to connect output to new device: %s\n",
 452                                 dst->name);
 453                 dss_mgr_disconnect(mgr, dssdev);
 454                 return r;
 455         }
 456
 457         return 0;
 458 }
 459
 460 static void hdmi_disconnect(struct omap_dss_device *dssdev,
 461                 struct omap_dss_device *dst)
 462 {
 463         WARN_ON(dst != dssdev->dst);
 464
 465         if (dst != dssdev->dst)
 466                 return;
 467
 468         omapdss_output_unset_device(dssdev);
 469
 470         if (dssdev->manager)
 471                 dss_mgr_disconnect(dssdev->manager, dssdev);
 472 }
 473
 474 static int hdmi_read_edid(struct omap_dss_device *dssdev,
 475                 u8 *edid, int len)
 476 {
 477         bool need_enable;
 478         int r;
 479
 480         need_enable = hdmi.core_enabled == false;
 481
 482         if (need_enable) {
 483                 r = hdmi_core_enable(dssdev);
 484                 if (r)
 485                         return r;
 486         }
 487
 488         r = read_edid(edid, len);
 489
 490         if (need_enable)
 491                 hdmi_core_disable(dssdev);
 492
 493         return r;
 494 }
 495
 496 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
 497                 const struct hdmi_avi_infoframe *avi)
 498 {
 499         hdmi.cfg.infoframe = *avi;
 500         return 0;
 501 }
 502
 503 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
 504                 bool hdmi_mode)
 505 {
 506         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
 507         return 0;
 508 }
 509
 510 static const struct omapdss_hdmi_ops hdmi_ops = {
 511         .connect                = hdmi_connect,
 512         .disconnect             = hdmi_disconnect,
 513
 514         .enable                 = hdmi_display_enable,
 515         .disable                = hdmi_display_disable,
 516
 517         .check_timings          = hdmi_display_check_timing,
 518         .set_timings            = hdmi_display_set_timing,
 519         .get_timings            = hdmi_display_get_timings,
 520
 521         .read_edid              = hdmi_read_edid,
 522         .set_infoframe          = hdmi_set_infoframe,
 523         .set_hdmi_mode          = hdmi_set_hdmi_mode,
 524 };
 525
 526 static void hdmi_init_output(struct platform_device *pdev)
 527 {
 528         struct omap_dss_device *out = &hdmi.output;
 529
 530         out->dev = &pdev->dev;
 531         out->id = OMAP_DSS_OUTPUT_HDMI;
 532         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
 533         out->name = "hdmi.0";
 534         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
 535         out->ops.hdmi = &hdmi_ops;
 536         out->owner = THIS_MODULE;
 537
 538         omapdss_register_output(out);
 539 }
 540
 541 static void hdmi_uninit_output(struct platform_device *pdev)
 542 {
 543         struct omap_dss_device *out = &hdmi.output;
 544
 545         omapdss_unregister_output(out);
 546 }
 547
 548 static int hdmi_probe_of(struct platform_device *pdev)
 549 {
 550         struct device_node *node = pdev->dev.of_node;
 551         struct device_node *ep;
 552         int r;
 553
 554         ep = omapdss_of_get_first_endpoint(node);
 555         if (!ep)
 556                 return 0;
 557
 558         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
 559         if (r)
 560                 goto err;
 561
 562         of_node_put(ep);
 563         return 0;
 564
 565 err:
 566         of_node_put(ep);
 567         return r;
 568 }
 569
 570 /* Audio callbacks */
 571 static int hdmi_audio_startup(struct device *dev,
 572                               void (*abort_cb)(struct device *dev))
 573 {
 574         struct omap_hdmi *hd = dev_get_drvdata(dev);
 575         int ret = 0;
 576
 577         mutex_lock(&hd->lock);
 578
 579         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 580                 ret = -EPERM;
 581                 goto out;
 582         }
 583
 584         hd->audio_abort_cb = abort_cb;
 585
 586 out:
 587         mutex_unlock(&hd->lock);
 588
 589         return ret;
 590 }
 591
 592 static int hdmi_audio_shutdown(struct device *dev)
 593 {
 594         struct omap_hdmi *hd = dev_get_drvdata(dev);
 595
 596         mutex_lock(&hd->lock);
 597         hd->audio_abort_cb = NULL;
 598         mutex_unlock(&hd->lock);
 599
 600         return 0;
 601 }
 602
 603 static int hdmi_audio_start(struct device *dev)
 604 {
 605         struct omap_hdmi *hd = dev_get_drvdata(dev);
 606
 607         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 608         WARN_ON(!hd->display_enabled);
 609
 610         /* No-idle while playing audio, store the old value */
 611         hd->wp_idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 612         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 613
 614         hdmi_wp_audio_enable(&hd->wp, true);
 615         hdmi_wp_audio_core_req_enable(&hd->wp, true);
 616
 617         return 0;
 618 }
 619
 620 static void hdmi_audio_stop(struct device *dev)
 621 {
 622         struct omap_hdmi *hd = dev_get_drvdata(dev);
 623
 624         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 625         WARN_ON(!hd->display_enabled);
 626
 627         hdmi_wp_audio_core_req_enable(&hd->wp, false);
 628         hdmi_wp_audio_enable(&hd->wp, false);
 629
 630         /* Playback stopped, restore original idlemode */
 631         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
 632 }
 633
 634 static int hdmi_audio_config(struct device *dev,
 635                              struct omap_dss_audio *dss_audio)
 636 {
 637         struct omap_hdmi *hd = dev_get_drvdata(dev);
 638         int ret;
 639
 640         mutex_lock(&hd->lock);
 641
 642         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 643                 ret = -EPERM;
 644                 goto out;
 645         }
 646
 647         ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
 648                                  hd->cfg.timings.pixelclock);
 649
 650 out:
 651         mutex_unlock(&hd->lock);
 652
 653         return ret;
 654 }
 655
 656 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
 657         .audio_startup = hdmi_audio_startup,
 658         .audio_shutdown = hdmi_audio_shutdown,
 659         .audio_start = hdmi_audio_start,
 660         .audio_stop = hdmi_audio_stop,
 661         .audio_config = hdmi_audio_config,
 662 };
 663
 664 static int hdmi_audio_register(struct device *dev)
 665 {
 666         struct omap_hdmi_audio_pdata pdata = {
 667                 .dev = dev,
 668                 .dss_version = omapdss_get_version(),
 669                 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
 670                 .ops = &hdmi_audio_ops,
 671         };
 672
 673         hdmi.audio_pdev = platform_device_register_data(
 674                 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
 675                 &pdata, sizeof(pdata));
 676
 677         if (IS_ERR(hdmi.audio_pdev))
 678                 return PTR_ERR(hdmi.audio_pdev);
 679
 680         return 0;
 681 }
 682
 683 /* HDMI HW IP initialisation */
 684 static int omapdss_hdmihw_probe(struct platform_device *pdev)
 685 {
 686         int r;
 687         int irq;
 688
 689         hdmi.pdev = pdev;
 690         dev_set_drvdata(&pdev->dev, &hdmi);
 691
 692         mutex_init(&hdmi.lock);
 693
 694         if (pdev->dev.of_node) {
 695                 r = hdmi_probe_of(pdev);
 696                 if (r)
 697                         return r;
 698         }
 699
 700         r = hdmi_wp_init(pdev, &hdmi.wp);
 701         if (r)
 702                 return r;
 703
 704         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
 705         if (r)
 706                 return r;
 707
 708         r = hdmi_phy_init(pdev, &hdmi.phy);
 709         if (r)
 710                 goto err;
 711
 712         r = hdmi5_core_init(pdev, &hdmi.core);
 713         if (r)
 714                 goto err;
 715
 716         irq = platform_get_irq(pdev, 0);
 717         if (irq < 0) {
 718                 DSSERR("platform_get_irq failed\n");
 719                 r = -ENODEV;
 720                 goto err;
 721         }
 722
 723         r = devm_request_threaded_irq(&pdev->dev, irq,
 724                         NULL, hdmi_irq_handler,
 725                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
 726         if (r) {
 727                 DSSERR("HDMI IRQ request failed\n");
 728                 goto err;
 729         }
 730
 731         pm_runtime_enable(&pdev->dev);
 732
 733         hdmi_init_output(pdev);
 734
 735         r = hdmi_audio_register(&pdev->dev);
 736         if (r) {
 737                 DSSERR("Registering HDMI audio failed %d\n", r);
 738                 hdmi_uninit_output(pdev);
 739                 pm_runtime_disable(&pdev->dev);
 740                 return r;
 741         }
 742
 743         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
 744
 745         return 0;
 746 err:
 747         hdmi_pll_uninit(&hdmi.pll);
 748         return r;
 749 }
 750
 751 static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
 752 {
 753         if (hdmi.audio_pdev)
 754                 platform_device_unregister(hdmi.audio_pdev);
 755
 756         hdmi_uninit_output(pdev);
 757
 758         hdmi_pll_uninit(&hdmi.pll);
 759
 760         pm_runtime_disable(&pdev->dev);
 761
 762         return 0;
 763 }
 764
 765 static int hdmi_runtime_suspend(struct device *dev)
 766 {
 767         dispc_runtime_put();
 768
 769         return 0;
 770 }
 771
 772 static int hdmi_runtime_resume(struct device *dev)
 773 {
 774         int r;
 775
 776         r = dispc_runtime_get();
 777         if (r < 0)
 778                 return r;
 779
 780         return 0;
 781 }
 782
 783 static const struct dev_pm_ops hdmi_pm_ops = {
 784         .runtime_suspend = hdmi_runtime_suspend,
 785         .runtime_resume = hdmi_runtime_resume,
 786 };
 787
 788 static const struct of_device_id hdmi_of_match[] = {
 789         { .compatible = "ti,omap5-hdmi", },
 790         { .compatible = "ti,dra7-hdmi", },
 791         {},
 792 };
 793
 794 static struct platform_driver omapdss_hdmihw_driver = {
 795         .probe          = omapdss_hdmihw_probe,
 796         .remove         = __exit_p(omapdss_hdmihw_remove),
 797         .driver         = {
 798                 .name   = "omapdss_hdmi5",
 799                 .pm     = &hdmi_pm_ops,
 800                 .of_match_table = hdmi_of_match,
 801                 .suppress_bind_attrs = true,
 802         },
 803 };
 804
 805 int __init hdmi5_init_platform_driver(void)
 806 {
 807         return platform_driver_register(&omapdss_hdmihw_driver);
 808 }
 809
 810 void __exit hdmi5_uninit_platform_driver(void)
 811 {
 812         platform_driver_unregister(&omapdss_hdmihw_driver);
 813 }