kernel/drivers/tty/serial/uartlite.c

   1 /*
   2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
   3  *
   4  * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
   5  * Copyright (C) 2007 Secret Lab Technologies Ltd.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/module.h>
  14 #include <linux/console.h>
  15 #include <linux/serial.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/tty.h>
  18 #include <linux/tty_flip.h>
  19 #include <linux/delay.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/of.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_device.h>
  26 #include <linux/of_platform.h>
  27
  28 #define ULITE_NAME              "ttyUL"
  29 #define ULITE_MAJOR             204
  30 #define ULITE_MINOR             187
  31 #define ULITE_NR_UARTS          4
  32
  33 /* ---------------------------------------------------------------------
  34  * Register definitions
  35  *
  36  * For register details see datasheet:
  37  * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
  38  */
  39
  40 #define ULITE_RX                0x00
  41 #define ULITE_TX                0x04
  42 #define ULITE_STATUS            0x08
  43 #define ULITE_CONTROL           0x0c
  44
  45 #define ULITE_REGION            16
  46
  47 #define ULITE_STATUS_RXVALID    0x01
  48 #define ULITE_STATUS_RXFULL     0x02
  49 #define ULITE_STATUS_TXEMPTY    0x04
  50 #define ULITE_STATUS_TXFULL     0x08
  51 #define ULITE_STATUS_IE         0x10
  52 #define ULITE_STATUS_OVERRUN    0x20
  53 #define ULITE_STATUS_FRAME      0x40
  54 #define ULITE_STATUS_PARITY     0x80
  55
  56 #define ULITE_CONTROL_RST_TX    0x01
  57 #define ULITE_CONTROL_RST_RX    0x02
  58 #define ULITE_CONTROL_IE        0x10
  59
  60 struct uartlite_reg_ops {
  61         u32 (*in)(void __iomem *addr);
  62         void (*out)(u32 val, void __iomem *addr);
  63 };
  64
  65 static u32 uartlite_inbe32(void __iomem *addr)
  66 {
  67         return ioread32be(addr);
  68 }
  69
  70 static void uartlite_outbe32(u32 val, void __iomem *addr)
  71 {
  72         iowrite32be(val, addr);
  73 }
  74
  75 static struct uartlite_reg_ops uartlite_be = {
  76         .in = uartlite_inbe32,
  77         .out = uartlite_outbe32,
  78 };
  79
  80 static u32 uartlite_inle32(void __iomem *addr)
  81 {
  82         return ioread32(addr);
  83 }
  84
  85 static void uartlite_outle32(u32 val, void __iomem *addr)
  86 {
  87         iowrite32(val, addr);
  88 }
  89
  90 static struct uartlite_reg_ops uartlite_le = {
  91         .in = uartlite_inle32,
  92         .out = uartlite_outle32,
  93 };
  94
  95 static inline u32 uart_in32(u32 offset, struct uart_port *port)
  96 {
  97         struct uartlite_reg_ops *reg_ops = port->private_data;
  98
  99         return reg_ops->in(port->membase + offset);
 100 }
 101
 102 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
 103 {
 104         struct uartlite_reg_ops *reg_ops = port->private_data;
 105
 106         reg_ops->out(val, port->membase + offset);
 107 }
 108
 109 static struct uart_port ulite_ports[ULITE_NR_UARTS];
 110
 111 /* ---------------------------------------------------------------------
 112  * Core UART driver operations
 113  */
 114
 115 static int ulite_receive(struct uart_port *port, int stat)
 116 {
 117         struct tty_port *tport = &port->state->port;
 118         unsigned char ch = 0;
 119         char flag = TTY_NORMAL;
 120
 121         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 122                      | ULITE_STATUS_FRAME)) == 0)
 123                 return 0;
 124
 125         /* stats */
 126         if (stat & ULITE_STATUS_RXVALID) {
 127                 port->icount.rx++;
 128                 ch = uart_in32(ULITE_RX, port);
 129
 130                 if (stat & ULITE_STATUS_PARITY)
 131                         port->icount.parity++;
 132         }
 133
 134         if (stat & ULITE_STATUS_OVERRUN)
 135                 port->icount.overrun++;
 136
 137         if (stat & ULITE_STATUS_FRAME)
 138                 port->icount.frame++;
 139
 140
 141         /* drop byte with parity error if IGNPAR specificed */
 142         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
 143                 stat &= ~ULITE_STATUS_RXVALID;
 144
 145         stat &= port->read_status_mask;
 146
 147         if (stat & ULITE_STATUS_PARITY)
 148                 flag = TTY_PARITY;
 149
 150
 151         stat &= ~port->ignore_status_mask;
 152
 153         if (stat & ULITE_STATUS_RXVALID)
 154                 tty_insert_flip_char(tport, ch, flag);
 155
 156         if (stat & ULITE_STATUS_FRAME)
 157                 tty_insert_flip_char(tport, 0, TTY_FRAME);
 158
 159         if (stat & ULITE_STATUS_OVERRUN)
 160                 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
 161
 162         return 1;
 163 }
 164
 165 static int ulite_transmit(struct uart_port *port, int stat)
 166 {
 167         struct circ_buf *xmit  = &port->state->xmit;
 168
 169         if (stat & ULITE_STATUS_TXFULL)
 170                 return 0;
 171
 172         if (port->x_char) {
 173                 uart_out32(port->x_char, ULITE_TX, port);
 174                 port->x_char = 0;
 175                 port->icount.tx++;
 176                 return 1;
 177         }
 178
 179         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 180                 return 0;
 181
 182         uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
 183         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 184         port->icount.tx++;
 185
 186         /* wake up */
 187         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 188                 uart_write_wakeup(port);
 189
 190         return 1;
 191 }
 192
 193 static irqreturn_t ulite_isr(int irq, void *dev_id)
 194 {
 195         struct uart_port *port = dev_id;
 196         int busy, n = 0;
 197
 198         do {
 199                 int stat = uart_in32(ULITE_STATUS, port);
 200                 busy  = ulite_receive(port, stat);
 201                 busy |= ulite_transmit(port, stat);
 202                 n++;
 203         } while (busy);
 204
 205         /* work done? */
 206         if (n > 1) {
 207                 tty_flip_buffer_push(&port->state->port);
 208                 return IRQ_HANDLED;
 209         } else {
 210                 return IRQ_NONE;
 211         }
 212 }
 213
 214 static unsigned int ulite_tx_empty(struct uart_port *port)
 215 {
 216         unsigned long flags;
 217         unsigned int ret;
 218
 219         spin_lock_irqsave(&port->lock, flags);
 220         ret = uart_in32(ULITE_STATUS, port);
 221         spin_unlock_irqrestore(&port->lock, flags);
 222
 223         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
 224 }
 225
 226 static unsigned int ulite_get_mctrl(struct uart_port *port)
 227 {
 228         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 229 }
 230
 231 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
 232 {
 233         /* N/A */
 234 }
 235
 236 static void ulite_stop_tx(struct uart_port *port)
 237 {
 238         /* N/A */
 239 }
 240
 241 static void ulite_start_tx(struct uart_port *port)
 242 {
 243         ulite_transmit(port, uart_in32(ULITE_STATUS, port));
 244 }
 245
 246 static void ulite_stop_rx(struct uart_port *port)
 247 {
 248         /* don't forward any more data (like !CREAD) */
 249         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 250                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 251 }
 252
 253 static void ulite_break_ctl(struct uart_port *port, int ctl)
 254 {
 255         /* N/A */
 256 }
 257
 258 static int ulite_startup(struct uart_port *port)
 259 {
 260         int ret;
 261
 262         ret = request_irq(port->irq, ulite_isr, IRQF_SHARED, "uartlite", port);
 263         if (ret)
 264                 return ret;
 265
 266         uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
 267                 ULITE_CONTROL, port);
 268         uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 269
 270         return 0;
 271 }
 272
 273 static void ulite_shutdown(struct uart_port *port)
 274 {
 275         uart_out32(0, ULITE_CONTROL, port);
 276         uart_in32(ULITE_CONTROL, port); /* dummy */
 277         free_irq(port->irq, port);
 278 }
 279
 280 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
 281                               struct ktermios *old)
 282 {
 283         unsigned long flags;
 284         unsigned int baud;
 285
 286         spin_lock_irqsave(&port->lock, flags);
 287
 288         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
 289                 | ULITE_STATUS_TXFULL;
 290
 291         if (termios->c_iflag & INPCK)
 292                 port->read_status_mask |=
 293                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
 294
 295         port->ignore_status_mask = 0;
 296         if (termios->c_iflag & IGNPAR)
 297                 port->ignore_status_mask |= ULITE_STATUS_PARITY
 298                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 299
 300         /* ignore all characters if CREAD is not set */
 301         if ((termios->c_cflag & CREAD) == 0)
 302                 port->ignore_status_mask |=
 303                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
 304                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
 305
 306         /* update timeout */
 307         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
 308         uart_update_timeout(port, termios->c_cflag, baud);
 309
 310         spin_unlock_irqrestore(&port->lock, flags);
 311 }
 312
 313 static const char *ulite_type(struct uart_port *port)
 314 {
 315         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
 316 }
 317
 318 static void ulite_release_port(struct uart_port *port)
 319 {
 320         release_mem_region(port->mapbase, ULITE_REGION);
 321         iounmap(port->membase);
 322         port->membase = NULL;
 323 }
 324
 325 static int ulite_request_port(struct uart_port *port)
 326 {
 327         int ret;
 328
 329         pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
 330                  port, (unsigned long long) port->mapbase);
 331
 332         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
 333                 dev_err(port->dev, "Memory region busy\n");
 334                 return -EBUSY;
 335         }
 336
 337         port->membase = ioremap(port->mapbase, ULITE_REGION);
 338         if (!port->membase) {
 339                 dev_err(port->dev, "Unable to map registers\n");
 340                 release_mem_region(port->mapbase, ULITE_REGION);
 341                 return -EBUSY;
 342         }
 343
 344         port->private_data = &uartlite_be;
 345         ret = uart_in32(ULITE_CONTROL, port);
 346         uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
 347         ret = uart_in32(ULITE_STATUS, port);
 348         /* Endianess detection */
 349         if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
 350                 port->private_data = &uartlite_le;
 351
 352         return 0;
 353 }
 354
 355 static void ulite_config_port(struct uart_port *port, int flags)
 356 {
 357         if (!ulite_request_port(port))
 358                 port->type = PORT_UARTLITE;
 359 }
 360
 361 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 362 {
 363         /* we don't want the core code to modify any port params */
 364         return -EINVAL;
 365 }
 366
 367 #ifdef CONFIG_CONSOLE_POLL
 368 static int ulite_get_poll_char(struct uart_port *port)
 369 {
 370         if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
 371                 return NO_POLL_CHAR;
 372
 373         return uart_in32(ULITE_RX, port);
 374 }
 375
 376 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
 377 {
 378         while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
 379                 cpu_relax();
 380
 381         /* write char to device */
 382         uart_out32(ch, ULITE_TX, port);
 383 }
 384 #endif
 385
 386 static struct uart_ops ulite_ops = {
 387         .tx_empty       = ulite_tx_empty,
 388         .set_mctrl      = ulite_set_mctrl,
 389         .get_mctrl      = ulite_get_mctrl,
 390         .stop_tx        = ulite_stop_tx,
 391         .start_tx       = ulite_start_tx,
 392         .stop_rx        = ulite_stop_rx,
 393         .break_ctl      = ulite_break_ctl,
 394         .startup        = ulite_startup,
 395         .shutdown       = ulite_shutdown,
 396         .set_termios    = ulite_set_termios,
 397         .type           = ulite_type,
 398         .release_port   = ulite_release_port,
 399         .request_port   = ulite_request_port,
 400         .config_port    = ulite_config_port,
 401         .verify_port    = ulite_verify_port,
 402 #ifdef CONFIG_CONSOLE_POLL
 403         .poll_get_char  = ulite_get_poll_char,
 404         .poll_put_char  = ulite_put_poll_char,
 405 #endif
 406 };
 407
 408 /* ---------------------------------------------------------------------
 409  * Console driver operations
 410  */
 411
 412 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 413 static void ulite_console_wait_tx(struct uart_port *port)
 414 {
 415         u8 val;
 416         unsigned long timeout;
 417
 418         /*
 419          * Spin waiting for TX fifo to have space available.
 420          * When using the Microblaze Debug Module this can take up to 1s
 421          */
 422         timeout = jiffies + msecs_to_jiffies(1000);
 423         while (1) {
 424                 val = uart_in32(ULITE_STATUS, port);
 425                 if ((val & ULITE_STATUS_TXFULL) == 0)
 426                         break;
 427                 if (time_after(jiffies, timeout)) {
 428                         dev_warn(port->dev,
 429                                  "timeout waiting for TX buffer empty\n");
 430                         break;
 431                 }
 432                 cpu_relax();
 433         }
 434 }
 435
 436 static void ulite_console_putchar(struct uart_port *port, int ch)
 437 {
 438         ulite_console_wait_tx(port);
 439         uart_out32(ch, ULITE_TX, port);
 440 }
 441
 442 static void ulite_console_write(struct console *co, const char *s,
 443                                 unsigned int count)
 444 {
 445         struct uart_port *port = &ulite_ports[co->index];
 446         unsigned long flags;
 447         unsigned int ier;
 448         int locked = 1;
 449
 450         if (oops_in_progress) {
 451                 locked = spin_trylock_irqsave(&port->lock, flags);
 452         } else
 453                 spin_lock_irqsave(&port->lock, flags);
 454
 455         /* save and disable interrupt */
 456         ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
 457         uart_out32(0, ULITE_CONTROL, port);
 458
 459         uart_console_write(port, s, count, ulite_console_putchar);
 460
 461         ulite_console_wait_tx(port);
 462
 463         /* restore interrupt state */
 464         if (ier)
 465                 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
 466
 467         if (locked)
 468                 spin_unlock_irqrestore(&port->lock, flags);
 469 }
 470
 471 static int ulite_console_setup(struct console *co, char *options)
 472 {
 473         struct uart_port *port;
 474         int baud = 9600;
 475         int bits = 8;
 476         int parity = 'n';
 477         int flow = 'n';
 478
 479         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
 480                 return -EINVAL;
 481
 482         port = &ulite_ports[co->index];
 483
 484         /* Has the device been initialized yet? */
 485         if (!port->mapbase) {
 486                 pr_debug("console on ttyUL%i not present\n", co->index);
 487                 return -ENODEV;
 488         }
 489
 490         /* not initialized yet? */
 491         if (!port->membase) {
 492                 if (ulite_request_port(port))
 493                         return -ENODEV;
 494         }
 495
 496         if (options)
 497                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 498
 499         return uart_set_options(port, co, baud, parity, bits, flow);
 500 }
 501
 502 static struct uart_driver ulite_uart_driver;
 503
 504 static struct console ulite_console = {
 505         .name   = ULITE_NAME,
 506         .write  = ulite_console_write,
 507         .device = uart_console_device,
 508         .setup  = ulite_console_setup,
 509         .flags  = CON_PRINTBUFFER,
 510         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
 511         .data   = &ulite_uart_driver,
 512 };
 513
 514 static int __init ulite_console_init(void)
 515 {
 516         register_console(&ulite_console);
 517         return 0;
 518 }
 519
 520 console_initcall(ulite_console_init);
 521
 522 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 523
 524 static struct uart_driver ulite_uart_driver = {
 525         .owner          = THIS_MODULE,
 526         .driver_name    = "uartlite",
 527         .dev_name       = ULITE_NAME,
 528         .major          = ULITE_MAJOR,
 529         .minor          = ULITE_MINOR,
 530         .nr             = ULITE_NR_UARTS,
 531 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
 532         .cons           = &ulite_console,
 533 #endif
 534 };
 535
 536 /* ---------------------------------------------------------------------
 537  * Port assignment functions (mapping devices to uart_port structures)
 538  */
 539
 540 /** ulite_assign: register a uartlite device with the driver
 541  *
 542  * @dev: pointer to device structure
 543  * @id: requested id number.  Pass -1 for automatic port assignment
 544  * @base: base address of uartlite registers
 545  * @irq: irq number for uartlite
 546  *
 547  * Returns: 0 on success, <0 otherwise
 548  */
 549 static int ulite_assign(struct device *dev, int id, u32 base, int irq)
 550 {
 551         struct uart_port *port;
 552         int rc;
 553
 554         /* if id = -1; then scan for a free id and use that */
 555         if (id < 0) {
 556                 for (id = 0; id < ULITE_NR_UARTS; id++)
 557                         if (ulite_ports[id].mapbase == 0)
 558                                 break;
 559         }
 560         if (id < 0 || id >= ULITE_NR_UARTS) {
 561                 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
 562                 return -EINVAL;
 563         }
 564
 565         if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
 566                 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
 567                         ULITE_NAME, id);
 568                 return -EBUSY;
 569         }
 570
 571         port = &ulite_ports[id];
 572
 573         spin_lock_init(&port->lock);
 574         port->fifosize = 16;
 575         port->regshift = 2;
 576         port->iotype = UPIO_MEM;
 577         port->iobase = 1; /* mark port in use */
 578         port->mapbase = base;
 579         port->membase = NULL;
 580         port->ops = &ulite_ops;
 581         port->irq = irq;
 582         port->flags = UPF_BOOT_AUTOCONF;
 583         port->dev = dev;
 584         port->type = PORT_UNKNOWN;
 585         port->line = id;
 586
 587         dev_set_drvdata(dev, port);
 588
 589         /* Register the port */
 590         rc = uart_add_one_port(&ulite_uart_driver, port);
 591         if (rc) {
 592                 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
 593                 port->mapbase = 0;
 594                 dev_set_drvdata(dev, NULL);
 595                 return rc;
 596         }
 597
 598         return 0;
 599 }
 600
 601 /** ulite_release: register a uartlite device with the driver
 602  *
 603  * @dev: pointer to device structure
 604  */
 605 static int ulite_release(struct device *dev)
 606 {
 607         struct uart_port *port = dev_get_drvdata(dev);
 608         int rc = 0;
 609
 610         if (port) {
 611                 rc = uart_remove_one_port(&ulite_uart_driver, port);
 612                 dev_set_drvdata(dev, NULL);
 613                 port->mapbase = 0;
 614         }
 615
 616         return rc;
 617 }
 618
 619 /* ---------------------------------------------------------------------
 620  * Platform bus binding
 621  */
 622
 623 #if defined(CONFIG_OF)
 624 /* Match table for of_platform binding */
 625 static const struct of_device_id ulite_of_match[] = {
 626         { .compatible = "xlnx,opb-uartlite-1.00.b", },
 627         { .compatible = "xlnx,xps-uartlite-1.00.a", },
 628         {}
 629 };
 630 MODULE_DEVICE_TABLE(of, ulite_of_match);
 631 #endif /* CONFIG_OF */
 632
 633 static int ulite_probe(struct platform_device *pdev)
 634 {
 635         struct resource *res;
 636         int irq;
 637         int id = pdev->id;
 638 #ifdef CONFIG_OF
 639         const __be32 *prop;
 640
 641         prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
 642         if (prop)
 643                 id = be32_to_cpup(prop);
 644 #endif
 645
 646         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 647         if (!res)
 648                 return -ENODEV;
 649
 650         irq = platform_get_irq(pdev, 0);
 651         if (irq <= 0)
 652                 return -ENXIO;
 653
 654         return ulite_assign(&pdev->dev, id, res->start, irq);
 655 }
 656
 657 static int ulite_remove(struct platform_device *pdev)
 658 {
 659         return ulite_release(&pdev->dev);
 660 }
 661
 662 /* work with hotplug and coldplug */
 663 MODULE_ALIAS("platform:uartlite");
 664
 665 static struct platform_driver ulite_platform_driver = {
 666         .probe = ulite_probe,
 667         .remove = ulite_remove,
 668         .driver = {
 669                 .name  = "uartlite",
 670                 .of_match_table = of_match_ptr(ulite_of_match),
 671         },
 672 };
 673
 674 /* ---------------------------------------------------------------------
 675  * Module setup/teardown
 676  */
 677
 678 static int __init ulite_init(void)
 679 {
 680         int ret;
 681
 682         pr_debug("uartlite: calling uart_register_driver()\n");
 683         ret = uart_register_driver(&ulite_uart_driver);
 684         if (ret)
 685                 goto err_uart;
 686
 687         pr_debug("uartlite: calling platform_driver_register()\n");
 688         ret = platform_driver_register(&ulite_platform_driver);
 689         if (ret)
 690                 goto err_plat;
 691
 692         return 0;
 693
 694 err_plat:
 695         uart_unregister_driver(&ulite_uart_driver);
 696 err_uart:
 697         pr_err("registering uartlite driver failed: err=%i", ret);
 698         return ret;
 699 }
 700
 701 static void __exit ulite_exit(void)
 702 {
 703         platform_driver_unregister(&ulite_platform_driver);
 704         uart_unregister_driver(&ulite_uart_driver);
 705 }
 706
 707 module_init(ulite_init);
 708 module_exit(ulite_exit);
 709
 710 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
 711 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
 712 MODULE_LICENSE("GPL");