These changes are a raw update to a vanilla kernel 4.1.10, with the
[kvmfornfv.git] / kernel / drivers / tty / serial / samsung.h
1 #ifndef __SAMSUNG_H
2 #define __SAMSUNG_H
3
4 /*
5  * Driver for Samsung SoC onboard UARTs.
6  *
7  * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
8  *      http://armlinux.simtec.co.uk/
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13 */
14
15 #include <linux/dmaengine.h>
16
17 struct s3c24xx_uart_info {
18         char                    *name;
19         unsigned int            type;
20         unsigned int            fifosize;
21         unsigned long           rx_fifomask;
22         unsigned long           rx_fifoshift;
23         unsigned long           rx_fifofull;
24         unsigned long           tx_fifomask;
25         unsigned long           tx_fifoshift;
26         unsigned long           tx_fifofull;
27         unsigned int            def_clk_sel;
28         unsigned long           num_clks;
29         unsigned long           clksel_mask;
30         unsigned long           clksel_shift;
31
32         /* uart port features */
33
34         unsigned int            has_divslot:1;
35
36         /* uart controls */
37         int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
38 };
39
40 struct s3c24xx_serial_drv_data {
41         struct s3c24xx_uart_info        *info;
42         struct s3c2410_uartcfg          *def_cfg;
43         unsigned int                    fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
44 };
45
46 struct s3c24xx_uart_dma {
47         dma_filter_fn                   fn;
48         void                            *rx_param;
49         void                            *tx_param;
50
51         unsigned int                    rx_chan_id;
52         unsigned int                    tx_chan_id;
53
54         struct dma_slave_config         rx_conf;
55         struct dma_slave_config         tx_conf;
56
57         struct dma_chan                 *rx_chan;
58         struct dma_chan                 *tx_chan;
59
60         dma_addr_t                      rx_addr;
61         dma_addr_t                      tx_addr;
62
63         dma_cookie_t                    rx_cookie;
64         dma_cookie_t                    tx_cookie;
65
66         char                            *rx_buf;
67
68         dma_addr_t                      tx_transfer_addr;
69
70         size_t                          rx_size;
71         size_t                          tx_size;
72
73         struct dma_async_tx_descriptor  *tx_desc;
74         struct dma_async_tx_descriptor  *rx_desc;
75
76         int                             tx_bytes_requested;
77         int                             rx_bytes_requested;
78 };
79
80 struct s3c24xx_uart_port {
81         unsigned char                   rx_claimed;
82         unsigned char                   tx_claimed;
83         unsigned int                    pm_level;
84         unsigned long                   baudclk_rate;
85         unsigned int                    min_dma_size;
86
87         unsigned int                    rx_irq;
88         unsigned int                    tx_irq;
89
90         unsigned int                    tx_in_progress;
91         unsigned int                    tx_mode;
92         unsigned int                    rx_mode;
93
94         struct s3c24xx_uart_info        *info;
95         struct clk                      *clk;
96         struct clk                      *baudclk;
97         struct uart_port                port;
98         struct s3c24xx_serial_drv_data  *drv_data;
99
100         /* reference to platform data */
101         struct s3c2410_uartcfg          *cfg;
102
103         struct s3c24xx_uart_dma         *dma;
104
105 #ifdef CONFIG_CPU_FREQ
106         struct notifier_block           freq_transition;
107 #endif
108 };
109
110 /* conversion functions */
111
112 #define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
113
114 /* register access controls */
115
116 #define portaddr(port, reg) ((port)->membase + (reg))
117 #define portaddrl(port, reg) \
118         ((unsigned long *)(unsigned long)((port)->membase + (reg)))
119
120 #define rd_regb(port, reg) (__raw_readb(portaddr(port, reg)))
121 #define rd_regl(port, reg) (__raw_readl(portaddr(port, reg)))
122
123 #define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
124 #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
125
126 #endif