kernel/drivers/tty/serial/crisv10.c

   1 /*
   2  * Serial port driver for the ETRAX 100LX chip
   3  *
   4  *    Copyright (C) 1998-2007  Axis Communications AB
   5  *
   6  *    Many, many authors. Based once upon a time on serial.c for 16x50.
   7  *
   8  */
   9
  10 static char *serial_version = "$Revision: 1.25 $";
  11
  12 #include <linux/types.h>
  13 #include <linux/errno.h>
  14 #include <linux/signal.h>
  15 #include <linux/sched.h>
  16 #include <linux/timer.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/tty.h>
  19 #include <linux/tty_flip.h>
  20 #include <linux/major.h>
  21 #include <linux/string.h>
  22 #include <linux/fcntl.h>
  23 #include <linux/mm.h>
  24 #include <linux/slab.h>
  25 #include <linux/init.h>
  26 #include <linux/kernel.h>
  27 #include <linux/mutex.h>
  28 #include <linux/bitops.h>
  29 #include <linux/seq_file.h>
  30 #include <linux/delay.h>
  31 #include <linux/module.h>
  32 #include <linux/uaccess.h>
  33 #include <linux/io.h>
  34
  35 #include <asm/irq.h>
  36 #include <asm/dma.h>
  37
  38 #include <arch/svinto.h>
  39 #include <arch/system.h>
  40
  41 /* non-arch dependent serial structures are in linux/serial.h */
  42 #include <linux/serial.h>
  43 /* while we keep our own stuff (struct e100_serial) in a local .h file */
  44 #include "crisv10.h"
  45 #include <asm/fasttimer.h>
  46 #include <arch/io_interface_mux.h>
  47
  48 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
  49 #ifndef CONFIG_ETRAX_FAST_TIMER
  50 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
  51 #endif
  52 #endif
  53
  54 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
  55            (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
  56 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
  57 #endif
  58
  59 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
  60 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
  61 #endif
  62
  63 /*
  64  * All of the compatibilty code so we can compile serial.c against
  65  * older kernels is hidden in serial_compat.h
  66  */
  67 #if defined(LOCAL_HEADERS)
  68 #include "serial_compat.h"
  69 #endif
  70
  71 struct tty_driver *serial_driver;
  72
  73 /* number of characters left in xmit buffer before we ask for more */
  74 #define WAKEUP_CHARS 256
  75
  76 //#define SERIAL_DEBUG_INTR
  77 //#define SERIAL_DEBUG_OPEN
  78 //#define SERIAL_DEBUG_FLOW
  79 //#define SERIAL_DEBUG_DATA
  80 //#define SERIAL_DEBUG_THROTTLE
  81 //#define SERIAL_DEBUG_IO  /* Debug for Extra control and status pins */
  82 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
  83
  84 /* Enable this to use serial interrupts to handle when you
  85    expect the first received event on the serial port to
  86    be an error, break or similar. Used to be able to flash IRMA
  87    from eLinux */
  88 #define SERIAL_HANDLE_EARLY_ERRORS
  89
  90 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
  91 #define SERIAL_DESCR_BUF_SIZE 256
  92
  93 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
  94 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
  95
  96 /* We don't want to load the system with massive fast timer interrupt
  97  * on high baudrates so limit it to 250 us (4kHz) */
  98 #define MIN_FLUSH_TIME_USEC 250
  99
 100 /* Add an x here to log a lot of timer stuff */
 101 #define TIMERD(x)
 102 /* Debug details of interrupt handling */
 103 #define DINTR1(x)  /* irq on/off, errors */
 104 #define DINTR2(x)    /* tx and rx */
 105 /* Debug flip buffer stuff */
 106 #define DFLIP(x)
 107 /* Debug flow control and overview of data flow */
 108 #define DFLOW(x)
 109 #define DBAUD(x)
 110 #define DLOG_INT_TRIG(x)
 111
 112 //#define DEBUG_LOG_INCLUDED
 113 #ifndef DEBUG_LOG_INCLUDED
 114 #define DEBUG_LOG(line, string, value)
 115 #else
 116 struct debug_log_info
 117 {
 118         unsigned long time;
 119         unsigned long timer_data;
 120 //  int line;
 121         const char *string;
 122         int value;
 123 };
 124 #define DEBUG_LOG_SIZE 4096
 125
 126 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
 127 int debug_log_pos = 0;
 128
 129 #define DEBUG_LOG(_line, _string, _value) do { \
 130   if ((_line) == SERIAL_DEBUG_LINE) {\
 131     debug_log_func(_line, _string, _value); \
 132   }\
 133 }while(0)
 134
 135 void debug_log_func(int line, const char *string, int value)
 136 {
 137         if (debug_log_pos < DEBUG_LOG_SIZE) {
 138                 debug_log[debug_log_pos].time = jiffies;
 139                 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
 140 //    debug_log[debug_log_pos].line = line;
 141                 debug_log[debug_log_pos].string = string;
 142                 debug_log[debug_log_pos].value = value;
 143                 debug_log_pos++;
 144         }
 145         /*printk(string, value);*/
 146 }
 147 #endif
 148
 149 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
 150 /* Default number of timer ticks before flushing rx fifo
 151  * When using "little data, low latency applications: use 0
 152  * When using "much data applications (PPP)" use ~5
 153  */
 154 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
 155 #endif
 156
 157 unsigned long timer_data_to_ns(unsigned long timer_data);
 158
 159 static void change_speed(struct e100_serial *info);
 160 static void rs_throttle(struct tty_struct * tty);
 161 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
 162 static int rs_write(struct tty_struct *tty,
 163                 const unsigned char *buf, int count);
 164 #ifdef CONFIG_ETRAX_RS485
 165 static int e100_write_rs485(struct tty_struct *tty,
 166                 const unsigned char *buf, int count);
 167 #endif
 168 static int get_lsr_info(struct e100_serial *info, unsigned int *value);
 169
 170
 171 #define DEF_BAUD 115200   /* 115.2 kbit/s */
 172 #define DEF_RX 0x20  /* or SERIAL_CTRL_W >> 8 */
 173 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
 174 #define DEF_TX 0x80  /* or SERIAL_CTRL_B */
 175
 176 /* offsets from R_SERIALx_CTRL */
 177
 178 #define REG_DATA 0
 179 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
 180 #define REG_TR_DATA 0
 181 #define REG_STATUS 1
 182 #define REG_TR_CTRL 1
 183 #define REG_REC_CTRL 2
 184 #define REG_BAUD 3
 185 #define REG_XOFF 4  /* this is a 32 bit register */
 186
 187 /* The bitfields are the same for all serial ports */
 188 #define SER_RXD_MASK         IO_MASK(R_SERIAL0_STATUS, rxd)
 189 #define SER_DATA_AVAIL_MASK  IO_MASK(R_SERIAL0_STATUS, data_avail)
 190 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
 191 #define SER_PAR_ERR_MASK     IO_MASK(R_SERIAL0_STATUS, par_err)
 192 #define SER_OVERRUN_MASK     IO_MASK(R_SERIAL0_STATUS, overrun)
 193
 194 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
 195
 196 /* Values for info->errorcode */
 197 #define ERRCODE_SET_BREAK    (TTY_BREAK)
 198 #define ERRCODE_INSERT        0x100
 199 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
 200
 201 #define FORCE_EOP(info)  *R_SET_EOP = 1U << info->iseteop;
 202
 203 /*
 204  * General note regarding the use of IO_* macros in this file:
 205  *
 206  * We will use the bits defined for DMA channel 6 when using various
 207  * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
 208  * the same for all channels (which of course they are).
 209  *
 210  * We will also use the bits defined for serial port 0 when writing commands
 211  * to the different ports, as these bits too are the same for all ports.
 212  */
 213
 214
 215 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
 216 static const unsigned long e100_ser_int_mask = 0
 217 #ifdef CONFIG_ETRAX_SERIAL_PORT0
 218 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
 219 #endif
 220 #ifdef CONFIG_ETRAX_SERIAL_PORT1
 221 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
 222 #endif
 223 #ifdef CONFIG_ETRAX_SERIAL_PORT2
 224 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
 225 #endif
 226 #ifdef CONFIG_ETRAX_SERIAL_PORT3
 227 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
 228 #endif
 229 ;
 230 unsigned long r_alt_ser_baudrate_shadow = 0;
 231
 232 /* this is the data for the four serial ports in the etrax100 */
 233 /*  DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
 234 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
 235
 236 static struct e100_serial rs_table[] = {
 237         { .baud        = DEF_BAUD,
 238           .ioport        = (unsigned char *)R_SERIAL0_CTRL,
 239           .irq         = 1U << 12, /* uses DMA 6 and 7 */
 240           .oclrintradr = R_DMA_CH6_CLR_INTR,
 241           .ofirstadr   = R_DMA_CH6_FIRST,
 242           .ocmdadr     = R_DMA_CH6_CMD,
 243           .ostatusadr  = R_DMA_CH6_STATUS,
 244           .iclrintradr = R_DMA_CH7_CLR_INTR,
 245           .ifirstadr   = R_DMA_CH7_FIRST,
 246           .icmdadr     = R_DMA_CH7_CMD,
 247           .idescradr   = R_DMA_CH7_DESCR,
 248           .rx_ctrl     = DEF_RX,
 249           .tx_ctrl     = DEF_TX,
 250           .iseteop     = 2,
 251           .dma_owner   = dma_ser0,
 252           .io_if       = if_serial_0,
 253 #ifdef CONFIG_ETRAX_SERIAL_PORT0
 254           .enabled  = 1,
 255 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
 256           .dma_out_enabled = 1,
 257           .dma_out_nbr = SER0_TX_DMA_NBR,
 258           .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR,
 259           .dma_out_irq_flags = 0,
 260           .dma_out_irq_description = "serial 0 dma tr",
 261 #else
 262           .dma_out_enabled = 0,
 263           .dma_out_nbr = UINT_MAX,
 264           .dma_out_irq_nbr = 0,
 265           .dma_out_irq_flags = 0,
 266           .dma_out_irq_description = NULL,
 267 #endif
 268 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
 269           .dma_in_enabled = 1,
 270           .dma_in_nbr = SER0_RX_DMA_NBR,
 271           .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR,
 272           .dma_in_irq_flags = 0,
 273           .dma_in_irq_description = "serial 0 dma rec",
 274 #else
 275           .dma_in_enabled = 0,
 276           .dma_in_nbr = UINT_MAX,
 277           .dma_in_irq_nbr = 0,
 278           .dma_in_irq_flags = 0,
 279           .dma_in_irq_description = NULL,
 280 #endif
 281 #else
 282           .enabled  = 0,
 283           .io_if_description = NULL,
 284           .dma_out_enabled = 0,
 285           .dma_in_enabled = 0
 286 #endif
 287
 288 },  /* ttyS0 */
 289         { .baud        = DEF_BAUD,
 290           .ioport        = (unsigned char *)R_SERIAL1_CTRL,
 291           .irq         = 1U << 16, /* uses DMA 8 and 9 */
 292           .oclrintradr = R_DMA_CH8_CLR_INTR,
 293           .ofirstadr   = R_DMA_CH8_FIRST,
 294           .ocmdadr     = R_DMA_CH8_CMD,
 295           .ostatusadr  = R_DMA_CH8_STATUS,
 296           .iclrintradr = R_DMA_CH9_CLR_INTR,
 297           .ifirstadr   = R_DMA_CH9_FIRST,
 298           .icmdadr     = R_DMA_CH9_CMD,
 299           .idescradr   = R_DMA_CH9_DESCR,
 300           .rx_ctrl     = DEF_RX,
 301           .tx_ctrl     = DEF_TX,
 302           .iseteop     = 3,
 303           .dma_owner   = dma_ser1,
 304           .io_if       = if_serial_1,
 305 #ifdef CONFIG_ETRAX_SERIAL_PORT1
 306           .enabled  = 1,
 307           .io_if_description = "ser1",
 308 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
 309           .dma_out_enabled = 1,
 310           .dma_out_nbr = SER1_TX_DMA_NBR,
 311           .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR,
 312           .dma_out_irq_flags = 0,
 313           .dma_out_irq_description = "serial 1 dma tr",
 314 #else
 315           .dma_out_enabled = 0,
 316           .dma_out_nbr = UINT_MAX,
 317           .dma_out_irq_nbr = 0,
 318           .dma_out_irq_flags = 0,
 319           .dma_out_irq_description = NULL,
 320 #endif
 321 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
 322           .dma_in_enabled = 1,
 323           .dma_in_nbr = SER1_RX_DMA_NBR,
 324           .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR,
 325           .dma_in_irq_flags = 0,
 326           .dma_in_irq_description = "serial 1 dma rec",
 327 #else
 328           .dma_in_enabled = 0,
 329           .dma_in_enabled = 0,
 330           .dma_in_nbr = UINT_MAX,
 331           .dma_in_irq_nbr = 0,
 332           .dma_in_irq_flags = 0,
 333           .dma_in_irq_description = NULL,
 334 #endif
 335 #else
 336           .enabled  = 0,
 337           .io_if_description = NULL,
 338           .dma_in_irq_nbr = 0,
 339           .dma_out_enabled = 0,
 340           .dma_in_enabled = 0
 341 #endif
 342 },  /* ttyS1 */
 343
 344         { .baud        = DEF_BAUD,
 345           .ioport        = (unsigned char *)R_SERIAL2_CTRL,
 346           .irq         = 1U << 4,  /* uses DMA 2 and 3 */
 347           .oclrintradr = R_DMA_CH2_CLR_INTR,
 348           .ofirstadr   = R_DMA_CH2_FIRST,
 349           .ocmdadr     = R_DMA_CH2_CMD,
 350           .ostatusadr  = R_DMA_CH2_STATUS,
 351           .iclrintradr = R_DMA_CH3_CLR_INTR,
 352           .ifirstadr   = R_DMA_CH3_FIRST,
 353           .icmdadr     = R_DMA_CH3_CMD,
 354           .idescradr   = R_DMA_CH3_DESCR,
 355           .rx_ctrl     = DEF_RX,
 356           .tx_ctrl     = DEF_TX,
 357           .iseteop     = 0,
 358           .dma_owner   = dma_ser2,
 359           .io_if       = if_serial_2,
 360 #ifdef CONFIG_ETRAX_SERIAL_PORT2
 361           .enabled  = 1,
 362           .io_if_description = "ser2",
 363 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
 364           .dma_out_enabled = 1,
 365           .dma_out_nbr = SER2_TX_DMA_NBR,
 366           .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR,
 367           .dma_out_irq_flags = 0,
 368           .dma_out_irq_description = "serial 2 dma tr",
 369 #else
 370           .dma_out_enabled = 0,
 371           .dma_out_nbr = UINT_MAX,
 372           .dma_out_irq_nbr = 0,
 373           .dma_out_irq_flags = 0,
 374           .dma_out_irq_description = NULL,
 375 #endif
 376 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
 377           .dma_in_enabled = 1,
 378           .dma_in_nbr = SER2_RX_DMA_NBR,
 379           .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR,
 380           .dma_in_irq_flags = 0,
 381           .dma_in_irq_description = "serial 2 dma rec",
 382 #else
 383           .dma_in_enabled = 0,
 384           .dma_in_nbr = UINT_MAX,
 385           .dma_in_irq_nbr = 0,
 386           .dma_in_irq_flags = 0,
 387           .dma_in_irq_description = NULL,
 388 #endif
 389 #else
 390           .enabled  = 0,
 391           .io_if_description = NULL,
 392           .dma_out_enabled = 0,
 393           .dma_in_enabled = 0
 394 #endif
 395  },  /* ttyS2 */
 396
 397         { .baud        = DEF_BAUD,
 398           .ioport        = (unsigned char *)R_SERIAL3_CTRL,
 399           .irq         = 1U << 8,  /* uses DMA 4 and 5 */
 400           .oclrintradr = R_DMA_CH4_CLR_INTR,
 401           .ofirstadr   = R_DMA_CH4_FIRST,
 402           .ocmdadr     = R_DMA_CH4_CMD,
 403           .ostatusadr  = R_DMA_CH4_STATUS,
 404           .iclrintradr = R_DMA_CH5_CLR_INTR,
 405           .ifirstadr   = R_DMA_CH5_FIRST,
 406           .icmdadr     = R_DMA_CH5_CMD,
 407           .idescradr   = R_DMA_CH5_DESCR,
 408           .rx_ctrl     = DEF_RX,
 409           .tx_ctrl     = DEF_TX,
 410           .iseteop     = 1,
 411           .dma_owner   = dma_ser3,
 412           .io_if       = if_serial_3,
 413 #ifdef CONFIG_ETRAX_SERIAL_PORT3
 414           .enabled  = 1,
 415           .io_if_description = "ser3",
 416 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
 417           .dma_out_enabled = 1,
 418           .dma_out_nbr = SER3_TX_DMA_NBR,
 419           .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR,
 420           .dma_out_irq_flags = 0,
 421           .dma_out_irq_description = "serial 3 dma tr",
 422 #else
 423           .dma_out_enabled = 0,
 424           .dma_out_nbr = UINT_MAX,
 425           .dma_out_irq_nbr = 0,
 426           .dma_out_irq_flags = 0,
 427           .dma_out_irq_description = NULL,
 428 #endif
 429 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
 430           .dma_in_enabled = 1,
 431           .dma_in_nbr = SER3_RX_DMA_NBR,
 432           .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR,
 433           .dma_in_irq_flags = 0,
 434           .dma_in_irq_description = "serial 3 dma rec",
 435 #else
 436           .dma_in_enabled = 0,
 437           .dma_in_nbr = UINT_MAX,
 438           .dma_in_irq_nbr = 0,
 439           .dma_in_irq_flags = 0,
 440           .dma_in_irq_description = NULL
 441 #endif
 442 #else
 443           .enabled  = 0,
 444           .io_if_description = NULL,
 445           .dma_out_enabled = 0,
 446           .dma_in_enabled = 0
 447 #endif
 448  }   /* ttyS3 */
 449 };
 450
 451
 452 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
 453
 454 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
 455 static struct fast_timer fast_timers[NR_PORTS];
 456 #endif
 457
 458 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
 459 #define PROCSTAT(x) x
 460 struct ser_statistics_type {
 461         int overrun_cnt;
 462         int early_errors_cnt;
 463         int ser_ints_ok_cnt;
 464         int errors_cnt;
 465         unsigned long int processing_flip;
 466         unsigned long processing_flip_still_room;
 467         unsigned long int timeout_flush_cnt;
 468         int rx_dma_ints;
 469         int tx_dma_ints;
 470         int rx_tot;
 471         int tx_tot;
 472 };
 473
 474 static struct ser_statistics_type ser_stat[NR_PORTS];
 475
 476 #else
 477
 478 #define PROCSTAT(x)
 479
 480 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
 481
 482 /* RS-485 */
 483 #if defined(CONFIG_ETRAX_RS485)
 484 #ifdef CONFIG_ETRAX_FAST_TIMER
 485 static struct fast_timer fast_timers_rs485[NR_PORTS];
 486 #endif
 487 #if defined(CONFIG_ETRAX_RS485_ON_PA)
 488 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
 489 #endif
 490 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
 491 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
 492 #endif
 493 #endif
 494
 495 /* Info and macros needed for each ports extra control/status signals. */
 496 #define E100_STRUCT_PORT(line, pinname) \
 497  ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
 498                 (R_PORT_PA_DATA): ( \
 499  (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
 500                 (R_PORT_PB_DATA):&dummy_ser[line]))
 501
 502 #define E100_STRUCT_SHADOW(line, pinname) \
 503  ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
 504                 (&port_pa_data_shadow): ( \
 505  (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
 506                 (&port_pb_data_shadow):&dummy_ser[line]))
 507 #define E100_STRUCT_MASK(line, pinname) \
 508  ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
 509                 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
 510  (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
 511                 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
 512
 513 #define DUMMY_DTR_MASK 1
 514 #define DUMMY_RI_MASK  2
 515 #define DUMMY_DSR_MASK 4
 516 #define DUMMY_CD_MASK  8
 517 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
 518
 519 /* If not all status pins are used or disabled, use mixed mode */
 520 #ifdef CONFIG_ETRAX_SERIAL_PORT0
 521
 522 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
 523
 524 #if SER0_PA_BITSUM != -4
 525 #  if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
 526 #    ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 527 #      define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 528 #    endif
 529 #   endif
 530 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
 531 #   ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 532 #     define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 533 #   endif
 534 #  endif
 535 #  if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
 536 #    ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 537 #      define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 538 #    endif
 539 #  endif
 540 #  if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
 541 #    ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 542 #      define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 543 #    endif
 544 #  endif
 545 #endif
 546
 547 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
 548
 549 #if SER0_PB_BITSUM != -4
 550 #  if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
 551 #    ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 552 #      define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 553 #    endif
 554 #   endif
 555 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
 556 #   ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 557 #     define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 558 #   endif
 559 #  endif
 560 #  if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
 561 #    ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 562 #      define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 563 #    endif
 564 #  endif
 565 #  if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
 566 #    ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
 567 #      define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
 568 #    endif
 569 #  endif
 570 #endif
 571
 572 #endif /* PORT0 */
 573
 574
 575 #ifdef CONFIG_ETRAX_SERIAL_PORT1
 576
 577 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
 578
 579 #if SER1_PA_BITSUM != -4
 580 #  if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
 581 #    ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 582 #      define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 583 #    endif
 584 #   endif
 585 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
 586 #   ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 587 #     define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 588 #   endif
 589 #  endif
 590 #  if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
 591 #    ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 592 #      define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 593 #    endif
 594 #  endif
 595 #  if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
 596 #    ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 597 #      define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 598 #    endif
 599 #  endif
 600 #endif
 601
 602 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
 603
 604 #if SER1_PB_BITSUM != -4
 605 #  if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
 606 #    ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 607 #      define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 608 #    endif
 609 #   endif
 610 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
 611 #   ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 612 #     define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 613 #   endif
 614 #  endif
 615 #  if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
 616 #    ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 617 #      define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 618 #    endif
 619 #  endif
 620 #  if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
 621 #    ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
 622 #      define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
 623 #    endif
 624 #  endif
 625 #endif
 626
 627 #endif /* PORT1 */
 628
 629 #ifdef CONFIG_ETRAX_SERIAL_PORT2
 630
 631 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
 632
 633 #if SER2_PA_BITSUM != -4
 634 #  if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
 635 #    ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 636 #      define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 637 #    endif
 638 #   endif
 639 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
 640 #   ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 641 #     define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 642 #   endif
 643 #  endif
 644 #  if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
 645 #    ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 646 #      define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 647 #    endif
 648 #  endif
 649 #  if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
 650 #    ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 651 #      define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 652 #    endif
 653 #  endif
 654 #endif
 655
 656 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
 657
 658 #if SER2_PB_BITSUM != -4
 659 #  if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
 660 #    ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 661 #      define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 662 #    endif
 663 #   endif
 664 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
 665 #   ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 666 #     define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 667 #   endif
 668 #  endif
 669 #  if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
 670 #    ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 671 #      define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 672 #    endif
 673 #  endif
 674 #  if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
 675 #    ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
 676 #      define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
 677 #    endif
 678 #  endif
 679 #endif
 680
 681 #endif /* PORT2 */
 682
 683 #ifdef CONFIG_ETRAX_SERIAL_PORT3
 684
 685 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
 686
 687 #if SER3_PA_BITSUM != -4
 688 #  if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
 689 #    ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 690 #      define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 691 #    endif
 692 #   endif
 693 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
 694 #   ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 695 #     define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 696 #   endif
 697 #  endif
 698 #  if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
 699 #    ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 700 #      define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 701 #    endif
 702 #  endif
 703 #  if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
 704 #    ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 705 #      define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 706 #    endif
 707 #  endif
 708 #endif
 709
 710 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
 711
 712 #if SER3_PB_BITSUM != -4
 713 #  if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
 714 #    ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 715 #      define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 716 #    endif
 717 #   endif
 718 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
 719 #   ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 720 #     define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 721 #   endif
 722 #  endif
 723 #  if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
 724 #    ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 725 #      define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 726 #    endif
 727 #  endif
 728 #  if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
 729 #    ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
 730 #      define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
 731 #    endif
 732 #  endif
 733 #endif
 734
 735 #endif /* PORT3 */
 736
 737
 738 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
 739     defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
 740     defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
 741     defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
 742 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
 743 #endif
 744
 745 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
 746 /* The pins can be mixed on PA and PB */
 747 #define CONTROL_PINS_PORT_NOT_USED(line) \
 748   &dummy_ser[line], &dummy_ser[line], \
 749   &dummy_ser[line], &dummy_ser[line], \
 750   &dummy_ser[line], &dummy_ser[line], \
 751   &dummy_ser[line], &dummy_ser[line], \
 752   DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
 753
 754
 755 struct control_pins
 756 {
 757         volatile unsigned char *dtr_port;
 758         unsigned char          *dtr_shadow;
 759         volatile unsigned char *ri_port;
 760         unsigned char          *ri_shadow;
 761         volatile unsigned char *dsr_port;
 762         unsigned char          *dsr_shadow;
 763         volatile unsigned char *cd_port;
 764         unsigned char          *cd_shadow;
 765
 766         unsigned char dtr_mask;
 767         unsigned char ri_mask;
 768         unsigned char dsr_mask;
 769         unsigned char cd_mask;
 770 };
 771
 772 static const struct control_pins e100_modem_pins[NR_PORTS] =
 773 {
 774         /* Ser 0 */
 775         {
 776 #ifdef CONFIG_ETRAX_SERIAL_PORT0
 777         E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
 778         E100_STRUCT_PORT(0,RI),  E100_STRUCT_SHADOW(0,RI),
 779         E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
 780         E100_STRUCT_PORT(0,CD),  E100_STRUCT_SHADOW(0,CD),
 781         E100_STRUCT_MASK(0,DTR),
 782         E100_STRUCT_MASK(0,RI),
 783         E100_STRUCT_MASK(0,DSR),
 784         E100_STRUCT_MASK(0,CD)
 785 #else
 786         CONTROL_PINS_PORT_NOT_USED(0)
 787 #endif
 788         },
 789
 790         /* Ser 1 */
 791         {
 792 #ifdef CONFIG_ETRAX_SERIAL_PORT1
 793         E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
 794         E100_STRUCT_PORT(1,RI),  E100_STRUCT_SHADOW(1,RI),
 795         E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
 796         E100_STRUCT_PORT(1,CD),  E100_STRUCT_SHADOW(1,CD),
 797         E100_STRUCT_MASK(1,DTR),
 798         E100_STRUCT_MASK(1,RI),
 799         E100_STRUCT_MASK(1,DSR),
 800         E100_STRUCT_MASK(1,CD)
 801 #else
 802         CONTROL_PINS_PORT_NOT_USED(1)
 803 #endif
 804         },
 805
 806         /* Ser 2 */
 807         {
 808 #ifdef CONFIG_ETRAX_SERIAL_PORT2
 809         E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
 810         E100_STRUCT_PORT(2,RI),  E100_STRUCT_SHADOW(2,RI),
 811         E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
 812         E100_STRUCT_PORT(2,CD),  E100_STRUCT_SHADOW(2,CD),
 813         E100_STRUCT_MASK(2,DTR),
 814         E100_STRUCT_MASK(2,RI),
 815         E100_STRUCT_MASK(2,DSR),
 816         E100_STRUCT_MASK(2,CD)
 817 #else
 818         CONTROL_PINS_PORT_NOT_USED(2)
 819 #endif
 820         },
 821
 822         /* Ser 3 */
 823         {
 824 #ifdef CONFIG_ETRAX_SERIAL_PORT3
 825         E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
 826         E100_STRUCT_PORT(3,RI),  E100_STRUCT_SHADOW(3,RI),
 827         E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
 828         E100_STRUCT_PORT(3,CD),  E100_STRUCT_SHADOW(3,CD),
 829         E100_STRUCT_MASK(3,DTR),
 830         E100_STRUCT_MASK(3,RI),
 831         E100_STRUCT_MASK(3,DSR),
 832         E100_STRUCT_MASK(3,CD)
 833 #else
 834         CONTROL_PINS_PORT_NOT_USED(3)
 835 #endif
 836         }
 837 };
 838 #else  /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
 839
 840 /* All pins are on either PA or PB for each serial port */
 841 #define CONTROL_PINS_PORT_NOT_USED(line) \
 842   &dummy_ser[line], &dummy_ser[line], \
 843   DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
 844
 845
 846 struct control_pins
 847 {
 848         volatile unsigned char *port;
 849         unsigned char          *shadow;
 850
 851         unsigned char dtr_mask;
 852         unsigned char ri_mask;
 853         unsigned char dsr_mask;
 854         unsigned char cd_mask;
 855 };
 856
 857 #define dtr_port port
 858 #define dtr_shadow shadow
 859 #define ri_port port
 860 #define ri_shadow shadow
 861 #define dsr_port port
 862 #define dsr_shadow shadow
 863 #define cd_port port
 864 #define cd_shadow shadow
 865
 866 static const struct control_pins e100_modem_pins[NR_PORTS] =
 867 {
 868         /* Ser 0 */
 869         {
 870 #ifdef CONFIG_ETRAX_SERIAL_PORT0
 871         E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
 872         E100_STRUCT_MASK(0,DTR),
 873         E100_STRUCT_MASK(0,RI),
 874         E100_STRUCT_MASK(0,DSR),
 875         E100_STRUCT_MASK(0,CD)
 876 #else
 877         CONTROL_PINS_PORT_NOT_USED(0)
 878 #endif
 879         },
 880
 881         /* Ser 1 */
 882         {
 883 #ifdef CONFIG_ETRAX_SERIAL_PORT1
 884         E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
 885         E100_STRUCT_MASK(1,DTR),
 886         E100_STRUCT_MASK(1,RI),
 887         E100_STRUCT_MASK(1,DSR),
 888         E100_STRUCT_MASK(1,CD)
 889 #else
 890         CONTROL_PINS_PORT_NOT_USED(1)
 891 #endif
 892         },
 893
 894         /* Ser 2 */
 895         {
 896 #ifdef CONFIG_ETRAX_SERIAL_PORT2
 897         E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
 898         E100_STRUCT_MASK(2,DTR),
 899         E100_STRUCT_MASK(2,RI),
 900         E100_STRUCT_MASK(2,DSR),
 901         E100_STRUCT_MASK(2,CD)
 902 #else
 903         CONTROL_PINS_PORT_NOT_USED(2)
 904 #endif
 905         },
 906
 907         /* Ser 3 */
 908         {
 909 #ifdef CONFIG_ETRAX_SERIAL_PORT3
 910         E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
 911         E100_STRUCT_MASK(3,DTR),
 912         E100_STRUCT_MASK(3,RI),
 913         E100_STRUCT_MASK(3,DSR),
 914         E100_STRUCT_MASK(3,CD)
 915 #else
 916         CONTROL_PINS_PORT_NOT_USED(3)
 917 #endif
 918         }
 919 };
 920 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
 921
 922 #define E100_RTS_MASK 0x20
 923 #define E100_CTS_MASK 0x40
 924
 925 /* All serial port signals are active low:
 926  * active   = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
 927  * inactive = 1 -> 0V   to RS-232 driver -> +12V on RS-232 level
 928  *
 929  * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
 930  */
 931
 932 /* Output */
 933 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
 934 /* Input */
 935 #define E100_CTS_GET(info) ((info)->ioport[REG_STATUS] & E100_CTS_MASK)
 936
 937 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
 938 /* Is an output */
 939 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
 940
 941 /* Normally inputs */
 942 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
 943 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
 944
 945 /* Input */
 946 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
 947
 948 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
 949 static void update_char_time(struct e100_serial * info)
 950 {
 951         tcflag_t cflags = info->port.tty->termios.c_cflag;
 952         int bits;
 953
 954         /* calc. number of bits / data byte */
 955         /* databits + startbit and 1 stopbit */
 956         if ((cflags & CSIZE) == CS7)
 957                 bits = 9;
 958         else
 959                 bits = 10;
 960
 961         if (cflags & CSTOPB)     /* 2 stopbits ? */
 962                 bits++;
 963
 964         if (cflags & PARENB)     /* parity bit ? */
 965                 bits++;
 966
 967         /* calc timeout */
 968         info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
 969         info->flush_time_usec = 4*info->char_time_usec;
 970         if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
 971                 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
 972
 973 }
 974
 975 /*
 976  * This function maps from the Bxxxx defines in asm/termbits.h into real
 977  * baud rates.
 978  */
 979
 980 static int
 981 cflag_to_baud(unsigned int cflag)
 982 {
 983         static int baud_table[] = {
 984                 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
 985                 4800, 9600, 19200, 38400 };
 986
 987         static int ext_baud_table[] = {
 988                 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
 989                 0, 0, 0, 0, 0, 0, 0, 0 };
 990
 991         if (cflag & CBAUDEX)
 992                 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
 993         else
 994                 return baud_table[cflag & CBAUD];
 995 }
 996
 997 /* and this maps to an etrax100 hardware baud constant */
 998
 999 static unsigned char
1000 cflag_to_etrax_baud(unsigned int cflag)
1001 {
1002         char retval;
1003
1004         static char baud_table[] = {
1005                 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1006
1007         static char ext_baud_table[] = {
1008                 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1009
1010         if (cflag & CBAUDEX)
1011                 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1012         else
1013                 retval = baud_table[cflag & CBAUD];
1014
1015         if (retval < 0) {
1016                 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1017                 retval = 5; /* choose default 9600 instead */
1018         }
1019
1020         return retval | (retval << 4); /* choose same for both TX and RX */
1021 }
1022
1023
1024 /* Various static support functions */
1025
1026 /* Functions to set or clear DTR/RTS on the requested line */
1027 /* It is complicated by the fact that RTS is a serial port register, while
1028  * DTR might not be implemented in the HW at all, and if it is, it can be on
1029  * any general port.
1030  */
1031
1032
1033 static inline void
1034 e100_dtr(struct e100_serial *info, int set)
1035 {
1036         unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1037
1038 #ifdef SERIAL_DEBUG_IO
1039         printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1040         printk("ser%i shadow before 0x%02X get: %i\n",
1041                info->line, *e100_modem_pins[info->line].dtr_shadow,
1042                E100_DTR_GET(info));
1043 #endif
1044         /* DTR is active low */
1045         {
1046                 unsigned long flags;
1047
1048                 local_irq_save(flags);
1049                 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1050                 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1051                 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1052                 local_irq_restore(flags);
1053         }
1054
1055 #ifdef SERIAL_DEBUG_IO
1056         printk("ser%i shadow after 0x%02X get: %i\n",
1057                info->line, *e100_modem_pins[info->line].dtr_shadow,
1058                E100_DTR_GET(info));
1059 #endif
1060 }
1061
1062 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1063  *                                          0=0V    , 1=3.3V
1064  */
1065 static inline void
1066 e100_rts(struct e100_serial *info, int set)
1067 {
1068         unsigned long flags;
1069         local_irq_save(flags);
1070         info->rx_ctrl &= ~E100_RTS_MASK;
1071         info->rx_ctrl |= (set ? 0 : E100_RTS_MASK);  /* RTS is active low */
1072         info->ioport[REG_REC_CTRL] = info->rx_ctrl;
1073         local_irq_restore(flags);
1074 #ifdef SERIAL_DEBUG_IO
1075         printk("ser%i rts %i\n", info->line, set);
1076 #endif
1077 }
1078
1079
1080 /* If this behaves as a modem, RI and CD is an output */
1081 static inline void
1082 e100_ri_out(struct e100_serial *info, int set)
1083 {
1084         /* RI is active low */
1085         {
1086                 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1087                 unsigned long flags;
1088
1089                 local_irq_save(flags);
1090                 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1091                 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1092                 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1093                 local_irq_restore(flags);
1094         }
1095 }
1096 static inline void
1097 e100_cd_out(struct e100_serial *info, int set)
1098 {
1099         /* CD is active low */
1100         {
1101                 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1102                 unsigned long flags;
1103
1104                 local_irq_save(flags);
1105                 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1106                 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1107                 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1108                 local_irq_restore(flags);
1109         }
1110 }
1111
1112 static inline void
1113 e100_disable_rx(struct e100_serial *info)
1114 {
1115         /* disable the receiver */
1116         info->ioport[REG_REC_CTRL] =
1117                 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1118 }
1119
1120 static inline void
1121 e100_enable_rx(struct e100_serial *info)
1122 {
1123         /* enable the receiver */
1124         info->ioport[REG_REC_CTRL] =
1125                 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1126 }
1127
1128 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1129
1130 static inline void
1131 e100_disable_rxdma_irq(struct e100_serial *info)
1132 {
1133 #ifdef SERIAL_DEBUG_INTR
1134         printk("rxdma_irq(%d): 0\n",info->line);
1135 #endif
1136         DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1137         *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1138 }
1139
1140 static inline void
1141 e100_enable_rxdma_irq(struct e100_serial *info)
1142 {
1143 #ifdef SERIAL_DEBUG_INTR
1144         printk("rxdma_irq(%d): 1\n",info->line);
1145 #endif
1146         DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1147         *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1148 }
1149
1150 /* the tx DMA uses only dma_descr interrupt */
1151
1152 static void e100_disable_txdma_irq(struct e100_serial *info)
1153 {
1154 #ifdef SERIAL_DEBUG_INTR
1155         printk("txdma_irq(%d): 0\n",info->line);
1156 #endif
1157         DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1158         *R_IRQ_MASK2_CLR = info->irq;
1159 }
1160
1161 static void e100_enable_txdma_irq(struct e100_serial *info)
1162 {
1163 #ifdef SERIAL_DEBUG_INTR
1164         printk("txdma_irq(%d): 1\n",info->line);
1165 #endif
1166         DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1167         *R_IRQ_MASK2_SET = info->irq;
1168 }
1169
1170 static void e100_disable_txdma_channel(struct e100_serial *info)
1171 {
1172         unsigned long flags;
1173
1174         /* Disable output DMA channel for the serial port in question
1175          * ( set to something other than serialX)
1176          */
1177         local_irq_save(flags);
1178         DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1179         if (info->line == 0) {
1180                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1181                     IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1182                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma6);
1183                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1184                 }
1185         } else if (info->line == 1) {
1186                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1187                     IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1188                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma8);
1189                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1190                 }
1191         } else if (info->line == 2) {
1192                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1193                     IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1194                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma2);
1195                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1196                 }
1197         } else if (info->line == 3) {
1198                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1199                     IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1200                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma4);
1201                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1202                 }
1203         }
1204         *R_GEN_CONFIG = genconfig_shadow;
1205         local_irq_restore(flags);
1206 }
1207
1208
1209 static void e100_enable_txdma_channel(struct e100_serial *info)
1210 {
1211         unsigned long flags;
1212
1213         local_irq_save(flags);
1214         DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1215         /* Enable output DMA channel for the serial port in question */
1216         if (info->line == 0) {
1217                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma6);
1218                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1219         } else if (info->line == 1) {
1220                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma8);
1221                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1222         } else if (info->line == 2) {
1223                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma2);
1224                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1225         } else if (info->line == 3) {
1226                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma4);
1227                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1228         }
1229         *R_GEN_CONFIG = genconfig_shadow;
1230         local_irq_restore(flags);
1231 }
1232
1233 static void e100_disable_rxdma_channel(struct e100_serial *info)
1234 {
1235         unsigned long flags;
1236
1237         /* Disable input DMA channel for the serial port in question
1238          * ( set to something other than serialX)
1239          */
1240         local_irq_save(flags);
1241         if (info->line == 0) {
1242                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1243                     IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1244                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma7);
1245                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1246                 }
1247         } else if (info->line == 1) {
1248                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1249                     IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1250                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma9);
1251                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1252                 }
1253         } else if (info->line == 2) {
1254                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1255                     IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1256                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma3);
1257                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1258                 }
1259         } else if (info->line == 3) {
1260                 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1261                     IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1262                         genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma5);
1263                         genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1264                 }
1265         }
1266         *R_GEN_CONFIG = genconfig_shadow;
1267         local_irq_restore(flags);
1268 }
1269
1270
1271 static void e100_enable_rxdma_channel(struct e100_serial *info)
1272 {
1273         unsigned long flags;
1274
1275         local_irq_save(flags);
1276         /* Enable input DMA channel for the serial port in question */
1277         if (info->line == 0) {
1278                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma7);
1279                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1280         } else if (info->line == 1) {
1281                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma9);
1282                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1283         } else if (info->line == 2) {
1284                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma3);
1285                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1286         } else if (info->line == 3) {
1287                 genconfig_shadow &=  ~IO_MASK(R_GEN_CONFIG, dma5);
1288                 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1289         }
1290         *R_GEN_CONFIG = genconfig_shadow;
1291         local_irq_restore(flags);
1292 }
1293
1294 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1295 /* in order to detect and fix errors on the first byte
1296    we have to use the serial interrupts as well. */
1297
1298 static inline void
1299 e100_disable_serial_data_irq(struct e100_serial *info)
1300 {
1301 #ifdef SERIAL_DEBUG_INTR
1302         printk("ser_irq(%d): 0\n",info->line);
1303 #endif
1304         DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1305         *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1306 }
1307
1308 static inline void
1309 e100_enable_serial_data_irq(struct e100_serial *info)
1310 {
1311 #ifdef SERIAL_DEBUG_INTR
1312         printk("ser_irq(%d): 1\n",info->line);
1313         printk("**** %d = %d\n",
1314                (8+2*info->line),
1315                (1U << (8+2*info->line)));
1316 #endif
1317         DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1318         *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1319 }
1320 #endif
1321
1322 static inline void
1323 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1324 {
1325 #ifdef SERIAL_DEBUG_INTR
1326         printk("ser_tx_irq(%d): 0\n",info->line);
1327 #endif
1328         DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1329         *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1330 }
1331
1332 static inline void
1333 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1334 {
1335 #ifdef SERIAL_DEBUG_INTR
1336         printk("ser_tx_irq(%d): 1\n",info->line);
1337         printk("**** %d = %d\n",
1338                (8+1+2*info->line),
1339                (1U << (8+1+2*info->line)));
1340 #endif
1341         DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1342         *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1343 }
1344
1345 static inline void e100_enable_rx_irq(struct e100_serial *info)
1346 {
1347         if (info->uses_dma_in)
1348                 e100_enable_rxdma_irq(info);
1349         else
1350                 e100_enable_serial_data_irq(info);
1351 }
1352 static inline void e100_disable_rx_irq(struct e100_serial *info)
1353 {
1354         if (info->uses_dma_in)
1355                 e100_disable_rxdma_irq(info);
1356         else
1357                 e100_disable_serial_data_irq(info);
1358 }
1359
1360 #if defined(CONFIG_ETRAX_RS485)
1361 /* Enable RS-485 mode on selected port. This is UGLY. */
1362 static int
1363 e100_enable_rs485(struct tty_struct *tty, struct serial_rs485 *r)
1364 {
1365         struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1366
1367 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1368         *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1369 #endif
1370 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1371         REG_SHADOW_SET(R_PORT_G_DATA,  port_g_data_shadow,
1372                        rs485_port_g_bit, 1);
1373 #endif
1374 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1375         REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1376                        CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1377         REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1378                        CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1379 #endif
1380
1381         info->rs485 = *r;
1382
1383         /* Maximum delay before RTS equal to 1000 */
1384         if (info->rs485.delay_rts_before_send >= 1000)
1385                 info->rs485.delay_rts_before_send = 1000;
1386
1387 /*      printk("rts: on send = %i, after = %i, enabled = %i",
1388                     info->rs485.rts_on_send,
1389                     info->rs485.rts_after_sent,
1390                     info->rs485.enabled
1391         );
1392 */
1393         return 0;
1394 }
1395
1396 static int
1397 e100_write_rs485(struct tty_struct *tty,
1398                  const unsigned char *buf, int count)
1399 {
1400         struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1401         int old_value = (info->rs485.flags) & SER_RS485_ENABLED;
1402
1403         /* rs485 is always implicitly enabled if we're using the ioctl()
1404          * but it doesn't have to be set in the serial_rs485
1405          * (to be backward compatible with old apps)
1406          * So we store, set and restore it.
1407          */
1408         info->rs485.flags |= SER_RS485_ENABLED;
1409         /* rs_write now deals with RS485 if enabled */
1410         count = rs_write(tty, buf, count);
1411         if (!old_value)
1412                 info->rs485.flags &= ~(SER_RS485_ENABLED);
1413         return count;
1414 }
1415
1416 #ifdef CONFIG_ETRAX_FAST_TIMER
1417 /* Timer function to toggle RTS when using FAST_TIMER */
1418 static void rs485_toggle_rts_timer_function(unsigned long data)
1419 {
1420         struct e100_serial *info = (struct e100_serial *)data;
1421
1422         fast_timers_rs485[info->line].function = NULL;
1423         e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
1424 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1425         e100_enable_rx(info);
1426         e100_enable_rx_irq(info);
1427 #endif
1428 }
1429 #endif
1430 #endif /* CONFIG_ETRAX_RS485 */
1431
1432 /*
1433  * ------------------------------------------------------------
1434  * rs_stop() and rs_start()
1435  *
1436  * This routines are called before setting or resetting tty->stopped.
1437  * They enable or disable transmitter using the XOFF registers, as necessary.
1438  * ------------------------------------------------------------
1439  */
1440
1441 static void
1442 rs_stop(struct tty_struct *tty)
1443 {
1444         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1445         if (info) {
1446                 unsigned long flags;
1447                 unsigned long xoff;
1448
1449                 local_irq_save(flags);
1450                 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1451                                 CIRC_CNT(info->xmit.head,
1452                                          info->xmit.tail,SERIAL_XMIT_SIZE)));
1453
1454                 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char,
1455                                 STOP_CHAR(info->port.tty));
1456                 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1457                 if (tty->termios.c_iflag & IXON ) {
1458                         xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1459                 }
1460
1461                 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1462                 local_irq_restore(flags);
1463         }
1464 }
1465
1466 static void
1467 rs_start(struct tty_struct *tty)
1468 {
1469         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1470         if (info) {
1471                 unsigned long flags;
1472                 unsigned long xoff;
1473
1474                 local_irq_save(flags);
1475                 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1476                                 CIRC_CNT(info->xmit.head,
1477                                          info->xmit.tail,SERIAL_XMIT_SIZE)));
1478                 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1479                 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1480                 if (tty->termios.c_iflag & IXON ) {
1481                         xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1482                 }
1483
1484                 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1485                 if (!info->uses_dma_out &&
1486                     info->xmit.head != info->xmit.tail && info->xmit.buf)
1487                         e100_enable_serial_tx_ready_irq(info);
1488
1489                 local_irq_restore(flags);
1490         }
1491 }
1492
1493 /*
1494  * ----------------------------------------------------------------------
1495  *
1496  * Here starts the interrupt handling routines.  All of the following
1497  * subroutines are declared as inline and are folded into
1498  * rs_interrupt().  They were separated out for readability's sake.
1499  *
1500  * Note: rs_interrupt() is a "fast" interrupt, which means that it
1501  * runs with interrupts turned off.  People who may want to modify
1502  * rs_interrupt() should try to keep the interrupt handler as fast as
1503  * possible.  After you are done making modifications, it is not a bad
1504  * idea to do:
1505  *
1506  * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1507  *
1508  * and look at the resulting assemble code in serial.s.
1509  *
1510  *                              - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1511  * -----------------------------------------------------------------------
1512  */
1513
1514 /*
1515  * This routine is used by the interrupt handler to schedule
1516  * processing in the software interrupt portion of the driver.
1517  */
1518 static void rs_sched_event(struct e100_serial *info, int event)
1519 {
1520         if (info->event & (1 << event))
1521                 return;
1522         info->event |= 1 << event;
1523         schedule_work(&info->work);
1524 }
1525
1526 /* The output DMA channel is free - use it to send as many chars as possible
1527  * NOTES:
1528  *   We don't pay attention to info->x_char, which means if the TTY wants to
1529  *   use XON/XOFF it will set info->x_char but we won't send any X char!
1530  *
1531  *   To implement this, we'd just start a DMA send of 1 byte pointing at a
1532  *   buffer containing the X char, and skip updating xmit. We'd also have to
1533  *   check if the last sent char was the X char when we enter this function
1534  *   the next time, to avoid updating xmit with the sent X value.
1535  */
1536
1537 static void
1538 transmit_chars_dma(struct e100_serial *info)
1539 {
1540         unsigned int c, sentl;
1541         struct etrax_dma_descr *descr;
1542
1543         /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1544         *info->oclrintradr =
1545                 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1546                 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1547
1548 #ifdef SERIAL_DEBUG_INTR
1549         if (info->line == SERIAL_DEBUG_LINE)
1550                 printk("tc\n");
1551 #endif
1552         if (!info->tr_running) {
1553                 /* weirdo... we shouldn't get here! */
1554                 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1555                 return;
1556         }
1557
1558         descr = &info->tr_descr;
1559
1560         /* first get the amount of bytes sent during the last DMA transfer,
1561            and update xmit accordingly */
1562
1563         /* if the stop bit was not set, all data has been sent */
1564         if (!(descr->status & d_stop)) {
1565                 sentl = descr->sw_len;
1566         } else
1567                 /* otherwise we find the amount of data sent here */
1568                 sentl = descr->hw_len;
1569
1570         DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1571
1572         /* update stats */
1573         info->icount.tx += sentl;
1574
1575         /* update xmit buffer */
1576         info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1577
1578         /* if there is only a few chars left in the buf, wake up the blocked
1579            write if any */
1580         if (CIRC_CNT(info->xmit.head,
1581                      info->xmit.tail,
1582                      SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1583                 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1584
1585         /* find out the largest amount of consecutive bytes we want to send now */
1586
1587         c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1588
1589         /* Don't send all in one DMA transfer - divide it so we wake up
1590          * application before all is sent
1591          */
1592
1593         if (c >= 4*WAKEUP_CHARS)
1594                 c = c/2;
1595
1596         if (c <= 0) {
1597                 /* our job here is done, don't schedule any new DMA transfer */
1598                 info->tr_running = 0;
1599
1600 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
1601                 if (info->rs485.flags & SER_RS485_ENABLED) {
1602                         /* Set a short timer to toggle RTS */
1603                         start_one_shot_timer(&fast_timers_rs485[info->line],
1604                                              rs485_toggle_rts_timer_function,
1605                                              (unsigned long)info,
1606                                              info->char_time_usec*2,
1607                                              "RS-485");
1608                 }
1609 #endif /* RS485 */
1610                 return;
1611         }
1612
1613         /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
1614         /* set up the descriptor correctly for output */
1615         DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
1616         descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
1617         descr->sw_len = c;
1618         descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
1619         descr->status = 0;
1620
1621         *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
1622         *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1623
1624         /* DMA is now running (hopefully) */
1625 } /* transmit_chars_dma */
1626
1627 static void
1628 start_transmit(struct e100_serial *info)
1629 {
1630 #if 0
1631         if (info->line == SERIAL_DEBUG_LINE)
1632                 printk("x\n");
1633 #endif
1634
1635         info->tr_descr.sw_len = 0;
1636         info->tr_descr.hw_len = 0;
1637         info->tr_descr.status = 0;
1638         info->tr_running = 1;
1639         if (info->uses_dma_out)
1640                 transmit_chars_dma(info);
1641         else
1642                 e100_enable_serial_tx_ready_irq(info);
1643 } /* start_transmit */
1644
1645 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
1646 static int serial_fast_timer_started = 0;
1647 static int serial_fast_timer_expired = 0;
1648 static void flush_timeout_function(unsigned long data);
1649 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
1650   unsigned long timer_flags; \
1651   local_irq_save(timer_flags); \
1652   if (fast_timers[info->line].function == NULL) { \
1653     serial_fast_timer_started++; \
1654     TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
1655     TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
1656     start_one_shot_timer(&fast_timers[info->line], \
1657                          flush_timeout_function, \
1658                          (unsigned long)info, \
1659                          (usec), \
1660                          string); \
1661   } \
1662   else { \
1663     TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
1664   } \
1665   local_irq_restore(timer_flags); \
1666 }
1667 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
1668
1669 #else
1670 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
1671 #define START_FLUSH_FAST_TIMER(info, string)
1672 #endif
1673
1674 static struct etrax_recv_buffer *
1675 alloc_recv_buffer(unsigned int size)
1676 {
1677         struct etrax_recv_buffer *buffer;
1678
1679         if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
1680                 return NULL;
1681
1682         buffer->next = NULL;
1683         buffer->length = 0;
1684         buffer->error = TTY_NORMAL;
1685
1686         return buffer;
1687 }
1688
1689 static void
1690 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
1691 {
1692         unsigned long flags;
1693
1694         local_irq_save(flags);
1695
1696         if (!info->first_recv_buffer)
1697                 info->first_recv_buffer = buffer;
1698         else
1699                 info->last_recv_buffer->next = buffer;
1700
1701         info->last_recv_buffer = buffer;
1702
1703         info->recv_cnt += buffer->length;
1704         if (info->recv_cnt > info->max_recv_cnt)
1705                 info->max_recv_cnt = info->recv_cnt;
1706
1707         local_irq_restore(flags);
1708 }
1709
1710 static int
1711 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
1712 {
1713         struct etrax_recv_buffer *buffer;
1714         if (info->uses_dma_in) {
1715                 if (!(buffer = alloc_recv_buffer(4)))
1716                         return 0;
1717
1718                 buffer->length = 1;
1719                 buffer->error = flag;
1720                 buffer->buffer[0] = data;
1721
1722                 append_recv_buffer(info, buffer);
1723
1724                 info->icount.rx++;
1725         } else {
1726                 tty_insert_flip_char(&info->port, data, flag);
1727                 info->icount.rx++;
1728         }
1729
1730         return 1;
1731 }
1732
1733 static unsigned int handle_descr_data(struct e100_serial *info,
1734                                       struct etrax_dma_descr *descr,
1735                                       unsigned int recvl)
1736 {
1737         struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
1738
1739         if (info->recv_cnt + recvl > 65536) {
1740                 printk(KERN_WARNING
1741                        "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __func__, recvl);
1742                 return 0;
1743         }
1744
1745         buffer->length = recvl;
1746
1747         if (info->errorcode == ERRCODE_SET_BREAK)
1748                 buffer->error = TTY_BREAK;
1749         info->errorcode = 0;
1750
1751         append_recv_buffer(info, buffer);
1752
1753         if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1754                 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1755
1756         descr->buf = virt_to_phys(buffer->buffer);
1757
1758         return recvl;
1759 }
1760
1761 static unsigned int handle_all_descr_data(struct e100_serial *info)
1762 {
1763         struct etrax_dma_descr *descr;
1764         unsigned int recvl;
1765         unsigned int ret = 0;
1766
1767         while (1)
1768         {
1769                 descr = &info->rec_descr[info->cur_rec_descr];
1770
1771                 if (descr == phys_to_virt(*info->idescradr))
1772                         break;
1773
1774                 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
1775                         info->cur_rec_descr = 0;
1776
1777                 /* find out how many bytes were read */
1778
1779                 /* if the eop bit was not set, all data has been received */
1780                 if (!(descr->status & d_eop)) {
1781                         recvl = descr->sw_len;
1782                 } else {
1783                         /* otherwise we find the amount of data received here */
1784                         recvl = descr->hw_len;
1785                 }
1786
1787                 /* Reset the status information */
1788                 descr->status = 0;
1789
1790                 DFLOW(  DEBUG_LOG(info->line, "RX %lu\n", recvl);
1791                         if (info->port.tty->stopped) {
1792                                 unsigned char *buf = phys_to_virt(descr->buf);
1793                                 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
1794                                 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
1795                                 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
1796                         }
1797                         );
1798
1799                 /* update stats */
1800                 info->icount.rx += recvl;
1801
1802                 ret += handle_descr_data(info, descr, recvl);
1803         }
1804
1805         return ret;
1806 }
1807
1808 static void receive_chars_dma(struct e100_serial *info)
1809 {
1810         struct tty_struct *tty;
1811         unsigned char rstat;
1812
1813         /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1814         *info->iclrintradr =
1815                 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1816                 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1817
1818         tty = info->port.tty;
1819         if (!tty) /* Something wrong... */
1820                 return;
1821
1822 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1823         if (info->uses_dma_in)
1824                 e100_enable_serial_data_irq(info);
1825 #endif
1826
1827         if (info->errorcode == ERRCODE_INSERT_BREAK)
1828                 add_char_and_flag(info, '\0', TTY_BREAK);
1829
1830         handle_all_descr_data(info);
1831
1832         /* Read the status register to detect errors */
1833         rstat = info->ioport[REG_STATUS];
1834         if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
1835                 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
1836         }
1837
1838         if (rstat & SER_ERROR_MASK) {
1839                 /* If we got an error, we must reset it by reading the
1840                  * data_in field
1841                  */
1842                 unsigned char data = info->ioport[REG_DATA];
1843
1844                 PROCSTAT(ser_stat[info->line].errors_cnt++);
1845                 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
1846                           ((rstat & SER_ERROR_MASK) << 8) | data);
1847
1848                 if (rstat & SER_PAR_ERR_MASK)
1849                         add_char_and_flag(info, data, TTY_PARITY);
1850                 else if (rstat & SER_OVERRUN_MASK)
1851                         add_char_and_flag(info, data, TTY_OVERRUN);
1852                 else if (rstat & SER_FRAMING_ERR_MASK)
1853                         add_char_and_flag(info, data, TTY_FRAME);
1854         }
1855
1856         START_FLUSH_FAST_TIMER(info, "receive_chars");
1857
1858         /* Restart the receiving DMA */
1859         *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
1860 }
1861
1862 static int start_recv_dma(struct e100_serial *info)
1863 {
1864         struct etrax_dma_descr *descr = info->rec_descr;
1865         struct etrax_recv_buffer *buffer;
1866         int i;
1867
1868         /* Set up the receiving descriptors */
1869         for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
1870                 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1871                         panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1872
1873                 descr[i].ctrl = d_int;
1874                 descr[i].buf = virt_to_phys(buffer->buffer);
1875                 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
1876                 descr[i].hw_len = 0;
1877                 descr[i].status = 0;
1878                 descr[i].next = virt_to_phys(&descr[i+1]);
1879         }
1880
1881         /* Link the last descriptor to the first */
1882         descr[i-1].next = virt_to_phys(&descr[0]);
1883
1884         /* Start with the first descriptor in the list */
1885         info->cur_rec_descr = 0;
1886
1887         /* Start the DMA */
1888         *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
1889         *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1890
1891         /* Input DMA should be running now */
1892         return 1;
1893 }
1894
1895 static void
1896 start_receive(struct e100_serial *info)
1897 {
1898         if (info->uses_dma_in) {
1899                 /* reset the input dma channel to be sure it works */
1900
1901                 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
1902                 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
1903                        IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
1904
1905                 start_recv_dma(info);
1906         }
1907 }
1908
1909
1910 /* the bits in the MASK2 register are laid out like this:
1911    DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
1912    where I is the input channel and O is the output channel for the port.
1913    info->irq is the bit number for the DMAO_DESCR so to check the others we
1914    shift info->irq to the left.
1915 */
1916
1917 /* dma output channel interrupt handler
1918    this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
1919    DMA8(ser1) when they have finished a descriptor with the intr flag set.
1920 */
1921
1922 static irqreturn_t
1923 tr_interrupt(int irq, void *dev_id)
1924 {
1925         struct e100_serial *info;
1926         unsigned long ireg;
1927         int i;
1928         int handled = 0;
1929
1930         /* find out the line that caused this irq and get it from rs_table */
1931
1932         ireg = *R_IRQ_MASK2_RD;  /* get the active irq bits for the dma channels */
1933
1934         for (i = 0; i < NR_PORTS; i++) {
1935                 info = rs_table + i;
1936                 if (!info->enabled || !info->uses_dma_out)
1937                         continue;
1938                 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
1939                 if (ireg & info->irq) {
1940                         handled = 1;
1941                         /* we can send a new dma bunch. make it so. */
1942                         DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
1943                         /* Read jiffies_usec first,
1944                          * we want this time to be as late as possible
1945                          */
1946                         PROCSTAT(ser_stat[info->line].tx_dma_ints++);
1947                         info->last_tx_active_usec = GET_JIFFIES_USEC();
1948                         info->last_tx_active = jiffies;
1949                         transmit_chars_dma(info);
1950                 }
1951
1952                 /* FIXME: here we should really check for a change in the
1953                    status lines and if so call status_handle(info) */
1954         }
1955         return IRQ_RETVAL(handled);
1956 } /* tr_interrupt */
1957
1958 /* dma input channel interrupt handler */
1959
1960 static irqreturn_t
1961 rec_interrupt(int irq, void *dev_id)
1962 {
1963         struct e100_serial *info;
1964         unsigned long ireg;
1965         int i;
1966         int handled = 0;
1967
1968         /* find out the line that caused this irq and get it from rs_table */
1969
1970         ireg = *R_IRQ_MASK2_RD;  /* get the active irq bits for the dma channels */
1971
1972         for (i = 0; i < NR_PORTS; i++) {
1973                 info = rs_table + i;
1974                 if (!info->enabled || !info->uses_dma_in)
1975                         continue;
1976                 /* check for both dma_eop and dma_descr for the input dma channel */
1977                 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
1978                         handled = 1;
1979                         /* we have received something */
1980                         receive_chars_dma(info);
1981                 }
1982
1983                 /* FIXME: here we should really check for a change in the
1984                    status lines and if so call status_handle(info) */
1985         }
1986         return IRQ_RETVAL(handled);
1987 } /* rec_interrupt */
1988
1989 static int force_eop_if_needed(struct e100_serial *info)
1990 {
1991         /* We check data_avail bit to determine if data has
1992          * arrived since last time
1993          */
1994         unsigned char rstat = info->ioport[REG_STATUS];
1995
1996         /* error or datavail? */
1997         if (rstat & SER_ERROR_MASK) {
1998                 /* Some error has occurred. If there has been valid data, an
1999                  * EOP interrupt will be made automatically. If no data, the
2000                  * normal ser_interrupt should be enabled and handle it.
2001                  * So do nothing!
2002                  */
2003                 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2004                           rstat | (info->line << 8));
2005                 return 0;
2006         }
2007
2008         if (rstat & SER_DATA_AVAIL_MASK) {
2009                 /* Ok data, no error, count it */
2010                 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2011                           rstat | (info->line << 8)));
2012                 /* Read data to clear status flags */
2013                 (void)info->ioport[REG_DATA];
2014
2015                 info->forced_eop = 0;
2016                 START_FLUSH_FAST_TIMER(info, "magic");
2017                 return 0;
2018         }
2019
2020         /* hit the timeout, force an EOP for the input
2021          * dma channel if we haven't already
2022          */
2023         if (!info->forced_eop) {
2024                 info->forced_eop = 1;
2025                 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2026                 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2027                 FORCE_EOP(info);
2028         }
2029
2030         return 1;
2031 }
2032
2033 static void flush_to_flip_buffer(struct e100_serial *info)
2034 {
2035         struct etrax_recv_buffer *buffer;
2036         unsigned long flags;
2037
2038         local_irq_save(flags);
2039
2040         while ((buffer = info->first_recv_buffer) != NULL) {
2041                 unsigned int count = buffer->length;
2042
2043                 tty_insert_flip_string(&info->port, buffer->buffer, count);
2044                 info->recv_cnt -= count;
2045
2046                 if (count == buffer->length) {
2047                         info->first_recv_buffer = buffer->next;
2048                         kfree(buffer);
2049                 } else {
2050                         buffer->length -= count;
2051                         memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2052                         buffer->error = TTY_NORMAL;
2053                 }
2054         }
2055
2056         if (!info->first_recv_buffer)
2057                 info->last_recv_buffer = NULL;
2058
2059         local_irq_restore(flags);
2060
2061         /* This includes a check for low-latency */
2062         tty_flip_buffer_push(&info->port);
2063 }
2064
2065 static void check_flush_timeout(struct e100_serial *info)
2066 {
2067         /* Flip what we've got (if we can) */
2068         flush_to_flip_buffer(info);
2069
2070         /* We might need to flip later, but not to fast
2071          * since the system is busy processing input... */
2072         if (info->first_recv_buffer)
2073                 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2074
2075         /* Force eop last, since data might have come while we're processing
2076          * and if we started the slow timer above, we won't start a fast
2077          * below.
2078          */
2079         force_eop_if_needed(info);
2080 }
2081
2082 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2083 static void flush_timeout_function(unsigned long data)
2084 {
2085         struct e100_serial *info = (struct e100_serial *)data;
2086
2087         fast_timers[info->line].function = NULL;
2088         serial_fast_timer_expired++;
2089         TIMERD(DEBUG_LOG(info->line, "flush_timeout %i ", info->line));
2090         TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2091         check_flush_timeout(info);
2092 }
2093
2094 #else
2095
2096 /* dma fifo/buffer timeout handler
2097    forces an end-of-packet for the dma input channel if no chars
2098    have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2099 */
2100
2101 static struct timer_list flush_timer;
2102
2103 static void
2104 timed_flush_handler(unsigned long ptr)
2105 {
2106         struct e100_serial *info;
2107         int i;
2108
2109         for (i = 0; i < NR_PORTS; i++) {
2110                 info = rs_table + i;
2111                 if (info->uses_dma_in)
2112                         check_flush_timeout(info);
2113         }
2114
2115         /* restart flush timer */
2116         mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2117 }
2118 #endif
2119
2120 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2121
2122 /* If there is an error (ie break) when the DMA is running and
2123  * there are no bytes in the fifo the DMA is stopped and we get no
2124  * eop interrupt. Thus we have to monitor the first bytes on a DMA
2125  * transfer, and if it is without error we can turn the serial
2126  * interrupts off.
2127  */
2128
2129 /*
2130 BREAK handling on ETRAX 100:
2131 ETRAX will generate interrupt although there is no stop bit between the
2132 characters.
2133
2134 Depending on how long the break sequence is, the end of the breaksequence
2135 will look differently:
2136 | indicates start/end of a character.
2137
2138 B= Break character (0x00) with framing error.
2139 E= Error byte with parity error received after B characters.
2140 F= "Faked" valid byte received immediately after B characters.
2141 V= Valid byte
2142
2143 1.
2144     B          BL         ___________________________ V
2145 .._|__________|__________|                           |valid data |
2146
2147 Multiple frame errors with data == 0x00 (B),
2148 the timing matches up "perfectly" so no extra ending char is detected.
2149 The RXD pin is 1 in the last interrupt, in that case
2150 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2151 know if another byte will come and this really is case 2. below
2152 (e.g F=0xFF or 0xFE)
2153 If RXD pin is 0 we can expect another character (see 2. below).
2154
2155
2156 2.
2157
2158     B          B          E or F__________________..__ V
2159 .._|__________|__________|______    |                 |valid data
2160                           "valid" or
2161                           parity error
2162
2163 Multiple frame errors with data == 0x00 (B),
2164 but the part of the break trigs is interpreted as a start bit (and possibly
2165 some 0 bits followed by a number of 1 bits and a stop bit).
2166 Depending on parity settings etc. this last character can be either
2167 a fake "valid" char (F) or have a parity error (E).
2168
2169 If the character is valid it will be put in the buffer,
2170 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2171 will set the flags so the tty will handle it,
2172 if it's an error byte it will not be put in the buffer
2173 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2174
2175 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2176 of the last faulty char (B) and compares it with the current time:
2177 If the time elapsed time is less then 2*char_time_usec we will assume
2178 it's a faked F char and not a Valid char and set
2179 info->errorcode = ERRCODE_SET_BREAK.
2180
2181 Flaws in the above solution:
2182 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2183 We use the timer to distinguish a F character from a V character,
2184 if a V character is to close after the break we might make the wrong decision.
2185
2186 TODO: The break will be delayed until an F or V character is received.
2187
2188 */
2189
2190 static void handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2191 {
2192         unsigned long data_read;
2193
2194         /* Read data and status at the same time */
2195         data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2196 more_data:
2197         if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2198                 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2199         }
2200         DINTR2(DEBUG_LOG(info->line, "ser_rx   %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2201
2202         if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2203                           IO_MASK(R_SERIAL0_READ, par_err) |
2204                           IO_MASK(R_SERIAL0_READ, overrun) )) {
2205                 /* An error */
2206                 info->last_rx_active_usec = GET_JIFFIES_USEC();
2207                 info->last_rx_active = jiffies;
2208                 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2209                 DLOG_INT_TRIG(
2210                 if (!log_int_trig1_pos) {
2211                         log_int_trig1_pos = log_int_pos;
2212                         log_int(rdpc(), 0, 0);
2213                 }
2214                 );
2215
2216
2217                 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2218                      (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2219                         /* Most likely a break, but we get interrupts over and
2220                          * over again.
2221                          */
2222
2223                         if (!info->break_detected_cnt) {
2224                                 DEBUG_LOG(info->line, "#BRK start\n", 0);
2225                         }
2226                         if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2227                                 /* The RX pin is high now, so the break
2228                                  * must be over, but....
2229                                  * we can't really know if we will get another
2230                                  * last byte ending the break or not.
2231                                  * And we don't know if the byte (if any) will
2232                                  * have an error or look valid.
2233                                  */
2234                                 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2235                                 info->errorcode = ERRCODE_INSERT_BREAK;
2236                         }
2237                         info->break_detected_cnt++;
2238                 } else {
2239                         /* The error does not look like a break, but could be
2240                          * the end of one
2241                          */
2242                         if (info->break_detected_cnt) {
2243                                 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2244                                 info->errorcode = ERRCODE_INSERT_BREAK;
2245                         } else {
2246                                 unsigned char data = IO_EXTRACT(R_SERIAL0_READ,
2247                                         data_in, data_read);
2248                                 char flag = TTY_NORMAL;
2249                                 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2250                                         tty_insert_flip_char(&info->port, 0, flag);
2251                                         info->icount.rx++;
2252                                 }
2253
2254                                 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2255                                         info->icount.parity++;
2256                                         flag = TTY_PARITY;
2257                                 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2258                                         info->icount.overrun++;
2259                                         flag = TTY_OVERRUN;
2260                                 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2261                                         info->icount.frame++;
2262                                         flag = TTY_FRAME;
2263                                 }
2264                                 tty_insert_flip_char(&info->port, data, flag);
2265                                 info->errorcode = 0;
2266                         }
2267                         info->break_detected_cnt = 0;
2268                 }
2269         } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2270                 /* No error */
2271                 DLOG_INT_TRIG(
2272                 if (!log_int_trig1_pos) {
2273                         if (log_int_pos >= log_int_size) {
2274                                 log_int_pos = 0;
2275                         }
2276                         log_int_trig0_pos = log_int_pos;
2277                         log_int(rdpc(), 0, 0);
2278                 }
2279                 );
2280                 tty_insert_flip_char(&info->port,
2281                         IO_EXTRACT(R_SERIAL0_READ, data_in, data_read),
2282                         TTY_NORMAL);
2283         } else {
2284                 DEBUG_LOG(info->line, "ser_rx int but no data_avail  %08lX\n", data_read);
2285         }
2286
2287
2288         info->icount.rx++;
2289         data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2290         if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2291                 DEBUG_LOG(info->line, "ser_rx   %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2292                 goto more_data;
2293         }
2294
2295         tty_flip_buffer_push(&info->port);
2296 }
2297
2298 static void handle_ser_rx_interrupt(struct e100_serial *info)
2299 {
2300         unsigned char rstat;
2301
2302 #ifdef SERIAL_DEBUG_INTR
2303         printk("Interrupt from serport %d\n", i);
2304 #endif
2305 /*      DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2306         if (!info->uses_dma_in) {
2307                 handle_ser_rx_interrupt_no_dma(info);
2308                 return;
2309         }
2310         /* DMA is used */
2311         rstat = info->ioport[REG_STATUS];
2312         if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2313                 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2314         }
2315
2316         if (rstat & SER_ERROR_MASK) {
2317                 unsigned char data;
2318
2319                 info->last_rx_active_usec = GET_JIFFIES_USEC();
2320                 info->last_rx_active = jiffies;
2321                 /* If we got an error, we must reset it by reading the
2322                  * data_in field
2323                  */
2324                 data = info->ioport[REG_DATA];
2325                 DINTR1(DEBUG_LOG(info->line, "ser_rx!  %c\n", data));
2326                 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2327                 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2328                         /* Most likely a break, but we get interrupts over and
2329                          * over again.
2330                          */
2331
2332                         if (!info->break_detected_cnt) {
2333                                 DEBUG_LOG(info->line, "#BRK start\n", 0);
2334                         }
2335                         if (rstat & SER_RXD_MASK) {
2336                                 /* The RX pin is high now, so the break
2337                                  * must be over, but....
2338                                  * we can't really know if we will get another
2339                                  * last byte ending the break or not.
2340                                  * And we don't know if the byte (if any) will
2341                                  * have an error or look valid.
2342                                  */
2343                                 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2344                                 info->errorcode = ERRCODE_INSERT_BREAK;
2345                         }
2346                         info->break_detected_cnt++;
2347                 } else {
2348                         /* The error does not look like a break, but could be
2349                          * the end of one
2350                          */
2351                         if (info->break_detected_cnt) {
2352                                 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2353                                 info->errorcode = ERRCODE_INSERT_BREAK;
2354                         } else {
2355                                 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2356                                         info->icount.brk++;
2357                                         add_char_and_flag(info, '\0', TTY_BREAK);
2358                                 }
2359
2360                                 if (rstat & SER_PAR_ERR_MASK) {
2361                                         info->icount.parity++;
2362                                         add_char_and_flag(info, data, TTY_PARITY);
2363                                 } else if (rstat & SER_OVERRUN_MASK) {
2364                                         info->icount.overrun++;
2365                                         add_char_and_flag(info, data, TTY_OVERRUN);
2366                                 } else if (rstat & SER_FRAMING_ERR_MASK) {
2367                                         info->icount.frame++;
2368                                         add_char_and_flag(info, data, TTY_FRAME);
2369                                 }
2370
2371                                 info->errorcode = 0;
2372                         }
2373                         info->break_detected_cnt = 0;
2374                         DEBUG_LOG(info->line, "#iERR s d %04X\n",
2375                                   ((rstat & SER_ERROR_MASK) << 8) | data);
2376                 }
2377                 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2378         } else { /* It was a valid byte, now let the DMA do the rest */
2379                 unsigned long curr_time_u = GET_JIFFIES_USEC();
2380                 unsigned long curr_time = jiffies;
2381
2382                 if (info->break_detected_cnt) {
2383                         /* Detect if this character is a new valid char or the
2384                          * last char in a break sequence: If LSBits are 0 and
2385                          * MSBits are high AND the time is close to the
2386                          * previous interrupt we should discard it.
2387                          */
2388                         long elapsed_usec =
2389                           (curr_time - info->last_rx_active) * (1000000/HZ) +
2390                           curr_time_u - info->last_rx_active_usec;
2391                         if (elapsed_usec < 2*info->char_time_usec) {
2392                                 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2393                                 /* Report as BREAK (error) and let
2394                                  * receive_chars_dma() handle it
2395                                  */
2396                                 info->errorcode = ERRCODE_SET_BREAK;
2397                         } else {
2398                                 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2399                         }
2400                         DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2401                 }
2402
2403 #ifdef SERIAL_DEBUG_INTR
2404                 printk("** OK, disabling ser_interrupts\n");
2405 #endif
2406                 e100_disable_serial_data_irq(info);
2407                 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2408                 info->break_detected_cnt = 0;
2409
2410                 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2411         }
2412         /* Restarting the DMA never hurts */
2413         *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2414         START_FLUSH_FAST_TIMER(info, "ser_int");
2415 } /* handle_ser_rx_interrupt */
2416
2417 static void handle_ser_tx_interrupt(struct e100_serial *info)
2418 {
2419         unsigned long flags;
2420
2421         if (info->x_char) {
2422                 unsigned char rstat;
2423                 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2424                 local_irq_save(flags);
2425                 rstat = info->ioport[REG_STATUS];
2426                 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2427
2428                 info->ioport[REG_TR_DATA] = info->x_char;
2429                 info->icount.tx++;
2430                 info->x_char = 0;
2431                 /* We must enable since it is disabled in ser_interrupt */
2432                 e100_enable_serial_tx_ready_irq(info);
2433                 local_irq_restore(flags);
2434                 return;
2435         }
2436         if (info->uses_dma_out) {
2437                 unsigned char rstat;
2438                 int i;
2439                 /* We only use normal tx interrupt when sending x_char */
2440                 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2441                 local_irq_save(flags);
2442                 rstat = info->ioport[REG_STATUS];
2443                 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2444                 e100_disable_serial_tx_ready_irq(info);
2445                 if (info->port.tty->stopped)
2446                         rs_stop(info->port.tty);
2447                 /* Enable the DMA channel and tell it to continue */
2448                 e100_enable_txdma_channel(info);
2449                 /* Wait 12 cycles before doing the DMA command */
2450                 for(i = 6;  i > 0; i--)
2451                         nop();
2452
2453                 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
2454                 local_irq_restore(flags);
2455                 return;
2456         }
2457         /* Normal char-by-char interrupt */
2458         if (info->xmit.head == info->xmit.tail
2459             || info->port.tty->stopped) {
2460                 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n",
2461                                 info->port.tty->stopped));
2462                 e100_disable_serial_tx_ready_irq(info);
2463                 info->tr_running = 0;
2464                 return;
2465         }
2466         DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
2467         /* Send a byte, rs485 timing is critical so turn of ints */
2468         local_irq_save(flags);
2469         info->ioport[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
2470         info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
2471         info->icount.tx++;
2472         if (info->xmit.head == info->xmit.tail) {
2473 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2474                 if (info->rs485.flags & SER_RS485_ENABLED) {
2475                         /* Set a short timer to toggle RTS */
2476                         start_one_shot_timer(&fast_timers_rs485[info->line],
2477                                              rs485_toggle_rts_timer_function,
2478                                              (unsigned long)info,
2479                                              info->char_time_usec*2,
2480                                              "RS-485");
2481                 }
2482 #endif /* RS485 */
2483                 info->last_tx_active_usec = GET_JIFFIES_USEC();
2484                 info->last_tx_active = jiffies;
2485                 e100_disable_serial_tx_ready_irq(info);
2486                 info->tr_running = 0;
2487                 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
2488         } else {
2489                 /* We must enable since it is disabled in ser_interrupt */
2490                 e100_enable_serial_tx_ready_irq(info);
2491         }
2492         local_irq_restore(flags);
2493
2494         if (CIRC_CNT(info->xmit.head,
2495                      info->xmit.tail,
2496                      SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2497                 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2498
2499 } /* handle_ser_tx_interrupt */
2500
2501 /* result of time measurements:
2502  * RX duration 54-60 us when doing something, otherwise 6-9 us
2503  * ser_int duration: just sending: 8-15 us normally, up to 73 us
2504  */
2505 static irqreturn_t
2506 ser_interrupt(int irq, void *dev_id)
2507 {
2508         static volatile int tx_started = 0;
2509         struct e100_serial *info;
2510         int i;
2511         unsigned long flags;
2512         unsigned long irq_mask1_rd;
2513         unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
2514         int handled = 0;
2515         static volatile unsigned long reentered_ready_mask = 0;
2516
2517         local_irq_save(flags);
2518         irq_mask1_rd = *R_IRQ_MASK1_RD;
2519         /* First handle all rx interrupts with ints disabled */
2520         info = rs_table;
2521         irq_mask1_rd &= e100_ser_int_mask;
2522         for (i = 0; i < NR_PORTS; i++) {
2523                 /* Which line caused the data irq? */
2524                 if (irq_mask1_rd & data_mask) {
2525                         handled = 1;
2526                         handle_ser_rx_interrupt(info);
2527                 }
2528                 info += 1;
2529                 data_mask <<= 2;
2530         }
2531         /* Handle tx interrupts with interrupts enabled so we
2532          * can take care of new data interrupts while transmitting
2533          * We protect the tx part with the tx_started flag.
2534          * We disable the tr_ready interrupts we are about to handle and
2535          * unblock the serial interrupt so new serial interrupts may come.
2536          *
2537          * If we get a new interrupt:
2538          *  - it migth be due to synchronous serial ports.
2539          *  - serial irq will be blocked by general irq handler.
2540          *  - async data will be handled above (sync will be ignored).
2541          *  - tx_started flag will prevent us from trying to send again and
2542          *    we will exit fast - no need to unblock serial irq.
2543          *  - Next (sync) serial interrupt handler will be runned with
2544          *    disabled interrupt due to restore_flags() at end of function,
2545          *    so sync handler will not be preempted or reentered.
2546          */
2547         if (!tx_started) {
2548                 unsigned long ready_mask;
2549                 unsigned long
2550                 tx_started = 1;
2551                 /* Only the tr_ready interrupts left */
2552                 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2553                                  IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2554                                  IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2555                                  IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2556                 while (irq_mask1_rd) {
2557                         /* Disable those we are about to handle */
2558                         *R_IRQ_MASK1_CLR = irq_mask1_rd;
2559                         /* Unblock the serial interrupt */
2560                         *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
2561
2562                         local_irq_enable();
2563                         ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
2564                         info = rs_table;
2565                         for (i = 0; i < NR_PORTS; i++) {
2566                                 /* Which line caused the ready irq? */
2567                                 if (irq_mask1_rd & ready_mask) {
2568                                         handled = 1;
2569                                         handle_ser_tx_interrupt(info);
2570                                 }
2571                                 info += 1;
2572                                 ready_mask <<= 2;
2573                         }
2574                         /* handle_ser_tx_interrupt enables tr_ready interrupts */
2575                         local_irq_disable();
2576                         /* Handle reentered TX interrupt */
2577                         irq_mask1_rd = reentered_ready_mask;
2578                 }
2579                 local_irq_disable();
2580                 tx_started = 0;
2581         } else {
2582                 unsigned long ready_mask;
2583                 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2584                                              IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2585                                              IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2586                                              IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2587                 if (ready_mask) {
2588                         reentered_ready_mask |= ready_mask;
2589                         /* Disable those we are about to handle */
2590                         *R_IRQ_MASK1_CLR = ready_mask;
2591                         DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
2592                 }
2593         }
2594
2595         local_irq_restore(flags);
2596         return IRQ_RETVAL(handled);
2597 } /* ser_interrupt */
2598 #endif
2599
2600 /*
2601  * -------------------------------------------------------------------
2602  * Here ends the serial interrupt routines.
2603  * -------------------------------------------------------------------
2604  */
2605
2606 /*
2607  * This routine is used to handle the "bottom half" processing for the
2608  * serial driver, known also the "software interrupt" processing.
2609  * This processing is done at the kernel interrupt level, after the
2610  * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON.  This
2611  * is where time-consuming activities which can not be done in the
2612  * interrupt driver proper are done; the interrupt driver schedules
2613  * them using rs_sched_event(), and they get done here.
2614  */
2615 static void
2616 do_softint(struct work_struct *work)
2617 {
2618         struct e100_serial      *info;
2619         struct tty_struct       *tty;
2620
2621         info = container_of(work, struct e100_serial, work);
2622
2623         tty = info->port.tty;
2624         if (!tty)
2625                 return;
2626
2627         if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
2628                 tty_wakeup(tty);
2629 }
2630
2631 static int
2632 startup(struct e100_serial * info)
2633 {
2634         unsigned long flags;
2635         unsigned long xmit_page;
2636         int i;
2637
2638         xmit_page = get_zeroed_page(GFP_KERNEL);
2639         if (!xmit_page)
2640                 return -ENOMEM;
2641
2642         local_irq_save(flags);
2643
2644         /* if it was already initialized, skip this */
2645
2646         if (info->port.flags & ASYNC_INITIALIZED) {
2647                 local_irq_restore(flags);
2648                 free_page(xmit_page);
2649                 return 0;
2650         }
2651
2652         if (info->xmit.buf)
2653                 free_page(xmit_page);
2654         else
2655                 info->xmit.buf = (unsigned char *) xmit_page;
2656
2657 #ifdef SERIAL_DEBUG_OPEN
2658         printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
2659 #endif
2660
2661         /*
2662          * Clear the FIFO buffers and disable them
2663          * (they will be reenabled in change_speed())
2664          */
2665
2666         /*
2667          * Reset the DMA channels and make sure their interrupts are cleared
2668          */
2669
2670         if (info->dma_in_enabled) {
2671                 info->uses_dma_in = 1;
2672                 e100_enable_rxdma_channel(info);
2673
2674                 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2675
2676                 /* Wait until reset cycle is complete */
2677                 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2678                        IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2679
2680                 /* Make sure the irqs are cleared */
2681                 *info->iclrintradr =
2682                         IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2683                         IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2684         } else {
2685                 e100_disable_rxdma_channel(info);
2686         }
2687
2688         if (info->dma_out_enabled) {
2689                 info->uses_dma_out = 1;
2690                 e100_enable_txdma_channel(info);
2691                 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2692
2693                 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
2694                        IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2695
2696                 /* Make sure the irqs are cleared */
2697                 *info->oclrintradr =
2698                         IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2699                         IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2700         } else {
2701                 e100_disable_txdma_channel(info);
2702         }
2703
2704         if (info->port.tty)
2705                 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2706
2707         info->xmit.head = info->xmit.tail = 0;
2708         info->first_recv_buffer = info->last_recv_buffer = NULL;
2709         info->recv_cnt = info->max_recv_cnt = 0;
2710
2711         for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2712                 info->rec_descr[i].buf = 0;
2713
2714         /*
2715          * and set the speed and other flags of the serial port
2716          * this will start the rx/tx as well
2717          */
2718 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2719         e100_enable_serial_data_irq(info);
2720 #endif
2721         change_speed(info);
2722
2723         /* dummy read to reset any serial errors */
2724
2725         (void)info->ioport[REG_DATA];
2726
2727         /* enable the interrupts */
2728         if (info->uses_dma_out)
2729                 e100_enable_txdma_irq(info);
2730
2731         e100_enable_rx_irq(info);
2732
2733         info->tr_running = 0; /* to be sure we don't lock up the transmitter */
2734
2735         /* setup the dma input descriptor and start dma */
2736
2737         start_receive(info);
2738
2739         /* for safety, make sure the descriptors last result is 0 bytes written */
2740
2741         info->tr_descr.sw_len = 0;
2742         info->tr_descr.hw_len = 0;
2743         info->tr_descr.status = 0;
2744
2745         /* enable RTS/DTR last */
2746
2747         e100_rts(info, 1);
2748         e100_dtr(info, 1);
2749
2750         info->port.flags |= ASYNC_INITIALIZED;
2751
2752         local_irq_restore(flags);
2753         return 0;
2754 }
2755
2756 /*
2757  * This routine will shutdown a serial port; interrupts are disabled, and
2758  * DTR is dropped if the hangup on close termio flag is on.
2759  */
2760 static void
2761 shutdown(struct e100_serial * info)
2762 {
2763         unsigned long flags;
2764         struct etrax_dma_descr *descr = info->rec_descr;
2765         struct etrax_recv_buffer *buffer;
2766         int i;
2767
2768         /* shut down the transmitter and receiver */
2769         DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
2770         e100_disable_rx(info);
2771         info->ioport[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
2772
2773         /* disable interrupts, reset dma channels */
2774         if (info->uses_dma_in) {
2775                 e100_disable_rxdma_irq(info);
2776                 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2777                 info->uses_dma_in = 0;
2778         } else {
2779                 e100_disable_serial_data_irq(info);
2780         }
2781
2782         if (info->uses_dma_out) {
2783                 e100_disable_txdma_irq(info);
2784                 info->tr_running = 0;
2785                 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2786                 info->uses_dma_out = 0;
2787         } else {
2788                 e100_disable_serial_tx_ready_irq(info);
2789                 info->tr_running = 0;
2790         }
2791
2792         if (!(info->port.flags & ASYNC_INITIALIZED))
2793                 return;
2794
2795 #ifdef SERIAL_DEBUG_OPEN
2796         printk("Shutting down serial port %d (irq %d)....\n", info->line,
2797                info->irq);
2798 #endif
2799
2800         local_irq_save(flags);
2801
2802         if (info->xmit.buf) {
2803                 free_page((unsigned long)info->xmit.buf);
2804                 info->xmit.buf = NULL;
2805         }
2806
2807         for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2808                 if (descr[i].buf) {
2809                         buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
2810                         kfree(buffer);
2811                         descr[i].buf = 0;
2812                 }
2813
2814         if (!info->port.tty || (info->port.tty->termios.c_cflag & HUPCL)) {
2815                 /* hang up DTR and RTS if HUPCL is enabled */
2816                 e100_dtr(info, 0);
2817                 e100_rts(info, 0); /* could check CRTSCTS before doing this */
2818         }
2819
2820         if (info->port.tty)
2821                 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2822
2823         info->port.flags &= ~ASYNC_INITIALIZED;
2824         local_irq_restore(flags);
2825 }
2826
2827
2828 /* change baud rate and other assorted parameters */
2829
2830 static void
2831 change_speed(struct e100_serial *info)
2832 {
2833         unsigned int cflag;
2834         unsigned long xoff;
2835         unsigned long flags;
2836         /* first some safety checks */
2837
2838         if (!info->port.tty)
2839                 return;
2840         if (!info->ioport)
2841                 return;
2842
2843         cflag = info->port.tty->termios.c_cflag;
2844
2845         /* possibly, the tx/rx should be disabled first to do this safely */
2846
2847         /* change baud-rate and write it to the hardware */
2848         if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
2849                 /* Special baudrate */
2850                 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
2851                 unsigned long alt_source =
2852                                 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
2853                                 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2854                 /* R_ALT_SER_BAUDRATE selects the source */
2855                 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
2856                        (unsigned long)info->baud_base, info->custom_divisor));
2857                 if (info->baud_base == SERIAL_PRESCALE_BASE) {
2858                         /* 0, 2-65535 (0=65536) */
2859                         u16 divisor = info->custom_divisor;
2860                         /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
2861                         /* baudrate is 3.125MHz/custom_divisor */
2862                         alt_source =
2863                                 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
2864                                 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
2865                         alt_source = 0x11;
2866                         DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
2867                         *R_SERIAL_PRESCALE = divisor;
2868                         info->baud = SERIAL_PRESCALE_BASE/divisor;
2869                 }
2870 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
2871                 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
2872                           info->custom_divisor == 1) ||
2873                          (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
2874                           info->custom_divisor == 8)) {
2875                                 /* ext_clk selected */
2876                                 alt_source =
2877                                         IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
2878                                         IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
2879                                 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
2880                                 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
2881                         }
2882 #endif
2883                 else
2884                 {
2885                         /* Bad baudbase, we don't support using timer0
2886                          * for baudrate.
2887                          */
2888                         printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
2889                                (unsigned long)info->baud_base, info->custom_divisor);
2890                 }
2891                 r_alt_ser_baudrate_shadow &= ~mask;
2892                 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
2893                 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
2894         } else {
2895                 /* Normal baudrate */
2896                 /* Make sure we use normal baudrate */
2897                 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
2898                 unsigned long alt_source =
2899                         IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
2900                         IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2901                 r_alt_ser_baudrate_shadow &= ~mask;
2902                 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
2903                 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
2904
2905                 info->baud = cflag_to_baud(cflag);
2906                 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag);
2907         }
2908
2909         /* start with default settings and then fill in changes */
2910         local_irq_save(flags);
2911         /* 8 bit, no/even parity */
2912         info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
2913                            IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
2914                            IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
2915
2916         /* 8 bit, no/even parity, 1 stop bit, no cts */
2917         info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
2918                            IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
2919                            IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
2920                            IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
2921                            IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
2922
2923         if ((cflag & CSIZE) == CS7) {
2924                 /* set 7 bit mode */
2925                 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
2926                 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
2927         }
2928
2929         if (cflag & CSTOPB) {
2930                 /* set 2 stop bit mode */
2931                 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
2932         }
2933
2934         if (cflag & PARENB) {
2935                 /* enable parity */
2936                 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
2937                 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
2938         }
2939
2940         if (cflag & CMSPAR) {
2941                 /* enable stick parity, PARODD mean Mark which matches ETRAX */
2942                 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
2943                 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
2944         }
2945         if (cflag & PARODD) {
2946                 /* set odd parity (or Mark if CMSPAR) */
2947                 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
2948                 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
2949         }
2950
2951         if (cflag & CRTSCTS) {
2952                 /* enable automatic CTS handling */
2953                 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
2954                 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
2955         }
2956
2957         /* make sure the tx and rx are enabled */
2958
2959         info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
2960         info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
2961
2962         /* actually write the control regs to the hardware */
2963
2964         info->ioport[REG_TR_CTRL] = info->tx_ctrl;
2965         info->ioport[REG_REC_CTRL] = info->rx_ctrl;
2966         xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->port.tty));
2967         xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
2968         if (info->port.tty->termios.c_iflag & IXON ) {
2969                 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n",
2970                                 STOP_CHAR(info->port.tty)));
2971                 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
2972         }
2973
2974         *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
2975         local_irq_restore(flags);
2976
2977         update_char_time(info);
2978
2979 } /* change_speed */
2980
2981 /* start transmitting chars NOW */
2982
2983 static void
2984 rs_flush_chars(struct tty_struct *tty)
2985 {
2986         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
2987         unsigned long flags;
2988
2989         if (info->tr_running ||
2990             info->xmit.head == info->xmit.tail ||
2991             tty->stopped ||
2992             !info->xmit.buf)
2993                 return;
2994
2995 #ifdef SERIAL_DEBUG_FLOW
2996         printk("rs_flush_chars\n");
2997 #endif
2998
2999         /* this protection might not exactly be necessary here */
3000
3001         local_irq_save(flags);
3002         start_transmit(info);
3003         local_irq_restore(flags);
3004 }
3005
3006 static int rs_raw_write(struct tty_struct *tty,
3007                         const unsigned char *buf, int count)
3008 {
3009         int     c, ret = 0;
3010         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3011         unsigned long flags;
3012
3013         /* first some sanity checks */
3014
3015         if (!info->xmit.buf)
3016                 return 0;
3017
3018 #ifdef SERIAL_DEBUG_DATA
3019         if (info->line == SERIAL_DEBUG_LINE)
3020                 printk("rs_raw_write (%d), status %d\n",
3021                        count, info->ioport[REG_STATUS]);
3022 #endif
3023
3024         local_save_flags(flags);
3025         DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3026         DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3027
3028
3029         /* The local_irq_disable/restore_flags pairs below are needed
3030          * because the DMA interrupt handler moves the info->xmit values.
3031          * the memcpy needs to be in the critical region unfortunately,
3032          * because we need to read xmit values, memcpy, write xmit values
3033          * in one atomic operation... this could perhaps be avoided by
3034          * more clever design.
3035          */
3036         local_irq_disable();
3037                 while (count) {
3038                         c = CIRC_SPACE_TO_END(info->xmit.head,
3039                                               info->xmit.tail,
3040                                               SERIAL_XMIT_SIZE);
3041
3042                         if (count < c)
3043                                 c = count;
3044                         if (c <= 0)
3045                                 break;
3046
3047                         memcpy(info->xmit.buf + info->xmit.head, buf, c);
3048                         info->xmit.head = (info->xmit.head + c) &
3049                                 (SERIAL_XMIT_SIZE-1);
3050                         buf += c;
3051                         count -= c;
3052                         ret += c;
3053                 }
3054         local_irq_restore(flags);
3055
3056         /* enable transmitter if not running, unless the tty is stopped
3057          * this does not need IRQ protection since if tr_running == 0
3058          * the IRQ's are not running anyway for this port.
3059          */
3060         DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3061
3062         if (info->xmit.head != info->xmit.tail &&
3063             !tty->stopped &&
3064             !info->tr_running) {
3065                 start_transmit(info);
3066         }
3067
3068         return ret;
3069 } /* raw_raw_write() */
3070
3071 static int
3072 rs_write(struct tty_struct *tty,
3073          const unsigned char *buf, int count)
3074 {
3075 #if defined(CONFIG_ETRAX_RS485)
3076         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3077
3078         if (info->rs485.flags & SER_RS485_ENABLED)
3079         {
3080                 /* If we are in RS-485 mode, we need to toggle RTS and disable
3081                  * the receiver before initiating a DMA transfer
3082                  */
3083 #ifdef CONFIG_ETRAX_FAST_TIMER
3084                 /* Abort any started timer */
3085                 fast_timers_rs485[info->line].function = NULL;
3086                 del_fast_timer(&fast_timers_rs485[info->line]);
3087 #endif
3088                 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_ON_SEND));
3089 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3090                 e100_disable_rx(info);
3091                 e100_enable_rx_irq(info);
3092 #endif
3093                 if (info->rs485.delay_rts_before_send > 0)
3094                         msleep(info->rs485.delay_rts_before_send);
3095         }
3096 #endif /* CONFIG_ETRAX_RS485 */
3097
3098         count = rs_raw_write(tty, buf, count);
3099
3100 #if defined(CONFIG_ETRAX_RS485)
3101         if (info->rs485.flags & SER_RS485_ENABLED)
3102         {
3103                 unsigned int val;
3104                 /* If we are in RS-485 mode the following has to be done:
3105                  * wait until DMA is ready
3106                  * wait on transmit shift register
3107                  * toggle RTS
3108                  * enable the receiver
3109                  */
3110
3111                 /* Sleep until all sent */
3112                 tty_wait_until_sent(tty, 0);
3113 #ifdef CONFIG_ETRAX_FAST_TIMER
3114                 /* Now sleep a little more so that shift register is empty */
3115                 schedule_usleep(info->char_time_usec * 2);
3116 #endif
3117                 /* wait on transmit shift register */
3118                 do{
3119                         get_lsr_info(info, &val);
3120                 }while (!(val & TIOCSER_TEMT));
3121
3122                 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
3123
3124 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3125                 e100_enable_rx(info);
3126                 e100_enable_rxdma_irq(info);
3127 #endif
3128         }
3129 #endif /* CONFIG_ETRAX_RS485 */
3130
3131         return count;
3132 } /* rs_write */
3133
3134
3135 /* how much space is available in the xmit buffer? */
3136
3137 static int
3138 rs_write_room(struct tty_struct *tty)
3139 {
3140         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3141
3142         return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3143 }
3144
3145 /* How many chars are in the xmit buffer?
3146  * This does not include any chars in the transmitter FIFO.
3147  * Use wait_until_sent for waiting for FIFO drain.
3148  */
3149
3150 static int
3151 rs_chars_in_buffer(struct tty_struct *tty)
3152 {
3153         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3154
3155         return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3156 }
3157
3158 /* discard everything in the xmit buffer */
3159
3160 static void
3161 rs_flush_buffer(struct tty_struct *tty)
3162 {
3163         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3164         unsigned long flags;
3165
3166         local_irq_save(flags);
3167         info->xmit.head = info->xmit.tail = 0;
3168         local_irq_restore(flags);
3169
3170         tty_wakeup(tty);
3171 }
3172
3173 /*
3174  * This function is used to send a high-priority XON/XOFF character to
3175  * the device
3176  *
3177  * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3178  * but we do it in handle_ser_tx_interrupt().
3179  * We disable DMA channel and enable tx ready interrupt and write the
3180  * character when possible.
3181  */
3182 static void rs_send_xchar(struct tty_struct *tty, char ch)
3183 {
3184         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3185         unsigned long flags;
3186         local_irq_save(flags);
3187         if (info->uses_dma_out) {
3188                 /* Put the DMA on hold and disable the channel */
3189                 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3190                 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3191                        IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3192                 e100_disable_txdma_channel(info);
3193         }
3194
3195         /* Must make sure transmitter is not stopped before we can transmit */
3196         if (tty->stopped)
3197                 rs_start(tty);
3198
3199         /* Enable manual transmit interrupt and send from there */
3200         DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3201         info->x_char = ch;
3202         e100_enable_serial_tx_ready_irq(info);
3203         local_irq_restore(flags);
3204 }
3205
3206 /*
3207  * ------------------------------------------------------------
3208  * rs_throttle()
3209  *
3210  * This routine is called by the upper-layer tty layer to signal that
3211  * incoming characters should be throttled.
3212  * ------------------------------------------------------------
3213  */
3214 static void
3215 rs_throttle(struct tty_struct * tty)
3216 {
3217         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3218 #ifdef SERIAL_DEBUG_THROTTLE
3219         char    buf[64];
3220
3221         printk("throttle %s: %lu....\n", tty_name(tty, buf),
3222                (unsigned long)tty->ldisc.chars_in_buffer(tty));
3223 #endif
3224         DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3225
3226         /* Do RTS before XOFF since XOFF might take some time */
3227         if (tty->termios.c_cflag & CRTSCTS) {
3228                 /* Turn off RTS line */
3229                 e100_rts(info, 0);
3230         }
3231         if (I_IXOFF(tty))
3232                 rs_send_xchar(tty, STOP_CHAR(tty));
3233
3234 }
3235
3236 static void
3237 rs_unthrottle(struct tty_struct * tty)
3238 {
3239         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3240 #ifdef SERIAL_DEBUG_THROTTLE
3241         char    buf[64];
3242
3243         printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3244                (unsigned long)tty->ldisc.chars_in_buffer(tty));
3245 #endif
3246         DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3247         DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3248         /* Do RTS before XOFF since XOFF might take some time */
3249         if (tty->termios.c_cflag & CRTSCTS) {
3250                 /* Assert RTS line  */
3251                 e100_rts(info, 1);
3252         }
3253
3254         if (I_IXOFF(tty)) {
3255                 if (info->x_char)
3256                         info->x_char = 0;
3257                 else
3258                         rs_send_xchar(tty, START_CHAR(tty));
3259         }
3260
3261 }
3262
3263 /*
3264  * ------------------------------------------------------------
3265  * rs_ioctl() and friends
3266  * ------------------------------------------------------------
3267  */
3268
3269 static int
3270 get_serial_info(struct e100_serial * info,
3271                 struct serial_struct * retinfo)
3272 {
3273         struct serial_struct tmp;
3274
3275         /* this is all probably wrong, there are a lot of fields
3276          * here that we don't have in e100_serial and maybe we
3277          * should set them to something else than 0.
3278          */
3279
3280         if (!retinfo)
3281                 return -EFAULT;
3282         memset(&tmp, 0, sizeof(tmp));
3283         tmp.type = info->type;
3284         tmp.line = info->line;
3285         tmp.port = (int)info->ioport;
3286         tmp.irq = info->irq;
3287         tmp.flags = info->port.flags;
3288         tmp.baud_base = info->baud_base;
3289         tmp.close_delay = info->port.close_delay;
3290         tmp.closing_wait = info->port.closing_wait;
3291         tmp.custom_divisor = info->custom_divisor;
3292         if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3293                 return -EFAULT;
3294         return 0;
3295 }
3296
3297 static int
3298 set_serial_info(struct e100_serial *info,
3299                 struct serial_struct *new_info)
3300 {
3301         struct serial_struct new_serial;
3302         struct e100_serial old_info;
3303         int retval = 0;
3304
3305         if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3306                 return -EFAULT;
3307
3308         old_info = *info;
3309
3310         if (!capable(CAP_SYS_ADMIN)) {
3311                 if ((new_serial.type != info->type) ||
3312                     (new_serial.close_delay != info->port.close_delay) ||
3313                     ((new_serial.flags & ~ASYNC_USR_MASK) !=
3314                      (info->port.flags & ~ASYNC_USR_MASK)))
3315                         return -EPERM;
3316                 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
3317                                (new_serial.flags & ASYNC_USR_MASK));
3318                 goto check_and_exit;
3319         }
3320
3321         if (info->port.count > 1)
3322                 return -EBUSY;
3323
3324         /*
3325          * OK, past this point, all the error checking has been done.
3326          * At this point, we start making changes.....
3327          */
3328
3329         info->baud_base = new_serial.baud_base;
3330         info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
3331                        (new_serial.flags & ASYNC_FLAGS));
3332         info->custom_divisor = new_serial.custom_divisor;
3333         info->type = new_serial.type;
3334         info->port.close_delay = new_serial.close_delay;
3335         info->port.closing_wait = new_serial.closing_wait;
3336         info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3337
3338  check_and_exit:
3339         if (info->port.flags & ASYNC_INITIALIZED) {
3340                 change_speed(info);
3341         } else
3342                 retval = startup(info);
3343         return retval;
3344 }
3345
3346 /*
3347  * get_lsr_info - get line status register info
3348  *
3349  * Purpose: Let user call ioctl() to get info when the UART physically
3350  *          is emptied.  On bus types like RS485, the transmitter must
3351  *          release the bus after transmitting. This must be done when
3352  *          the transmit shift register is empty, not be done when the
3353  *          transmit holding register is empty.  This functionality
3354  *          allows an RS485 driver to be written in user space.
3355  */
3356 static int
3357 get_lsr_info(struct e100_serial * info, unsigned int *value)
3358 {
3359         unsigned int result = TIOCSER_TEMT;
3360         unsigned long curr_time = jiffies;
3361         unsigned long curr_time_usec = GET_JIFFIES_USEC();
3362         unsigned long elapsed_usec =
3363                 (curr_time - info->last_tx_active) * 1000000/HZ +
3364                 curr_time_usec - info->last_tx_active_usec;
3365
3366         if (info->xmit.head != info->xmit.tail ||
3367             elapsed_usec < 2*info->char_time_usec) {
3368                 result = 0;
3369         }
3370
3371         if (copy_to_user(value, &result, sizeof(int)))
3372                 return -EFAULT;
3373         return 0;
3374 }
3375
3376 #ifdef SERIAL_DEBUG_IO
3377 struct state_str
3378 {
3379         int state;
3380         const char *str;
3381 };
3382
3383 const struct state_str control_state_str[] = {
3384         {TIOCM_DTR, "DTR" },
3385         {TIOCM_RTS, "RTS"},
3386         {TIOCM_ST, "ST?" },
3387         {TIOCM_SR, "SR?" },
3388         {TIOCM_CTS, "CTS" },
3389         {TIOCM_CD, "CD" },
3390         {TIOCM_RI, "RI" },
3391         {TIOCM_DSR, "DSR" },
3392         {0, NULL }
3393 };
3394
3395 char *get_control_state_str(int MLines, char *s)
3396 {
3397         int i = 0;
3398
3399         s[0]='\0';
3400         while (control_state_str[i].str != NULL) {
3401                 if (MLines & control_state_str[i].state) {
3402                         if (s[0] != '\0') {
3403                                 strcat(s, ", ");
3404                         }
3405                         strcat(s, control_state_str[i].str);
3406                 }
3407                 i++;
3408         }
3409         return s;
3410 }
3411 #endif
3412
3413 static int
3414 rs_break(struct tty_struct *tty, int break_state)
3415 {
3416         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3417         unsigned long flags;
3418
3419         if (!info->ioport)
3420                 return -EIO;
3421
3422         local_irq_save(flags);
3423         if (break_state == -1) {
3424                 /* Go to manual mode and set the txd pin to 0 */
3425                 /* Clear bit 7 (txd) and 6 (tr_enable) */
3426                 info->tx_ctrl &= 0x3F;
3427         } else {
3428                 /* Set bit 7 (txd) and 6 (tr_enable) */
3429                 info->tx_ctrl |= (0x80 | 0x40);
3430         }
3431         info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3432         local_irq_restore(flags);
3433         return 0;
3434 }
3435
3436 static int
3437 rs_tiocmset(struct tty_struct *tty, unsigned int set, unsigned int clear)
3438 {
3439         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3440         unsigned long flags;
3441
3442         local_irq_save(flags);
3443
3444         if (clear & TIOCM_RTS)
3445                 e100_rts(info, 0);
3446         if (clear & TIOCM_DTR)
3447                 e100_dtr(info, 0);
3448         /* Handle FEMALE behaviour */
3449         if (clear & TIOCM_RI)
3450                 e100_ri_out(info, 0);
3451         if (clear & TIOCM_CD)
3452                 e100_cd_out(info, 0);
3453
3454         if (set & TIOCM_RTS)
3455                 e100_rts(info, 1);
3456         if (set & TIOCM_DTR)
3457                 e100_dtr(info, 1);
3458         /* Handle FEMALE behaviour */
3459         if (set & TIOCM_RI)
3460                 e100_ri_out(info, 1);
3461         if (set & TIOCM_CD)
3462                 e100_cd_out(info, 1);
3463
3464         local_irq_restore(flags);
3465         return 0;
3466 }
3467
3468 static int
3469 rs_tiocmget(struct tty_struct *tty)
3470 {
3471         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3472         unsigned int result;
3473         unsigned long flags;
3474
3475         local_irq_save(flags);
3476
3477         result =
3478                 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
3479                 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
3480                 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
3481                 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
3482                 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
3483                 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
3484
3485         local_irq_restore(flags);
3486
3487 #ifdef SERIAL_DEBUG_IO
3488         printk(KERN_DEBUG "ser%i: modem state: %i 0x%08X\n",
3489                 info->line, result, result);
3490         {
3491                 char s[100];
3492
3493                 get_control_state_str(result, s);
3494                 printk(KERN_DEBUG "state: %s\n", s);
3495         }
3496 #endif
3497         return result;
3498
3499 }
3500
3501
3502 static int
3503 rs_ioctl(struct tty_struct *tty,
3504          unsigned int cmd, unsigned long arg)
3505 {
3506         struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3507
3508         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
3509             (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD)  &&
3510             (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
3511                 if (tty->flags & (1 << TTY_IO_ERROR))
3512                         return -EIO;
3513         }
3514
3515         switch (cmd) {
3516         case TIOCGSERIAL:
3517                 return get_serial_info(info,
3518                                        (struct serial_struct *) arg);
3519         case TIOCSSERIAL:
3520                 return set_serial_info(info,
3521                                        (struct serial_struct *) arg);
3522         case TIOCSERGETLSR: /* Get line status register */
3523                 return get_lsr_info(info, (unsigned int *) arg);
3524
3525         case TIOCSERGSTRUCT:
3526                 if (copy_to_user((struct e100_serial *) arg,
3527                                  info, sizeof(struct e100_serial)))
3528                         return -EFAULT;
3529                 return 0;
3530
3531 #if defined(CONFIG_ETRAX_RS485)
3532         case TIOCSERSETRS485:
3533         {
3534                 /* In this ioctl we still use the old structure
3535                  * rs485_control for backward compatibility
3536                  * (if we use serial_rs485, then old user-level code
3537                  * wouldn't work anymore...).
3538                  * The use of this ioctl is deprecated: use TIOCSRS485
3539                  * instead.*/
3540                 struct rs485_control rs485ctrl;
3541                 struct serial_rs485 rs485data;
3542                 printk(KERN_DEBUG "The use of this ioctl is deprecated. Use TIOCSRS485 instead\n");
3543                 if (copy_from_user(&rs485ctrl, (struct rs485_control *)arg,
3544                                 sizeof(rs485ctrl)))
3545                         return -EFAULT;
3546
3547                 rs485data.delay_rts_before_send = rs485ctrl.delay_rts_before_send;
3548                 rs485data.flags = 0;
3549
3550                 if (rs485ctrl.enabled)
3551                         rs485data.flags |= SER_RS485_ENABLED;
3552                 else
3553                         rs485data.flags &= ~(SER_RS485_ENABLED);
3554
3555                 if (rs485ctrl.rts_on_send)
3556                         rs485data.flags |= SER_RS485_RTS_ON_SEND;
3557                 else
3558                         rs485data.flags &= ~(SER_RS485_RTS_ON_SEND);
3559
3560                 if (rs485ctrl.rts_after_sent)
3561                         rs485data.flags |= SER_RS485_RTS_AFTER_SEND;
3562                 else
3563                         rs485data.flags &= ~(SER_RS485_RTS_AFTER_SEND);
3564
3565                 return e100_enable_rs485(tty, &rs485data);
3566         }
3567
3568         case TIOCSRS485:
3569         {
3570                 /* This is the new version of TIOCSRS485, with new
3571                  * data structure serial_rs485 */
3572                 struct serial_rs485 rs485data;
3573                 if (copy_from_user(&rs485data, (struct rs485_control *)arg,
3574                                 sizeof(rs485data)))
3575                         return -EFAULT;
3576
3577                 return e100_enable_rs485(tty, &rs485data);
3578         }
3579
3580         case TIOCGRS485:
3581         {
3582                 struct serial_rs485 *rs485data =
3583                         &(((struct e100_serial *)tty->driver_data)->rs485);
3584                 /* This is the ioctl to get RS485 data from user-space */
3585                 if (copy_to_user((struct serial_rs485 *) arg,
3586                                         rs485data,
3587                                         sizeof(struct serial_rs485)))
3588                         return -EFAULT;
3589                 break;
3590         }
3591
3592         case TIOCSERWRRS485:
3593         {
3594                 struct rs485_write rs485wr;
3595                 if (copy_from_user(&rs485wr, (struct rs485_write *)arg,
3596                                 sizeof(rs485wr)))
3597                         return -EFAULT;
3598
3599                 return e100_write_rs485(tty, rs485wr.outc, rs485wr.outc_size);
3600         }
3601 #endif
3602
3603         default:
3604                 return -ENOIOCTLCMD;
3605         }
3606         return 0;
3607 }
3608
3609 static void
3610 rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
3611 {
3612         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3613
3614         change_speed(info);
3615
3616         /* Handle turning off CRTSCTS */
3617         if ((old_termios->c_cflag & CRTSCTS) &&
3618             !(tty->termios.c_cflag & CRTSCTS))
3619                 rs_start(tty);
3620
3621 }
3622
3623 /*
3624  * ------------------------------------------------------------
3625  * rs_close()
3626  *
3627  * This routine is called when the serial port gets closed.  First, we
3628  * wait for the last remaining data to be sent.  Then, we unlink its
3629  * S structure from the interrupt chain if necessary, and we free
3630  * that IRQ if nothing is left in the chain.
3631  * ------------------------------------------------------------
3632  */
3633 static void
3634 rs_close(struct tty_struct *tty, struct file * filp)
3635 {
3636         struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3637         unsigned long flags;
3638
3639         if (!info)
3640                 return;
3641
3642         /* interrupts are disabled for this entire function */
3643
3644         local_irq_save(flags);
3645
3646         if (tty_hung_up_p(filp)) {
3647                 local_irq_restore(flags);
3648                 return;
3649         }
3650
3651 #ifdef SERIAL_DEBUG_OPEN
3652         printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
3653                info->line, info->count);
3654 #endif
3655         if ((tty->count == 1) && (info->port.count != 1)) {
3656                 /*
3657                  * Uh, oh.  tty->count is 1, which means that the tty
3658                  * structure will be freed.  Info->count should always
3659                  * be one in these conditions.  If it's greater than
3660                  * one, we've got real problems, since it means the
3661                  * serial port won't be shutdown.
3662                  */
3663                 printk(KERN_ERR
3664                        "rs_close: bad serial port count; tty->count is 1, "
3665                        "info->count is %d\n", info->port.count);
3666                 info->port.count = 1;
3667         }
3668         if (--info->port.count < 0) {
3669                 printk(KERN_ERR "rs_close: bad serial port count for ttyS%d: %d\n",
3670                        info->line, info->port.count);
3671                 info->port.count = 0;
3672         }
3673         if (info->port.count) {
3674                 local_irq_restore(flags);
3675                 return;
3676         }
3677         info->port.flags |= ASYNC_CLOSING;
3678         /*
3679          * Now we wait for the transmit buffer to clear; and we notify
3680          * the line discipline to only process XON/XOFF characters.
3681          */
3682         tty->closing = 1;
3683         if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
3684                 tty_wait_until_sent(tty, info->port.closing_wait);
3685         /*
3686          * At this point we stop accepting input.  To do this, we
3687          * disable the serial receiver and the DMA receive interrupt.
3688          */
3689 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3690         e100_disable_serial_data_irq(info);
3691 #endif
3692
3693         e100_disable_rx(info);
3694         e100_disable_rx_irq(info);
3695
3696         if (info->port.flags & ASYNC_INITIALIZED) {
3697                 /*
3698                  * Before we drop DTR, make sure the UART transmitter
3699                  * has completely drained; this is especially
3700                  * important as we have a transmit FIFO!
3701                  */
3702                 rs_wait_until_sent(tty, HZ);
3703         }
3704
3705         shutdown(info);
3706         rs_flush_buffer(tty);
3707         tty_ldisc_flush(tty);
3708         tty->closing = 0;
3709         info->event = 0;
3710         info->port.tty = NULL;
3711         if (info->port.blocked_open) {
3712                 if (info->port.close_delay)
3713                         schedule_timeout_interruptible(info->port.close_delay);
3714                 wake_up_interruptible(&info->port.open_wait);
3715         }
3716         info->port.flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
3717         wake_up_interruptible(&info->port.close_wait);
3718         local_irq_restore(flags);
3719
3720         /* port closed */
3721
3722 #if defined(CONFIG_ETRAX_RS485)
3723         if (info->rs485.flags & SER_RS485_ENABLED) {
3724                 info->rs485.flags &= ~(SER_RS485_ENABLED);
3725 #if defined(CONFIG_ETRAX_RS485_ON_PA)
3726                 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
3727 #endif
3728 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
3729                 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3730                                rs485_port_g_bit, 0);
3731 #endif
3732 #if defined(CONFIG_ETRAX_RS485_LTC1387)
3733                 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3734                                CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
3735                 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3736                                CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
3737 #endif
3738         }
3739 #endif
3740
3741         /*
3742          * Release any allocated DMA irq's.
3743          */
3744         if (info->dma_in_enabled) {
3745                 free_irq(info->dma_in_irq_nbr, info);
3746                 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
3747                 info->uses_dma_in = 0;
3748 #ifdef SERIAL_DEBUG_OPEN
3749                 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3750                         info->dma_in_irq_description);
3751 #endif
3752         }
3753         if (info->dma_out_enabled) {
3754                 free_irq(info->dma_out_irq_nbr, info);
3755                 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
3756                 info->uses_dma_out = 0;
3757 #ifdef SERIAL_DEBUG_OPEN
3758                 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3759                         info->dma_out_irq_description);
3760 #endif
3761         }
3762 }
3763
3764 /*
3765  * rs_wait_until_sent() --- wait until the transmitter is empty
3766  */
3767 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3768 {
3769         unsigned long orig_jiffies;
3770         struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3771         unsigned long curr_time = jiffies;
3772         unsigned long curr_time_usec = GET_JIFFIES_USEC();
3773         long elapsed_usec =
3774                 (curr_time - info->last_tx_active) * (1000000/HZ) +
3775                 curr_time_usec - info->last_tx_active_usec;
3776
3777         /*
3778          * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
3779          * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
3780          */
3781         orig_jiffies = jiffies;
3782         while (info->xmit.head != info->xmit.tail || /* More in send queue */
3783                (*info->ostatusadr & 0x007f) ||  /* more in FIFO */
3784                (elapsed_usec < 2*info->char_time_usec)) {
3785                 schedule_timeout_interruptible(1);
3786                 if (signal_pending(current))
3787                         break;
3788                 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3789                         break;
3790                 curr_time = jiffies;
3791                 curr_time_usec = GET_JIFFIES_USEC();
3792                 elapsed_usec =
3793                         (curr_time - info->last_tx_active) * (1000000/HZ) +
3794                         curr_time_usec - info->last_tx_active_usec;
3795         }
3796         set_current_state(TASK_RUNNING);
3797 }
3798
3799 /*
3800  * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
3801  */
3802 void
3803 rs_hangup(struct tty_struct *tty)
3804 {
3805         struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3806
3807         rs_flush_buffer(tty);
3808         shutdown(info);
3809         info->event = 0;
3810         info->port.count = 0;
3811         info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
3812         info->port.tty = NULL;
3813         wake_up_interruptible(&info->port.open_wait);
3814 }
3815
3816 /*
3817  * ------------------------------------------------------------
3818  * rs_open() and friends
3819  * ------------------------------------------------------------
3820  */
3821 static int
3822 block_til_ready(struct tty_struct *tty, struct file * filp,
3823                 struct e100_serial *info)
3824 {
3825         DECLARE_WAITQUEUE(wait, current);
3826         unsigned long   flags;
3827         int             retval;
3828         int             do_clocal = 0;
3829
3830         /*
3831          * If the device is in the middle of being closed, then block
3832          * until it's done, and then try again.
3833          */
3834         if (info->port.flags & ASYNC_CLOSING) {
3835                 wait_event_interruptible_tty(tty, info->port.close_wait,
3836                         !(info->port.flags & ASYNC_CLOSING));
3837 #ifdef SERIAL_DO_RESTART
3838                 if (info->port.flags & ASYNC_HUP_NOTIFY)
3839                         return -EAGAIN;
3840                 else
3841                         return -ERESTARTSYS;
3842 #else
3843                 return -EAGAIN;
3844 #endif
3845         }
3846
3847         /*
3848          * If non-blocking mode is set, or the port is not enabled,
3849          * then make the check up front and then exit.
3850          */
3851         if ((filp->f_flags & O_NONBLOCK) ||
3852             (tty->flags & (1 << TTY_IO_ERROR))) {
3853                 info->port.flags |= ASYNC_NORMAL_ACTIVE;
3854                 return 0;
3855         }
3856
3857         if (tty->termios.c_cflag & CLOCAL) {
3858                         do_clocal = 1;
3859         }
3860
3861         /*
3862          * Block waiting for the carrier detect and the line to become
3863          * free (i.e., not in use by the callout).  While we are in
3864          * this loop, info->port.count is dropped by one, so that
3865          * rs_close() knows when to free things.  We restore it upon
3866          * exit, either normal or abnormal.
3867          */
3868         retval = 0;
3869         add_wait_queue(&info->port.open_wait, &wait);
3870 #ifdef SERIAL_DEBUG_OPEN
3871         printk("block_til_ready before block: ttyS%d, count = %d\n",
3872                info->line, info->port.count);
3873 #endif
3874         local_irq_save(flags);
3875         info->port.count--;
3876         local_irq_restore(flags);
3877         info->port.blocked_open++;
3878         while (1) {
3879                 local_irq_save(flags);
3880                 /* assert RTS and DTR */
3881                 e100_rts(info, 1);
3882                 e100_dtr(info, 1);
3883                 local_irq_restore(flags);
3884                 set_current_state(TASK_INTERRUPTIBLE);
3885                 if (tty_hung_up_p(filp) ||
3886                     !(info->port.flags & ASYNC_INITIALIZED)) {
3887 #ifdef SERIAL_DO_RESTART
3888                         if (info->port.flags & ASYNC_HUP_NOTIFY)
3889                                 retval = -EAGAIN;
3890                         else
3891                                 retval = -ERESTARTSYS;
3892 #else
3893                         retval = -EAGAIN;
3894 #endif
3895                         break;
3896                 }
3897                 if (!(info->port.flags & ASYNC_CLOSING) && do_clocal)
3898                         /* && (do_clocal || DCD_IS_ASSERTED) */
3899                         break;
3900                 if (signal_pending(current)) {
3901                         retval = -ERESTARTSYS;
3902                         break;
3903                 }
3904 #ifdef SERIAL_DEBUG_OPEN
3905                 printk("block_til_ready blocking: ttyS%d, count = %d\n",
3906                        info->line, info->port.count);
3907 #endif
3908                 tty_unlock(tty);
3909                 schedule();
3910                 tty_lock(tty);
3911         }
3912         set_current_state(TASK_RUNNING);
3913         remove_wait_queue(&info->port.open_wait, &wait);
3914         if (!tty_hung_up_p(filp))
3915                 info->port.count++;
3916         info->port.blocked_open--;
3917 #ifdef SERIAL_DEBUG_OPEN
3918         printk("block_til_ready after blocking: ttyS%d, count = %d\n",
3919                info->line, info->port.count);
3920 #endif
3921         if (retval)
3922                 return retval;
3923         info->port.flags |= ASYNC_NORMAL_ACTIVE;
3924         return 0;
3925 }
3926
3927 static void
3928 deinit_port(struct e100_serial *info)
3929 {
3930         if (info->dma_out_enabled) {
3931                 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
3932                 free_irq(info->dma_out_irq_nbr, info);
3933         }
3934         if (info->dma_in_enabled) {
3935                 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
3936                 free_irq(info->dma_in_irq_nbr, info);
3937         }
3938 }
3939
3940 /*
3941  * This routine is called whenever a serial port is opened.
3942  * It performs the serial-specific initialization for the tty structure.
3943  */
3944 static int
3945 rs_open(struct tty_struct *tty, struct file * filp)
3946 {
3947         struct e100_serial      *info;
3948         int                     retval;
3949         int                     allocated_resources = 0;
3950
3951         info = rs_table + tty->index;
3952         if (!info->enabled)
3953                 return -ENODEV;
3954
3955 #ifdef SERIAL_DEBUG_OPEN
3956         printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
3957                info->port.count);
3958 #endif
3959
3960         info->port.count++;
3961         tty->driver_data = info;
3962         info->port.tty = tty;
3963
3964         info->port.low_latency = !!(info->port.flags & ASYNC_LOW_LATENCY);
3965
3966         /*
3967          * If the port is in the middle of closing, bail out now
3968          */
3969         if (info->port.flags & ASYNC_CLOSING) {
3970                 wait_event_interruptible_tty(tty, info->port.close_wait,
3971                         !(info->port.flags & ASYNC_CLOSING));
3972 #ifdef SERIAL_DO_RESTART
3973                 return ((info->port.flags & ASYNC_HUP_NOTIFY) ?
3974                         -EAGAIN : -ERESTARTSYS);
3975 #else
3976                 return -EAGAIN;
3977 #endif
3978         }
3979
3980         /*
3981          * If DMA is enabled try to allocate the irq's.
3982          */
3983         if (info->port.count == 1) {
3984                 allocated_resources = 1;
3985                 if (info->dma_in_enabled) {
3986                         if (request_irq(info->dma_in_irq_nbr,
3987                                         rec_interrupt,
3988                                         info->dma_in_irq_flags,
3989                                         info->dma_in_irq_description,
3990                                         info)) {
3991                                 printk(KERN_WARNING "DMA irq '%s' busy; "
3992                                         "falling back to non-DMA mode\n",
3993                                         info->dma_in_irq_description);
3994                                 /* Make sure we never try to use DMA in */
3995                                 /* for the port again. */
3996                                 info->dma_in_enabled = 0;
3997                         } else if (cris_request_dma(info->dma_in_nbr,
3998                                         info->dma_in_irq_description,
3999                                         DMA_VERBOSE_ON_ERROR,
4000                                         info->dma_owner)) {
4001                                 free_irq(info->dma_in_irq_nbr, info);
4002                                 printk(KERN_WARNING "DMA '%s' busy; "
4003                                         "falling back to non-DMA mode\n",
4004                                         info->dma_in_irq_description);
4005                                 /* Make sure we never try to use DMA in */
4006                                 /* for the port again. */
4007                                 info->dma_in_enabled = 0;
4008                         }
4009 #ifdef SERIAL_DEBUG_OPEN
4010                         else
4011                                 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4012                                         info->dma_in_irq_description);
4013 #endif
4014                 }
4015                 if (info->dma_out_enabled) {
4016                         if (request_irq(info->dma_out_irq_nbr,
4017                                                tr_interrupt,
4018                                                info->dma_out_irq_flags,
4019                                                info->dma_out_irq_description,
4020                                                info)) {
4021                                 printk(KERN_WARNING "DMA irq '%s' busy; "
4022                                         "falling back to non-DMA mode\n",
4023                                         info->dma_out_irq_description);
4024                                 /* Make sure we never try to use DMA out */
4025                                 /* for the port again. */
4026                                 info->dma_out_enabled = 0;
4027                         } else if (cris_request_dma(info->dma_out_nbr,
4028                                              info->dma_out_irq_description,
4029                                              DMA_VERBOSE_ON_ERROR,
4030                                              info->dma_owner)) {
4031                                 free_irq(info->dma_out_irq_nbr, info);
4032                                 printk(KERN_WARNING "DMA '%s' busy; "
4033                                         "falling back to non-DMA mode\n",
4034                                         info->dma_out_irq_description);
4035                                 /* Make sure we never try to use DMA out */
4036                                 /* for the port again. */
4037                                 info->dma_out_enabled = 0;
4038                         }
4039 #ifdef SERIAL_DEBUG_OPEN
4040                         else
4041                                 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4042                                         info->dma_out_irq_description);
4043 #endif
4044                 }
4045         }
4046
4047         /*
4048          * Start up the serial port
4049          */
4050
4051         retval = startup(info);
4052         if (retval) {
4053                 if (allocated_resources)
4054                         deinit_port(info);
4055
4056                 /* FIXME Decrease count info->port.count here too? */
4057                 return retval;
4058         }
4059
4060
4061         retval = block_til_ready(tty, filp, info);
4062         if (retval) {
4063 #ifdef SERIAL_DEBUG_OPEN
4064                 printk("rs_open returning after block_til_ready with %d\n",
4065                        retval);
4066 #endif
4067                 if (allocated_resources)
4068                         deinit_port(info);
4069
4070                 return retval;
4071         }
4072
4073 #ifdef SERIAL_DEBUG_OPEN
4074         printk("rs_open ttyS%d successful...\n", info->line);
4075 #endif
4076         DLOG_INT_TRIG( log_int_pos = 0);
4077
4078         DFLIP(  if (info->line == SERIAL_DEBUG_LINE) {
4079                         info->icount.rx = 0;
4080                 } );
4081
4082         return 0;
4083 }
4084
4085 #ifdef CONFIG_PROC_FS
4086 /*
4087  * /proc fs routines....
4088  */
4089
4090 static void seq_line_info(struct seq_file *m, struct e100_serial *info)
4091 {
4092         unsigned long tmp;
4093
4094         seq_printf(m, "%d: uart:E100 port:%lX irq:%d",
4095                    info->line, (unsigned long)info->ioport, info->irq);
4096
4097         if (!info->ioport || (info->type == PORT_UNKNOWN)) {
4098                 seq_printf(m, "\n");
4099                 return;
4100         }
4101
4102         seq_printf(m, " baud:%d", info->baud);
4103         seq_printf(m, " tx:%lu rx:%lu",
4104                        (unsigned long)info->icount.tx,
4105                        (unsigned long)info->icount.rx);
4106         tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4107         if (tmp)
4108                 seq_printf(m, " tx_pend:%lu/%lu",
4109                            (unsigned long)tmp,
4110                            (unsigned long)SERIAL_XMIT_SIZE);
4111
4112         seq_printf(m, " rx_pend:%lu/%lu",
4113                    (unsigned long)info->recv_cnt,
4114                    (unsigned long)info->max_recv_cnt);
4115
4116 #if 1
4117         if (info->port.tty) {
4118                 if (info->port.tty->stopped)
4119                         seq_printf(m, " stopped:%i",
4120                                    (int)info->port.tty->stopped);
4121         }
4122
4123         {
4124                 unsigned char rstat = info->ioport[REG_STATUS];
4125                 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect))
4126                         seq_printf(m, " xoff_detect:1");
4127         }
4128
4129 #endif
4130
4131         if (info->icount.frame)
4132                 seq_printf(m, " fe:%lu", (unsigned long)info->icount.frame);
4133
4134         if (info->icount.parity)
4135                 seq_printf(m, " pe:%lu", (unsigned long)info->icount.parity);
4136
4137         if (info->icount.brk)
4138                 seq_printf(m, " brk:%lu", (unsigned long)info->icount.brk);
4139
4140         if (info->icount.overrun)
4141                 seq_printf(m, " oe:%lu", (unsigned long)info->icount.overrun);
4142
4143         /*
4144          * Last thing is the RS-232 status lines
4145          */
4146         if (!E100_RTS_GET(info))
4147                 seq_puts(m, "|RTS");
4148         if (!E100_CTS_GET(info))
4149                 seq_puts(m, "|CTS");
4150         if (!E100_DTR_GET(info))
4151                 seq_puts(m, "|DTR");
4152         if (!E100_DSR_GET(info))
4153                 seq_puts(m, "|DSR");
4154         if (!E100_CD_GET(info))
4155                 seq_puts(m, "|CD");
4156         if (!E100_RI_GET(info))
4157                 seq_puts(m, "|RI");
4158         seq_puts(m, "\n");
4159 }
4160
4161
4162 static int crisv10_proc_show(struct seq_file *m, void *v)
4163 {
4164         int i;
4165
4166         seq_printf(m, "serinfo:1.0 driver:%s\n", serial_version);
4167
4168         for (i = 0; i < NR_PORTS; i++) {
4169                 if (!rs_table[i].enabled)
4170                         continue;
4171                 seq_line_info(m, &rs_table[i]);
4172         }
4173 #ifdef DEBUG_LOG_INCLUDED
4174         for (i = 0; i < debug_log_pos; i++) {
4175                 seq_printf(m, "%-4i %lu.%lu ",
4176                          i, debug_log[i].time,
4177                          timer_data_to_ns(debug_log[i].timer_data));
4178                 seq_printf(m, debug_log[i].string, debug_log[i].value);
4179         }
4180         seq_printf(m, "debug_log %i/%i\n", i, DEBUG_LOG_SIZE);
4181         debug_log_pos = 0;
4182 #endif
4183         return 0;
4184 }
4185
4186 static int crisv10_proc_open(struct inode *inode, struct file *file)
4187 {
4188         return single_open(file, crisv10_proc_show, NULL);
4189 }
4190
4191 static const struct file_operations crisv10_proc_fops = {
4192         .owner          = THIS_MODULE,
4193         .open           = crisv10_proc_open,
4194         .read           = seq_read,
4195         .llseek         = seq_lseek,
4196         .release        = single_release,
4197 };
4198 #endif
4199
4200
4201 /* Finally, routines used to initialize the serial driver. */
4202
4203 static void show_serial_version(void)
4204 {
4205         printk(KERN_INFO
4206                "ETRAX 100LX serial-driver %s, "
4207                "(c) 2000-2004 Axis Communications AB\r\n",
4208                &serial_version[11]); /* "$Revision: x.yy" */
4209 }
4210
4211 /* rs_init inits the driver at boot (using the module_init chain) */
4212
4213 static const struct tty_operations rs_ops = {
4214         .open = rs_open,
4215         .close = rs_close,
4216         .write = rs_write,
4217         .flush_chars = rs_flush_chars,
4218         .write_room = rs_write_room,
4219         .chars_in_buffer = rs_chars_in_buffer,
4220         .flush_buffer = rs_flush_buffer,
4221         .ioctl = rs_ioctl,
4222         .throttle = rs_throttle,
4223         .unthrottle = rs_unthrottle,
4224         .set_termios = rs_set_termios,
4225         .stop = rs_stop,
4226         .start = rs_start,
4227         .hangup = rs_hangup,
4228         .break_ctl = rs_break,
4229         .send_xchar = rs_send_xchar,
4230         .wait_until_sent = rs_wait_until_sent,
4231         .tiocmget = rs_tiocmget,
4232         .tiocmset = rs_tiocmset,
4233 #ifdef CONFIG_PROC_FS
4234         .proc_fops = &crisv10_proc_fops,
4235 #endif
4236 };
4237
4238 static int __init rs_init(void)
4239 {
4240         int i;
4241         struct e100_serial *info;
4242         struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4243
4244         if (!driver)
4245                 return -ENOMEM;
4246
4247         show_serial_version();
4248
4249         /* Setup the timed flush handler system */
4250
4251 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4252         setup_timer(&flush_timer, timed_flush_handler, 0);
4253         mod_timer(&flush_timer, jiffies + 5);
4254 #endif
4255
4256 #if defined(CONFIG_ETRAX_RS485)
4257 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4258         if (cris_io_interface_allocate_pins(if_serial_0, 'a', rs485_pa_bit,
4259                         rs485_pa_bit)) {
4260                 printk(KERN_ERR "ETRAX100LX serial: Could not allocate "
4261                         "RS485 pin\n");
4262                 put_tty_driver(driver);
4263                 return -EBUSY;
4264         }
4265 #endif
4266 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4267         if (cris_io_interface_allocate_pins(if_serial_0, 'g', rs485_pa_bit,
4268                         rs485_port_g_bit)) {
4269                 printk(KERN_ERR "ETRAX100LX serial: Could not allocate "
4270                         "RS485 pin\n");
4271                 put_tty_driver(driver);
4272                 return -EBUSY;
4273         }
4274 #endif
4275 #endif
4276
4277         /* Initialize the tty_driver structure */
4278
4279         driver->driver_name = "serial";
4280         driver->name = "ttyS";
4281         driver->major = TTY_MAJOR;
4282         driver->minor_start = 64;
4283         driver->type = TTY_DRIVER_TYPE_SERIAL;
4284         driver->subtype = SERIAL_TYPE_NORMAL;
4285         driver->init_termios = tty_std_termios;
4286         driver->init_termios.c_cflag =
4287                 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4288         driver->init_termios.c_ispeed = 115200;
4289         driver->init_termios.c_ospeed = 115200;
4290         driver->flags = TTY_DRIVER_REAL_RAW;
4291
4292         tty_set_operations(driver, &rs_ops);
4293         serial_driver = driver;
4294
4295         /* do some initializing for the separate ports */
4296         for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4297                 if (info->enabled) {
4298                         if (cris_request_io_interface(info->io_if,
4299                                         info->io_if_description)) {
4300                                 printk(KERN_ERR "ETRAX100LX async serial: "
4301                                         "Could not allocate IO pins for "
4302                                         "%s, port %d\n",
4303                                         info->io_if_description, i);
4304                                 info->enabled = 0;
4305                         }
4306                 }
4307                 tty_port_init(&info->port);
4308                 info->uses_dma_in = 0;
4309                 info->uses_dma_out = 0;
4310                 info->line = i;
4311                 info->port.tty = NULL;
4312                 info->type = PORT_ETRAX;
4313                 info->tr_running = 0;
4314                 info->forced_eop = 0;
4315                 info->baud_base = DEF_BAUD_BASE;
4316                 info->custom_divisor = 0;
4317                 info->x_char = 0;
4318                 info->event = 0;
4319                 info->xmit.buf = NULL;
4320                 info->xmit.tail = info->xmit.head = 0;
4321                 info->first_recv_buffer = info->last_recv_buffer = NULL;
4322                 info->recv_cnt = info->max_recv_cnt = 0;
4323                 info->last_tx_active_usec = 0;
4324                 info->last_tx_active = 0;
4325
4326 #if defined(CONFIG_ETRAX_RS485)
4327                 /* Set sane defaults */
4328                 info->rs485.flags &= ~(SER_RS485_RTS_ON_SEND);
4329                 info->rs485.flags |= SER_RS485_RTS_AFTER_SEND;
4330                 info->rs485.delay_rts_before_send = 0;
4331                 info->rs485.flags &= ~(SER_RS485_ENABLED);
4332 #endif
4333                 INIT_WORK(&info->work, do_softint);
4334
4335                 if (info->enabled) {
4336                         printk(KERN_INFO "%s%d at %p is a builtin UART with DMA\n",
4337                                serial_driver->name, info->line, info->ioport);
4338                 }
4339                 tty_port_link_device(&info->port, driver, i);
4340         }
4341
4342         if (tty_register_driver(driver))
4343                 panic("Couldn't register serial driver\n");
4344
4345 #ifdef CONFIG_ETRAX_FAST_TIMER
4346 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4347         memset(fast_timers, 0, sizeof(fast_timers));
4348 #endif
4349 #ifdef CONFIG_ETRAX_RS485
4350         memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4351 #endif
4352         fast_timer_init();
4353 #endif
4354
4355 #ifndef CONFIG_ETRAX_KGDB
4356         /* Not needed in simulator.  May only complicate stuff. */
4357         /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4358
4359         if (request_irq(SERIAL_IRQ_NBR, ser_interrupt,
4360                         IRQF_SHARED, "serial ", driver))
4361                 panic("%s: Failed to request irq8", __func__);
4362
4363 #endif
4364
4365         return 0;
4366 }
4367
4368 /* this makes sure that rs_init is called during kernel boot */
4369
4370 module_init(rs_init);