2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/serial_8250.h>
36 #include <linux/nmi.h>
37 #include <linux/mutex.h>
38 #include <linux/slab.h>
39 #include <linux/kdb.h>
40 #include <linux/uaccess.h>
41 #include <linux/pm_runtime.h>
43 #include <linux/sunserialcore.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return port->minor - 64;
67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
73 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
75 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
79 #define DEBUG_INTR(fmt...) printk(fmt)
81 #define DEBUG_INTR(fmt...) do { } while (0)
85 * On -rt we can have a more delays, and legitimately
86 * so - so don't drop work spuriously and spam the
89 #ifdef CONFIG_PREEMPT_RT_FULL
90 # define PASS_LIMIT 1000000
92 # define PASS_LIMIT 512
95 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
98 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
99 #define CONFIG_SERIAL_DETECT_IRQ 1
101 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
102 #define CONFIG_SERIAL_MANY_PORTS 1
106 * HUB6 is always on. This will be removed once the header
107 * files have been cleaned.
109 #define CONFIG_HUB6 1
111 #include <asm/serial.h>
113 * SERIAL_PORT_DFNS tells us about built-in ports that have no
114 * standard enumeration mechanism. Platforms that can find all
115 * serial ports via mechanisms like ACPI or PCI need not supply it.
117 #ifndef SERIAL_PORT_DFNS
118 #define SERIAL_PORT_DFNS
121 static const struct old_serial_port old_serial_port[] = {
122 SERIAL_PORT_DFNS /* defined in asm/serial.h */
125 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
127 #ifdef CONFIG_SERIAL_8250_RSA
129 #define PORT_RSA_MAX 4
130 static unsigned long probe_rsa[PORT_RSA_MAX];
131 static unsigned int probe_rsa_count;
132 #endif /* CONFIG_SERIAL_8250_RSA */
135 struct hlist_node node;
137 spinlock_t lock; /* Protects list not the hash */
138 struct list_head *head;
141 #define NR_IRQ_HASH 32 /* Can be adjusted later */
142 static struct hlist_head irq_lists[NR_IRQ_HASH];
143 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
146 * Here we define the default xmit fifo size used for each type of UART.
148 static const struct serial8250_config uart_config[] = {
173 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
174 .rxtrig_bytes = {1, 4, 8, 14},
175 .flags = UART_CAP_FIFO,
186 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
192 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
194 .rxtrig_bytes = {8, 16, 24, 28},
195 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
201 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
203 .rxtrig_bytes = {1, 16, 32, 56},
204 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
212 .name = "16C950/954",
215 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
216 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
217 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
223 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
225 .rxtrig_bytes = {8, 16, 56, 60},
226 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
232 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
233 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
239 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
240 .flags = UART_CAP_FIFO,
246 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
247 .flags = UART_CAP_FIFO | UART_NATSEMI,
253 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
254 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
260 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
261 .flags = UART_CAP_FIFO,
267 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
268 .flags = UART_CAP_FIFO | UART_CAP_AFE,
274 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
275 .flags = UART_CAP_FIFO | UART_CAP_AFE,
281 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
283 .rxtrig_bytes = {1, 4, 8, 14},
284 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
290 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
291 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
298 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
300 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
307 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
308 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
309 .flags = UART_CAP_FIFO,
311 [PORT_BRCM_TRUMANAGE] = {
315 .flags = UART_CAP_HFIFO,
320 [PORT_ALTR_16550_F32] = {
321 .name = "Altera 16550 FIFO32",
324 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
325 .flags = UART_CAP_FIFO | UART_CAP_AFE,
327 [PORT_ALTR_16550_F64] = {
328 .name = "Altera 16550 FIFO64",
331 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
332 .flags = UART_CAP_FIFO | UART_CAP_AFE,
334 [PORT_ALTR_16550_F128] = {
335 .name = "Altera 16550 FIFO128",
338 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
339 .flags = UART_CAP_FIFO | UART_CAP_AFE,
341 /* tx_loadsz is set to 63-bytes instead of 64-bytes to implement
342 workaround of errata A-008006 which states that tx_loadsz should be
343 configured less than Maximum supported fifo bytes */
344 [PORT_16550A_FSL64] = {
345 .name = "16550A_FSL64",
348 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
350 .flags = UART_CAP_FIFO,
354 /* Uart divisor latch read */
355 static int default_serial_dl_read(struct uart_8250_port *up)
357 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
360 /* Uart divisor latch write */
361 static void default_serial_dl_write(struct uart_8250_port *up, int value)
363 serial_out(up, UART_DLL, value & 0xff);
364 serial_out(up, UART_DLM, value >> 8 & 0xff);
367 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
369 /* Au1x00/RT288x UART hardware has a weird register layout */
370 static const s8 au_io_in_map[8] = {
378 -1, /* UART_SCR (unmapped) */
381 static const s8 au_io_out_map[8] = {
387 -1, /* UART_LSR (unmapped) */
388 -1, /* UART_MSR (unmapped) */
389 -1, /* UART_SCR (unmapped) */
392 static unsigned int au_serial_in(struct uart_port *p, int offset)
394 if (offset >= ARRAY_SIZE(au_io_in_map))
396 offset = au_io_in_map[offset];
399 return __raw_readl(p->membase + (offset << p->regshift));
402 static void au_serial_out(struct uart_port *p, int offset, int value)
404 if (offset >= ARRAY_SIZE(au_io_out_map))
406 offset = au_io_out_map[offset];
409 __raw_writel(value, p->membase + (offset << p->regshift));
412 /* Au1x00 haven't got a standard divisor latch */
413 static int au_serial_dl_read(struct uart_8250_port *up)
415 return __raw_readl(up->port.membase + 0x28);
418 static void au_serial_dl_write(struct uart_8250_port *up, int value)
420 __raw_writel(value, up->port.membase + 0x28);
425 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
427 offset = offset << p->regshift;
428 outb(p->hub6 - 1 + offset, p->iobase);
429 return inb(p->iobase + 1);
432 static void hub6_serial_out(struct uart_port *p, int offset, int value)
434 offset = offset << p->regshift;
435 outb(p->hub6 - 1 + offset, p->iobase);
436 outb(value, p->iobase + 1);
439 static unsigned int mem_serial_in(struct uart_port *p, int offset)
441 offset = offset << p->regshift;
442 return readb(p->membase + offset);
445 static void mem_serial_out(struct uart_port *p, int offset, int value)
447 offset = offset << p->regshift;
448 writeb(value, p->membase + offset);
451 static void mem32_serial_out(struct uart_port *p, int offset, int value)
453 offset = offset << p->regshift;
454 writel(value, p->membase + offset);
457 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
459 offset = offset << p->regshift;
460 return readl(p->membase + offset);
463 static void mem32be_serial_out(struct uart_port *p, int offset, int value)
465 offset = offset << p->regshift;
466 iowrite32be(value, p->membase + offset);
469 static unsigned int mem32be_serial_in(struct uart_port *p, int offset)
471 offset = offset << p->regshift;
472 return ioread32be(p->membase + offset);
475 static unsigned int io_serial_in(struct uart_port *p, int offset)
477 offset = offset << p->regshift;
478 return inb(p->iobase + offset);
481 static void io_serial_out(struct uart_port *p, int offset, int value)
483 offset = offset << p->regshift;
484 outb(value, p->iobase + offset);
487 static int serial8250_default_handle_irq(struct uart_port *port);
488 static int exar_handle_irq(struct uart_port *port);
490 static void set_io_from_upio(struct uart_port *p)
492 struct uart_8250_port *up = up_to_u8250p(p);
494 up->dl_read = default_serial_dl_read;
495 up->dl_write = default_serial_dl_write;
499 p->serial_in = hub6_serial_in;
500 p->serial_out = hub6_serial_out;
504 p->serial_in = mem_serial_in;
505 p->serial_out = mem_serial_out;
509 p->serial_in = mem32_serial_in;
510 p->serial_out = mem32_serial_out;
514 p->serial_in = mem32be_serial_in;
515 p->serial_out = mem32be_serial_out;
518 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
520 p->serial_in = au_serial_in;
521 p->serial_out = au_serial_out;
522 up->dl_read = au_serial_dl_read;
523 up->dl_write = au_serial_dl_write;
528 p->serial_in = io_serial_in;
529 p->serial_out = io_serial_out;
532 /* Remember loaded iotype */
533 up->cur_iotype = p->iotype;
534 p->handle_irq = serial8250_default_handle_irq;
538 serial_port_out_sync(struct uart_port *p, int offset, int value)
545 p->serial_out(p, offset, value);
546 p->serial_in(p, UART_LCR); /* safe, no side-effects */
549 p->serial_out(p, offset, value);
556 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
558 serial_out(up, UART_SCR, offset);
559 serial_out(up, UART_ICR, value);
562 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
566 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
567 serial_out(up, UART_SCR, offset);
568 value = serial_in(up, UART_ICR);
569 serial_icr_write(up, UART_ACR, up->acr);
577 static void serial8250_clear_fifos(struct uart_8250_port *p)
579 if (p->capabilities & UART_CAP_FIFO) {
580 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
581 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
582 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
583 serial_out(p, UART_FCR, 0);
587 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
589 serial8250_clear_fifos(p);
590 serial_out(p, UART_FCR, p->fcr);
592 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
594 void serial8250_rpm_get(struct uart_8250_port *p)
596 if (!(p->capabilities & UART_CAP_RPM))
598 pm_runtime_get_sync(p->port.dev);
600 EXPORT_SYMBOL_GPL(serial8250_rpm_get);
602 void serial8250_rpm_put(struct uart_8250_port *p)
604 if (!(p->capabilities & UART_CAP_RPM))
606 pm_runtime_mark_last_busy(p->port.dev);
607 pm_runtime_put_autosuspend(p->port.dev);
609 EXPORT_SYMBOL_GPL(serial8250_rpm_put);
612 * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
613 * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
614 * empty and the HW can idle again.
616 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
618 unsigned char rpm_active;
620 if (!(p->capabilities & UART_CAP_RPM))
623 rpm_active = xchg(&p->rpm_tx_active, 1);
626 pm_runtime_get_sync(p->port.dev);
629 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
631 unsigned char rpm_active;
633 if (!(p->capabilities & UART_CAP_RPM))
636 rpm_active = xchg(&p->rpm_tx_active, 0);
639 pm_runtime_mark_last_busy(p->port.dev);
640 pm_runtime_put_autosuspend(p->port.dev);
644 * IER sleep support. UARTs which have EFRs need the "extended
645 * capability" bit enabled. Note that on XR16C850s, we need to
646 * reset LCR to write to IER.
648 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
650 unsigned char lcr = 0, efr = 0;
652 * Exar UARTs have a SLEEP register that enables or disables
653 * each UART to enter sleep mode separately. On the XR17V35x the
654 * register is accessible to each UART at the UART_EXAR_SLEEP
655 * offset but the UART channel may only write to the corresponding
658 serial8250_rpm_get(p);
659 if ((p->port.type == PORT_XR17V35X) ||
660 (p->port.type == PORT_XR17D15X)) {
661 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
665 if (p->capabilities & UART_CAP_SLEEP) {
666 if (p->capabilities & UART_CAP_EFR) {
667 lcr = serial_in(p, UART_LCR);
668 efr = serial_in(p, UART_EFR);
669 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
670 serial_out(p, UART_EFR, UART_EFR_ECB);
671 serial_out(p, UART_LCR, 0);
673 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
674 if (p->capabilities & UART_CAP_EFR) {
675 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
676 serial_out(p, UART_EFR, efr);
677 serial_out(p, UART_LCR, lcr);
681 serial8250_rpm_put(p);
684 #ifdef CONFIG_SERIAL_8250_RSA
686 * Attempts to turn on the RSA FIFO. Returns zero on failure.
687 * We set the port uart clock rate if we succeed.
689 static int __enable_rsa(struct uart_8250_port *up)
694 mode = serial_in(up, UART_RSA_MSR);
695 result = mode & UART_RSA_MSR_FIFO;
698 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
699 mode = serial_in(up, UART_RSA_MSR);
700 result = mode & UART_RSA_MSR_FIFO;
704 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
709 static void enable_rsa(struct uart_8250_port *up)
711 if (up->port.type == PORT_RSA) {
712 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
713 spin_lock_irq(&up->port.lock);
715 spin_unlock_irq(&up->port.lock);
717 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
718 serial_out(up, UART_RSA_FRR, 0);
723 * Attempts to turn off the RSA FIFO. Returns zero on failure.
724 * It is unknown why interrupts were disabled in here. However,
725 * the caller is expected to preserve this behaviour by grabbing
726 * the spinlock before calling this function.
728 static void disable_rsa(struct uart_8250_port *up)
733 if (up->port.type == PORT_RSA &&
734 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
735 spin_lock_irq(&up->port.lock);
737 mode = serial_in(up, UART_RSA_MSR);
738 result = !(mode & UART_RSA_MSR_FIFO);
741 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
742 mode = serial_in(up, UART_RSA_MSR);
743 result = !(mode & UART_RSA_MSR_FIFO);
747 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
748 spin_unlock_irq(&up->port.lock);
751 #endif /* CONFIG_SERIAL_8250_RSA */
754 * This is a quickie test to see how big the FIFO is.
755 * It doesn't work at all the time, more's the pity.
757 static int size_fifo(struct uart_8250_port *up)
759 unsigned char old_fcr, old_mcr, old_lcr;
760 unsigned short old_dl;
763 old_lcr = serial_in(up, UART_LCR);
764 serial_out(up, UART_LCR, 0);
765 old_fcr = serial_in(up, UART_FCR);
766 old_mcr = serial_in(up, UART_MCR);
767 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
768 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
769 serial_out(up, UART_MCR, UART_MCR_LOOP);
770 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
771 old_dl = serial_dl_read(up);
772 serial_dl_write(up, 0x0001);
773 serial_out(up, UART_LCR, 0x03);
774 for (count = 0; count < 256; count++)
775 serial_out(up, UART_TX, count);
776 mdelay(20);/* FIXME - schedule_timeout */
777 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
778 (count < 256); count++)
779 serial_in(up, UART_RX);
780 serial_out(up, UART_FCR, old_fcr);
781 serial_out(up, UART_MCR, old_mcr);
782 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
783 serial_dl_write(up, old_dl);
784 serial_out(up, UART_LCR, old_lcr);
790 * Read UART ID using the divisor method - set DLL and DLM to zero
791 * and the revision will be in DLL and device type in DLM. We
792 * preserve the device state across this.
794 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
796 unsigned char old_dll, old_dlm, old_lcr;
799 old_lcr = serial_in(p, UART_LCR);
800 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
802 old_dll = serial_in(p, UART_DLL);
803 old_dlm = serial_in(p, UART_DLM);
805 serial_out(p, UART_DLL, 0);
806 serial_out(p, UART_DLM, 0);
808 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
810 serial_out(p, UART_DLL, old_dll);
811 serial_out(p, UART_DLM, old_dlm);
812 serial_out(p, UART_LCR, old_lcr);
818 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
819 * When this function is called we know it is at least a StarTech
820 * 16650 V2, but it might be one of several StarTech UARTs, or one of
821 * its clones. (We treat the broken original StarTech 16650 V1 as a
822 * 16550, and why not? Startech doesn't seem to even acknowledge its
825 * What evil have men's minds wrought...
827 static void autoconfig_has_efr(struct uart_8250_port *up)
829 unsigned int id1, id2, id3, rev;
832 * Everything with an EFR has SLEEP
834 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
837 * First we check to see if it's an Oxford Semiconductor UART.
839 * If we have to do this here because some non-National
840 * Semiconductor clone chips lock up if you try writing to the
841 * LSR register (which serial_icr_read does)
845 * Check for Oxford Semiconductor 16C950.
847 * EFR [4] must be set else this test fails.
849 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
850 * claims that it's needed for 952 dual UART's (which are not
851 * recommended for new designs).
854 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
855 serial_out(up, UART_EFR, UART_EFR_ECB);
856 serial_out(up, UART_LCR, 0x00);
857 id1 = serial_icr_read(up, UART_ID1);
858 id2 = serial_icr_read(up, UART_ID2);
859 id3 = serial_icr_read(up, UART_ID3);
860 rev = serial_icr_read(up, UART_REV);
862 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
864 if (id1 == 0x16 && id2 == 0xC9 &&
865 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
866 up->port.type = PORT_16C950;
869 * Enable work around for the Oxford Semiconductor 952 rev B
870 * chip which causes it to seriously miscalculate baud rates
873 if (id3 == 0x52 && rev == 0x01)
874 up->bugs |= UART_BUG_QUOT;
879 * We check for a XR16C850 by setting DLL and DLM to 0, and then
880 * reading back DLL and DLM. The chip type depends on the DLM
882 * 0x10 - XR16C850 and the DLL contains the chip revision.
886 id1 = autoconfig_read_divisor_id(up);
887 DEBUG_AUTOCONF("850id=%04x ", id1);
890 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
891 up->port.type = PORT_16850;
896 * It wasn't an XR16C850.
898 * We distinguish between the '654 and the '650 by counting
899 * how many bytes are in the FIFO. I'm using this for now,
900 * since that's the technique that was sent to me in the
901 * serial driver update, but I'm not convinced this works.
902 * I've had problems doing this in the past. -TYT
904 if (size_fifo(up) == 64)
905 up->port.type = PORT_16654;
907 up->port.type = PORT_16650V2;
911 * We detected a chip without a FIFO. Only two fall into
912 * this category - the original 8250 and the 16450. The
913 * 16450 has a scratch register (accessible with LCR=0)
915 static void autoconfig_8250(struct uart_8250_port *up)
917 unsigned char scratch, status1, status2;
919 up->port.type = PORT_8250;
921 scratch = serial_in(up, UART_SCR);
922 serial_out(up, UART_SCR, 0xa5);
923 status1 = serial_in(up, UART_SCR);
924 serial_out(up, UART_SCR, 0x5a);
925 status2 = serial_in(up, UART_SCR);
926 serial_out(up, UART_SCR, scratch);
928 if (status1 == 0xa5 && status2 == 0x5a)
929 up->port.type = PORT_16450;
932 static int broken_efr(struct uart_8250_port *up)
935 * Exar ST16C2550 "A2" devices incorrectly detect as
936 * having an EFR, and report an ID of 0x0201. See
937 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
939 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
946 * We know that the chip has FIFOs. Does it have an EFR? The
947 * EFR is located in the same register position as the IIR and
948 * we know the top two bits of the IIR are currently set. The
949 * EFR should contain zero. Try to read the EFR.
951 static void autoconfig_16550a(struct uart_8250_port *up)
953 unsigned char status1, status2;
954 unsigned int iersave;
956 up->port.type = PORT_16550A;
957 up->capabilities |= UART_CAP_FIFO;
960 * XR17V35x UARTs have an extra divisor register, DLD
961 * that gets enabled with when DLAB is set which will
962 * cause the device to incorrectly match and assign
963 * port type to PORT_16650. The EFR for this UART is
964 * found at offset 0x09. Instead check the Deice ID (DVID)
965 * register for a 2, 4 or 8 port UART.
967 if (up->port.flags & UPF_EXAR_EFR) {
968 status1 = serial_in(up, UART_EXAR_DVID);
969 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
970 DEBUG_AUTOCONF("Exar XR17V35x ");
971 up->port.type = PORT_XR17V35X;
972 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
981 * Check for presence of the EFR when DLAB is set.
982 * Only ST16C650V1 UARTs pass this test.
984 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
985 if (serial_in(up, UART_EFR) == 0) {
986 serial_out(up, UART_EFR, 0xA8);
987 if (serial_in(up, UART_EFR) != 0) {
988 DEBUG_AUTOCONF("EFRv1 ");
989 up->port.type = PORT_16650;
990 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
992 serial_out(up, UART_LCR, 0);
993 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
995 status1 = serial_in(up, UART_IIR) >> 5;
996 serial_out(up, UART_FCR, 0);
997 serial_out(up, UART_LCR, 0);
1000 up->port.type = PORT_16550A_FSL64;
1002 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
1004 serial_out(up, UART_EFR, 0);
1009 * Maybe it requires 0xbf to be written to the LCR.
1010 * (other ST16C650V2 UARTs, TI16C752A, etc)
1012 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1013 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
1014 DEBUG_AUTOCONF("EFRv2 ");
1015 autoconfig_has_efr(up);
1020 * Check for a National Semiconductor SuperIO chip.
1021 * Attempt to switch to bank 2, read the value of the LOOP bit
1022 * from EXCR1. Switch back to bank 0, change it in MCR. Then
1023 * switch back to bank 2, read it from EXCR1 again and check
1024 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
1026 serial_out(up, UART_LCR, 0);
1027 status1 = serial_in(up, UART_MCR);
1028 serial_out(up, UART_LCR, 0xE0);
1029 status2 = serial_in(up, 0x02); /* EXCR1 */
1031 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
1032 serial_out(up, UART_LCR, 0);
1033 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
1034 serial_out(up, UART_LCR, 0xE0);
1035 status2 = serial_in(up, 0x02); /* EXCR1 */
1036 serial_out(up, UART_LCR, 0);
1037 serial_out(up, UART_MCR, status1);
1039 if ((status2 ^ status1) & UART_MCR_LOOP) {
1040 unsigned short quot;
1042 serial_out(up, UART_LCR, 0xE0);
1044 quot = serial_dl_read(up);
1047 if (ns16550a_goto_highspeed(up))
1048 serial_dl_write(up, quot);
1050 serial_out(up, UART_LCR, 0);
1052 up->port.uartclk = 921600*16;
1053 up->port.type = PORT_NS16550A;
1054 up->capabilities |= UART_NATSEMI;
1060 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1061 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1062 * Try setting it with and without DLAB set. Cheap clones
1063 * set bit 5 without DLAB set.
1065 serial_out(up, UART_LCR, 0);
1066 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1067 status1 = serial_in(up, UART_IIR) >> 5;
1068 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1069 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1070 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1071 status2 = serial_in(up, UART_IIR) >> 5;
1072 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1073 serial_out(up, UART_LCR, 0);
1075 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1077 if (status1 == 6 && status2 == 7) {
1078 up->port.type = PORT_16750;
1079 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1084 * Try writing and reading the UART_IER_UUE bit (b6).
1085 * If it works, this is probably one of the Xscale platform's
1087 * We're going to explicitly set the UUE bit to 0 before
1088 * trying to write and read a 1 just to make sure it's not
1089 * already a 1 and maybe locked there before we even start start.
1091 iersave = serial_in(up, UART_IER);
1092 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1093 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1095 * OK it's in a known zero state, try writing and reading
1096 * without disturbing the current state of the other bits.
1098 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1099 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1102 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1104 DEBUG_AUTOCONF("Xscale ");
1105 up->port.type = PORT_XSCALE;
1106 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1111 * If we got here we couldn't force the IER_UUE bit to 0.
1112 * Log it and continue.
1114 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1116 serial_out(up, UART_IER, iersave);
1119 * Exar uarts have EFR in a weird location
1121 if (up->port.flags & UPF_EXAR_EFR) {
1122 DEBUG_AUTOCONF("Exar XR17D15x ");
1123 up->port.type = PORT_XR17D15X;
1124 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1131 * We distinguish between 16550A and U6 16550A by counting
1132 * how many bytes are in the FIFO.
1134 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1135 up->port.type = PORT_U6_16550A;
1136 up->capabilities |= UART_CAP_AFE;
1141 * This routine is called by rs_init() to initialize a specific serial
1142 * port. It determines what type of UART chip this serial port is
1143 * using: 8250, 16450, 16550, 16550A. The important question is
1144 * whether or not this UART is a 16550A or not, since this will
1145 * determine whether or not we can use its FIFO features or not.
1147 static void autoconfig(struct uart_8250_port *up)
1149 unsigned char status1, scratch, scratch2, scratch3;
1150 unsigned char save_lcr, save_mcr;
1151 struct uart_port *port = &up->port;
1152 unsigned long flags;
1153 unsigned int old_capabilities;
1155 if (!port->iobase && !port->mapbase && !port->membase)
1158 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1159 serial_index(port), port->iobase, port->membase);
1162 * We really do need global IRQs disabled here - we're going to
1163 * be frobbing the chips IRQ enable register to see if it exists.
1165 spin_lock_irqsave(&port->lock, flags);
1167 up->capabilities = 0;
1170 if (!(port->flags & UPF_BUGGY_UART)) {
1172 * Do a simple existence test first; if we fail this,
1173 * there's no point trying anything else.
1175 * 0x80 is used as a nonsense port to prevent against
1176 * false positives due to ISA bus float. The
1177 * assumption is that 0x80 is a non-existent port;
1178 * which should be safe since include/asm/io.h also
1179 * makes this assumption.
1181 * Note: this is safe as long as MCR bit 4 is clear
1182 * and the device is in "PC" mode.
1184 scratch = serial_in(up, UART_IER);
1185 serial_out(up, UART_IER, 0);
1190 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1191 * 16C754B) allow only to modify them if an EFR bit is set.
1193 scratch2 = serial_in(up, UART_IER) & 0x0f;
1194 serial_out(up, UART_IER, 0x0F);
1198 scratch3 = serial_in(up, UART_IER) & 0x0f;
1199 serial_out(up, UART_IER, scratch);
1200 if (scratch2 != 0 || scratch3 != 0x0F) {
1202 * We failed; there's nothing here
1204 spin_unlock_irqrestore(&port->lock, flags);
1205 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1206 scratch2, scratch3);
1211 save_mcr = serial_in(up, UART_MCR);
1212 save_lcr = serial_in(up, UART_LCR);
1215 * Check to see if a UART is really there. Certain broken
1216 * internal modems based on the Rockwell chipset fail this
1217 * test, because they apparently don't implement the loopback
1218 * test mode. So this test is skipped on the COM 1 through
1219 * COM 4 ports. This *should* be safe, since no board
1220 * manufacturer would be stupid enough to design a board
1221 * that conflicts with COM 1-4 --- we hope!
1223 if (!(port->flags & UPF_SKIP_TEST)) {
1224 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1225 status1 = serial_in(up, UART_MSR) & 0xF0;
1226 serial_out(up, UART_MCR, save_mcr);
1227 if (status1 != 0x90) {
1228 spin_unlock_irqrestore(&port->lock, flags);
1229 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1236 * We're pretty sure there's a port here. Lets find out what
1237 * type of port it is. The IIR top two bits allows us to find
1238 * out if it's 8250 or 16450, 16550, 16550A or later. This
1239 * determines what we test for next.
1241 * We also initialise the EFR (if any) to zero for later. The
1242 * EFR occupies the same register location as the FCR and IIR.
1244 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1245 serial_out(up, UART_EFR, 0);
1246 serial_out(up, UART_LCR, 0);
1248 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1249 scratch = serial_in(up, UART_IIR) >> 6;
1253 autoconfig_8250(up);
1256 port->type = PORT_UNKNOWN;
1259 port->type = PORT_16550;
1262 autoconfig_16550a(up);
1266 #ifdef CONFIG_SERIAL_8250_RSA
1268 * Only probe for RSA ports if we got the region.
1270 if (port->type == PORT_16550A && up->probe & UART_PROBE_RSA &&
1272 port->type = PORT_RSA;
1275 serial_out(up, UART_LCR, save_lcr);
1277 port->fifosize = uart_config[up->port.type].fifo_size;
1278 old_capabilities = up->capabilities;
1279 up->capabilities = uart_config[port->type].flags;
1280 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1282 if (port->type == PORT_UNKNOWN)
1288 #ifdef CONFIG_SERIAL_8250_RSA
1289 if (port->type == PORT_RSA)
1290 serial_out(up, UART_RSA_FRR, 0);
1292 serial_out(up, UART_MCR, save_mcr);
1293 serial8250_clear_fifos(up);
1294 serial_in(up, UART_RX);
1295 if (up->capabilities & UART_CAP_UUE)
1296 serial_out(up, UART_IER, UART_IER_UUE);
1298 serial_out(up, UART_IER, 0);
1301 spin_unlock_irqrestore(&port->lock, flags);
1302 if (up->capabilities != old_capabilities) {
1304 "ttyS%d: detected caps %08x should be %08x\n",
1305 serial_index(port), old_capabilities,
1309 DEBUG_AUTOCONF("iir=%d ", scratch);
1310 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1313 static void autoconfig_irq(struct uart_8250_port *up)
1315 struct uart_port *port = &up->port;
1316 unsigned char save_mcr, save_ier;
1317 unsigned char save_ICP = 0;
1318 unsigned int ICP = 0;
1322 if (port->flags & UPF_FOURPORT) {
1323 ICP = (port->iobase & 0xfe0) | 0x1f;
1324 save_ICP = inb_p(ICP);
1329 /* forget possible initially masked and pending IRQ */
1330 probe_irq_off(probe_irq_on());
1331 save_mcr = serial_in(up, UART_MCR);
1332 save_ier = serial_in(up, UART_IER);
1333 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1335 irqs = probe_irq_on();
1336 serial_out(up, UART_MCR, 0);
1338 if (port->flags & UPF_FOURPORT) {
1339 serial_out(up, UART_MCR,
1340 UART_MCR_DTR | UART_MCR_RTS);
1342 serial_out(up, UART_MCR,
1343 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1345 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1346 serial_in(up, UART_LSR);
1347 serial_in(up, UART_RX);
1348 serial_in(up, UART_IIR);
1349 serial_in(up, UART_MSR);
1350 serial_out(up, UART_TX, 0xFF);
1352 irq = probe_irq_off(irqs);
1354 serial_out(up, UART_MCR, save_mcr);
1355 serial_out(up, UART_IER, save_ier);
1357 if (port->flags & UPF_FOURPORT)
1358 outb_p(save_ICP, ICP);
1360 port->irq = (irq > 0) ? irq : 0;
1363 static inline void __stop_tx(struct uart_8250_port *p)
1365 if (p->ier & UART_IER_THRI) {
1366 p->ier &= ~UART_IER_THRI;
1367 serial_out(p, UART_IER, p->ier);
1368 serial8250_rpm_put_tx(p);
1372 static void serial8250_stop_tx(struct uart_port *port)
1374 struct uart_8250_port *up = up_to_u8250p(port);
1376 serial8250_rpm_get(up);
1380 * We really want to stop the transmitter from sending.
1382 if (port->type == PORT_16C950) {
1383 up->acr |= UART_ACR_TXDIS;
1384 serial_icr_write(up, UART_ACR, up->acr);
1386 serial8250_rpm_put(up);
1389 static void serial8250_start_tx(struct uart_port *port)
1391 struct uart_8250_port *up = up_to_u8250p(port);
1393 serial8250_rpm_get_tx(up);
1395 if (up->dma && !up->dma->tx_dma(up))
1398 if (!(up->ier & UART_IER_THRI)) {
1399 up->ier |= UART_IER_THRI;
1400 serial_port_out(port, UART_IER, up->ier);
1402 if (up->bugs & UART_BUG_TXEN) {
1404 lsr = serial_in(up, UART_LSR);
1405 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1406 if (lsr & UART_LSR_THRE)
1407 serial8250_tx_chars(up);
1412 * Re-enable the transmitter if we disabled it.
1414 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1415 up->acr &= ~UART_ACR_TXDIS;
1416 serial_icr_write(up, UART_ACR, up->acr);
1420 static void serial8250_throttle(struct uart_port *port)
1422 port->throttle(port);
1425 static void serial8250_unthrottle(struct uart_port *port)
1427 port->unthrottle(port);
1430 static void serial8250_stop_rx(struct uart_port *port)
1432 struct uart_8250_port *up = up_to_u8250p(port);
1434 serial8250_rpm_get(up);
1436 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1437 up->port.read_status_mask &= ~UART_LSR_DR;
1438 serial_port_out(port, UART_IER, up->ier);
1440 serial8250_rpm_put(up);
1443 static void serial8250_disable_ms(struct uart_port *port)
1445 struct uart_8250_port *up =
1446 container_of(port, struct uart_8250_port, port);
1448 /* no MSR capabilities */
1449 if (up->bugs & UART_BUG_NOMSR)
1452 up->ier &= ~UART_IER_MSI;
1453 serial_port_out(port, UART_IER, up->ier);
1456 static void serial8250_enable_ms(struct uart_port *port)
1458 struct uart_8250_port *up = up_to_u8250p(port);
1460 /* no MSR capabilities */
1461 if (up->bugs & UART_BUG_NOMSR)
1464 up->ier |= UART_IER_MSI;
1466 serial8250_rpm_get(up);
1467 serial_port_out(port, UART_IER, up->ier);
1468 serial8250_rpm_put(up);
1472 * serial8250_rx_chars: processes according to the passed in LSR
1473 * value, and returns the remaining LSR bits not handled
1474 * by this Rx routine.
1477 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1479 struct uart_port *port = &up->port;
1481 int max_count = 256;
1485 if (likely(lsr & UART_LSR_DR))
1486 ch = serial_in(up, UART_RX);
1489 * Intel 82571 has a Serial Over Lan device that will
1490 * set UART_LSR_BI without setting UART_LSR_DR when
1491 * it receives a break. To avoid reading from the
1492 * receive buffer without UART_LSR_DR bit set, we
1493 * just force the read character to be 0
1500 lsr |= up->lsr_saved_flags;
1501 up->lsr_saved_flags = 0;
1503 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1504 if (lsr & UART_LSR_BI) {
1505 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1508 * We do the SysRQ and SAK checking
1509 * here because otherwise the break
1510 * may get masked by ignore_status_mask
1511 * or read_status_mask.
1513 if (uart_handle_break(port))
1515 } else if (lsr & UART_LSR_PE)
1516 port->icount.parity++;
1517 else if (lsr & UART_LSR_FE)
1518 port->icount.frame++;
1519 if (lsr & UART_LSR_OE)
1520 port->icount.overrun++;
1523 * Mask off conditions which should be ignored.
1525 lsr &= port->read_status_mask;
1527 if (lsr & UART_LSR_BI) {
1528 DEBUG_INTR("handling break....");
1530 } else if (lsr & UART_LSR_PE)
1532 else if (lsr & UART_LSR_FE)
1535 if (uart_handle_sysrq_char(port, ch))
1538 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1541 lsr = serial_in(up, UART_LSR);
1542 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
1543 spin_unlock(&port->lock);
1544 tty_flip_buffer_push(&port->state->port);
1545 spin_lock(&port->lock);
1548 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1550 void serial8250_tx_chars(struct uart_8250_port *up)
1552 struct uart_port *port = &up->port;
1553 struct circ_buf *xmit = &port->state->xmit;
1557 serial_out(up, UART_TX, port->x_char);
1562 if (uart_tx_stopped(port)) {
1563 serial8250_stop_tx(port);
1566 if (uart_circ_empty(xmit)) {
1571 count = up->tx_loadsz;
1573 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1574 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1576 if (uart_circ_empty(xmit))
1578 if (up->capabilities & UART_CAP_HFIFO) {
1579 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1583 } while (--count > 0);
1585 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1586 uart_write_wakeup(port);
1588 DEBUG_INTR("THRE...");
1591 * With RPM enabled, we have to wait until the FIFO is empty before the
1592 * HW can go idle. So we get here once again with empty FIFO and disable
1593 * the interrupt and RPM in __stop_tx()
1595 if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1598 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1600 /* Caller holds uart port lock */
1601 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1603 struct uart_port *port = &up->port;
1604 unsigned int status = serial_in(up, UART_MSR);
1606 status |= up->msr_saved_flags;
1607 up->msr_saved_flags = 0;
1608 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1609 port->state != NULL) {
1610 if (status & UART_MSR_TERI)
1612 if (status & UART_MSR_DDSR)
1614 if (status & UART_MSR_DDCD)
1615 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1616 if (status & UART_MSR_DCTS)
1617 uart_handle_cts_change(port, status & UART_MSR_CTS);
1619 wake_up_interruptible(&port->state->port.delta_msr_wait);
1624 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1627 * This handles the interrupt from one port.
1629 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1631 unsigned char status;
1632 unsigned long flags;
1633 struct uart_8250_port *up = up_to_u8250p(port);
1636 if (iir & UART_IIR_NO_INT)
1639 spin_lock_irqsave(&port->lock, flags);
1641 status = serial_port_in(port, UART_LSR);
1643 DEBUG_INTR("status = %x...", status);
1645 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1647 dma_err = up->dma->rx_dma(up, iir);
1649 if (!up->dma || dma_err)
1650 status = serial8250_rx_chars(up, status);
1652 serial8250_modem_status(up);
1653 if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1654 (status & UART_LSR_THRE))
1655 serial8250_tx_chars(up);
1657 spin_unlock_irqrestore(&port->lock, flags);
1660 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1662 static int serial8250_default_handle_irq(struct uart_port *port)
1664 struct uart_8250_port *up = up_to_u8250p(port);
1668 serial8250_rpm_get(up);
1670 iir = serial_port_in(port, UART_IIR);
1671 ret = serial8250_handle_irq(port, iir);
1673 serial8250_rpm_put(up);
1678 * These Exar UARTs have an extra interrupt indicator that could
1679 * fire for a few unimplemented interrupts. One of which is a
1680 * wakeup event when coming out of sleep. Put this here just
1681 * to be on the safe side that these interrupts don't go unhandled.
1683 static int exar_handle_irq(struct uart_port *port)
1685 unsigned char int0, int1, int2, int3;
1686 unsigned int iir = serial_port_in(port, UART_IIR);
1689 ret = serial8250_handle_irq(port, iir);
1691 if ((port->type == PORT_XR17V35X) ||
1692 (port->type == PORT_XR17D15X)) {
1693 int0 = serial_port_in(port, 0x80);
1694 int1 = serial_port_in(port, 0x81);
1695 int2 = serial_port_in(port, 0x82);
1696 int3 = serial_port_in(port, 0x83);
1703 * This is the serial driver's interrupt routine.
1705 * Arjan thinks the old way was overly complex, so it got simplified.
1706 * Alan disagrees, saying that need the complexity to handle the weird
1707 * nature of ISA shared interrupts. (This is a special exception.)
1709 * In order to handle ISA shared interrupts properly, we need to check
1710 * that all ports have been serviced, and therefore the ISA interrupt
1711 * line has been de-asserted.
1713 * This means we need to loop through all ports. checking that they
1714 * don't have an interrupt pending.
1716 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1718 struct irq_info *i = dev_id;
1719 struct list_head *l, *end = NULL;
1720 int pass_counter = 0, handled = 0;
1722 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1724 spin_lock(&i->lock);
1728 struct uart_8250_port *up;
1729 struct uart_port *port;
1731 up = list_entry(l, struct uart_8250_port, list);
1734 if (port->handle_irq(port)) {
1737 } else if (end == NULL)
1742 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1743 /* If we hit this, we're dead. */
1744 printk_ratelimited(KERN_ERR
1745 "serial8250: too much work for irq%d\n", irq);
1750 spin_unlock(&i->lock);
1752 DEBUG_INTR("end.\n");
1754 return IRQ_RETVAL(handled);
1758 * To support ISA shared interrupts, we need to have one interrupt
1759 * handler that ensures that the IRQ line has been deasserted
1760 * before returning. Failing to do this will result in the IRQ
1761 * line being stuck active, and, since ISA irqs are edge triggered,
1762 * no more IRQs will be seen.
1764 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1766 spin_lock_irq(&i->lock);
1768 if (!list_empty(i->head)) {
1769 if (i->head == &up->list)
1770 i->head = i->head->next;
1771 list_del(&up->list);
1773 BUG_ON(i->head != &up->list);
1776 spin_unlock_irq(&i->lock);
1777 /* List empty so throw away the hash node */
1778 if (i->head == NULL) {
1779 hlist_del(&i->node);
1784 static int serial_link_irq_chain(struct uart_8250_port *up)
1786 struct hlist_head *h;
1787 struct hlist_node *n;
1789 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1791 mutex_lock(&hash_mutex);
1793 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1795 hlist_for_each(n, h) {
1796 i = hlist_entry(n, struct irq_info, node);
1797 if (i->irq == up->port.irq)
1802 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1804 mutex_unlock(&hash_mutex);
1807 spin_lock_init(&i->lock);
1808 i->irq = up->port.irq;
1809 hlist_add_head(&i->node, h);
1811 mutex_unlock(&hash_mutex);
1813 spin_lock_irq(&i->lock);
1816 list_add(&up->list, i->head);
1817 spin_unlock_irq(&i->lock);
1821 INIT_LIST_HEAD(&up->list);
1822 i->head = &up->list;
1823 spin_unlock_irq(&i->lock);
1824 irq_flags |= up->port.irqflags;
1825 ret = request_irq(up->port.irq, serial8250_interrupt,
1826 irq_flags, "serial", i);
1828 serial_do_unlink(i, up);
1834 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1837 * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1838 * but no, we are not going to take a patch that assigns NULL below.
1841 struct hlist_node *n;
1842 struct hlist_head *h;
1844 mutex_lock(&hash_mutex);
1846 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1848 hlist_for_each(n, h) {
1849 i = hlist_entry(n, struct irq_info, node);
1850 if (i->irq == up->port.irq)
1855 BUG_ON(i->head == NULL);
1857 if (list_empty(i->head))
1858 free_irq(up->port.irq, i);
1860 serial_do_unlink(i, up);
1861 mutex_unlock(&hash_mutex);
1865 * This function is used to handle ports that do not have an
1866 * interrupt. This doesn't work very well for 16450's, but gives
1867 * barely passable results for a 16550A. (Although at the expense
1868 * of much CPU overhead).
1870 static void serial8250_timeout(unsigned long data)
1872 struct uart_8250_port *up = (struct uart_8250_port *)data;
1874 up->port.handle_irq(&up->port);
1875 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1878 static void serial8250_backup_timeout(unsigned long data)
1880 struct uart_8250_port *up = (struct uart_8250_port *)data;
1881 unsigned int iir, ier = 0, lsr;
1882 unsigned long flags;
1884 spin_lock_irqsave(&up->port.lock, flags);
1887 * Must disable interrupts or else we risk racing with the interrupt
1891 ier = serial_in(up, UART_IER);
1892 serial_out(up, UART_IER, 0);
1895 iir = serial_in(up, UART_IIR);
1898 * This should be a safe test for anyone who doesn't trust the
1899 * IIR bits on their UART, but it's specifically designed for
1900 * the "Diva" UART used on the management processor on many HP
1901 * ia64 and parisc boxes.
1903 lsr = serial_in(up, UART_LSR);
1904 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1905 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1906 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1907 (lsr & UART_LSR_THRE)) {
1908 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1909 iir |= UART_IIR_THRI;
1912 if (!(iir & UART_IIR_NO_INT))
1913 serial8250_tx_chars(up);
1916 serial_out(up, UART_IER, ier);
1918 spin_unlock_irqrestore(&up->port.lock, flags);
1920 /* Standard timer interval plus 0.2s to keep the port running */
1921 mod_timer(&up->timer,
1922 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1925 static int univ8250_setup_irq(struct uart_8250_port *up)
1927 struct uart_port *port = &up->port;
1931 * The above check will only give an accurate result the first time
1932 * the port is opened so this value needs to be preserved.
1934 if (up->bugs & UART_BUG_THRE) {
1935 pr_debug("ttyS%d - using backup timer\n", serial_index(port));
1937 up->timer.function = serial8250_backup_timeout;
1938 up->timer.data = (unsigned long)up;
1939 mod_timer(&up->timer, jiffies +
1940 uart_poll_timeout(port) + HZ / 5);
1944 * If the "interrupt" for this port doesn't correspond with any
1945 * hardware interrupt, we use a timer-based system. The original
1946 * driver used to do this with IRQ0.
1949 up->timer.data = (unsigned long)up;
1950 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
1952 retval = serial_link_irq_chain(up);
1957 static void univ8250_release_irq(struct uart_8250_port *up)
1959 struct uart_port *port = &up->port;
1961 del_timer_sync(&up->timer);
1962 up->timer.function = serial8250_timeout;
1964 serial_unlink_irq_chain(up);
1967 static unsigned int serial8250_tx_empty(struct uart_port *port)
1969 struct uart_8250_port *up = up_to_u8250p(port);
1970 unsigned long flags;
1973 serial8250_rpm_get(up);
1975 spin_lock_irqsave(&port->lock, flags);
1976 lsr = serial_port_in(port, UART_LSR);
1977 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1978 spin_unlock_irqrestore(&port->lock, flags);
1980 serial8250_rpm_put(up);
1982 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1985 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1987 struct uart_8250_port *up = up_to_u8250p(port);
1988 unsigned int status;
1991 serial8250_rpm_get(up);
1992 status = serial8250_modem_status(up);
1993 serial8250_rpm_put(up);
1996 if (status & UART_MSR_DCD)
1998 if (status & UART_MSR_RI)
2000 if (status & UART_MSR_DSR)
2002 if (status & UART_MSR_CTS)
2007 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
2009 struct uart_8250_port *up = up_to_u8250p(port);
2010 unsigned char mcr = 0;
2012 if (mctrl & TIOCM_RTS)
2013 mcr |= UART_MCR_RTS;
2014 if (mctrl & TIOCM_DTR)
2015 mcr |= UART_MCR_DTR;
2016 if (mctrl & TIOCM_OUT1)
2017 mcr |= UART_MCR_OUT1;
2018 if (mctrl & TIOCM_OUT2)
2019 mcr |= UART_MCR_OUT2;
2020 if (mctrl & TIOCM_LOOP)
2021 mcr |= UART_MCR_LOOP;
2023 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
2025 serial_port_out(port, UART_MCR, mcr);
2027 EXPORT_SYMBOL_GPL(serial8250_do_set_mctrl);
2029 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
2031 if (port->set_mctrl)
2032 return port->set_mctrl(port, mctrl);
2033 return serial8250_do_set_mctrl(port, mctrl);
2036 static void serial8250_break_ctl(struct uart_port *port, int break_state)
2038 struct uart_8250_port *up = up_to_u8250p(port);
2039 unsigned long flags;
2041 serial8250_rpm_get(up);
2042 spin_lock_irqsave(&port->lock, flags);
2043 if (break_state == -1)
2044 up->lcr |= UART_LCR_SBC;
2046 up->lcr &= ~UART_LCR_SBC;
2047 serial_port_out(port, UART_LCR, up->lcr);
2048 spin_unlock_irqrestore(&port->lock, flags);
2049 serial8250_rpm_put(up);
2053 * Wait for transmitter & holding register to empty
2055 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
2057 unsigned int status, tmout = 10000;
2059 /* Wait up to 10ms for the character(s) to be sent. */
2061 status = serial_in(up, UART_LSR);
2063 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
2065 if ((status & bits) == bits)
2072 /* Wait up to 1s for flow control if necessary */
2073 if (up->port.flags & UPF_CONS_FLOW) {
2075 for (tmout = 1000000; tmout; tmout--) {
2076 unsigned int msr = serial_in(up, UART_MSR);
2077 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
2078 if (msr & UART_MSR_CTS)
2081 touch_nmi_watchdog();
2086 #ifdef CONFIG_CONSOLE_POLL
2088 * Console polling routines for writing and reading from the uart while
2089 * in an interrupt or debug context.
2092 static int serial8250_get_poll_char(struct uart_port *port)
2094 struct uart_8250_port *up = up_to_u8250p(port);
2098 serial8250_rpm_get(up);
2100 lsr = serial_port_in(port, UART_LSR);
2102 if (!(lsr & UART_LSR_DR)) {
2103 status = NO_POLL_CHAR;
2107 status = serial_port_in(port, UART_RX);
2109 serial8250_rpm_put(up);
2114 static void serial8250_put_poll_char(struct uart_port *port,
2118 struct uart_8250_port *up = up_to_u8250p(port);
2120 serial8250_rpm_get(up);
2122 * First save the IER then disable the interrupts
2124 ier = serial_port_in(port, UART_IER);
2125 if (up->capabilities & UART_CAP_UUE)
2126 serial_port_out(port, UART_IER, UART_IER_UUE);
2128 serial_port_out(port, UART_IER, 0);
2130 wait_for_xmitr(up, BOTH_EMPTY);
2132 * Send the character out.
2134 serial_port_out(port, UART_TX, c);
2137 * Finally, wait for transmitter to become empty
2138 * and restore the IER
2140 wait_for_xmitr(up, BOTH_EMPTY);
2141 serial_port_out(port, UART_IER, ier);
2142 serial8250_rpm_put(up);
2145 #endif /* CONFIG_CONSOLE_POLL */
2147 int serial8250_do_startup(struct uart_port *port)
2149 struct uart_8250_port *up = up_to_u8250p(port);
2150 unsigned long flags;
2151 unsigned char lsr, iir;
2154 if (port->type == PORT_8250_CIR)
2157 if (!port->fifosize)
2158 port->fifosize = uart_config[port->type].fifo_size;
2160 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2161 if (!up->capabilities)
2162 up->capabilities = uart_config[port->type].flags;
2165 if (port->iotype != up->cur_iotype)
2166 set_io_from_upio(port);
2168 serial8250_rpm_get(up);
2169 if (port->type == PORT_16C950) {
2170 /* Wake up and initialize UART */
2172 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2173 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2174 serial_port_out(port, UART_IER, 0);
2175 serial_port_out(port, UART_LCR, 0);
2176 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2177 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2178 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2179 serial_port_out(port, UART_LCR, 0);
2182 #ifdef CONFIG_SERIAL_8250_RSA
2184 * If this is an RSA port, see if we can kick it up to the
2185 * higher speed clock.
2190 * Clear the FIFO buffers and disable them.
2191 * (they will be reenabled in set_termios())
2193 serial8250_clear_fifos(up);
2196 * Clear the interrupt registers.
2198 serial_port_in(port, UART_LSR);
2199 serial_port_in(port, UART_RX);
2200 serial_port_in(port, UART_IIR);
2201 serial_port_in(port, UART_MSR);
2204 * At this point, there's no way the LSR could still be 0xff;
2205 * if it is, then bail out, because there's likely no UART
2208 if (!(port->flags & UPF_BUGGY_UART) &&
2209 (serial_port_in(port, UART_LSR) == 0xff)) {
2210 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2211 serial_index(port));
2217 * For a XR16C850, we need to set the trigger levels
2219 if (port->type == PORT_16850) {
2222 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2224 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2225 serial_port_out(port, UART_FCTR,
2226 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2227 serial_port_out(port, UART_TRG, UART_TRG_96);
2228 serial_port_out(port, UART_FCTR,
2229 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2230 serial_port_out(port, UART_TRG, UART_TRG_96);
2232 serial_port_out(port, UART_LCR, 0);
2238 * Test for UARTs that do not reassert THRE when the
2239 * transmitter is idle and the interrupt has already
2240 * been cleared. Real 16550s should always reassert
2241 * this interrupt whenever the transmitter is idle and
2242 * the interrupt is enabled. Delays are necessary to
2243 * allow register changes to become visible.
2245 spin_lock_irqsave(&port->lock, flags);
2246 if (up->port.irqflags & IRQF_SHARED)
2247 disable_irq_nosync(port->irq);
2249 wait_for_xmitr(up, UART_LSR_THRE);
2250 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2251 udelay(1); /* allow THRE to set */
2252 iir1 = serial_port_in(port, UART_IIR);
2253 serial_port_out(port, UART_IER, 0);
2254 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2255 udelay(1); /* allow a working UART time to re-assert THRE */
2256 iir = serial_port_in(port, UART_IIR);
2257 serial_port_out(port, UART_IER, 0);
2259 if (port->irqflags & IRQF_SHARED)
2260 enable_irq(port->irq);
2261 spin_unlock_irqrestore(&port->lock, flags);
2264 * If the interrupt is not reasserted, or we otherwise
2265 * don't trust the iir, setup a timer to kick the UART
2266 * on a regular basis.
2268 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2269 up->port.flags & UPF_BUG_THRE) {
2270 up->bugs |= UART_BUG_THRE;
2274 retval = up->ops->setup_irq(up);
2279 * Now, initialize the UART
2281 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2283 spin_lock_irqsave(&port->lock, flags);
2284 if (up->port.flags & UPF_FOURPORT) {
2286 up->port.mctrl |= TIOCM_OUT1;
2289 * Most PC uarts need OUT2 raised to enable interrupts.
2292 up->port.mctrl |= TIOCM_OUT2;
2294 serial8250_set_mctrl(port, port->mctrl);
2296 /* Serial over Lan (SoL) hack:
2297 Intel 8257x Gigabit ethernet chips have a
2298 16550 emulation, to be used for Serial Over Lan.
2299 Those chips take a longer time than a normal
2300 serial device to signalize that a transmission
2301 data was queued. Due to that, the above test generally
2302 fails. One solution would be to delay the reading of
2303 iir. However, this is not reliable, since the timeout
2304 is variable. So, let's just don't test if we receive
2305 TX irq. This way, we'll never enable UART_BUG_TXEN.
2307 if (up->port.flags & UPF_NO_TXEN_TEST)
2308 goto dont_test_tx_en;
2311 * Do a quick test to see if we receive an
2312 * interrupt when we enable the TX irq.
2314 serial_port_out(port, UART_IER, UART_IER_THRI);
2315 lsr = serial_port_in(port, UART_LSR);
2316 iir = serial_port_in(port, UART_IIR);
2317 serial_port_out(port, UART_IER, 0);
2319 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2320 if (!(up->bugs & UART_BUG_TXEN)) {
2321 up->bugs |= UART_BUG_TXEN;
2322 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2323 serial_index(port));
2326 up->bugs &= ~UART_BUG_TXEN;
2330 spin_unlock_irqrestore(&port->lock, flags);
2333 * Clear the interrupt registers again for luck, and clear the
2334 * saved flags to avoid getting false values from polling
2335 * routines or the previous session.
2337 serial_port_in(port, UART_LSR);
2338 serial_port_in(port, UART_RX);
2339 serial_port_in(port, UART_IIR);
2340 serial_port_in(port, UART_MSR);
2341 up->lsr_saved_flags = 0;
2342 up->msr_saved_flags = 0;
2345 * Request DMA channels for both RX and TX.
2348 retval = serial8250_request_dma(up);
2350 pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2351 serial_index(port));
2357 * Finally, enable interrupts. Note: Modem status interrupts
2358 * are set via set_termios(), which will be occurring imminently
2359 * anyway, so we don't enable them here.
2361 up->ier = UART_IER_RLSI | UART_IER_RDI;
2362 serial_port_out(port, UART_IER, up->ier);
2364 if (port->flags & UPF_FOURPORT) {
2367 * Enable interrupts on the AST Fourport board
2369 icp = (port->iobase & 0xfe0) | 0x01f;
2375 serial8250_rpm_put(up);
2378 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2380 static int serial8250_startup(struct uart_port *port)
2383 return port->startup(port);
2384 return serial8250_do_startup(port);
2387 void serial8250_do_shutdown(struct uart_port *port)
2389 struct uart_8250_port *up = up_to_u8250p(port);
2390 unsigned long flags;
2392 serial8250_rpm_get(up);
2394 * Disable interrupts from this port
2397 serial_port_out(port, UART_IER, 0);
2400 serial8250_release_dma(up);
2402 spin_lock_irqsave(&port->lock, flags);
2403 if (port->flags & UPF_FOURPORT) {
2404 /* reset interrupts on the AST Fourport board */
2405 inb((port->iobase & 0xfe0) | 0x1f);
2406 port->mctrl |= TIOCM_OUT1;
2408 port->mctrl &= ~TIOCM_OUT2;
2410 serial8250_set_mctrl(port, port->mctrl);
2411 spin_unlock_irqrestore(&port->lock, flags);
2414 * Disable break condition and FIFOs
2416 serial_port_out(port, UART_LCR,
2417 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2418 serial8250_clear_fifos(up);
2420 #ifdef CONFIG_SERIAL_8250_RSA
2422 * Reset the RSA board back to 115kbps compat mode.
2428 * Read data port to reset things, and then unlink from
2431 serial_port_in(port, UART_RX);
2432 serial8250_rpm_put(up);
2434 up->ops->release_irq(up);
2436 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2438 static void serial8250_shutdown(struct uart_port *port)
2441 port->shutdown(port);
2443 serial8250_do_shutdown(port);
2447 * XR17V35x UARTs have an extra fractional divisor register (DLD)
2448 * Calculate divisor with extra 4-bit fractional portion
2450 static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2454 struct uart_port *port = &up->port;
2455 unsigned int quot_16;
2457 quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2458 *frac = quot_16 & 0x0f;
2460 return quot_16 >> 4;
2463 static unsigned int serial8250_get_divisor(struct uart_8250_port *up,
2467 struct uart_port *port = &up->port;
2471 * Handle magic divisors for baud rates above baud_base on
2472 * SMSC SuperIO chips.
2475 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2476 baud == (port->uartclk/4))
2478 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2479 baud == (port->uartclk/8))
2481 else if (up->port.type == PORT_XR17V35X)
2482 quot = xr17v35x_get_divisor(up, baud, frac);
2484 quot = uart_get_divisor(port, baud);
2487 * Oxford Semi 952 rev B workaround
2489 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2495 static unsigned char serial8250_compute_lcr(struct uart_8250_port *up,
2500 switch (c_cflag & CSIZE) {
2502 cval = UART_LCR_WLEN5;
2505 cval = UART_LCR_WLEN6;
2508 cval = UART_LCR_WLEN7;
2512 cval = UART_LCR_WLEN8;
2516 if (c_cflag & CSTOPB)
2517 cval |= UART_LCR_STOP;
2518 if (c_cflag & PARENB) {
2519 cval |= UART_LCR_PARITY;
2520 if (up->bugs & UART_BUG_PARITY)
2521 up->fifo_bug = true;
2523 if (!(c_cflag & PARODD))
2524 cval |= UART_LCR_EPAR;
2526 if (c_cflag & CMSPAR)
2527 cval |= UART_LCR_SPAR;
2533 static void serial8250_set_divisor(struct uart_port *port, unsigned int baud,
2534 unsigned int quot, unsigned int quot_frac)
2536 struct uart_8250_port *up = up_to_u8250p(port);
2538 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2539 if (is_omap1510_8250(up)) {
2540 if (baud == 115200) {
2542 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2544 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2548 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2549 * otherwise just set DLAB
2551 if (up->capabilities & UART_NATSEMI)
2552 serial_port_out(port, UART_LCR, 0xe0);
2554 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
2556 serial_dl_write(up, quot);
2558 /* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2559 if (up->port.type == PORT_XR17V35X)
2560 serial_port_out(port, 0x2, quot_frac);
2564 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2565 struct ktermios *old)
2567 struct uart_8250_port *up = up_to_u8250p(port);
2569 unsigned long flags;
2570 unsigned int baud, quot, frac = 0;
2572 cval = serial8250_compute_lcr(up, termios->c_cflag);
2575 * Ask the core to calculate the divisor for us.
2577 baud = uart_get_baud_rate(port, termios, old,
2578 port->uartclk / 16 / 0xffff,
2579 port->uartclk / 16);
2580 quot = serial8250_get_divisor(up, baud, &frac);
2583 * Ok, we're now changing the port state. Do it with
2584 * interrupts disabled.
2586 serial8250_rpm_get(up);
2587 spin_lock_irqsave(&port->lock, flags);
2589 up->lcr = cval; /* Save computed LCR */
2591 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2592 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2593 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2594 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2595 up->fcr |= UART_FCR_TRIGGER_1;
2600 * MCR-based auto flow control. When AFE is enabled, RTS will be
2601 * deasserted when the receive FIFO contains more characters than
2602 * the trigger, or the MCR RTS bit is cleared. In the case where
2603 * the remote UART is not using CTS auto flow control, we must
2604 * have sufficient FIFO entries for the latency of the remote
2605 * UART to respond. IOW, at least 32 bytes of FIFO.
2607 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2608 up->mcr &= ~UART_MCR_AFE;
2609 if (termios->c_cflag & CRTSCTS)
2610 up->mcr |= UART_MCR_AFE;
2614 * Update the per-port timeout.
2616 uart_update_timeout(port, termios->c_cflag, baud);
2618 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2619 if (termios->c_iflag & INPCK)
2620 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2621 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2622 port->read_status_mask |= UART_LSR_BI;
2625 * Characteres to ignore
2627 port->ignore_status_mask = 0;
2628 if (termios->c_iflag & IGNPAR)
2629 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2630 if (termios->c_iflag & IGNBRK) {
2631 port->ignore_status_mask |= UART_LSR_BI;
2633 * If we're ignoring parity and break indicators,
2634 * ignore overruns too (for real raw support).
2636 if (termios->c_iflag & IGNPAR)
2637 port->ignore_status_mask |= UART_LSR_OE;
2641 * ignore all characters if CREAD is not set
2643 if ((termios->c_cflag & CREAD) == 0)
2644 port->ignore_status_mask |= UART_LSR_DR;
2647 * CTS flow control flag and modem status interrupts
2649 up->ier &= ~UART_IER_MSI;
2650 if (!(up->bugs & UART_BUG_NOMSR) &&
2651 UART_ENABLE_MS(&up->port, termios->c_cflag))
2652 up->ier |= UART_IER_MSI;
2653 if (up->capabilities & UART_CAP_UUE)
2654 up->ier |= UART_IER_UUE;
2655 if (up->capabilities & UART_CAP_RTOIE)
2656 up->ier |= UART_IER_RTOIE;
2658 serial_port_out(port, UART_IER, up->ier);
2660 if (up->capabilities & UART_CAP_EFR) {
2661 unsigned char efr = 0;
2663 * TI16C752/Startech hardware flow control. FIXME:
2664 * - TI16C752 requires control thresholds to be set.
2665 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2667 if (termios->c_cflag & CRTSCTS)
2668 efr |= UART_EFR_CTS;
2670 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2671 if (port->flags & UPF_EXAR_EFR)
2672 serial_port_out(port, UART_XR_EFR, efr);
2674 serial_port_out(port, UART_EFR, efr);
2677 serial8250_set_divisor(port, baud, quot, frac);
2680 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2681 * is written without DLAB set, this mode will be disabled.
2683 if (port->type == PORT_16750)
2684 serial_port_out(port, UART_FCR, up->fcr);
2686 serial_port_out(port, UART_LCR, up->lcr); /* reset DLAB */
2687 if (port->type != PORT_16750) {
2688 /* emulated UARTs (Lucent Venus 167x) need two steps */
2689 if (up->fcr & UART_FCR_ENABLE_FIFO)
2690 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2691 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2693 serial8250_set_mctrl(port, port->mctrl);
2694 spin_unlock_irqrestore(&port->lock, flags);
2695 serial8250_rpm_put(up);
2697 /* Don't rewrite B0 */
2698 if (tty_termios_baud_rate(termios))
2699 tty_termios_encode_baud_rate(termios, baud, baud);
2701 EXPORT_SYMBOL(serial8250_do_set_termios);
2704 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2705 struct ktermios *old)
2707 if (port->set_termios)
2708 port->set_termios(port, termios, old);
2710 serial8250_do_set_termios(port, termios, old);
2714 serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
2716 if (termios->c_line == N_PPS) {
2717 port->flags |= UPF_HARDPPS_CD;
2718 spin_lock_irq(&port->lock);
2719 serial8250_enable_ms(port);
2720 spin_unlock_irq(&port->lock);
2722 port->flags &= ~UPF_HARDPPS_CD;
2723 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2724 spin_lock_irq(&port->lock);
2725 serial8250_disable_ms(port);
2726 spin_unlock_irq(&port->lock);
2732 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2733 unsigned int oldstate)
2735 struct uart_8250_port *p = up_to_u8250p(port);
2737 serial8250_set_sleep(p, state != 0);
2739 EXPORT_SYMBOL(serial8250_do_pm);
2742 serial8250_pm(struct uart_port *port, unsigned int state,
2743 unsigned int oldstate)
2746 port->pm(port, state, oldstate);
2748 serial8250_do_pm(port, state, oldstate);
2751 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2753 if (pt->port.mapsize)
2754 return pt->port.mapsize;
2755 if (pt->port.iotype == UPIO_AU) {
2756 if (pt->port.type == PORT_RT2880)
2760 if (is_omap1_8250(pt))
2761 return 0x16 << pt->port.regshift;
2763 return 8 << pt->port.regshift;
2767 * Resource handling.
2769 static int serial8250_request_std_resource(struct uart_8250_port *up)
2771 unsigned int size = serial8250_port_size(up);
2772 struct uart_port *port = &up->port;
2775 switch (port->iotype) {
2784 if (!request_mem_region(port->mapbase, size, "serial")) {
2789 if (port->flags & UPF_IOREMAP) {
2790 port->membase = ioremap_nocache(port->mapbase, size);
2791 if (!port->membase) {
2792 release_mem_region(port->mapbase, size);
2800 if (!request_region(port->iobase, size, "serial"))
2807 static void serial8250_release_std_resource(struct uart_8250_port *up)
2809 unsigned int size = serial8250_port_size(up);
2810 struct uart_port *port = &up->port;
2812 switch (port->iotype) {
2821 if (port->flags & UPF_IOREMAP) {
2822 iounmap(port->membase);
2823 port->membase = NULL;
2826 release_mem_region(port->mapbase, size);
2831 release_region(port->iobase, size);
2836 #ifdef CONFIG_SERIAL_8250_RSA
2837 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2839 unsigned long start = UART_RSA_BASE << up->port.regshift;
2840 unsigned int size = 8 << up->port.regshift;
2841 struct uart_port *port = &up->port;
2844 switch (port->iotype) {
2847 start += port->iobase;
2848 if (request_region(start, size, "serial-rsa"))
2858 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2860 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2861 unsigned int size = 8 << up->port.regshift;
2862 struct uart_port *port = &up->port;
2864 switch (port->iotype) {
2867 release_region(port->iobase + offset, size);
2873 static void serial8250_release_port(struct uart_port *port)
2875 struct uart_8250_port *up = up_to_u8250p(port);
2877 serial8250_release_std_resource(up);
2880 static int serial8250_request_port(struct uart_port *port)
2882 struct uart_8250_port *up = up_to_u8250p(port);
2885 if (port->type == PORT_8250_CIR)
2888 ret = serial8250_request_std_resource(up);
2893 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2895 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2896 unsigned char bytes;
2898 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2900 return bytes ? bytes : -EOPNOTSUPP;
2903 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2905 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2908 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2911 for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2912 if (bytes < conf_type->rxtrig_bytes[i])
2913 /* Use the nearest lower value */
2914 return (--i) << UART_FCR_R_TRIG_SHIFT;
2917 return UART_FCR_R_TRIG_11;
2920 static int do_get_rxtrig(struct tty_port *port)
2922 struct uart_state *state = container_of(port, struct uart_state, port);
2923 struct uart_port *uport = state->uart_port;
2924 struct uart_8250_port *up =
2925 container_of(uport, struct uart_8250_port, port);
2927 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2930 return fcr_get_rxtrig_bytes(up);
2933 static int do_serial8250_get_rxtrig(struct tty_port *port)
2937 mutex_lock(&port->mutex);
2938 rxtrig_bytes = do_get_rxtrig(port);
2939 mutex_unlock(&port->mutex);
2941 return rxtrig_bytes;
2944 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2945 struct device_attribute *attr, char *buf)
2947 struct tty_port *port = dev_get_drvdata(dev);
2950 rxtrig_bytes = do_serial8250_get_rxtrig(port);
2951 if (rxtrig_bytes < 0)
2952 return rxtrig_bytes;
2954 return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2957 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2959 struct uart_state *state = container_of(port, struct uart_state, port);
2960 struct uart_port *uport = state->uart_port;
2961 struct uart_8250_port *up =
2962 container_of(uport, struct uart_8250_port, port);
2965 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2969 rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2973 serial8250_clear_fifos(up);
2974 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2975 up->fcr |= (unsigned char)rxtrig;
2976 serial_out(up, UART_FCR, up->fcr);
2980 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2984 mutex_lock(&port->mutex);
2985 ret = do_set_rxtrig(port, bytes);
2986 mutex_unlock(&port->mutex);
2991 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2992 struct device_attribute *attr, const char *buf, size_t count)
2994 struct tty_port *port = dev_get_drvdata(dev);
2995 unsigned char bytes;
3001 ret = kstrtou8(buf, 10, &bytes);
3005 ret = do_serial8250_set_rxtrig(port, bytes);
3012 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
3013 serial8250_get_attr_rx_trig_bytes,
3014 serial8250_set_attr_rx_trig_bytes);
3016 static struct attribute *serial8250_dev_attrs[] = {
3017 &dev_attr_rx_trig_bytes.attr,
3021 static struct attribute_group serial8250_dev_attr_group = {
3022 .attrs = serial8250_dev_attrs,
3025 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
3027 const struct serial8250_config *conf_type = &uart_config[up->port.type];
3029 if (conf_type->rxtrig_bytes[0])
3030 up->port.attr_group = &serial8250_dev_attr_group;
3033 static void serial8250_config_port(struct uart_port *port, int flags)
3035 struct uart_8250_port *up = up_to_u8250p(port);
3038 if (port->type == PORT_8250_CIR)
3042 * Find the region that we can probe for. This in turn
3043 * tells us whether we can probe for the type of port.
3045 ret = serial8250_request_std_resource(up);
3049 if (port->iotype != up->cur_iotype)
3050 set_io_from_upio(port);
3052 if (flags & UART_CONFIG_TYPE)
3055 /* if access method is AU, it is a 16550 with a quirk */
3056 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
3057 up->bugs |= UART_BUG_NOMSR;
3059 /* HW bugs may trigger IRQ while IIR == NO_INT */
3060 if (port->type == PORT_TEGRA)
3061 up->bugs |= UART_BUG_NOMSR;
3063 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
3066 if (port->type == PORT_UNKNOWN)
3067 serial8250_release_std_resource(up);
3069 /* Fixme: probably not the best place for this */
3070 if ((port->type == PORT_XR17V35X) ||
3071 (port->type == PORT_XR17D15X))
3072 port->handle_irq = exar_handle_irq;
3074 register_dev_spec_attr_grp(up);
3075 up->fcr = uart_config[up->port.type].fcr;
3079 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
3081 if (ser->irq >= nr_irqs || ser->irq < 0 ||
3082 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
3083 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
3084 ser->type == PORT_STARTECH)
3090 serial8250_type(struct uart_port *port)
3092 int type = port->type;
3094 if (type >= ARRAY_SIZE(uart_config))
3096 return uart_config[type].name;
3099 static const struct uart_ops serial8250_pops = {
3100 .tx_empty = serial8250_tx_empty,
3101 .set_mctrl = serial8250_set_mctrl,
3102 .get_mctrl = serial8250_get_mctrl,
3103 .stop_tx = serial8250_stop_tx,
3104 .start_tx = serial8250_start_tx,
3105 .throttle = serial8250_throttle,
3106 .unthrottle = serial8250_unthrottle,
3107 .stop_rx = serial8250_stop_rx,
3108 .enable_ms = serial8250_enable_ms,
3109 .break_ctl = serial8250_break_ctl,
3110 .startup = serial8250_startup,
3111 .shutdown = serial8250_shutdown,
3112 .set_termios = serial8250_set_termios,
3113 .set_ldisc = serial8250_set_ldisc,
3114 .pm = serial8250_pm,
3115 .type = serial8250_type,
3116 .release_port = serial8250_release_port,
3117 .request_port = serial8250_request_port,
3118 .config_port = serial8250_config_port,
3119 .verify_port = serial8250_verify_port,
3120 #ifdef CONFIG_CONSOLE_POLL
3121 .poll_get_char = serial8250_get_poll_char,
3122 .poll_put_char = serial8250_put_poll_char,
3126 static const struct uart_ops *base_ops;
3127 static struct uart_ops univ8250_port_ops;
3129 static const struct uart_8250_ops univ8250_driver_ops = {
3130 .setup_irq = univ8250_setup_irq,
3131 .release_irq = univ8250_release_irq,
3134 static struct uart_8250_port serial8250_ports[UART_NR];
3137 * serial8250_get_port - retrieve struct uart_8250_port
3138 * @line: serial line number
3140 * This function retrieves struct uart_8250_port for the specific line.
3141 * This struct *must* *not* be used to perform a 8250 or serial core operation
3142 * which is not accessible otherwise. Its only purpose is to make the struct
3143 * accessible to the runtime-pm callbacks for context suspend/restore.
3144 * The lock assumption made here is none because runtime-pm suspend/resume
3145 * callbacks should not be invoked if there is any operation performed on the
3148 struct uart_8250_port *serial8250_get_port(int line)
3150 return &serial8250_ports[line];
3152 EXPORT_SYMBOL_GPL(serial8250_get_port);
3154 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3155 unsigned short *capabilities);
3157 void serial8250_set_isa_configurator(
3158 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3160 serial8250_isa_config = v;
3162 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3164 static void serial8250_init_port(struct uart_8250_port *up)
3166 struct uart_port *port = &up->port;
3168 spin_lock_init(&port->lock);
3169 port->ops = &serial8250_pops;
3171 up->cur_iotype = 0xFF;
3174 static void serial8250_set_defaults(struct uart_8250_port *up)
3176 struct uart_port *port = &up->port;
3178 if (up->port.flags & UPF_FIXED_TYPE) {
3179 unsigned int type = up->port.type;
3181 if (!up->port.fifosize)
3182 up->port.fifosize = uart_config[type].fifo_size;
3184 up->tx_loadsz = uart_config[type].tx_loadsz;
3185 if (!up->capabilities)
3186 up->capabilities = uart_config[type].flags;
3189 set_io_from_upio(port);
3191 /* default dma handlers */
3193 if (!up->dma->tx_dma)
3194 up->dma->tx_dma = serial8250_tx_dma;
3195 if (!up->dma->rx_dma)
3196 up->dma->rx_dma = serial8250_rx_dma;
3200 #ifdef CONFIG_SERIAL_8250_RSA
3202 static void univ8250_config_port(struct uart_port *port, int flags)
3204 struct uart_8250_port *up = up_to_u8250p(port);
3206 up->probe &= ~UART_PROBE_RSA;
3207 if (port->type == PORT_RSA) {
3208 if (serial8250_request_rsa_resource(up) == 0)
3209 up->probe |= UART_PROBE_RSA;
3210 } else if (flags & UART_CONFIG_TYPE) {
3213 for (i = 0; i < probe_rsa_count; i++) {
3214 if (probe_rsa[i] == up->port.iobase) {
3215 if (serial8250_request_rsa_resource(up) == 0)
3216 up->probe |= UART_PROBE_RSA;
3222 base_ops->config_port(port, flags);
3224 if (port->type != PORT_RSA && up->probe & UART_PROBE_RSA)
3225 serial8250_release_rsa_resource(up);
3228 static int univ8250_request_port(struct uart_port *port)
3230 struct uart_8250_port *up = up_to_u8250p(port);
3233 ret = base_ops->request_port(port);
3234 if (ret == 0 && port->type == PORT_RSA) {
3235 ret = serial8250_request_rsa_resource(up);
3237 base_ops->release_port(port);
3243 static void univ8250_release_port(struct uart_port *port)
3245 struct uart_8250_port *up = up_to_u8250p(port);
3247 if (port->type == PORT_RSA)
3248 serial8250_release_rsa_resource(up);
3249 base_ops->release_port(port);
3252 static void univ8250_rsa_support(struct uart_ops *ops)
3254 ops->config_port = univ8250_config_port;
3255 ops->request_port = univ8250_request_port;
3256 ops->release_port = univ8250_release_port;
3260 #define univ8250_rsa_support(x) do { } while (0)
3261 #endif /* CONFIG_SERIAL_8250_RSA */
3263 static void __init serial8250_isa_init_ports(void)
3265 struct uart_8250_port *up;
3266 static int first = 1;
3273 if (nr_uarts > UART_NR)
3276 for (i = 0; i < nr_uarts; i++) {
3277 struct uart_8250_port *up = &serial8250_ports[i];
3278 struct uart_port *port = &up->port;
3281 serial8250_init_port(up);
3283 base_ops = port->ops;
3284 port->ops = &univ8250_port_ops;
3286 init_timer(&up->timer);
3287 up->timer.function = serial8250_timeout;
3289 up->ops = &univ8250_driver_ops;
3292 * ALPHA_KLUDGE_MCR needs to be killed.
3294 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3295 up->mcr_force = ALPHA_KLUDGE_MCR;
3298 /* chain base port ops to support Remote Supervisor Adapter */
3299 univ8250_port_ops = *base_ops;
3300 univ8250_rsa_support(&univ8250_port_ops);
3303 irqflag = IRQF_SHARED;
3305 for (i = 0, up = serial8250_ports;
3306 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3308 struct uart_port *port = &up->port;
3310 port->iobase = old_serial_port[i].port;
3311 port->irq = irq_canonicalize(old_serial_port[i].irq);
3312 port->irqflags = old_serial_port[i].irqflags;
3313 port->uartclk = old_serial_port[i].baud_base * 16;
3314 port->flags = old_serial_port[i].flags;
3315 port->hub6 = old_serial_port[i].hub6;
3316 port->membase = old_serial_port[i].iomem_base;
3317 port->iotype = old_serial_port[i].io_type;
3318 port->regshift = old_serial_port[i].iomem_reg_shift;
3319 serial8250_set_defaults(up);
3321 port->irqflags |= irqflag;
3322 if (serial8250_isa_config != NULL)
3323 serial8250_isa_config(i, &up->port, &up->capabilities);
3328 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3332 for (i = 0; i < nr_uarts; i++) {
3333 struct uart_8250_port *up = &serial8250_ports[i];
3341 up->port.flags |= UPF_NO_TXEN_TEST;
3343 uart_add_one_port(drv, &up->port);
3347 #ifdef CONFIG_SERIAL_8250_CONSOLE
3349 static void serial8250_console_putchar(struct uart_port *port, int ch)
3351 struct uart_8250_port *up = up_to_u8250p(port);
3353 wait_for_xmitr(up, UART_LSR_THRE);
3354 serial_port_out(port, UART_TX, ch);
3358 * Print a string to the serial port trying not to disturb
3359 * any possible real use of the port...
3361 * The console_lock must be held when we get here.
3363 static void serial8250_console_write(struct uart_8250_port *up, const char *s,
3366 struct uart_port *port = &up->port;
3367 unsigned long flags;
3371 touch_nmi_watchdog();
3373 serial8250_rpm_get(up);
3377 else if (oops_in_progress || in_kdb_printk())
3378 locked = spin_trylock_irqsave(&port->lock, flags);
3380 spin_lock_irqsave(&port->lock, flags);
3383 * First save the IER then disable the interrupts
3385 ier = serial_port_in(port, UART_IER);
3387 if (up->capabilities & UART_CAP_UUE)
3388 serial_port_out(port, UART_IER, UART_IER_UUE);
3390 serial_port_out(port, UART_IER, 0);
3392 /* check scratch reg to see if port powered off during system sleep */
3393 if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
3394 struct ktermios termios;
3395 unsigned int baud, quot, frac = 0;
3397 termios.c_cflag = port->cons->cflag;
3398 if (port->state->port.tty && termios.c_cflag == 0)
3399 termios.c_cflag = port->state->port.tty->termios.c_cflag;
3401 baud = uart_get_baud_rate(port, &termios, NULL,
3402 port->uartclk / 16 / 0xffff,
3403 port->uartclk / 16);
3404 quot = serial8250_get_divisor(up, baud, &frac);
3406 serial8250_set_divisor(port, baud, quot, frac);
3407 serial_port_out(port, UART_LCR, up->lcr);
3408 serial_port_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
3413 uart_console_write(port, s, count, serial8250_console_putchar);
3416 * Finally, wait for transmitter to become empty
3417 * and restore the IER
3419 wait_for_xmitr(up, BOTH_EMPTY);
3420 serial_port_out(port, UART_IER, ier);
3423 * The receive handling will happen properly because the
3424 * receive ready bit will still be set; it is not cleared
3425 * on read. However, modem control will not, we must
3426 * call it if we have saved something in the saved flags
3427 * while processing with interrupts off.
3429 if (up->msr_saved_flags)
3430 serial8250_modem_status(up);
3433 spin_unlock_irqrestore(&port->lock, flags);
3434 serial8250_rpm_put(up);
3437 static void univ8250_console_write(struct console *co, const char *s,
3440 struct uart_8250_port *up = &serial8250_ports[co->index];
3442 serial8250_console_write(up, s, count);
3445 static unsigned int probe_baud(struct uart_port *port)
3447 unsigned char lcr, dll, dlm;
3450 lcr = serial_port_in(port, UART_LCR);
3451 serial_port_out(port, UART_LCR, lcr | UART_LCR_DLAB);
3452 dll = serial_port_in(port, UART_DLL);
3453 dlm = serial_port_in(port, UART_DLM);
3454 serial_port_out(port, UART_LCR, lcr);
3456 quot = (dlm << 8) | dll;
3457 return (port->uartclk / 16) / quot;
3460 static int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
3467 if (!port->iobase && !port->membase)
3471 uart_parse_options(options, &baud, &parity, &bits, &flow);
3473 baud = probe_baud(port);
3475 return uart_set_options(port, port->cons, baud, parity, bits, flow);
3478 static int univ8250_console_setup(struct console *co, char *options)
3480 struct uart_port *port;
3483 * Check whether an invalid uart number has been specified, and
3484 * if so, search for the first available port that does have
3487 if (co->index >= nr_uarts)
3489 port = &serial8250_ports[co->index].port;
3490 /* link port to console */
3493 return serial8250_console_setup(port, options, false);
3497 * univ8250_console_match - non-standard console matching
3498 * @co: registering console
3499 * @name: name from console command line
3500 * @idx: index from console command line
3501 * @options: ptr to option string from console command line
3503 * Only attempts to match console command lines of the form:
3504 * console=uart[8250],io|mmio|mmio32,<addr>[,<options>]
3505 * console=uart[8250],0x<addr>[,<options>]
3506 * This form is used to register an initial earlycon boot console and
3507 * replace it with the serial8250_console at 8250 driver init.
3509 * Performs console setup for a match (as required by interface)
3510 * If no <options> are specified, then assume the h/w is already setup.
3512 * Returns 0 if console matches; otherwise non-zero to use default matching
3514 static int univ8250_console_match(struct console *co, char *name, int idx,
3517 char match[] = "uart"; /* 8250-specific earlycon name */
3518 unsigned char iotype;
3522 if (strncmp(name, match, 4) != 0)
3525 if (uart_parse_earlycon(options, &iotype, &addr, &options))
3528 /* try to match the port specified on the command line */
3529 for (i = 0; i < nr_uarts; i++) {
3530 struct uart_port *port = &serial8250_ports[i].port;
3532 if (port->iotype != iotype)
3534 if ((iotype == UPIO_MEM || iotype == UPIO_MEM32) &&
3535 (port->mapbase != addr))
3537 if (iotype == UPIO_PORT && port->iobase != addr)
3542 return serial8250_console_setup(port, options, true);
3548 static struct console univ8250_console = {
3550 .write = univ8250_console_write,
3551 .device = uart_console_device,
3552 .setup = univ8250_console_setup,
3553 .match = univ8250_console_match,
3554 .flags = CON_PRINTBUFFER | CON_ANYTIME,
3556 .data = &serial8250_reg,
3559 static int __init univ8250_console_init(void)
3561 serial8250_isa_init_ports();
3562 register_console(&univ8250_console);
3565 console_initcall(univ8250_console_init);
3567 #define SERIAL8250_CONSOLE &univ8250_console
3569 #define SERIAL8250_CONSOLE NULL
3572 static struct uart_driver serial8250_reg = {
3573 .owner = THIS_MODULE,
3574 .driver_name = "serial",
3578 .cons = SERIAL8250_CONSOLE,
3582 * early_serial_setup - early registration for 8250 ports
3584 * Setup an 8250 port structure prior to console initialisation. Use
3585 * after console initialisation will cause undefined behaviour.
3587 int __init early_serial_setup(struct uart_port *port)
3589 struct uart_port *p;
3591 if (port->line >= ARRAY_SIZE(serial8250_ports))
3594 serial8250_isa_init_ports();
3595 p = &serial8250_ports[port->line].port;
3596 p->iobase = port->iobase;
3597 p->membase = port->membase;
3599 p->irqflags = port->irqflags;
3600 p->uartclk = port->uartclk;
3601 p->fifosize = port->fifosize;
3602 p->regshift = port->regshift;
3603 p->iotype = port->iotype;
3604 p->flags = port->flags;
3605 p->mapbase = port->mapbase;
3606 p->mapsize = port->mapsize;
3607 p->private_data = port->private_data;
3608 p->type = port->type;
3609 p->line = port->line;
3611 serial8250_set_defaults(up_to_u8250p(p));
3613 if (port->serial_in)
3614 p->serial_in = port->serial_in;
3615 if (port->serial_out)
3616 p->serial_out = port->serial_out;
3617 if (port->handle_irq)
3618 p->handle_irq = port->handle_irq;
3624 * serial8250_suspend_port - suspend one serial port
3625 * @line: serial line number
3627 * Suspend one serial port.
3629 void serial8250_suspend_port(int line)
3631 struct uart_8250_port *up = &serial8250_ports[line];
3632 struct uart_port *port = &up->port;
3634 if (!console_suspend_enabled && uart_console(port) &&
3635 port->type != PORT_8250) {
3636 unsigned char canary = 0xa5;
3637 serial_out(up, UART_SCR, canary);
3638 if (serial_in(up, UART_SCR) == canary)
3639 up->canary = canary;
3642 uart_suspend_port(&serial8250_reg, port);
3646 * serial8250_resume_port - resume one serial port
3647 * @line: serial line number
3649 * Resume one serial port.
3651 void serial8250_resume_port(int line)
3653 struct uart_8250_port *up = &serial8250_ports[line];
3654 struct uart_port *port = &up->port;
3658 if (up->capabilities & UART_NATSEMI) {
3659 /* Ensure it's still in high speed mode */
3660 serial_port_out(port, UART_LCR, 0xE0);
3662 ns16550a_goto_highspeed(up);
3664 serial_port_out(port, UART_LCR, 0);
3665 port->uartclk = 921600*16;
3667 uart_resume_port(&serial8250_reg, port);
3671 * Register a set of serial devices attached to a platform device. The
3672 * list is terminated with a zero flags entry, which means we expect
3673 * all entries to have at least UPF_BOOT_AUTOCONF set.
3675 static int serial8250_probe(struct platform_device *dev)
3677 struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3678 struct uart_8250_port uart;
3679 int ret, i, irqflag = 0;
3681 memset(&uart, 0, sizeof(uart));
3684 irqflag = IRQF_SHARED;
3686 for (i = 0; p && p->flags != 0; p++, i++) {
3687 uart.port.iobase = p->iobase;
3688 uart.port.membase = p->membase;
3689 uart.port.irq = p->irq;
3690 uart.port.irqflags = p->irqflags;
3691 uart.port.uartclk = p->uartclk;
3692 uart.port.regshift = p->regshift;
3693 uart.port.iotype = p->iotype;
3694 uart.port.flags = p->flags;
3695 uart.port.mapbase = p->mapbase;
3696 uart.port.hub6 = p->hub6;
3697 uart.port.private_data = p->private_data;
3698 uart.port.type = p->type;
3699 uart.port.serial_in = p->serial_in;
3700 uart.port.serial_out = p->serial_out;
3701 uart.port.handle_irq = p->handle_irq;
3702 uart.port.handle_break = p->handle_break;
3703 uart.port.set_termios = p->set_termios;
3704 uart.port.pm = p->pm;
3705 uart.port.dev = &dev->dev;
3706 uart.port.irqflags |= irqflag;
3707 ret = serial8250_register_8250_port(&uart);
3709 dev_err(&dev->dev, "unable to register port at index %d "
3710 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3711 p->iobase, (unsigned long long)p->mapbase,
3719 * Remove serial ports registered against a platform device.
3721 static int serial8250_remove(struct platform_device *dev)
3725 for (i = 0; i < nr_uarts; i++) {
3726 struct uart_8250_port *up = &serial8250_ports[i];
3728 if (up->port.dev == &dev->dev)
3729 serial8250_unregister_port(i);
3734 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3738 for (i = 0; i < UART_NR; i++) {
3739 struct uart_8250_port *up = &serial8250_ports[i];
3741 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3742 uart_suspend_port(&serial8250_reg, &up->port);
3748 static int serial8250_resume(struct platform_device *dev)
3752 for (i = 0; i < UART_NR; i++) {
3753 struct uart_8250_port *up = &serial8250_ports[i];
3755 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3756 serial8250_resume_port(i);
3762 static struct platform_driver serial8250_isa_driver = {
3763 .probe = serial8250_probe,
3764 .remove = serial8250_remove,
3765 .suspend = serial8250_suspend,
3766 .resume = serial8250_resume,
3768 .name = "serial8250",
3773 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3774 * in the table in include/asm/serial.h
3776 static struct platform_device *serial8250_isa_devs;
3779 * serial8250_register_8250_port and serial8250_unregister_port allows for
3780 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3781 * modems and PCI multiport cards.
3783 static DEFINE_MUTEX(serial_mutex);
3785 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3790 * First, find a port entry which matches.
3792 for (i = 0; i < nr_uarts; i++)
3793 if (uart_match_port(&serial8250_ports[i].port, port))
3794 return &serial8250_ports[i];
3796 /* try line number first if still available */
3798 if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3799 serial8250_ports[i].port.iobase == 0)
3800 return &serial8250_ports[i];
3802 * We didn't find a matching entry, so look for the first
3803 * free entry. We look for one which hasn't been previously
3804 * used (indicated by zero iobase).
3806 for (i = 0; i < nr_uarts; i++)
3807 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3808 serial8250_ports[i].port.iobase == 0)
3809 return &serial8250_ports[i];
3812 * That also failed. Last resort is to find any entry which
3813 * doesn't have a real port associated with it.
3815 for (i = 0; i < nr_uarts; i++)
3816 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3817 return &serial8250_ports[i];
3823 * serial8250_register_8250_port - register a serial port
3824 * @up: serial port template
3826 * Configure the serial port specified by the request. If the
3827 * port exists and is in use, it is hung up and unregistered
3830 * The port is then probed and if necessary the IRQ is autodetected
3831 * If this fails an error is returned.
3833 * On success the port is ready to use and the line number is returned.
3835 int serial8250_register_8250_port(struct uart_8250_port *up)
3837 struct uart_8250_port *uart;
3840 if (up->port.uartclk == 0)
3843 mutex_lock(&serial_mutex);
3845 uart = serial8250_find_match_or_unused(&up->port);
3846 if (uart && uart->port.type != PORT_8250_CIR) {
3848 uart_remove_one_port(&serial8250_reg, &uart->port);
3850 uart->port.iobase = up->port.iobase;
3851 uart->port.membase = up->port.membase;
3852 uart->port.irq = up->port.irq;
3853 uart->port.irqflags = up->port.irqflags;
3854 uart->port.uartclk = up->port.uartclk;
3855 uart->port.fifosize = up->port.fifosize;
3856 uart->port.regshift = up->port.regshift;
3857 uart->port.iotype = up->port.iotype;
3858 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3859 uart->bugs = up->bugs;
3860 uart->port.mapbase = up->port.mapbase;
3861 uart->port.mapsize = up->port.mapsize;
3862 uart->port.private_data = up->port.private_data;
3863 uart->port.fifosize = up->port.fifosize;
3864 uart->tx_loadsz = up->tx_loadsz;
3865 uart->capabilities = up->capabilities;
3866 uart->port.throttle = up->port.throttle;
3867 uart->port.unthrottle = up->port.unthrottle;
3868 uart->port.rs485_config = up->port.rs485_config;
3869 uart->port.rs485 = up->port.rs485;
3870 uart->dma = up->dma;
3872 /* Take tx_loadsz from fifosize if it wasn't set separately */
3873 if (uart->port.fifosize && !uart->tx_loadsz)
3874 uart->tx_loadsz = uart->port.fifosize;
3877 uart->port.dev = up->port.dev;
3880 uart->port.flags |= UPF_NO_TXEN_TEST;
3882 if (up->port.flags & UPF_FIXED_TYPE)
3883 uart->port.type = up->port.type;
3885 serial8250_set_defaults(uart);
3887 /* Possibly override default I/O functions. */
3888 if (up->port.serial_in)
3889 uart->port.serial_in = up->port.serial_in;
3890 if (up->port.serial_out)
3891 uart->port.serial_out = up->port.serial_out;
3892 if (up->port.handle_irq)
3893 uart->port.handle_irq = up->port.handle_irq;
3894 /* Possibly override set_termios call */
3895 if (up->port.set_termios)
3896 uart->port.set_termios = up->port.set_termios;
3897 if (up->port.set_mctrl)
3898 uart->port.set_mctrl = up->port.set_mctrl;
3899 if (up->port.startup)
3900 uart->port.startup = up->port.startup;
3901 if (up->port.shutdown)
3902 uart->port.shutdown = up->port.shutdown;
3904 uart->port.pm = up->port.pm;
3905 if (up->port.handle_break)
3906 uart->port.handle_break = up->port.handle_break;
3908 uart->dl_read = up->dl_read;
3910 uart->dl_write = up->dl_write;
3912 if (serial8250_isa_config != NULL)
3913 serial8250_isa_config(0, &uart->port,
3914 &uart->capabilities);
3916 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3918 ret = uart->port.line;
3920 mutex_unlock(&serial_mutex);
3924 EXPORT_SYMBOL(serial8250_register_8250_port);
3927 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3928 * @line: serial line number
3930 * Remove one serial port. This may not be called from interrupt
3931 * context. We hand the port back to the our control.
3933 void serial8250_unregister_port(int line)
3935 struct uart_8250_port *uart = &serial8250_ports[line];
3937 mutex_lock(&serial_mutex);
3938 uart_remove_one_port(&serial8250_reg, &uart->port);
3939 if (serial8250_isa_devs) {
3940 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3942 uart->port.flags |= UPF_NO_TXEN_TEST;
3943 uart->port.type = PORT_UNKNOWN;
3944 uart->port.dev = &serial8250_isa_devs->dev;
3945 uart->capabilities = 0;
3946 uart_add_one_port(&serial8250_reg, &uart->port);
3948 uart->port.dev = NULL;
3950 mutex_unlock(&serial_mutex);
3952 EXPORT_SYMBOL(serial8250_unregister_port);
3954 static int __init serial8250_init(void)
3958 serial8250_isa_init_ports();
3960 printk(KERN_INFO "Serial: 8250/16550 driver, "
3961 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3962 share_irqs ? "en" : "dis");
3965 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3967 serial8250_reg.nr = UART_NR;
3968 ret = uart_register_driver(&serial8250_reg);
3973 ret = serial8250_pnp_init();
3975 goto unreg_uart_drv;
3977 serial8250_isa_devs = platform_device_alloc("serial8250",
3978 PLAT8250_DEV_LEGACY);
3979 if (!serial8250_isa_devs) {
3984 ret = platform_device_add(serial8250_isa_devs);
3988 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3990 ret = platform_driver_register(&serial8250_isa_driver);
3994 platform_device_del(serial8250_isa_devs);
3996 platform_device_put(serial8250_isa_devs);
3998 serial8250_pnp_exit();
4001 sunserial_unregister_minors(&serial8250_reg, UART_NR);
4003 uart_unregister_driver(&serial8250_reg);
4009 static void __exit serial8250_exit(void)
4011 struct platform_device *isa_dev = serial8250_isa_devs;
4014 * This tells serial8250_unregister_port() not to re-register
4015 * the ports (thereby making serial8250_isa_driver permanently
4018 serial8250_isa_devs = NULL;
4020 platform_driver_unregister(&serial8250_isa_driver);
4021 platform_device_unregister(isa_dev);
4023 serial8250_pnp_exit();
4026 sunserial_unregister_minors(&serial8250_reg, UART_NR);
4028 uart_unregister_driver(&serial8250_reg);
4032 module_init(serial8250_init);
4033 module_exit(serial8250_exit);
4035 EXPORT_SYMBOL(serial8250_suspend_port);
4036 EXPORT_SYMBOL(serial8250_resume_port);
4038 MODULE_LICENSE("GPL");
4039 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
4041 module_param(share_irqs, uint, 0644);
4042 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
4045 module_param(nr_uarts, uint, 0644);
4046 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
4048 module_param(skip_txen_test, uint, 0644);
4049 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
4051 #ifdef CONFIG_SERIAL_8250_RSA
4052 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
4053 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
4055 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
4057 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
4059 /* This module was renamed to 8250_core in 3.7. Keep the old "8250" name
4060 * working as well for the module options so we don't break people. We
4061 * need to keep the names identical and the convenient macros will happily
4062 * refuse to let us do that by failing the build with redefinition errors
4063 * of global variables. So we stick them inside a dummy function to avoid
4064 * those conflicts. The options still get parsed, and the redefined
4065 * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
4067 * This is hacky. I'm sorry.
4069 static void __used s8250_options(void)
4071 #undef MODULE_PARAM_PREFIX
4072 #define MODULE_PARAM_PREFIX "8250_core."
4074 module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644);
4075 module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644);
4076 module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644);
4077 #ifdef CONFIG_SERIAL_8250_RSA
4078 __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
4079 ¶m_array_ops, .arr = &__param_arr_probe_rsa,
4084 MODULE_ALIAS("8250_core");