kernel/drivers/staging/sm750fb/ddk750_chip.h

   1 #ifndef DDK750_CHIP_H__
   2 #define DDK750_CHIP_H__
   3 #define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */
   4 #ifndef SM750LE_REVISION_ID
   5 #define SM750LE_REVISION_ID ((unsigned char)0xfe)
   6 #endif
   7
   8 #include <linux/io.h>
   9
  10 /* This is all the chips recognized by this library */
  11 typedef enum _logical_chip_type_t
  12 {
  13     SM_UNKNOWN,
  14     SM718,
  15     SM750,
  16     SM750LE,
  17 }
  18 logical_chip_type_t;
  19
  20
  21 typedef enum _clock_type_t
  22 {
  23         MXCLK_PLL,
  24         PRIMARY_PLL,
  25         SECONDARY_PLL,
  26         VGA0_PLL,
  27         VGA1_PLL,
  28 }
  29 clock_type_t;
  30
  31 typedef struct _pll_value_t
  32 {
  33     clock_type_t clockType;
  34     unsigned long inputFreq; /* Input clock frequency to the PLL */
  35
  36     /* Use this when clockType = PANEL_PLL */
  37     unsigned long M;
  38     unsigned long N;
  39     unsigned long OD;
  40     unsigned long POD;
  41 }
  42 pll_value_t;
  43
  44 /* input struct to initChipParam() function */
  45 typedef struct _initchip_param_t
  46 {
  47     unsigned short powerMode;    /* Use power mode 0 or 1 */
  48     unsigned short chipClock;    /* Speed of main chip clock in MHz unit
  49                                     0 = keep the current clock setting
  50                                     Others = the new main chip clock
  51                                   */
  52     unsigned short memClock;     /* Speed of memory clock in MHz unit
  53                                     0 = keep the current clock setting
  54                                     Others = the new memory clock
  55                                   */
  56     unsigned short masterClock;  /* Speed of master clock in MHz unit
  57                                     0 = keep the current clock setting
  58                                     Others = the new master clock
  59                                   */
  60     unsigned short setAllEngOff; /* 0 = leave all engine state untouched.
  61                                     1 = make sure they are off: 2D, Overlay,
  62                                     video alpha, alpha, hardware cursors
  63                                  */
  64     unsigned char resetMemory;   /* 0 = Do not reset the memory controller
  65                                     1 = Reset the memory controller
  66                                   */
  67
  68     /* More initialization parameter can be added if needed */
  69 }
  70 initchip_param_t;
  71
  72
  73 logical_chip_type_t getChipType(void);
  74 unsigned int calcPllValue(unsigned int request,pll_value_t *pll);
  75 unsigned int calcPllValue2(unsigned int,pll_value_t *);
  76 unsigned int formatPllReg(pll_value_t *pPLL);
  77 void ddk750_set_mmio(void __iomem *,unsigned short,char);
  78 unsigned int ddk750_getVMSize(void);
  79 int ddk750_initHw(initchip_param_t *);
  80 unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL);
  81 unsigned int getChipClock(void);
  82 void setChipClock(unsigned int);
  83 void setMemoryClock(unsigned int frequency);
  84 void setMasterClock(unsigned int frequency);
  85
  86
  87 #endif