kernel/drivers/staging/rts5208/sd.c

   1 /* Driver for Realtek PCI-Express card reader
   2  *
   3  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   Wei WANG (wei_wang@realsil.com.cn)
  20  *   Micky Ching (micky_ching@realsil.com.cn)
  21  */
  22
  23 #include <linux/blkdev.h>
  24 #include <linux/kthread.h>
  25 #include <linux/sched.h>
  26
  27 #include "rtsx.h"
  28 #include "sd.h"
  29
  30 #define SD_MAX_RETRY_COUNT      3
  31
  32 static u16 REG_SD_CFG1;
  33 static u16 REG_SD_CFG2;
  34 static u16 REG_SD_CFG3;
  35 static u16 REG_SD_STAT1;
  36 static u16 REG_SD_STAT2;
  37 static u16 REG_SD_BUS_STAT;
  38 static u16 REG_SD_PAD_CTL;
  39 static u16 REG_SD_SAMPLE_POINT_CTL;
  40 static u16 REG_SD_PUSH_POINT_CTL;
  41 static u16 REG_SD_CMD0;
  42 static u16 REG_SD_CMD1;
  43 static u16 REG_SD_CMD2;
  44 static u16 REG_SD_CMD3;
  45 static u16 REG_SD_CMD4;
  46 static u16 REG_SD_CMD5;
  47 static u16 REG_SD_BYTE_CNT_L;
  48 static u16 REG_SD_BYTE_CNT_H;
  49 static u16 REG_SD_BLOCK_CNT_L;
  50 static u16 REG_SD_BLOCK_CNT_H;
  51 static u16 REG_SD_TRANSFER;
  52 static u16 REG_SD_VPCLK0_CTL;
  53 static u16 REG_SD_VPCLK1_CTL;
  54 static u16 REG_SD_DCMPS0_CTL;
  55 static u16 REG_SD_DCMPS1_CTL;
  56
  57 static inline void sd_set_err_code(struct rtsx_chip *chip, u8 err_code)
  58 {
  59         struct sd_info *sd_card = &(chip->sd_card);
  60
  61         sd_card->err_code |= err_code;
  62 }
  63
  64 static inline void sd_clr_err_code(struct rtsx_chip *chip)
  65 {
  66         struct sd_info *sd_card = &(chip->sd_card);
  67
  68         sd_card->err_code = 0;
  69 }
  70
  71 static inline int sd_check_err_code(struct rtsx_chip *chip, u8 err_code)
  72 {
  73         struct sd_info *sd_card = &(chip->sd_card);
  74
  75         return sd_card->err_code & err_code;
  76 }
  77
  78 static void sd_init_reg_addr(struct rtsx_chip *chip)
  79 {
  80         REG_SD_CFG1 = 0xFD31;
  81         REG_SD_CFG2 = 0xFD33;
  82         REG_SD_CFG3 = 0xFD3E;
  83         REG_SD_STAT1 = 0xFD30;
  84         REG_SD_STAT2 = 0;
  85         REG_SD_BUS_STAT = 0;
  86         REG_SD_PAD_CTL = 0;
  87         REG_SD_SAMPLE_POINT_CTL = 0;
  88         REG_SD_PUSH_POINT_CTL = 0;
  89         REG_SD_CMD0 = 0xFD34;
  90         REG_SD_CMD1 = 0xFD35;
  91         REG_SD_CMD2 = 0xFD36;
  92         REG_SD_CMD3 = 0xFD37;
  93         REG_SD_CMD4 = 0xFD38;
  94         REG_SD_CMD5 = 0xFD5A;
  95         REG_SD_BYTE_CNT_L = 0xFD39;
  96         REG_SD_BYTE_CNT_H = 0xFD3A;
  97         REG_SD_BLOCK_CNT_L = 0xFD3B;
  98         REG_SD_BLOCK_CNT_H = 0xFD3C;
  99         REG_SD_TRANSFER = 0xFD32;
 100         REG_SD_VPCLK0_CTL = 0;
 101         REG_SD_VPCLK1_CTL = 0;
 102         REG_SD_DCMPS0_CTL = 0;
 103         REG_SD_DCMPS1_CTL = 0;
 104 }
 105
 106 static int sd_check_data0_status(struct rtsx_chip *chip)
 107 {
 108         int retval;
 109         u8 stat;
 110
 111         retval = rtsx_read_register(chip, REG_SD_STAT1, &stat);
 112         if (retval) {
 113                 rtsx_trace(chip);
 114                 return retval;
 115         }
 116
 117         if (!(stat & SD_DAT0_STATUS)) {
 118                 sd_set_err_code(chip, SD_BUSY);
 119                 rtsx_trace(chip);
 120                 return STATUS_FAIL;
 121         }
 122
 123         return STATUS_SUCCESS;
 124 }
 125
 126 static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
 127                 u32 arg, u8 rsp_type, u8 *rsp, int rsp_len)
 128 {
 129         struct sd_info *sd_card = &(chip->sd_card);
 130         int retval;
 131         int timeout = 100;
 132         u16 reg_addr;
 133         u8 *ptr;
 134         int stat_idx = 0;
 135         int rty_cnt = 0;
 136
 137         sd_clr_err_code(chip);
 138
 139         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d, arg = 0x%08x\n", cmd_idx, arg);
 140
 141         if (rsp_type == SD_RSP_TYPE_R1b)
 142                 timeout = 3000;
 143
 144 RTY_SEND_CMD:
 145
 146         rtsx_init_cmd(chip);
 147
 148         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
 149         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
 150         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
 151         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
 152         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
 153
 154         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
 155         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
 156                         0x01, PINGPONG_BUFFER);
 157         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
 158                         0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
 159         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
 160                 SD_TRANSFER_END | SD_STAT_IDLE, SD_TRANSFER_END | SD_STAT_IDLE);
 161
 162         if (rsp_type == SD_RSP_TYPE_R2) {
 163                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
 164                      reg_addr++)
 165                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
 166
 167                 stat_idx = 16;
 168         } else if (rsp_type != SD_RSP_TYPE_R0) {
 169                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
 170                      reg_addr++)
 171                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
 172
 173                 stat_idx = 5;
 174         }
 175
 176         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
 177
 178         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 179         if (retval < 0) {
 180                 u8 val;
 181
 182                 rtsx_read_register(chip, REG_SD_STAT1, &val);
 183                 dev_dbg(rtsx_dev(chip), "SD_STAT1: 0x%x\n", val);
 184
 185                 rtsx_read_register(chip, REG_SD_CFG3, &val);
 186                 dev_dbg(rtsx_dev(chip), "SD_CFG3: 0x%x\n", val);
 187
 188                 if (retval == -ETIMEDOUT) {
 189                         if (rsp_type & SD_WAIT_BUSY_END) {
 190                                 retval = sd_check_data0_status(chip);
 191                                 if (retval != STATUS_SUCCESS) {
 192                                         rtsx_clear_sd_error(chip);
 193                                         rtsx_trace(chip);
 194                                         return retval;
 195                                 }
 196                         } else {
 197                                 sd_set_err_code(chip, SD_TO_ERR);
 198                         }
 199                         retval = STATUS_TIMEDOUT;
 200                 } else {
 201                         retval = STATUS_FAIL;
 202                 }
 203                 rtsx_clear_sd_error(chip);
 204
 205                 rtsx_trace(chip);
 206                 return retval;
 207         }
 208
 209         if (rsp_type == SD_RSP_TYPE_R0)
 210                 return STATUS_SUCCESS;
 211
 212         ptr = rtsx_get_cmd_data(chip) + 1;
 213
 214         if ((ptr[0] & 0xC0) != 0) {
 215                 sd_set_err_code(chip, SD_STS_ERR);
 216                 rtsx_trace(chip);
 217                 return STATUS_FAIL;
 218         }
 219
 220         if (!(rsp_type & SD_NO_CHECK_CRC7)) {
 221                 if (ptr[stat_idx] & SD_CRC7_ERR) {
 222                         if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
 223                                 sd_set_err_code(chip, SD_CRC_ERR);
 224                                 rtsx_trace(chip);
 225                                 return STATUS_FAIL;
 226                         }
 227                         if (rty_cnt < SD_MAX_RETRY_COUNT) {
 228                                 wait_timeout(20);
 229                                 rty_cnt++;
 230                                 goto RTY_SEND_CMD;
 231                         } else {
 232                                 sd_set_err_code(chip, SD_CRC_ERR);
 233                                 rtsx_trace(chip);
 234                                 return STATUS_FAIL;
 235                         }
 236                 }
 237         }
 238
 239         if ((rsp_type == SD_RSP_TYPE_R1) || (rsp_type == SD_RSP_TYPE_R1b)) {
 240                 if ((cmd_idx != SEND_RELATIVE_ADDR) &&
 241                         (cmd_idx != SEND_IF_COND)) {
 242                         if (cmd_idx != STOP_TRANSMISSION) {
 243                                 if (ptr[1] & 0x80) {
 244                                         rtsx_trace(chip);
 245                                         return STATUS_FAIL;
 246                                 }
 247                         }
 248 #ifdef SUPPORT_SD_LOCK
 249                         if (ptr[1] & 0x7D)
 250 #else
 251                         if (ptr[1] & 0x7F)
 252 #endif
 253                         {
 254                                 dev_dbg(rtsx_dev(chip), "ptr[1]: 0x%02x\n",
 255                                         ptr[1]);
 256                                 rtsx_trace(chip);
 257                                 return STATUS_FAIL;
 258                         }
 259                         if (ptr[2] & 0xFF) {
 260                                 dev_dbg(rtsx_dev(chip), "ptr[2]: 0x%02x\n",
 261                                         ptr[2]);
 262                                 rtsx_trace(chip);
 263                                 return STATUS_FAIL;
 264                         }
 265                         if (ptr[3] & 0x80) {
 266                                 dev_dbg(rtsx_dev(chip), "ptr[3]: 0x%02x\n",
 267                                         ptr[3]);
 268                                 rtsx_trace(chip);
 269                                 return STATUS_FAIL;
 270                         }
 271                         if (ptr[3] & 0x01)
 272                                 sd_card->sd_data_buf_ready = 1;
 273                         else
 274                                 sd_card->sd_data_buf_ready = 0;
 275                 }
 276         }
 277
 278         if (rsp && rsp_len)
 279                 memcpy(rsp, ptr, rsp_len);
 280
 281         return STATUS_SUCCESS;
 282 }
 283
 284 static int sd_read_data(struct rtsx_chip *chip,
 285                         u8 trans_mode, u8 *cmd, int cmd_len, u16 byte_cnt,
 286                         u16 blk_cnt, u8 bus_width, u8 *buf, int buf_len,
 287                         int timeout)
 288 {
 289         struct sd_info *sd_card = &(chip->sd_card);
 290         int retval;
 291         int i;
 292
 293         sd_clr_err_code(chip);
 294
 295         if (!buf)
 296                 buf_len = 0;
 297
 298         if (buf_len > 512) {
 299                 rtsx_trace(chip);
 300                 return STATUS_FAIL;
 301         }
 302
 303         rtsx_init_cmd(chip);
 304
 305         if (cmd_len) {
 306                 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
 307                 for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++)
 308                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i,
 309                                      0xFF, cmd[i]);
 310         }
 311         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
 312                 (u8)byte_cnt);
 313         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
 314                 (u8)(byte_cnt >> 8));
 315         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
 316                 (u8)blk_cnt);
 317         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
 318                 (u8)(blk_cnt >> 8));
 319
 320         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
 321
 322         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
 323                 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END|
 324                 SD_CHECK_CRC7 | SD_RSP_LEN_6);
 325         if (trans_mode != SD_TM_AUTO_TUNING)
 326                 rtsx_add_cmd(chip, WRITE_REG_CMD,
 327                         CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
 328
 329         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
 330                 trans_mode | SD_TRANSFER_START);
 331         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
 332                 SD_TRANSFER_END);
 333
 334         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 335         if (retval < 0) {
 336                 if (retval == -ETIMEDOUT) {
 337                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 338                                             SD_RSP_TYPE_R1, NULL, 0);
 339                 }
 340
 341                 rtsx_trace(chip);
 342                 return STATUS_FAIL;
 343         }
 344
 345         if (buf && buf_len) {
 346                 retval = rtsx_read_ppbuf(chip, buf, buf_len);
 347                 if (retval != STATUS_SUCCESS) {
 348                         rtsx_trace(chip);
 349                         return STATUS_FAIL;
 350                 }
 351         }
 352
 353         return STATUS_SUCCESS;
 354 }
 355
 356 static int sd_write_data(struct rtsx_chip *chip, u8 trans_mode,
 357                 u8 *cmd, int cmd_len, u16 byte_cnt, u16 blk_cnt, u8 bus_width,
 358                 u8 *buf, int buf_len, int timeout)
 359 {
 360         struct sd_info *sd_card = &(chip->sd_card);
 361         int retval;
 362         int i;
 363
 364         sd_clr_err_code(chip);
 365
 366         if (!buf)
 367                 buf_len = 0;
 368
 369         if (buf_len > 512) {
 370                 /* This function can't write data more than one page */
 371                 rtsx_trace(chip);
 372                 return STATUS_FAIL;
 373         }
 374
 375         if (buf && buf_len) {
 376                 retval = rtsx_write_ppbuf(chip, buf, buf_len);
 377                 if (retval != STATUS_SUCCESS) {
 378                         rtsx_trace(chip);
 379                         return STATUS_FAIL;
 380                 }
 381         }
 382
 383         rtsx_init_cmd(chip);
 384
 385         if (cmd_len) {
 386                 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
 387                 for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++) {
 388                         rtsx_add_cmd(chip, WRITE_REG_CMD,
 389                                      REG_SD_CMD0 + i, 0xFF, cmd[i]);
 390                 }
 391         }
 392         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
 393                 (u8)byte_cnt);
 394         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
 395                 (u8)(byte_cnt >> 8));
 396         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
 397                 (u8)blk_cnt);
 398         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
 399                 (u8)(blk_cnt >> 8));
 400
 401         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
 402
 403         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
 404                 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
 405                 SD_CHECK_CRC7 | SD_RSP_LEN_6);
 406
 407         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
 408                 trans_mode | SD_TRANSFER_START);
 409         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
 410                 SD_TRANSFER_END);
 411
 412         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 413         if (retval < 0) {
 414                 if (retval == -ETIMEDOUT) {
 415                         sd_send_cmd_get_rsp(chip, SEND_STATUS,
 416                                 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
 417                 }
 418
 419                 rtsx_trace(chip);
 420                 return STATUS_FAIL;
 421         }
 422
 423         return STATUS_SUCCESS;
 424 }
 425
 426 static int sd_check_csd(struct rtsx_chip *chip, char check_wp)
 427 {
 428         struct sd_info *sd_card = &(chip->sd_card);
 429         int retval;
 430         int i;
 431         u8 csd_ver, trans_speed;
 432         u8 rsp[16];
 433
 434         for (i = 0; i < 6; i++) {
 435                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
 436                         sd_set_err_code(chip, SD_NO_CARD);
 437                         rtsx_trace(chip);
 438                         return STATUS_FAIL;
 439                 }
 440
 441                 retval = sd_send_cmd_get_rsp(chip, SEND_CSD, sd_card->sd_addr,
 442                                         SD_RSP_TYPE_R2, rsp, 16);
 443                 if (retval == STATUS_SUCCESS)
 444                         break;
 445         }
 446
 447         if (i == 6) {
 448                 rtsx_trace(chip);
 449                 return STATUS_FAIL;
 450         }
 451
 452         memcpy(sd_card->raw_csd, rsp + 1, 15);
 453
 454         dev_dbg(rtsx_dev(chip), "CSD Response:\n");
 455         dev_dbg(rtsx_dev(chip), "%*ph\n", 16, sd_card->raw_csd);
 456
 457         csd_ver = (rsp[1] & 0xc0) >> 6;
 458         dev_dbg(rtsx_dev(chip), "csd_ver = %d\n", csd_ver);
 459
 460         trans_speed = rsp[4];
 461         if ((trans_speed & 0x07) == 0x02) {
 462                 if ((trans_speed & 0xf8) >= 0x30) {
 463                         if (chip->asic_code)
 464                                 sd_card->sd_clock = 47;
 465                         else
 466                                 sd_card->sd_clock = CLK_50;
 467
 468                 } else if ((trans_speed & 0xf8) == 0x28) {
 469                         if (chip->asic_code)
 470                                 sd_card->sd_clock = 39;
 471                         else
 472                                 sd_card->sd_clock = CLK_40;
 473
 474                 } else if ((trans_speed & 0xf8) == 0x20) {
 475                         if (chip->asic_code)
 476                                 sd_card->sd_clock = 29;
 477                         else
 478                                 sd_card->sd_clock = CLK_30;
 479
 480                 } else if ((trans_speed & 0xf8) >= 0x10) {
 481                         if (chip->asic_code)
 482                                 sd_card->sd_clock = 23;
 483                         else
 484                                 sd_card->sd_clock = CLK_20;
 485
 486                 } else if ((trans_speed & 0x08) >= 0x08) {
 487                         if (chip->asic_code)
 488                                 sd_card->sd_clock = 19;
 489                         else
 490                                 sd_card->sd_clock = CLK_20;
 491                 } else {
 492                         rtsx_trace(chip);
 493                         return STATUS_FAIL;
 494                 }
 495         } else {
 496                 rtsx_trace(chip);
 497                 return STATUS_FAIL;
 498         }
 499
 500         if (CHK_MMC_SECTOR_MODE(sd_card)) {
 501                 sd_card->capacity = 0;
 502         } else {
 503                 if ((!CHK_SD_HCXC(sd_card)) || (csd_ver == 0)) {
 504                         u8 blk_size, c_size_mult;
 505                         u16 c_size;
 506
 507                         blk_size = rsp[6] & 0x0F;
 508                         c_size =  ((u16)(rsp[7] & 0x03) << 10)
 509                                         + ((u16)rsp[8] << 2)
 510                                         + ((u16)(rsp[9] & 0xC0) >> 6);
 511                         c_size_mult = (u8)((rsp[10] & 0x03) << 1);
 512                         c_size_mult += (rsp[11] & 0x80) >> 7;
 513                         sd_card->capacity = (((u32)(c_size + 1)) *
 514                                         (1 << (c_size_mult + 2)))
 515                                 << (blk_size - 9);
 516                 } else {
 517                         u32 total_sector = 0;
 518
 519                         total_sector = (((u32)rsp[8] & 0x3f) << 16) |
 520                                 ((u32)rsp[9] << 8) | (u32)rsp[10];
 521                         sd_card->capacity = (total_sector + 1) << 10;
 522                 }
 523         }
 524
 525         if (check_wp) {
 526                 if (rsp[15] & 0x30)
 527                         chip->card_wp |= SD_CARD;
 528
 529                 dev_dbg(rtsx_dev(chip), "CSD WP Status: 0x%x\n", rsp[15]);
 530         }
 531
 532         return STATUS_SUCCESS;
 533 }
 534
 535 static int sd_set_sample_push_timing(struct rtsx_chip *chip)
 536 {
 537         int retval;
 538         struct sd_info *sd_card = &(chip->sd_card);
 539         u8 val = 0;
 540
 541         if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY)
 542                 val |= 0x10;
 543
 544         if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) {
 545                 if (chip->asic_code) {
 546                         if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card)) {
 547                                 if (val & 0x10)
 548                                         val |= 0x04;
 549                                 else
 550                                         val |= 0x08;
 551                         }
 552                 } else {
 553                         if (val & 0x10)
 554                                 val |= 0x04;
 555                         else
 556                                 val |= 0x08;
 557                 }
 558         } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) ==
 559                 SD_SAMPLE_POINT_DELAY) {
 560                 if (val & 0x10)
 561                         val |= 0x04;
 562                 else
 563                         val |= 0x08;
 564         }
 565
 566         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x1C, val);
 567         if (retval) {
 568                 rtsx_trace(chip);
 569                 return retval;
 570         }
 571
 572         return STATUS_SUCCESS;
 573 }
 574
 575 static void sd_choose_proper_clock(struct rtsx_chip *chip)
 576 {
 577         struct sd_info *sd_card = &(chip->sd_card);
 578
 579         if (CHK_SD_SDR104(sd_card)) {
 580                 if (chip->asic_code)
 581                         sd_card->sd_clock = chip->asic_sd_sdr104_clk;
 582                 else
 583                         sd_card->sd_clock = chip->fpga_sd_sdr104_clk;
 584
 585         } else if (CHK_SD_DDR50(sd_card)) {
 586                 if (chip->asic_code)
 587                         sd_card->sd_clock = chip->asic_sd_ddr50_clk;
 588                 else
 589                         sd_card->sd_clock = chip->fpga_sd_ddr50_clk;
 590
 591         } else if (CHK_SD_SDR50(sd_card)) {
 592                 if (chip->asic_code)
 593                         sd_card->sd_clock = chip->asic_sd_sdr50_clk;
 594                 else
 595                         sd_card->sd_clock = chip->fpga_sd_sdr50_clk;
 596
 597         } else if (CHK_SD_HS(sd_card)) {
 598                 if (chip->asic_code)
 599                         sd_card->sd_clock = chip->asic_sd_hs_clk;
 600                 else
 601                         sd_card->sd_clock = chip->fpga_sd_hs_clk;
 602
 603         } else if (CHK_MMC_52M(sd_card) || CHK_MMC_DDR52(sd_card)) {
 604                 if (chip->asic_code)
 605                         sd_card->sd_clock = chip->asic_mmc_52m_clk;
 606                 else
 607                         sd_card->sd_clock = chip->fpga_mmc_52m_clk;
 608
 609         } else if (CHK_MMC_26M(sd_card)) {
 610                 if (chip->asic_code)
 611                         sd_card->sd_clock = 48;
 612                 else
 613                         sd_card->sd_clock = CLK_50;
 614         }
 615 }
 616
 617 static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div)
 618 {
 619         int retval;
 620         u8 mask = 0, val = 0;
 621
 622         mask = 0x60;
 623         if (clk_div == SD_CLK_DIVIDE_0)
 624                 val = 0x00;
 625         else if (clk_div == SD_CLK_DIVIDE_128)
 626                 val = 0x40;
 627         else if (clk_div == SD_CLK_DIVIDE_256)
 628                 val = 0x20;
 629
 630         retval = rtsx_write_register(chip, REG_SD_CFG1, mask, val);
 631         if (retval) {
 632                 rtsx_trace(chip);
 633                 return retval;
 634         }
 635
 636         return STATUS_SUCCESS;
 637 }
 638
 639 static int sd_set_init_para(struct rtsx_chip *chip)
 640 {
 641         struct sd_info *sd_card = &(chip->sd_card);
 642         int retval;
 643
 644         retval = sd_set_sample_push_timing(chip);
 645         if (retval != STATUS_SUCCESS) {
 646                 rtsx_trace(chip);
 647                 return STATUS_FAIL;
 648         }
 649
 650         sd_choose_proper_clock(chip);
 651
 652         retval = switch_clock(chip, sd_card->sd_clock);
 653         if (retval != STATUS_SUCCESS) {
 654                 rtsx_trace(chip);
 655                 return STATUS_FAIL;
 656         }
 657
 658         return STATUS_SUCCESS;
 659 }
 660
 661 int sd_select_card(struct rtsx_chip *chip, int select)
 662 {
 663         struct sd_info *sd_card = &(chip->sd_card);
 664         int retval;
 665         u8 cmd_idx, cmd_type;
 666         u32 addr;
 667
 668         if (select) {
 669                 cmd_idx = SELECT_CARD;
 670                 cmd_type = SD_RSP_TYPE_R1;
 671                 addr = sd_card->sd_addr;
 672         } else {
 673                 cmd_idx = DESELECT_CARD;
 674                 cmd_type = SD_RSP_TYPE_R0;
 675                 addr = 0;
 676         }
 677
 678         retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0);
 679         if (retval != STATUS_SUCCESS) {
 680                 rtsx_trace(chip);
 681                 return STATUS_FAIL;
 682         }
 683
 684         return STATUS_SUCCESS;
 685 }
 686
 687 #ifdef SUPPORT_SD_LOCK
 688 static int sd_update_lock_status(struct rtsx_chip *chip)
 689 {
 690         struct sd_info *sd_card = &(chip->sd_card);
 691         int retval;
 692         u8 rsp[5];
 693
 694         retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 695                                 SD_RSP_TYPE_R1, rsp, 5);
 696         if (retval != STATUS_SUCCESS) {
 697                 rtsx_trace(chip);
 698                 return STATUS_FAIL;
 699         }
 700
 701         if (rsp[1] & 0x02)
 702                 sd_card->sd_lock_status |= SD_LOCKED;
 703         else
 704                 sd_card->sd_lock_status &= ~SD_LOCKED;
 705
 706         dev_dbg(rtsx_dev(chip), "sd_card->sd_lock_status = 0x%x\n",
 707                 sd_card->sd_lock_status);
 708
 709         if (rsp[1] & 0x01) {
 710                 rtsx_trace(chip);
 711                 return STATUS_FAIL;
 712         }
 713
 714         return STATUS_SUCCESS;
 715 }
 716 #endif
 717
 718 static int sd_wait_state_data_ready(struct rtsx_chip *chip, u8 state,
 719                                 u8 data_ready, int polling_cnt)
 720 {
 721         struct sd_info *sd_card = &(chip->sd_card);
 722         int retval, i;
 723         u8 rsp[5];
 724
 725         for (i = 0; i < polling_cnt; i++) {
 726                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
 727                                         sd_card->sd_addr, SD_RSP_TYPE_R1, rsp,
 728                                         5);
 729                 if (retval != STATUS_SUCCESS) {
 730                         rtsx_trace(chip);
 731                         return STATUS_FAIL;
 732                 }
 733
 734                 if (((rsp[3] & 0x1E) == state) &&
 735                         ((rsp[3] & 0x01) == data_ready))
 736                         return STATUS_SUCCESS;
 737         }
 738
 739         rtsx_trace(chip);
 740         return STATUS_FAIL;
 741 }
 742
 743 static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage)
 744 {
 745         int retval;
 746
 747         if (voltage == SD_IO_3V3) {
 748                 if (chip->asic_code) {
 749                         retval = rtsx_write_phy_register(chip, 0x08,
 750                                                         0x4FC0 |
 751                                                         chip->phy_voltage);
 752                         if (retval != STATUS_SUCCESS) {
 753                                 rtsx_trace(chip);
 754                                 return STATUS_FAIL;
 755                         }
 756                 } else {
 757                         retval = rtsx_write_register(chip, SD_PAD_CTL,
 758                                                      SD_IO_USING_1V8, 0);
 759                         if (retval) {
 760                                 rtsx_trace(chip);
 761                                 return retval;
 762                         }
 763                 }
 764         } else if (voltage == SD_IO_1V8) {
 765                 if (chip->asic_code) {
 766                         retval = rtsx_write_phy_register(chip, 0x08,
 767                                                         0x4C40 |
 768                                                         chip->phy_voltage);
 769                         if (retval != STATUS_SUCCESS) {
 770                                 rtsx_trace(chip);
 771                                 return STATUS_FAIL;
 772                         }
 773                 } else {
 774                         retval = rtsx_write_register(chip, SD_PAD_CTL,
 775                                                      SD_IO_USING_1V8,
 776                                                      SD_IO_USING_1V8);
 777                         if (retval) {
 778                                 rtsx_trace(chip);
 779                                 return retval;
 780                         }
 781                 }
 782         } else {
 783                 rtsx_trace(chip);
 784                 return STATUS_FAIL;
 785         }
 786
 787         return STATUS_SUCCESS;
 788 }
 789
 790 static int sd_voltage_switch(struct rtsx_chip *chip)
 791 {
 792         int retval;
 793         u8 stat;
 794
 795         retval = rtsx_write_register(chip, SD_BUS_STAT,
 796                                      SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
 797                                      SD_CLK_TOGGLE_EN);
 798         if (retval) {
 799                 rtsx_trace(chip);
 800                 return retval;
 801         }
 802
 803         retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1,
 804                                 NULL, 0);
 805         if (retval != STATUS_SUCCESS) {
 806                 rtsx_trace(chip);
 807                 return STATUS_FAIL;
 808         }
 809
 810         udelay(chip->sd_voltage_switch_delay);
 811
 812         retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
 813         if (retval) {
 814                 rtsx_trace(chip);
 815                 return retval;
 816         }
 817         if (stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 818                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
 819                 rtsx_trace(chip);
 820                 return STATUS_FAIL;
 821         }
 822
 823         retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
 824                                      SD_CLK_FORCE_STOP);
 825         if (retval) {
 826                 rtsx_trace(chip);
 827                 return retval;
 828         }
 829         retval = sd_change_bank_voltage(chip, SD_IO_1V8);
 830         if (retval != STATUS_SUCCESS) {
 831                 rtsx_trace(chip);
 832                 return STATUS_FAIL;
 833         }
 834
 835         wait_timeout(50);
 836
 837         retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
 838                                      SD_CLK_TOGGLE_EN);
 839         if (retval) {
 840                 rtsx_trace(chip);
 841                 return retval;
 842         }
 843         wait_timeout(10);
 844
 845         retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
 846         if (retval) {
 847                 rtsx_trace(chip);
 848                 return retval;
 849         }
 850         if ((stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 851                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) !=
 852                         (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 853                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
 854                 dev_dbg(rtsx_dev(chip), "SD_BUS_STAT: 0x%x\n", stat);
 855                 rtsx_write_register(chip, SD_BUS_STAT,
 856                                 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
 857                 rtsx_write_register(chip, CARD_CLK_EN, 0xFF, 0);
 858                 rtsx_trace(chip);
 859                 return STATUS_FAIL;
 860         }
 861
 862         retval = rtsx_write_register(chip, SD_BUS_STAT,
 863                                      SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
 864         if (retval) {
 865                 rtsx_trace(chip);
 866                 return retval;
 867         }
 868
 869         return STATUS_SUCCESS;
 870 }
 871
 872 static int sd_reset_dcm(struct rtsx_chip *chip, u8 tune_dir)
 873 {
 874         int retval;
 875
 876         if (tune_dir == TUNE_RX) {
 877                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
 878                                              DCM_RESET | DCM_RX);
 879                 if (retval) {
 880                         rtsx_trace(chip);
 881                         return retval;
 882                 }
 883                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RX);
 884                 if (retval) {
 885                         rtsx_trace(chip);
 886                         return retval;
 887                 }
 888         } else {
 889                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
 890                                              DCM_RESET | DCM_TX);
 891                 if (retval) {
 892                         rtsx_trace(chip);
 893                         return retval;
 894                 }
 895                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_TX);
 896                 if (retval) {
 897                         rtsx_trace(chip);
 898                         return retval;
 899                 }
 900         }
 901
 902         return STATUS_SUCCESS;
 903 }
 904
 905 static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
 906 {
 907         struct sd_info *sd_card = &(chip->sd_card);
 908         u16 SD_VP_CTL, SD_DCMPS_CTL;
 909         u8 val;
 910         int retval;
 911         bool ddr_rx = false;
 912
 913         dev_dbg(rtsx_dev(chip), "sd_change_phase (sample_point = %d, tune_dir = %d)\n",
 914                 sample_point, tune_dir);
 915
 916         if (tune_dir == TUNE_RX) {
 917                 SD_VP_CTL = SD_VPRX_CTL;
 918                 SD_DCMPS_CTL = SD_DCMPS_RX_CTL;
 919                 if (CHK_SD_DDR50(sd_card))
 920                         ddr_rx = true;
 921         } else {
 922                 SD_VP_CTL = SD_VPTX_CTL;
 923                 SD_DCMPS_CTL = SD_DCMPS_TX_CTL;
 924         }
 925
 926         if (chip->asic_code) {
 927                 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK,
 928                                              CHANGE_CLK);
 929                 if (retval) {
 930                         rtsx_trace(chip);
 931                         return retval;
 932                 }
 933                 retval = rtsx_write_register(chip, SD_VP_CTL, 0x1F,
 934                                              sample_point);
 935                 if (retval) {
 936                         rtsx_trace(chip);
 937                         return retval;
 938                 }
 939                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 940                                              PHASE_NOT_RESET, 0);
 941                 if (retval) {
 942                         rtsx_trace(chip);
 943                         return retval;
 944                 }
 945                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 946                                              PHASE_NOT_RESET, PHASE_NOT_RESET);
 947                 if (retval) {
 948                         rtsx_trace(chip);
 949                         return retval;
 950                 }
 951                 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0);
 952                 if (retval) {
 953                         rtsx_trace(chip);
 954                         return retval;
 955                 }
 956         } else {
 957                 rtsx_read_register(chip, SD_VP_CTL, &val);
 958                 dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
 959                 rtsx_read_register(chip, SD_DCMPS_CTL, &val);
 960                 dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
 961
 962                 if (ddr_rx) {
 963                         retval = rtsx_write_register(chip, SD_VP_CTL,
 964                                                      PHASE_CHANGE,
 965                                                      PHASE_CHANGE);
 966                         if (retval) {
 967                                 rtsx_trace(chip);
 968                                 return retval;
 969                         }
 970                         udelay(50);
 971                         retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 972                                                      PHASE_CHANGE | PHASE_NOT_RESET | sample_point);
 973                         if (retval) {
 974                                 rtsx_trace(chip);
 975                                 return retval;
 976                         }
 977                 } else {
 978                         retval = rtsx_write_register(chip, CLK_CTL,
 979                                                      CHANGE_CLK, CHANGE_CLK);
 980                         if (retval) {
 981                                 rtsx_trace(chip);
 982                                 return retval;
 983                         }
 984                         udelay(50);
 985                         retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 986                                                      PHASE_NOT_RESET | sample_point);
 987                         if (retval) {
 988                                 rtsx_trace(chip);
 989                                 return retval;
 990                         }
 991                 }
 992                 udelay(100);
 993
 994                 rtsx_init_cmd(chip);
 995                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE,
 996                         DCMPS_CHANGE);
 997                 rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL,
 998                         DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE);
 999                 retval = rtsx_send_cmd(chip, SD_CARD, 100);
1000                 if (retval != STATUS_SUCCESS) {
1001                         rtsx_trace(chip);
1002                         goto Fail;
1003                 }
1004
1005                 val = *rtsx_get_cmd_data(chip);
1006                 if (val & DCMPS_ERROR) {
1007                         rtsx_trace(chip);
1008                         goto Fail;
1009                 }
1010
1011                 if ((val & DCMPS_CURRENT_PHASE) != sample_point) {
1012                         rtsx_trace(chip);
1013                         goto Fail;
1014                 }
1015
1016                 retval = rtsx_write_register(chip, SD_DCMPS_CTL,
1017                                              DCMPS_CHANGE, 0);
1018                 if (retval) {
1019                         rtsx_trace(chip);
1020                         return retval;
1021                 }
1022                 if (ddr_rx) {
1023                         retval = rtsx_write_register(chip, SD_VP_CTL,
1024                                                      PHASE_CHANGE, 0);
1025                         if (retval) {
1026                                 rtsx_trace(chip);
1027                                 return retval;
1028                         }
1029                 } else {
1030                         retval = rtsx_write_register(chip, CLK_CTL,
1031                                                      CHANGE_CLK, 0);
1032                         if (retval) {
1033                                 rtsx_trace(chip);
1034                                 return retval;
1035                         }
1036                 }
1037
1038                 udelay(50);
1039         }
1040
1041         retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
1042         if (retval) {
1043                 rtsx_trace(chip);
1044                 return retval;
1045         }
1046
1047         return STATUS_SUCCESS;
1048
1049 Fail:
1050         rtsx_read_register(chip, SD_VP_CTL, &val);
1051         dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
1052         rtsx_read_register(chip, SD_DCMPS_CTL, &val);
1053         dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
1054
1055         rtsx_write_register(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
1056         rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, 0);
1057         wait_timeout(10);
1058         sd_reset_dcm(chip, tune_dir);
1059         return STATUS_FAIL;
1060 }
1061
1062 static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width)
1063 {
1064         struct sd_info *sd_card = &(chip->sd_card);
1065         int retval;
1066         u8 cmd[5], buf[8];
1067
1068         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
1069                                 SD_RSP_TYPE_R1, NULL, 0);
1070         if (retval != STATUS_SUCCESS) {
1071                 rtsx_trace(chip);
1072                 return STATUS_FAIL;
1073         }
1074
1075         cmd[0] = 0x40 | SEND_SCR;
1076         cmd[1] = 0;
1077         cmd[2] = 0;
1078         cmd[3] = 0;
1079         cmd[4] = 0;
1080
1081         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 8, 1, bus_width,
1082                         buf, 8, 250);
1083         if (retval != STATUS_SUCCESS) {
1084                 rtsx_clear_sd_error(chip);
1085                 rtsx_trace(chip);
1086                 return STATUS_FAIL;
1087         }
1088
1089         memcpy(sd_card->raw_scr, buf, 8);
1090
1091         if ((buf[0] & 0x0F) == 0) {
1092                 rtsx_trace(chip);
1093                 return STATUS_FAIL;
1094         }
1095
1096         return STATUS_SUCCESS;
1097 }
1098
1099 static int sd_query_switch_result(struct rtsx_chip *chip, u8 func_group,
1100                                 u8 func_to_switch, u8 *buf, int buf_len)
1101 {
1102         u8 support_mask = 0, query_switch = 0, switch_busy = 0;
1103         int support_offset = 0, query_switch_offset = 0, check_busy_offset = 0;
1104
1105         if (func_group == SD_FUNC_GROUP_1) {
1106                 support_offset = FUNCTION_GROUP1_SUPPORT_OFFSET;
1107                 query_switch_offset = FUNCTION_GROUP1_QUERY_SWITCH_OFFSET;
1108                 check_busy_offset = FUNCTION_GROUP1_CHECK_BUSY_OFFSET;
1109
1110                 switch (func_to_switch) {
1111                 case HS_SUPPORT:
1112                         support_mask = HS_SUPPORT_MASK;
1113                         query_switch = HS_QUERY_SWITCH_OK;
1114                         switch_busy = HS_SWITCH_BUSY;
1115                         break;
1116
1117                 case SDR50_SUPPORT:
1118                         support_mask = SDR50_SUPPORT_MASK;
1119                         query_switch = SDR50_QUERY_SWITCH_OK;
1120                         switch_busy = SDR50_SWITCH_BUSY;
1121                         break;
1122
1123                 case SDR104_SUPPORT:
1124                         support_mask = SDR104_SUPPORT_MASK;
1125                         query_switch = SDR104_QUERY_SWITCH_OK;
1126                         switch_busy = SDR104_SWITCH_BUSY;
1127                         break;
1128
1129                 case DDR50_SUPPORT:
1130                         support_mask = DDR50_SUPPORT_MASK;
1131                         query_switch = DDR50_QUERY_SWITCH_OK;
1132                         switch_busy = DDR50_SWITCH_BUSY;
1133                         break;
1134
1135                 default:
1136                         rtsx_trace(chip);
1137                         return STATUS_FAIL;
1138                 }
1139         } else if (func_group == SD_FUNC_GROUP_3) {
1140                 support_offset = FUNCTION_GROUP3_SUPPORT_OFFSET;
1141                 query_switch_offset = FUNCTION_GROUP3_QUERY_SWITCH_OFFSET;
1142                 check_busy_offset = FUNCTION_GROUP3_CHECK_BUSY_OFFSET;
1143
1144                 switch (func_to_switch) {
1145                 case DRIVING_TYPE_A:
1146                         support_mask = DRIVING_TYPE_A_MASK;
1147                         query_switch = TYPE_A_QUERY_SWITCH_OK;
1148                         switch_busy = TYPE_A_SWITCH_BUSY;
1149                         break;
1150
1151                 case DRIVING_TYPE_C:
1152                         support_mask = DRIVING_TYPE_C_MASK;
1153                         query_switch = TYPE_C_QUERY_SWITCH_OK;
1154                         switch_busy = TYPE_C_SWITCH_BUSY;
1155                         break;
1156
1157                 case DRIVING_TYPE_D:
1158                         support_mask = DRIVING_TYPE_D_MASK;
1159                         query_switch = TYPE_D_QUERY_SWITCH_OK;
1160                         switch_busy = TYPE_D_SWITCH_BUSY;
1161                         break;
1162
1163                 default:
1164                         rtsx_trace(chip);
1165                         return STATUS_FAIL;
1166                 }
1167         } else if (func_group == SD_FUNC_GROUP_4) {
1168                 support_offset = FUNCTION_GROUP4_SUPPORT_OFFSET;
1169                 query_switch_offset = FUNCTION_GROUP4_QUERY_SWITCH_OFFSET;
1170                 check_busy_offset = FUNCTION_GROUP4_CHECK_BUSY_OFFSET;
1171
1172                 switch (func_to_switch) {
1173                 case CURRENT_LIMIT_400:
1174                         support_mask = CURRENT_LIMIT_400_MASK;
1175                         query_switch = CURRENT_LIMIT_400_QUERY_SWITCH_OK;
1176                         switch_busy = CURRENT_LIMIT_400_SWITCH_BUSY;
1177                         break;
1178
1179                 case CURRENT_LIMIT_600:
1180                         support_mask = CURRENT_LIMIT_600_MASK;
1181                         query_switch = CURRENT_LIMIT_600_QUERY_SWITCH_OK;
1182                         switch_busy = CURRENT_LIMIT_600_SWITCH_BUSY;
1183                         break;
1184
1185                 case CURRENT_LIMIT_800:
1186                         support_mask = CURRENT_LIMIT_800_MASK;
1187                         query_switch = CURRENT_LIMIT_800_QUERY_SWITCH_OK;
1188                         switch_busy = CURRENT_LIMIT_800_SWITCH_BUSY;
1189                         break;
1190
1191                 default:
1192                         rtsx_trace(chip);
1193                         return STATUS_FAIL;
1194                 }
1195         } else {
1196                 rtsx_trace(chip);
1197                 return STATUS_FAIL;
1198         }
1199
1200         if (func_group == SD_FUNC_GROUP_1) {
1201                 if (!(buf[support_offset] & support_mask) ||
1202                         ((buf[query_switch_offset] & 0x0F) != query_switch)) {
1203                         rtsx_trace(chip);
1204                         return STATUS_FAIL;
1205                 }
1206         }
1207
1208         /* Check 'Busy Status' */
1209         if ((buf[DATA_STRUCTURE_VER_OFFSET] == 0x01) &&
1210                     ((buf[check_busy_offset] & switch_busy) == switch_busy)) {
1211                 rtsx_trace(chip);
1212                 return STATUS_FAIL;
1213         }
1214
1215         return STATUS_SUCCESS;
1216 }
1217
1218 static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode,
1219                 u8 func_group, u8 func_to_switch, u8 bus_width)
1220 {
1221         struct sd_info *sd_card = &(chip->sd_card);
1222         int retval;
1223         u8 cmd[5], buf[64];
1224
1225         dev_dbg(rtsx_dev(chip), "sd_check_switch_mode (mode = %d, func_group = %d, func_to_switch = %d)\n",
1226                 mode, func_group, func_to_switch);
1227
1228         cmd[0] = 0x40 | SWITCH;
1229         cmd[1] = mode;
1230
1231         if (func_group == SD_FUNC_GROUP_1) {
1232                 cmd[2] = 0xFF;
1233                 cmd[3] = 0xFF;
1234                 cmd[4] = 0xF0 + func_to_switch;
1235         } else if (func_group == SD_FUNC_GROUP_3) {
1236                 cmd[2] = 0xFF;
1237                 cmd[3] = 0xF0 + func_to_switch;
1238                 cmd[4] = 0xFF;
1239         } else if (func_group == SD_FUNC_GROUP_4) {
1240                 cmd[2] = 0xFF;
1241                 cmd[3] = 0x0F + (func_to_switch << 4);
1242                 cmd[4] = 0xFF;
1243         } else {
1244                 cmd[1] = SD_CHECK_MODE;
1245                 cmd[2] = 0xFF;
1246                 cmd[3] = 0xFF;
1247                 cmd[4] = 0xFF;
1248         }
1249
1250         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, bus_width,
1251                         buf, 64, 250);
1252         if (retval != STATUS_SUCCESS) {
1253                 rtsx_clear_sd_error(chip);
1254                 rtsx_trace(chip);
1255                 return STATUS_FAIL;
1256         }
1257
1258         dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf);
1259
1260         if (func_group == NO_ARGUMENT) {
1261                 sd_card->func_group1_mask = buf[0x0D];
1262                 sd_card->func_group2_mask = buf[0x0B];
1263                 sd_card->func_group3_mask = buf[0x09];
1264                 sd_card->func_group4_mask = buf[0x07];
1265
1266                 dev_dbg(rtsx_dev(chip), "func_group1_mask = 0x%02x\n",
1267                         buf[0x0D]);
1268                 dev_dbg(rtsx_dev(chip), "func_group2_mask = 0x%02x\n",
1269                         buf[0x0B]);
1270                 dev_dbg(rtsx_dev(chip), "func_group3_mask = 0x%02x\n",
1271                         buf[0x09]);
1272                 dev_dbg(rtsx_dev(chip), "func_group4_mask = 0x%02x\n",
1273                         buf[0x07]);
1274         } else {
1275                 /* Maximum current consumption, check whether current is
1276                  * acceptable; bit[511:496] = 0x0000 means some error happened.
1277                  */
1278                 u16 cc = ((u16)buf[0] << 8) | buf[1];
1279
1280                 dev_dbg(rtsx_dev(chip), "Maximum current consumption: %dmA\n",
1281                         cc);
1282                 if ((cc == 0) || (cc > 800)) {
1283                         rtsx_trace(chip);
1284                         return STATUS_FAIL;
1285                 }
1286
1287                 retval = sd_query_switch_result(chip, func_group,
1288                                                 func_to_switch, buf, 64);
1289                 if (retval != STATUS_SUCCESS) {
1290                         rtsx_trace(chip);
1291                         return STATUS_FAIL;
1292                 }
1293
1294                 if ((cc > 400) || (func_to_switch > CURRENT_LIMIT_400)) {
1295                         retval = rtsx_write_register(chip, OCPPARA2,
1296                                                      SD_OCP_THD_MASK,
1297                                                      chip->sd_800mA_ocp_thd);
1298                         if (retval) {
1299                                 rtsx_trace(chip);
1300                                 return retval;
1301                         }
1302                         retval = rtsx_write_register(chip, CARD_PWR_CTL,
1303                                                      PMOS_STRG_MASK,
1304                                                      PMOS_STRG_800mA);
1305                         if (retval) {
1306                                 rtsx_trace(chip);
1307                                 return retval;
1308                         }
1309                 }
1310         }
1311
1312         return STATUS_SUCCESS;
1313 }
1314
1315 static u8 downgrade_switch_mode(u8 func_group, u8 func_to_switch)
1316 {
1317         if (func_group == SD_FUNC_GROUP_1) {
1318                 if (func_to_switch > HS_SUPPORT)
1319                         func_to_switch--;
1320
1321         } else if (func_group == SD_FUNC_GROUP_4) {
1322                 if (func_to_switch > CURRENT_LIMIT_200)
1323                         func_to_switch--;
1324         }
1325
1326         return func_to_switch;
1327 }
1328
1329 static int sd_check_switch(struct rtsx_chip *chip,
1330                 u8 func_group, u8 func_to_switch, u8 bus_width)
1331 {
1332         int retval;
1333         int i;
1334         bool switch_good = false;
1335
1336         for (i = 0; i < 3; i++) {
1337                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1338                         sd_set_err_code(chip, SD_NO_CARD);
1339                         rtsx_trace(chip);
1340                         return STATUS_FAIL;
1341                 }
1342
1343                 retval = sd_check_switch_mode(chip, SD_CHECK_MODE, func_group,
1344                                 func_to_switch, bus_width);
1345                 if (retval == STATUS_SUCCESS) {
1346                         u8 stat;
1347
1348                         retval = sd_check_switch_mode(chip, SD_SWITCH_MODE,
1349                                         func_group, func_to_switch, bus_width);
1350                         if (retval == STATUS_SUCCESS) {
1351                                 switch_good = true;
1352                                 break;
1353                         }
1354
1355                         retval = rtsx_read_register(chip, SD_STAT1, &stat);
1356                         if (retval) {
1357                                 rtsx_trace(chip);
1358                                 return retval;
1359                         }
1360                         if (stat & SD_CRC16_ERR) {
1361                                 dev_dbg(rtsx_dev(chip), "SD CRC16 error when switching mode\n");
1362                                 rtsx_trace(chip);
1363                                 return STATUS_FAIL;
1364                         }
1365                 }
1366
1367                 func_to_switch = downgrade_switch_mode(func_group,
1368                                                 func_to_switch);
1369
1370                 wait_timeout(20);
1371         }
1372
1373         if (!switch_good) {
1374                 rtsx_trace(chip);
1375                 return STATUS_FAIL;
1376         }
1377
1378         return STATUS_SUCCESS;
1379 }
1380
1381 static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width)
1382 {
1383         struct sd_info *sd_card = &(chip->sd_card);
1384         int retval;
1385         int i;
1386         u8 func_to_switch = 0;
1387
1388         /* Get supported functions */
1389         retval = sd_check_switch_mode(chip, SD_CHECK_MODE,
1390                         NO_ARGUMENT, NO_ARGUMENT, bus_width);
1391         if (retval != STATUS_SUCCESS) {
1392                 rtsx_trace(chip);
1393                 return STATUS_FAIL;
1394         }
1395
1396         sd_card->func_group1_mask &= ~(sd_card->sd_switch_fail);
1397
1398         /* Function Group 1: Access Mode */
1399         for (i = 0; i < 4; i++) {
1400                 switch ((u8)(chip->sd_speed_prior >> (i*8))) {
1401                 case SDR104_SUPPORT:
1402                         if ((sd_card->func_group1_mask & SDR104_SUPPORT_MASK)
1403                                         && chip->sdr104_en) {
1404                                 func_to_switch = SDR104_SUPPORT;
1405                         }
1406                         break;
1407
1408                 case DDR50_SUPPORT:
1409                         if ((sd_card->func_group1_mask & DDR50_SUPPORT_MASK)
1410                                         && chip->ddr50_en) {
1411                                 func_to_switch = DDR50_SUPPORT;
1412                         }
1413                         break;
1414
1415                 case SDR50_SUPPORT:
1416                         if ((sd_card->func_group1_mask & SDR50_SUPPORT_MASK)
1417                                         && chip->sdr50_en) {
1418                                 func_to_switch = SDR50_SUPPORT;
1419                         }
1420                         break;
1421
1422                 case HS_SUPPORT:
1423                         if (sd_card->func_group1_mask & HS_SUPPORT_MASK)
1424                                 func_to_switch = HS_SUPPORT;
1425
1426                         break;
1427
1428                 default:
1429                         continue;
1430                 }
1431
1432
1433                 if (func_to_switch)
1434                         break;
1435
1436         }
1437         dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_1: func_to_switch = 0x%02x",
1438                 func_to_switch);
1439
1440 #ifdef SUPPORT_SD_LOCK
1441         if ((sd_card->sd_lock_status & SD_SDR_RST)
1442                         && (DDR50_SUPPORT == func_to_switch)
1443                         && (sd_card->func_group1_mask & SDR50_SUPPORT_MASK)) {
1444                 func_to_switch = SDR50_SUPPORT;
1445                 dev_dbg(rtsx_dev(chip), "Using SDR50 instead of DDR50 for SD Lock\n");
1446         }
1447 #endif
1448
1449         if (func_to_switch) {
1450                 retval = sd_check_switch(chip, SD_FUNC_GROUP_1, func_to_switch,
1451                                         bus_width);
1452                 if (retval != STATUS_SUCCESS) {
1453                         if (func_to_switch == SDR104_SUPPORT) {
1454                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK;
1455                         } else if (func_to_switch == DDR50_SUPPORT) {
1456                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
1457                                         DDR50_SUPPORT_MASK;
1458                         } else if (func_to_switch == SDR50_SUPPORT) {
1459                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
1460                                         DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
1461                         }
1462                         rtsx_trace(chip);
1463                         return STATUS_FAIL;
1464                 }
1465
1466                 if (func_to_switch == SDR104_SUPPORT)
1467                         SET_SD_SDR104(sd_card);
1468                 else if (func_to_switch == DDR50_SUPPORT)
1469                         SET_SD_DDR50(sd_card);
1470                 else if (func_to_switch == SDR50_SUPPORT)
1471                         SET_SD_SDR50(sd_card);
1472                 else
1473                         SET_SD_HS(sd_card);
1474         }
1475
1476         if (CHK_SD_DDR50(sd_card)) {
1477                 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06,
1478                                              0x04);
1479                 if (retval) {
1480                         rtsx_trace(chip);
1481                         return retval;
1482                 }
1483                 retval = sd_set_sample_push_timing(chip);
1484                 if (retval != STATUS_SUCCESS) {
1485                         rtsx_trace(chip);
1486                         return STATUS_FAIL;
1487                 }
1488         }
1489
1490         if (!func_to_switch || (func_to_switch == HS_SUPPORT)) {
1491                 /* Do not try to switch current limit if the card doesn't
1492                  * support UHS mode or we don't want it to support UHS mode
1493                  */
1494                 return STATUS_SUCCESS;
1495         }
1496
1497         /* Function Group 4: Current Limit */
1498         func_to_switch = 0xFF;
1499
1500         for (i = 0; i < 4; i++) {
1501                 switch ((u8)(chip->sd_current_prior >> (i*8))) {
1502                 case CURRENT_LIMIT_800:
1503                         if (sd_card->func_group4_mask & CURRENT_LIMIT_800_MASK)
1504                                 func_to_switch = CURRENT_LIMIT_800;
1505
1506                         break;
1507
1508                 case CURRENT_LIMIT_600:
1509                         if (sd_card->func_group4_mask & CURRENT_LIMIT_600_MASK)
1510                                 func_to_switch = CURRENT_LIMIT_600;
1511
1512                         break;
1513
1514                 case CURRENT_LIMIT_400:
1515                         if (sd_card->func_group4_mask & CURRENT_LIMIT_400_MASK)
1516                                 func_to_switch = CURRENT_LIMIT_400;
1517
1518                         break;
1519
1520                 case CURRENT_LIMIT_200:
1521                         if (sd_card->func_group4_mask & CURRENT_LIMIT_200_MASK)
1522                                 func_to_switch = CURRENT_LIMIT_200;
1523
1524                         break;
1525
1526                 default:
1527                         continue;
1528                 }
1529
1530                 if (func_to_switch != 0xFF)
1531                         break;
1532         }
1533
1534         dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_4: func_to_switch = 0x%02x",
1535                 func_to_switch);
1536
1537         if (func_to_switch <= CURRENT_LIMIT_800) {
1538                 retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch,
1539                                         bus_width);
1540                 if (retval != STATUS_SUCCESS) {
1541                         if (sd_check_err_code(chip, SD_NO_CARD)) {
1542                                 rtsx_trace(chip);
1543                                 return STATUS_FAIL;
1544                         }
1545                 }
1546                 dev_dbg(rtsx_dev(chip), "Switch current limit finished! (%d)\n",
1547                         retval);
1548         }
1549
1550         if (CHK_SD_DDR50(sd_card)) {
1551                 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, 0);
1552                 if (retval) {
1553                         rtsx_trace(chip);
1554                         return retval;
1555                 }
1556         }
1557
1558         return STATUS_SUCCESS;
1559 }
1560
1561 static int sd_wait_data_idle(struct rtsx_chip *chip)
1562 {
1563         int retval = STATUS_TIMEDOUT;
1564         int i;
1565         u8 val = 0;
1566
1567         for (i = 0; i < 100; i++) {
1568                 retval = rtsx_read_register(chip, SD_DATA_STATE, &val);
1569                 if (retval) {
1570                         rtsx_trace(chip);
1571                         return retval;
1572                 }
1573                 if (val & SD_DATA_IDLE) {
1574                         retval = STATUS_SUCCESS;
1575                         break;
1576                 }
1577                 udelay(100);
1578         }
1579         dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
1580
1581         return retval;
1582 }
1583
1584 static int sd_sdr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1585 {
1586         int retval;
1587         u8 cmd[5];
1588
1589         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1590         if (retval != STATUS_SUCCESS) {
1591                 rtsx_trace(chip);
1592                 return STATUS_FAIL;
1593         }
1594
1595         cmd[0] = 0x40 | SEND_TUNING_PATTERN;
1596         cmd[1] = 0;
1597         cmd[2] = 0;
1598         cmd[3] = 0;
1599         cmd[4] = 0;
1600
1601         retval = sd_read_data(chip, SD_TM_AUTO_TUNING,
1602                         cmd, 5, 0x40, 1, SD_BUS_WIDTH_4, NULL, 0, 100);
1603         if (retval != STATUS_SUCCESS) {
1604                 (void)sd_wait_data_idle(chip);
1605
1606                 rtsx_clear_sd_error(chip);
1607                 rtsx_trace(chip);
1608                 return STATUS_FAIL;
1609         }
1610
1611         return STATUS_SUCCESS;
1612 }
1613
1614 static int sd_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1615 {
1616         struct sd_info *sd_card = &(chip->sd_card);
1617         int retval;
1618         u8 cmd[5];
1619
1620         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1621         if (retval != STATUS_SUCCESS) {
1622                 rtsx_trace(chip);
1623                 return STATUS_FAIL;
1624         }
1625
1626         dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n");
1627
1628         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
1629                                 SD_RSP_TYPE_R1, NULL, 0);
1630         if (retval != STATUS_SUCCESS) {
1631                 rtsx_trace(chip);
1632                 return STATUS_FAIL;
1633         }
1634
1635         cmd[0] = 0x40 | SD_STATUS;
1636         cmd[1] = 0;
1637         cmd[2] = 0;
1638         cmd[3] = 0;
1639         cmd[4] = 0;
1640
1641         retval = sd_read_data(chip, SD_TM_NORMAL_READ,
1642                         cmd, 5, 64, 1, SD_BUS_WIDTH_4, NULL, 0, 100);
1643         if (retval != STATUS_SUCCESS) {
1644                 (void)sd_wait_data_idle(chip);
1645
1646                 rtsx_clear_sd_error(chip);
1647                 rtsx_trace(chip);
1648                 return STATUS_FAIL;
1649         }
1650
1651         return STATUS_SUCCESS;
1652 }
1653
1654 static int mmc_ddr_tunning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1655 {
1656         struct sd_info *sd_card = &(chip->sd_card);
1657         int retval;
1658         u8 cmd[5], bus_width;
1659
1660         if (CHK_MMC_8BIT(sd_card))
1661                 bus_width = SD_BUS_WIDTH_8;
1662         else if (CHK_MMC_4BIT(sd_card))
1663                 bus_width = SD_BUS_WIDTH_4;
1664         else
1665                 bus_width = SD_BUS_WIDTH_1;
1666
1667         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1668         if (retval != STATUS_SUCCESS) {
1669                 rtsx_trace(chip);
1670                 return STATUS_FAIL;
1671         }
1672
1673         dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n");
1674
1675         cmd[0] = 0x40 | SEND_EXT_CSD;
1676         cmd[1] = 0;
1677         cmd[2] = 0;
1678         cmd[3] = 0;
1679         cmd[4] = 0;
1680
1681         retval = sd_read_data(chip, SD_TM_NORMAL_READ,
1682                         cmd, 5, 0x200, 1, bus_width, NULL, 0, 100);
1683         if (retval != STATUS_SUCCESS) {
1684                 (void)sd_wait_data_idle(chip);
1685
1686                 rtsx_clear_sd_error(chip);
1687                 rtsx_trace(chip);
1688                 return STATUS_FAIL;
1689         }
1690
1691         return STATUS_SUCCESS;
1692 }
1693
1694 static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1695 {
1696         struct sd_info *sd_card = &(chip->sd_card);
1697         int retval;
1698
1699         retval = sd_change_phase(chip, sample_point, TUNE_TX);
1700         if (retval != STATUS_SUCCESS) {
1701                 rtsx_trace(chip);
1702                 return STATUS_FAIL;
1703         }
1704
1705         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1706                                      SD_RSP_80CLK_TIMEOUT_EN);
1707         if (retval) {
1708                 rtsx_trace(chip);
1709                 return retval;
1710         }
1711
1712         retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
1713                 SD_RSP_TYPE_R1, NULL, 0);
1714         if (retval != STATUS_SUCCESS) {
1715                 if (sd_check_err_code(chip, SD_RSP_TIMEOUT)) {
1716                         rtsx_write_register(chip, SD_CFG3,
1717                                         SD_RSP_80CLK_TIMEOUT_EN, 0);
1718                         rtsx_trace(chip);
1719                         return STATUS_FAIL;
1720                 }
1721         }
1722
1723         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1724                                      0);
1725         if (retval) {
1726                 rtsx_trace(chip);
1727                 return retval;
1728         }
1729
1730         return STATUS_SUCCESS;
1731 }
1732
1733 static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1734 {
1735         struct sd_info *sd_card = &(chip->sd_card);
1736         int retval;
1737         u8 cmd[5], bus_width;
1738
1739         retval = sd_change_phase(chip, sample_point, TUNE_TX);
1740         if (retval != STATUS_SUCCESS) {
1741                 rtsx_trace(chip);
1742                 return STATUS_FAIL;
1743         }
1744
1745         if (CHK_SD(sd_card)) {
1746                 bus_width = SD_BUS_WIDTH_4;
1747         } else {
1748                 if (CHK_MMC_8BIT(sd_card))
1749                         bus_width = SD_BUS_WIDTH_8;
1750                 else if (CHK_MMC_4BIT(sd_card))
1751                         bus_width = SD_BUS_WIDTH_4;
1752                 else
1753                         bus_width = SD_BUS_WIDTH_1;
1754         }
1755
1756         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
1757         if (retval != STATUS_SUCCESS) {
1758                 rtsx_trace(chip);
1759                 return STATUS_FAIL;
1760         }
1761
1762         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1763                                      SD_RSP_80CLK_TIMEOUT_EN);
1764         if (retval) {
1765                 rtsx_trace(chip);
1766                 return retval;
1767         }
1768
1769         cmd[0] = 0x40 | PROGRAM_CSD;
1770         cmd[1] = 0;
1771         cmd[2] = 0;
1772         cmd[3] = 0;
1773         cmd[4] = 0;
1774
1775         retval = sd_write_data(chip, SD_TM_AUTO_WRITE_2,
1776                         cmd, 5, 16, 1, bus_width, sd_card->raw_csd, 16, 100);
1777         if (retval != STATUS_SUCCESS) {
1778                 rtsx_clear_sd_error(chip);
1779                 rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1780                 rtsx_trace(chip);
1781                 return STATUS_FAIL;
1782         }
1783
1784         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1785                                      0);
1786         if (retval) {
1787                 rtsx_trace(chip);
1788                 return retval;
1789         }
1790
1791         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1,
1792                         NULL, 0);
1793
1794         return STATUS_SUCCESS;
1795 }
1796
1797 static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map,
1798                                 u8 tune_dir)
1799 {
1800         struct sd_info *sd_card = &(chip->sd_card);
1801         struct timing_phase_path path[MAX_PHASE + 1];
1802         int i, j, cont_path_cnt;
1803         bool new_block;
1804         int max_len, final_path_idx;
1805         u8 final_phase = 0xFF;
1806
1807         if (phase_map == 0xFFFFFFFF) {
1808                 if (tune_dir == TUNE_RX)
1809                         final_phase = (u8)chip->sd_default_rx_phase;
1810                 else
1811                         final_phase = (u8)chip->sd_default_tx_phase;
1812
1813                 goto Search_Finish;
1814         }
1815
1816         cont_path_cnt = 0;
1817         new_block = true;
1818         j = 0;
1819         for (i = 0; i < MAX_PHASE + 1; i++) {
1820                 if (phase_map & (1 << i)) {
1821                         if (new_block) {
1822                                 new_block = false;
1823                                 j = cont_path_cnt++;
1824                                 path[j].start = i;
1825                                 path[j].end = i;
1826                         } else {
1827                                 path[j].end = i;
1828                         }
1829                 } else {
1830                         new_block = true;
1831                         if (cont_path_cnt) {
1832                                 int idx = cont_path_cnt - 1;
1833
1834                                 path[idx].len = path[idx].end -
1835                                         path[idx].start + 1;
1836                                 path[idx].mid = path[idx].start +
1837                                         path[idx].len / 2;
1838                         }
1839                 }
1840         }
1841
1842         if (cont_path_cnt == 0) {
1843                 dev_dbg(rtsx_dev(chip), "No continuous phase path\n");
1844                 goto Search_Finish;
1845         } else {
1846                 int idx = cont_path_cnt - 1;
1847
1848                 path[idx].len = path[idx].end - path[idx].start + 1;
1849                 path[idx].mid = path[idx].start + path[idx].len / 2;
1850         }
1851
1852         if ((path[0].start == 0) &&
1853                 (path[cont_path_cnt - 1].end == MAX_PHASE)) {
1854                 path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1;
1855                 path[0].len += path[cont_path_cnt - 1].len;
1856                 path[0].mid = path[0].start + path[0].len / 2;
1857                 if (path[0].mid < 0)
1858                         path[0].mid += MAX_PHASE + 1;
1859
1860                 cont_path_cnt--;
1861         }
1862
1863         max_len = 0;
1864         final_phase = 0;
1865         final_path_idx = 0;
1866         for (i = 0; i < cont_path_cnt; i++) {
1867                 if (path[i].len > max_len) {
1868                         max_len = path[i].len;
1869                         final_phase = (u8)path[i].mid;
1870                         final_path_idx = i;
1871                 }
1872
1873                 dev_dbg(rtsx_dev(chip), "path[%d].start = %d\n",
1874                         i, path[i].start);
1875                 dev_dbg(rtsx_dev(chip), "path[%d].end = %d\n", i, path[i].end);
1876                 dev_dbg(rtsx_dev(chip), "path[%d].len = %d\n", i, path[i].len);
1877                 dev_dbg(rtsx_dev(chip), "path[%d].mid = %d\n", i, path[i].mid);
1878                 dev_dbg(rtsx_dev(chip), "\n");
1879         }
1880
1881         if (tune_dir == TUNE_TX) {
1882                 if (CHK_SD_SDR104(sd_card)) {
1883                         if (max_len > 15) {
1884                                 int temp_mid = (max_len - 16) / 2;
1885                                 int temp_final_phase =
1886                                         path[final_path_idx].end -
1887                                         (max_len - (6 + temp_mid));
1888
1889                                 if (temp_final_phase < 0)
1890                                         final_phase = (u8)(temp_final_phase +
1891                                                         MAX_PHASE + 1);
1892                                 else
1893                                         final_phase = (u8)temp_final_phase;
1894                         }
1895                 } else if (CHK_SD_SDR50(sd_card)) {
1896                         if (max_len > 12) {
1897                                 int temp_mid = (max_len - 13) / 2;
1898                                 int temp_final_phase =
1899                                         path[final_path_idx].end -
1900                                         (max_len - (3 + temp_mid));
1901
1902                                 if (temp_final_phase < 0)
1903                                         final_phase = (u8)(temp_final_phase +
1904                                                         MAX_PHASE + 1);
1905                                 else
1906                                         final_phase = (u8)temp_final_phase;
1907                         }
1908                 }
1909         }
1910
1911 Search_Finish:
1912         dev_dbg(rtsx_dev(chip), "Final chosen phase: %d\n", final_phase);
1913         return final_phase;
1914 }
1915
1916 static int sd_tuning_rx(struct rtsx_chip *chip)
1917 {
1918         struct sd_info *sd_card = &(chip->sd_card);
1919         int retval;
1920         int i, j;
1921         u32 raw_phase_map[3], phase_map;
1922         u8 final_phase;
1923         int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
1924
1925         if (CHK_SD(sd_card)) {
1926                 if (CHK_SD_DDR50(sd_card))
1927                         tuning_cmd = sd_ddr_tuning_rx_cmd;
1928                 else
1929                         tuning_cmd = sd_sdr_tuning_rx_cmd;
1930
1931         } else {
1932                 if (CHK_MMC_DDR52(sd_card))
1933                         tuning_cmd = mmc_ddr_tunning_rx_cmd;
1934                 else {
1935                         rtsx_trace(chip);
1936                         return STATUS_FAIL;
1937                 }
1938         }
1939
1940         for (i = 0; i < 3; i++) {
1941                 raw_phase_map[i] = 0;
1942                 for (j = MAX_PHASE; j >= 0; j--) {
1943                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1944                                 sd_set_err_code(chip, SD_NO_CARD);
1945                                 rtsx_trace(chip);
1946                                 return STATUS_FAIL;
1947                         }
1948
1949                         retval = tuning_cmd(chip, (u8)j);
1950                         if (retval == STATUS_SUCCESS)
1951                                 raw_phase_map[i] |= 1 << j;
1952                 }
1953         }
1954
1955         phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
1956         for (i = 0; i < 3; i++)
1957                 dev_dbg(rtsx_dev(chip), "RX raw_phase_map[%d] = 0x%08x\n",
1958                         i, raw_phase_map[i]);
1959
1960         dev_dbg(rtsx_dev(chip), "RX phase_map = 0x%08x\n", phase_map);
1961
1962         final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX);
1963         if (final_phase == 0xFF) {
1964                 rtsx_trace(chip);
1965                 return STATUS_FAIL;
1966         }
1967
1968         retval = sd_change_phase(chip, final_phase, TUNE_RX);
1969         if (retval != STATUS_SUCCESS) {
1970                 rtsx_trace(chip);
1971                 return STATUS_FAIL;
1972         }
1973
1974         return STATUS_SUCCESS;
1975 }
1976
1977 static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip)
1978 {
1979         struct sd_info *sd_card = &(chip->sd_card);
1980         int retval;
1981         int i;
1982         u32 phase_map;
1983         u8 final_phase;
1984
1985         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1986                                      SD_RSP_80CLK_TIMEOUT_EN);
1987         if (retval) {
1988                 rtsx_trace(chip);
1989                 return retval;
1990         }
1991
1992         phase_map = 0;
1993         for (i = MAX_PHASE; i >= 0; i--) {
1994                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1995                         sd_set_err_code(chip, SD_NO_CARD);
1996                         rtsx_write_register(chip, SD_CFG3,
1997                                                 SD_RSP_80CLK_TIMEOUT_EN, 0);
1998                         rtsx_trace(chip);
1999                         return STATUS_FAIL;
2000                 }
2001
2002                 retval = sd_change_phase(chip, (u8)i, TUNE_TX);
2003                 if (retval != STATUS_SUCCESS)
2004                         continue;
2005
2006                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
2007                                         sd_card->sd_addr, SD_RSP_TYPE_R1, NULL,
2008                                         0);
2009                 if ((retval == STATUS_SUCCESS) ||
2010                         !sd_check_err_code(chip, SD_RSP_TIMEOUT))
2011                         phase_map |= 1 << i;
2012         }
2013
2014         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
2015                                      0);
2016         if (retval) {
2017                 rtsx_trace(chip);
2018                 return retval;
2019         }
2020
2021         dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase_map = 0x%08x\n",
2022                 phase_map);
2023
2024         final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
2025         if (final_phase == 0xFF) {
2026                 rtsx_trace(chip);
2027                 return STATUS_FAIL;
2028         }
2029
2030         retval = sd_change_phase(chip, final_phase, TUNE_TX);
2031         if (retval != STATUS_SUCCESS) {
2032                 rtsx_trace(chip);
2033                 return STATUS_FAIL;
2034         }
2035
2036         dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase: %d\n",
2037                 (int)final_phase);
2038
2039         return STATUS_SUCCESS;
2040 }
2041
2042 static int sd_tuning_tx(struct rtsx_chip *chip)
2043 {
2044         struct sd_info *sd_card = &(chip->sd_card);
2045         int retval;
2046         int i, j;
2047         u32 raw_phase_map[3], phase_map;
2048         u8 final_phase;
2049         int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
2050
2051         if (CHK_SD(sd_card)) {
2052                 if (CHK_SD_DDR50(sd_card))
2053                         tuning_cmd = sd_ddr_tuning_tx_cmd;
2054                 else
2055                         tuning_cmd = sd_sdr_tuning_tx_cmd;
2056
2057         } else {
2058                 if (CHK_MMC_DDR52(sd_card))
2059                         tuning_cmd = sd_ddr_tuning_tx_cmd;
2060                 else {
2061                         rtsx_trace(chip);
2062                         return STATUS_FAIL;
2063                 }
2064         }
2065
2066         for (i = 0; i < 3; i++) {
2067                 raw_phase_map[i] = 0;
2068                 for (j = MAX_PHASE; j >= 0; j--) {
2069                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2070                                 sd_set_err_code(chip, SD_NO_CARD);
2071                                 rtsx_write_register(chip, SD_CFG3,
2072                                                     SD_RSP_80CLK_TIMEOUT_EN, 0);
2073                                 rtsx_trace(chip);
2074                                 return STATUS_FAIL;
2075                         }
2076
2077                         retval = tuning_cmd(chip, (u8)j);
2078                         if (retval == STATUS_SUCCESS)
2079                                 raw_phase_map[i] |= 1 << j;
2080                 }
2081         }
2082
2083         phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
2084         for (i = 0; i < 3; i++)
2085                 dev_dbg(rtsx_dev(chip), "TX raw_phase_map[%d] = 0x%08x\n",
2086                         i, raw_phase_map[i]);
2087
2088         dev_dbg(rtsx_dev(chip), "TX phase_map = 0x%08x\n", phase_map);
2089
2090         final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
2091         if (final_phase == 0xFF) {
2092                 rtsx_trace(chip);
2093                 return STATUS_FAIL;
2094         }
2095
2096         retval = sd_change_phase(chip, final_phase, TUNE_TX);
2097         if (retval != STATUS_SUCCESS) {
2098                 rtsx_trace(chip);
2099                 return STATUS_FAIL;
2100         }
2101
2102         return STATUS_SUCCESS;
2103 }
2104
2105 static int sd_sdr_tuning(struct rtsx_chip *chip)
2106 {
2107         int retval;
2108
2109         retval = sd_tuning_tx(chip);
2110         if (retval != STATUS_SUCCESS) {
2111                 rtsx_trace(chip);
2112                 return STATUS_FAIL;
2113         }
2114
2115         retval = sd_tuning_rx(chip);
2116         if (retval != STATUS_SUCCESS) {
2117                 rtsx_trace(chip);
2118                 return STATUS_FAIL;
2119         }
2120
2121         return STATUS_SUCCESS;
2122 }
2123
2124 static int sd_ddr_tuning(struct rtsx_chip *chip)
2125 {
2126         int retval;
2127
2128         if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
2129                 retval = sd_ddr_pre_tuning_tx(chip);
2130                 if (retval != STATUS_SUCCESS) {
2131                         rtsx_trace(chip);
2132                         return STATUS_FAIL;
2133                 }
2134         } else {
2135                 retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase,
2136                                         TUNE_TX);
2137                 if (retval != STATUS_SUCCESS) {
2138                         rtsx_trace(chip);
2139                         return STATUS_FAIL;
2140                 }
2141         }
2142
2143         retval = sd_tuning_rx(chip);
2144         if (retval != STATUS_SUCCESS) {
2145                 rtsx_trace(chip);
2146                 return STATUS_FAIL;
2147         }
2148
2149         if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
2150                 retval = sd_tuning_tx(chip);
2151                 if (retval != STATUS_SUCCESS) {
2152                         rtsx_trace(chip);
2153                         return STATUS_FAIL;
2154                 }
2155         }
2156
2157         return STATUS_SUCCESS;
2158 }
2159
2160 static int mmc_ddr_tuning(struct rtsx_chip *chip)
2161 {
2162         int retval;
2163
2164         if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
2165                 retval = sd_ddr_pre_tuning_tx(chip);
2166                 if (retval != STATUS_SUCCESS) {
2167                         rtsx_trace(chip);
2168                         return STATUS_FAIL;
2169                 }
2170         } else {
2171                 retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase,
2172                                         TUNE_TX);
2173                 if (retval != STATUS_SUCCESS) {
2174                         rtsx_trace(chip);
2175                         return STATUS_FAIL;
2176                 }
2177         }
2178
2179         retval = sd_tuning_rx(chip);
2180         if (retval != STATUS_SUCCESS) {
2181                 rtsx_trace(chip);
2182                 return STATUS_FAIL;
2183         }
2184
2185         if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
2186                 retval = sd_tuning_tx(chip);
2187                 if (retval != STATUS_SUCCESS) {
2188                         rtsx_trace(chip);
2189                         return STATUS_FAIL;
2190                 }
2191         }
2192
2193         return STATUS_SUCCESS;
2194 }
2195
2196 int sd_switch_clock(struct rtsx_chip *chip)
2197 {
2198         struct sd_info *sd_card = &(chip->sd_card);
2199         int retval;
2200         int re_tuning = 0;
2201
2202         retval = select_card(chip, SD_CARD);
2203         if (retval != STATUS_SUCCESS) {
2204                 rtsx_trace(chip);
2205                 return STATUS_FAIL;
2206         }
2207
2208         retval = switch_clock(chip, sd_card->sd_clock);
2209         if (retval != STATUS_SUCCESS) {
2210                 rtsx_trace(chip);
2211                 return STATUS_FAIL;
2212         }
2213
2214         if (re_tuning) {
2215                 if (CHK_SD(sd_card)) {
2216                         if (CHK_SD_DDR50(sd_card))
2217                                 retval = sd_ddr_tuning(chip);
2218                         else
2219                                 retval = sd_sdr_tuning(chip);
2220                 } else {
2221                         if (CHK_MMC_DDR52(sd_card))
2222                                 retval = mmc_ddr_tuning(chip);
2223                 }
2224
2225                 if (retval != STATUS_SUCCESS) {
2226                         rtsx_trace(chip);
2227                         return STATUS_FAIL;
2228                 }
2229         }
2230
2231         return STATUS_SUCCESS;
2232 }
2233
2234 static int sd_prepare_reset(struct rtsx_chip *chip)
2235 {
2236         struct sd_info *sd_card = &(chip->sd_card);
2237         int retval;
2238
2239         if (chip->asic_code)
2240                 sd_card->sd_clock = 29;
2241         else
2242                 sd_card->sd_clock = CLK_30;
2243
2244         sd_card->sd_type = 0;
2245         sd_card->seq_mode = 0;
2246         sd_card->sd_data_buf_ready = 0;
2247         sd_card->capacity = 0;
2248
2249 #ifdef SUPPORT_SD_LOCK
2250         sd_card->sd_lock_status = 0;
2251         sd_card->sd_erase_status = 0;
2252 #endif
2253
2254         chip->capacity[chip->card2lun[SD_CARD]] = 0;
2255         chip->sd_io = 0;
2256
2257         retval = sd_set_init_para(chip);
2258         if (retval != STATUS_SUCCESS) {
2259                 rtsx_trace(chip);
2260                 return retval;
2261         }
2262
2263         retval = rtsx_write_register(chip, REG_SD_CFG1, 0xFF, 0x40);
2264         if (retval) {
2265                 rtsx_trace(chip);
2266                 return retval;
2267         }
2268
2269         retval = rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
2270                                      SD_STOP | SD_CLR_ERR);
2271         if (retval) {
2272                 rtsx_trace(chip);
2273                 return retval;
2274         }
2275
2276         retval = select_card(chip, SD_CARD);
2277         if (retval != STATUS_SUCCESS) {
2278                 rtsx_trace(chip);
2279                 return STATUS_FAIL;
2280         }
2281
2282         return STATUS_SUCCESS;
2283 }
2284
2285 static int sd_pull_ctl_disable(struct rtsx_chip *chip)
2286 {
2287         int retval;
2288
2289         if (CHECK_PID(chip, 0x5208)) {
2290                 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
2291                                              XD_D3_PD | SD_D7_PD | SD_CLK_PD | SD_D5_PD);
2292                 if (retval) {
2293                         rtsx_trace(chip);
2294                         return retval;
2295                 }
2296                 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
2297                                              SD_D6_PD | SD_D0_PD | SD_D1_PD | XD_D5_PD);
2298                 if (retval) {
2299                         rtsx_trace(chip);
2300                         return retval;
2301                 }
2302                 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
2303                                              SD_D4_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
2304                 if (retval) {
2305                         rtsx_trace(chip);
2306                         return retval;
2307                 }
2308                 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
2309                                              XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
2310                 if (retval) {
2311                         rtsx_trace(chip);
2312                         return retval;
2313                 }
2314                 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
2315                                              MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
2316                 if (retval) {
2317                         rtsx_trace(chip);
2318                         return retval;
2319                 }
2320                 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
2321                                              MS_D5_PD | MS_D4_PD);
2322                 if (retval) {
2323                         rtsx_trace(chip);
2324                         return retval;
2325                 }
2326         } else if (CHECK_PID(chip, 0x5288)) {
2327                 if (CHECK_BARO_PKG(chip, QFN)) {
2328                         retval = rtsx_write_register(chip, CARD_PULL_CTL1,
2329                                                      0xFF, 0x55);
2330                         if (retval) {
2331                                 rtsx_trace(chip);
2332                                 return retval;
2333                         }
2334                         retval = rtsx_write_register(chip, CARD_PULL_CTL2,
2335                                                      0xFF, 0x55);
2336                         if (retval) {
2337                                 rtsx_trace(chip);
2338                                 return retval;
2339                         }
2340                         retval = rtsx_write_register(chip, CARD_PULL_CTL3,
2341                                                      0xFF, 0x4B);
2342                         if (retval) {
2343                                 rtsx_trace(chip);
2344                                 return retval;
2345                         }
2346                         retval = rtsx_write_register(chip, CARD_PULL_CTL4,
2347                                                      0xFF, 0x69);
2348                         if (retval) {
2349                                 rtsx_trace(chip);
2350                                 return retval;
2351                         }
2352                 }
2353         }
2354
2355         return STATUS_SUCCESS;
2356 }
2357
2358 int sd_pull_ctl_enable(struct rtsx_chip *chip)
2359 {
2360         int retval;
2361
2362         rtsx_init_cmd(chip);
2363
2364         if (CHECK_PID(chip, 0x5208)) {
2365                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
2366                         XD_D3_PD | SD_DAT7_PU | SD_CLK_NP | SD_D5_PU);
2367                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
2368                         SD_D6_PU | SD_D0_PU | SD_D1_PU | XD_D5_PD);
2369                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
2370                         SD_D4_PU | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
2371                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
2372                         XD_RDY_PD | SD_D3_PU | SD_D2_PU | XD_ALE_PD);
2373                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
2374                         MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU);
2375                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
2376                         MS_D5_PD | MS_D4_PD);
2377         } else if (CHECK_PID(chip, 0x5288)) {
2378                 if (CHECK_BARO_PKG(chip, QFN)) {
2379                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
2380                                 0xA8);
2381                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
2382                                 0x5A);
2383                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
2384                                 0x95);
2385                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
2386                                 0xAA);
2387                 }
2388         }
2389
2390         retval = rtsx_send_cmd(chip, SD_CARD, 100);
2391         if (retval < 0) {
2392                 rtsx_trace(chip);
2393                 return STATUS_FAIL;
2394         }
2395
2396         return STATUS_SUCCESS;
2397 }
2398
2399 static int sd_init_power(struct rtsx_chip *chip)
2400 {
2401         int retval;
2402
2403         retval = sd_power_off_card3v3(chip);
2404         if (retval != STATUS_SUCCESS) {
2405                 rtsx_trace(chip);
2406                 return STATUS_FAIL;
2407         }
2408
2409         if (!chip->ft2_fast_mode)
2410                 wait_timeout(250);
2411
2412         retval = enable_card_clock(chip, SD_CARD);
2413         if (retval != STATUS_SUCCESS) {
2414                 rtsx_trace(chip);
2415                 return STATUS_FAIL;
2416         }
2417
2418         if (chip->asic_code) {
2419                 retval = sd_pull_ctl_enable(chip);
2420                 if (retval != STATUS_SUCCESS) {
2421                         rtsx_trace(chip);
2422                         return STATUS_FAIL;
2423                 }
2424         } else {
2425                 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
2426                                              FPGA_SD_PULL_CTL_BIT | 0x20, 0);
2427                 if (retval) {
2428                         rtsx_trace(chip);
2429                         return retval;
2430                 }
2431         }
2432
2433         if (!chip->ft2_fast_mode) {
2434                 retval = card_power_on(chip, SD_CARD);
2435                 if (retval != STATUS_SUCCESS) {
2436                         rtsx_trace(chip);
2437                         return STATUS_FAIL;
2438                 }
2439
2440                 wait_timeout(260);
2441
2442 #ifdef SUPPORT_OCP
2443                 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
2444                         dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
2445                                 chip->ocp_stat);
2446                         rtsx_trace(chip);
2447                         return STATUS_FAIL;
2448                 }
2449 #endif
2450         }
2451
2452         retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN,
2453                                      SD_OUTPUT_EN);
2454         if (retval) {
2455                 rtsx_trace(chip);
2456                 return retval;
2457         }
2458
2459         return STATUS_SUCCESS;
2460 }
2461
2462 static int sd_dummy_clock(struct rtsx_chip *chip)
2463 {
2464         int retval;
2465
2466         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0x01);
2467         if (retval) {
2468                 rtsx_trace(chip);
2469                 return retval;
2470         }
2471         wait_timeout(5);
2472         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0);
2473         if (retval) {
2474                 rtsx_trace(chip);
2475                 return retval;
2476         }
2477
2478         return STATUS_SUCCESS;
2479 }
2480
2481 static int sd_read_lba0(struct rtsx_chip *chip)
2482 {
2483         struct sd_info *sd_card = &(chip->sd_card);
2484         int retval;
2485         u8 cmd[5], bus_width;
2486
2487         cmd[0] = 0x40 | READ_SINGLE_BLOCK;
2488         cmd[1] = 0;
2489         cmd[2] = 0;
2490         cmd[3] = 0;
2491         cmd[4] = 0;
2492
2493         if (CHK_SD(sd_card)) {
2494                 bus_width = SD_BUS_WIDTH_4;
2495         } else {
2496                 if (CHK_MMC_8BIT(sd_card))
2497                         bus_width = SD_BUS_WIDTH_8;
2498                 else if (CHK_MMC_4BIT(sd_card))
2499                         bus_width = SD_BUS_WIDTH_4;
2500                 else
2501                         bus_width = SD_BUS_WIDTH_1;
2502         }
2503
2504         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd,
2505                 5, 512, 1, bus_width, NULL, 0, 100);
2506         if (retval != STATUS_SUCCESS) {
2507                 rtsx_clear_sd_error(chip);
2508                 rtsx_trace(chip);
2509                 return STATUS_FAIL;
2510         }
2511
2512         return STATUS_SUCCESS;
2513 }
2514
2515 static int sd_check_wp_state(struct rtsx_chip *chip)
2516 {
2517         struct sd_info *sd_card = &(chip->sd_card);
2518         int retval;
2519         u32 val;
2520         u16 sd_card_type;
2521         u8 cmd[5], buf[64];
2522
2523         retval = sd_send_cmd_get_rsp(chip, APP_CMD,
2524                         sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
2525         if (retval != STATUS_SUCCESS) {
2526                 rtsx_trace(chip);
2527                 return STATUS_FAIL;
2528         }
2529
2530         cmd[0] = 0x40 | SD_STATUS;
2531         cmd[1] = 0;
2532         cmd[2] = 0;
2533         cmd[3] = 0;
2534         cmd[4] = 0;
2535
2536         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1,
2537                         SD_BUS_WIDTH_4, buf, 64, 250);
2538         if (retval != STATUS_SUCCESS) {
2539                 rtsx_clear_sd_error(chip);
2540
2541                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2542                                 SD_RSP_TYPE_R1, NULL, 0);
2543                 rtsx_trace(chip);
2544                 return STATUS_FAIL;
2545         }
2546
2547         dev_dbg(rtsx_dev(chip), "ACMD13:\n");
2548         dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf);
2549
2550         sd_card_type = ((u16)buf[2] << 8) | buf[3];
2551         dev_dbg(rtsx_dev(chip), "sd_card_type = 0x%04x\n", sd_card_type);
2552         if ((sd_card_type == 0x0001) || (sd_card_type == 0x0002)) {
2553                 /* ROM card or OTP */
2554                 chip->card_wp |= SD_CARD;
2555         }
2556
2557         /* Check SD Machanical Write-Protect Switch */
2558         val = rtsx_readl(chip, RTSX_BIPR);
2559         if (val & SD_WRITE_PROTECT)
2560                 chip->card_wp |= SD_CARD;
2561
2562         return STATUS_SUCCESS;
2563 }
2564
2565 static int reset_sd(struct rtsx_chip *chip)
2566 {
2567         struct sd_info *sd_card = &(chip->sd_card);
2568         bool hi_cap_flow = false;
2569         int retval, i = 0, j = 0, k = 0;
2570         bool sd_dont_switch = false;
2571         bool support_1v8 = false;
2572         bool try_sdio = true;
2573         u8 rsp[16];
2574         u8 switch_bus_width;
2575         u32 voltage = 0;
2576         bool sd20_mode = false;
2577
2578         SET_SD(sd_card);
2579
2580 Switch_Fail:
2581
2582         i = 0;
2583         j = 0;
2584         k = 0;
2585         hi_cap_flow = false;
2586
2587 #ifdef SUPPORT_SD_LOCK
2588         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
2589                 goto SD_UNLOCK_ENTRY;
2590 #endif
2591
2592         retval = sd_prepare_reset(chip);
2593         if (retval != STATUS_SUCCESS) {
2594                 rtsx_trace(chip);
2595                 return STATUS_FAIL;
2596         }
2597
2598         retval = sd_dummy_clock(chip);
2599         if (retval != STATUS_SUCCESS) {
2600                 rtsx_trace(chip);
2601                 return STATUS_FAIL;
2602         }
2603
2604         if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && try_sdio) {
2605                 int rty_cnt = 0;
2606
2607                 for (; rty_cnt < chip->sdio_retry_cnt; rty_cnt++) {
2608                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2609                                 sd_set_err_code(chip, SD_NO_CARD);
2610                                 rtsx_trace(chip);
2611                                 return STATUS_FAIL;
2612                         }
2613
2614                         retval = sd_send_cmd_get_rsp(chip, IO_SEND_OP_COND, 0,
2615                                                 SD_RSP_TYPE_R4, rsp, 5);
2616                         if (retval == STATUS_SUCCESS) {
2617                                 int func_num = (rsp[1] >> 4) & 0x07;
2618
2619                                 if (func_num) {
2620                                         dev_dbg(rtsx_dev(chip), "SD_IO card (Function number: %d)!\n",
2621                                                 func_num);
2622                                         chip->sd_io = 1;
2623                                         rtsx_trace(chip);
2624                                         return STATUS_FAIL;
2625                                 }
2626
2627                                 break;
2628                         }
2629
2630                         sd_init_power(chip);
2631
2632                         sd_dummy_clock(chip);
2633                 }
2634
2635                 dev_dbg(rtsx_dev(chip), "Normal card!\n");
2636         }
2637
2638         /* Start Initialization Process of SD Card */
2639 RTY_SD_RST:
2640         retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
2641                                 NULL, 0);
2642         if (retval != STATUS_SUCCESS) {
2643                 rtsx_trace(chip);
2644                 return STATUS_FAIL;
2645         }
2646
2647         wait_timeout(20);
2648
2649         retval = sd_send_cmd_get_rsp(chip, SEND_IF_COND, 0x000001AA,
2650                                 SD_RSP_TYPE_R7, rsp, 5);
2651         if (retval == STATUS_SUCCESS) {
2652                 if ((rsp[4] == 0xAA) && ((rsp[3] & 0x0f) == 0x01)) {
2653                         hi_cap_flow = true;
2654                         voltage = SUPPORT_VOLTAGE | 0x40000000;
2655                 }
2656         }
2657
2658         if (!hi_cap_flow) {
2659                 voltage = SUPPORT_VOLTAGE;
2660
2661                 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0,
2662                                         SD_RSP_TYPE_R0, NULL, 0);
2663                 if (retval != STATUS_SUCCESS) {
2664                         rtsx_trace(chip);
2665                         return STATUS_FAIL;
2666                 }
2667
2668                 wait_timeout(20);
2669         }
2670
2671         do {
2672                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, 0, SD_RSP_TYPE_R1,
2673                                         NULL, 0);
2674                 if (retval != STATUS_SUCCESS) {
2675                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2676                                 sd_set_err_code(chip, SD_NO_CARD);
2677                                 rtsx_trace(chip);
2678                                 return STATUS_FAIL;
2679                         }
2680
2681                         j++;
2682                         if (j < 3)
2683                                 goto RTY_SD_RST;
2684                         else {
2685                                 rtsx_trace(chip);
2686                                 return STATUS_FAIL;
2687                         }
2688                 }
2689
2690                 retval = sd_send_cmd_get_rsp(chip, SD_APP_OP_COND, voltage,
2691                                         SD_RSP_TYPE_R3, rsp, 5);
2692                 if (retval != STATUS_SUCCESS) {
2693                         k++;
2694                         if (k < 3)
2695                                 goto RTY_SD_RST;
2696                         else {
2697                                 rtsx_trace(chip);
2698                                 return STATUS_FAIL;
2699                         }
2700                 }
2701
2702                 i++;
2703                 wait_timeout(20);
2704         } while (!(rsp[1] & 0x80) && (i < 255));
2705
2706         if (i == 255) {
2707                 rtsx_trace(chip);
2708                 return STATUS_FAIL;
2709         }
2710
2711         if (hi_cap_flow) {
2712                 if (rsp[1] & 0x40)
2713                         SET_SD_HCXC(sd_card);
2714                 else
2715                         CLR_SD_HCXC(sd_card);
2716
2717                 support_1v8 = false;
2718         } else {
2719                 CLR_SD_HCXC(sd_card);
2720                 support_1v8 = false;
2721         }
2722         dev_dbg(rtsx_dev(chip), "support_1v8 = %d\n", support_1v8);
2723
2724         if (support_1v8) {
2725                 retval = sd_voltage_switch(chip);
2726                 if (retval != STATUS_SUCCESS) {
2727                         rtsx_trace(chip);
2728                         return STATUS_FAIL;
2729                 }
2730         }
2731
2732         retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
2733                                 NULL, 0);
2734         if (retval != STATUS_SUCCESS) {
2735                 rtsx_trace(chip);
2736                 return STATUS_FAIL;
2737         }
2738
2739         for (i = 0; i < 3; i++) {
2740                 retval = sd_send_cmd_get_rsp(chip, SEND_RELATIVE_ADDR, 0,
2741                                         SD_RSP_TYPE_R6, rsp, 5);
2742                 if (retval != STATUS_SUCCESS) {
2743                         rtsx_trace(chip);
2744                         return STATUS_FAIL;
2745                 }
2746
2747                 sd_card->sd_addr = (u32)rsp[1] << 24;
2748                 sd_card->sd_addr += (u32)rsp[2] << 16;
2749
2750                 if (sd_card->sd_addr)
2751                         break;
2752         }
2753
2754         retval = sd_check_csd(chip, 1);
2755         if (retval != STATUS_SUCCESS) {
2756                 rtsx_trace(chip);
2757                 return STATUS_FAIL;
2758         }
2759
2760         retval = sd_select_card(chip, 1);
2761         if (retval != STATUS_SUCCESS) {
2762                 rtsx_trace(chip);
2763                 return STATUS_FAIL;
2764         }
2765
2766 #ifdef SUPPORT_SD_LOCK
2767 SD_UNLOCK_ENTRY:
2768         retval = sd_update_lock_status(chip);
2769         if (retval != STATUS_SUCCESS) {
2770                 rtsx_trace(chip);
2771                 return STATUS_FAIL;
2772         }
2773
2774         if (sd_card->sd_lock_status & SD_LOCKED) {
2775                 sd_card->sd_lock_status |= (SD_LOCK_1BIT_MODE | SD_PWD_EXIST);
2776                 return STATUS_SUCCESS;
2777         } else if (!(sd_card->sd_lock_status & SD_UNLOCK_POW_ON)) {
2778                 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
2779         }
2780 #endif
2781
2782         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2783                                 SD_RSP_TYPE_R1, NULL, 0);
2784         if (retval != STATUS_SUCCESS) {
2785                 rtsx_trace(chip);
2786                 return STATUS_FAIL;
2787         }
2788
2789         retval = sd_send_cmd_get_rsp(chip, SET_CLR_CARD_DETECT, 0,
2790                                 SD_RSP_TYPE_R1, NULL, 0);
2791         if (retval != STATUS_SUCCESS) {
2792                 rtsx_trace(chip);
2793                 return STATUS_FAIL;
2794         }
2795
2796         if (support_1v8) {
2797                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2798                                         SD_RSP_TYPE_R1, NULL, 0);
2799                 if (retval != STATUS_SUCCESS) {
2800                         rtsx_trace(chip);
2801                         return STATUS_FAIL;
2802                 }
2803
2804                 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
2805                                         SD_RSP_TYPE_R1, NULL, 0);
2806                 if (retval != STATUS_SUCCESS) {
2807                         rtsx_trace(chip);
2808                         return STATUS_FAIL;
2809                 }
2810
2811                 switch_bus_width = SD_BUS_WIDTH_4;
2812         } else {
2813                 switch_bus_width = SD_BUS_WIDTH_1;
2814         }
2815
2816         retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
2817                                 NULL, 0);
2818         if (retval != STATUS_SUCCESS) {
2819                 rtsx_trace(chip);
2820                 return STATUS_FAIL;
2821         }
2822
2823         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
2824         if (retval != STATUS_SUCCESS) {
2825                 rtsx_trace(chip);
2826                 return STATUS_FAIL;
2827         }
2828
2829         if (!(sd_card->raw_csd[4] & 0x40))
2830                 sd_dont_switch = true;
2831
2832         if (!sd_dont_switch) {
2833                 if (sd20_mode) {
2834                         /* Set sd_switch_fail here, because we needn't
2835                          * switch to UHS mode
2836                          */
2837                         sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
2838                                 DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
2839                 }
2840
2841                 /* Check the card whether follow SD1.1 spec or higher */
2842                 retval = sd_check_spec(chip, switch_bus_width);
2843                 if (retval == STATUS_SUCCESS) {
2844                         retval = sd_switch_function(chip, switch_bus_width);
2845                         if (retval != STATUS_SUCCESS) {
2846                                 sd_init_power(chip);
2847                                 sd_dont_switch = true;
2848                                 try_sdio = false;
2849
2850                                 goto Switch_Fail;
2851                         }
2852                 } else {
2853                         if (support_1v8) {
2854                                 sd_init_power(chip);
2855                                 sd_dont_switch = true;
2856                                 try_sdio = false;
2857
2858                                 goto Switch_Fail;
2859                         }
2860                 }
2861         }
2862
2863         if (!support_1v8) {
2864                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2865                                         SD_RSP_TYPE_R1, NULL, 0);
2866                 if (retval != STATUS_SUCCESS) {
2867                         rtsx_trace(chip);
2868                         return STATUS_FAIL;
2869                 }
2870
2871                 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
2872                                         SD_RSP_TYPE_R1, NULL, 0);
2873                 if (retval != STATUS_SUCCESS) {
2874                         rtsx_trace(chip);
2875                         return STATUS_FAIL;
2876                 }
2877         }
2878
2879 #ifdef SUPPORT_SD_LOCK
2880         sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
2881 #endif
2882
2883         if (!sd20_mode && CHK_SD30_SPEED(sd_card)) {
2884                 int read_lba0 = 1;
2885
2886                 retval = rtsx_write_register(chip, SD30_DRIVE_SEL, 0x07,
2887                                              chip->sd30_drive_sel_1v8);
2888                 if (retval) {
2889                         rtsx_trace(chip);
2890                         return retval;
2891                 }
2892
2893                 retval = sd_set_init_para(chip);
2894                 if (retval != STATUS_SUCCESS) {
2895                         rtsx_trace(chip);
2896                         return STATUS_FAIL;
2897                 }
2898
2899                 if (CHK_SD_DDR50(sd_card))
2900                         retval = sd_ddr_tuning(chip);
2901                 else
2902                         retval = sd_sdr_tuning(chip);
2903
2904                 if (retval != STATUS_SUCCESS) {
2905                         if (sd20_mode) {
2906                                 rtsx_trace(chip);
2907                                 return STATUS_FAIL;
2908                         } else {
2909                                 retval = sd_init_power(chip);
2910                                 if (retval != STATUS_SUCCESS) {
2911                                         rtsx_trace(chip);
2912                                         return STATUS_FAIL;
2913                                 }
2914
2915                                 try_sdio = false;
2916                                 sd20_mode = true;
2917                                 goto Switch_Fail;
2918                         }
2919                 }
2920
2921                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2922                                 SD_RSP_TYPE_R1, NULL, 0);
2923
2924                 if (CHK_SD_DDR50(sd_card)) {
2925                         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
2926                         if (retval != STATUS_SUCCESS)
2927                                 read_lba0 = 0;
2928                 }
2929
2930                 if (read_lba0) {
2931                         retval = sd_read_lba0(chip);
2932                         if (retval != STATUS_SUCCESS) {
2933                                 if (sd20_mode) {
2934                                         rtsx_trace(chip);
2935                                         return STATUS_FAIL;
2936                                 } else {
2937                                         retval = sd_init_power(chip);
2938                                         if (retval != STATUS_SUCCESS) {
2939                                                 rtsx_trace(chip);
2940                                                 return STATUS_FAIL;
2941                                         }
2942
2943                                         try_sdio = false;
2944                                         sd20_mode = true;
2945                                         goto Switch_Fail;
2946                                 }
2947                         }
2948                 }
2949         }
2950
2951         retval = sd_check_wp_state(chip);
2952         if (retval != STATUS_SUCCESS) {
2953                 rtsx_trace(chip);
2954                 return STATUS_FAIL;
2955         }
2956
2957         chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
2958
2959 #ifdef SUPPORT_SD_LOCK
2960         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
2961                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
2962                                              0x02);
2963                 if (retval) {
2964                         rtsx_trace(chip);
2965                         return retval;
2966                 }
2967                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
2968                                              0x00);
2969                 if (retval) {
2970                         rtsx_trace(chip);
2971                         return retval;
2972                 }
2973         }
2974 #endif
2975
2976         return STATUS_SUCCESS;
2977 }
2978
2979
2980 static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
2981 {
2982         struct sd_info *sd_card = &(chip->sd_card);
2983         int retval;
2984         u8 buf[8] = {0}, bus_width, *ptr;
2985         u16 byte_cnt;
2986         int len;
2987
2988         retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL,
2989                                 0);
2990         if (retval != STATUS_SUCCESS) {
2991                 rtsx_trace(chip);
2992                 return SWITCH_FAIL;
2993         }
2994
2995         if (width == MMC_8BIT_BUS) {
2996                 buf[0] = 0x55;
2997                 buf[1] = 0xAA;
2998                 len = 8;
2999                 byte_cnt = 8;
3000                 bus_width = SD_BUS_WIDTH_8;
3001         } else {
3002                 buf[0] = 0x5A;
3003                 len = 4;
3004                 byte_cnt = 4;
3005                 bus_width = SD_BUS_WIDTH_4;
3006         }
3007
3008         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02);
3009         if (retval != STATUS_SUCCESS) {
3010                 rtsx_trace(chip);
3011                 return SWITCH_ERR;
3012         }
3013
3014         retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3,
3015                         NULL, 0, byte_cnt, 1, bus_width, buf, len, 100);
3016         if (retval != STATUS_SUCCESS) {
3017                 rtsx_clear_sd_error(chip);
3018                 rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
3019                 rtsx_trace(chip);
3020                 return SWITCH_ERR;
3021         }
3022
3023         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
3024         if (retval != STATUS_SUCCESS) {
3025                 rtsx_trace(chip);
3026                 return SWITCH_ERR;
3027         }
3028
3029         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", BUSTEST_R);
3030
3031         rtsx_init_cmd(chip);
3032
3033         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | BUSTEST_R);
3034
3035         if (width == MMC_8BIT_BUS)
3036                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L,
3037                         0xFF, 0x08);
3038         else
3039                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L,
3040                         0xFF, 0x04);
3041
3042         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
3043         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
3044
3045         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3046                 SD_CALCULATE_CRC7 | SD_NO_CHECK_CRC16 | SD_NO_WAIT_BUSY_END|
3047                 SD_CHECK_CRC7 | SD_RSP_LEN_6);
3048         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
3049                 PINGPONG_BUFFER);
3050         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3051                 SD_TM_NORMAL_READ | SD_TRANSFER_START);
3052         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
3053                 SD_TRANSFER_END);
3054
3055         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0);
3056         if (width == MMC_8BIT_BUS)
3057                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0);
3058
3059         retval = rtsx_send_cmd(chip, SD_CARD, 100);
3060         if (retval < 0) {
3061                 rtsx_clear_sd_error(chip);
3062                 rtsx_trace(chip);
3063                 return SWITCH_ERR;
3064         }
3065
3066         ptr = rtsx_get_cmd_data(chip) + 1;
3067
3068         if (width == MMC_8BIT_BUS) {
3069                 dev_dbg(rtsx_dev(chip), "BUSTEST_R [8bits]: 0x%02x 0x%02x\n",
3070                         ptr[0], ptr[1]);
3071                 if ((ptr[0] == 0xAA) && (ptr[1] == 0x55)) {
3072                         u8 rsp[5];
3073                         u32 arg;
3074
3075                         if (CHK_MMC_DDR52(sd_card))
3076                                 arg = 0x03B70600;
3077                         else
3078                                 arg = 0x03B70200;
3079
3080                         retval = sd_send_cmd_get_rsp(chip, SWITCH, arg,
3081                                                 SD_RSP_TYPE_R1b, rsp, 5);
3082                         if ((retval == STATUS_SUCCESS) &&
3083                                 !(rsp[4] & MMC_SWITCH_ERR))
3084                                 return SWITCH_SUCCESS;
3085                 }
3086         } else {
3087                 dev_dbg(rtsx_dev(chip), "BUSTEST_R [4bits]: 0x%02x\n", ptr[0]);
3088                 if (ptr[0] == 0xA5) {
3089                         u8 rsp[5];
3090                         u32 arg;
3091
3092                         if (CHK_MMC_DDR52(sd_card))
3093                                 arg = 0x03B70500;
3094                         else
3095                                 arg = 0x03B70100;
3096
3097                         retval = sd_send_cmd_get_rsp(chip, SWITCH, arg,
3098                                                 SD_RSP_TYPE_R1b, rsp, 5);
3099                         if ((retval == STATUS_SUCCESS) &&
3100                                 !(rsp[4] & MMC_SWITCH_ERR))
3101                                 return SWITCH_SUCCESS;
3102                 }
3103         }
3104
3105         rtsx_trace(chip);
3106         return SWITCH_FAIL;
3107 }
3108
3109
3110 static int mmc_switch_timing_bus(struct rtsx_chip *chip, bool switch_ddr)
3111 {
3112         struct sd_info *sd_card = &(chip->sd_card);
3113         int retval;
3114         u8 *ptr, card_type, card_type_mask = 0;
3115
3116         CLR_MMC_HS(sd_card);
3117
3118         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", SEND_EXT_CSD);
3119
3120         rtsx_init_cmd(chip);
3121
3122         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
3123                 0x40 | SEND_EXT_CSD);
3124         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, 0);
3125         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, 0);
3126         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, 0);
3127         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, 0);
3128
3129         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0);
3130         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 2);
3131         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
3132         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
3133
3134         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3135                 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END|
3136                 SD_CHECK_CRC7 | SD_RSP_LEN_6);
3137         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
3138                 PINGPONG_BUFFER);
3139         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3140                 SD_TM_NORMAL_READ | SD_TRANSFER_START);
3141         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
3142                 SD_TRANSFER_END);
3143
3144         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 196, 0xFF, 0);
3145         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 212, 0xFF, 0);
3146         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 213, 0xFF, 0);
3147         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 214, 0xFF, 0);
3148         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 215, 0xFF, 0);
3149
3150         retval = rtsx_send_cmd(chip, SD_CARD, 1000);
3151         if (retval < 0) {
3152                 if (retval == -ETIMEDOUT) {
3153                         rtsx_clear_sd_error(chip);
3154                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3155                                         SD_RSP_TYPE_R1, NULL, 0);
3156                 }
3157                 rtsx_trace(chip);
3158                 return STATUS_FAIL;
3159         }
3160
3161         ptr = rtsx_get_cmd_data(chip);
3162         if (ptr[0] & SD_TRANSFER_ERR) {
3163                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3164                                 SD_RSP_TYPE_R1, NULL, 0);
3165                 rtsx_trace(chip);
3166                 return STATUS_FAIL;
3167         }
3168
3169         if (CHK_MMC_SECTOR_MODE(sd_card)) {
3170                 sd_card->capacity = ((u32)ptr[5] << 24) | ((u32)ptr[4] << 16) |
3171                         ((u32)ptr[3] << 8) | ((u32)ptr[2]);
3172         }
3173
3174         card_type_mask = 0x03;
3175         card_type = ptr[1] & card_type_mask;
3176         if (card_type) {
3177                 u8 rsp[5];
3178
3179                 if (card_type & 0x04) {
3180                         if (switch_ddr)
3181                                 SET_MMC_DDR52(sd_card);
3182                         else
3183                                 SET_MMC_52M(sd_card);
3184                 } else if (card_type & 0x02) {
3185                         SET_MMC_52M(sd_card);
3186                 } else {
3187                         SET_MMC_26M(sd_card);
3188                 }
3189
3190                 retval = sd_send_cmd_get_rsp(chip, SWITCH,
3191                                 0x03B90100, SD_RSP_TYPE_R1b, rsp, 5);
3192                 if ((retval != STATUS_SUCCESS) || (rsp[4] & MMC_SWITCH_ERR))
3193                         CLR_MMC_HS(sd_card);
3194         }
3195
3196         sd_choose_proper_clock(chip);
3197         retval = switch_clock(chip, sd_card->sd_clock);
3198         if (retval != STATUS_SUCCESS) {
3199                 rtsx_trace(chip);
3200                 return STATUS_FAIL;
3201         }
3202
3203         /* Test Bus Procedure */
3204         retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS);
3205         if (retval == SWITCH_SUCCESS) {
3206                 SET_MMC_8BIT(sd_card);
3207                 chip->card_bus_width[chip->card2lun[SD_CARD]] = 8;
3208 #ifdef SUPPORT_SD_LOCK
3209                 sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
3210 #endif
3211         } else if (retval == SWITCH_FAIL) {
3212                 retval = mmc_test_switch_bus(chip, MMC_4BIT_BUS);
3213                 if (retval == SWITCH_SUCCESS) {
3214                         SET_MMC_4BIT(sd_card);
3215                         chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
3216 #ifdef SUPPORT_SD_LOCK
3217                         sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
3218 #endif
3219                 } else if (retval == SWITCH_FAIL) {
3220                         CLR_MMC_8BIT(sd_card);
3221                         CLR_MMC_4BIT(sd_card);
3222                 } else {
3223                         rtsx_trace(chip);
3224                         return STATUS_FAIL;
3225                 }
3226         } else {
3227                 rtsx_trace(chip);
3228                 return STATUS_FAIL;
3229         }
3230
3231         return STATUS_SUCCESS;
3232 }
3233
3234
3235 static int reset_mmc(struct rtsx_chip *chip)
3236 {
3237         struct sd_info *sd_card = &(chip->sd_card);
3238         int retval, i = 0, j = 0, k = 0;
3239         bool switch_ddr = true;
3240         u8 rsp[16];
3241         u8 spec_ver = 0;
3242         u32 temp;
3243
3244 #ifdef SUPPORT_SD_LOCK
3245         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
3246                 goto MMC_UNLOCK_ENTRY;
3247 #endif
3248
3249 Switch_Fail:
3250         retval = sd_prepare_reset(chip);
3251         if (retval != STATUS_SUCCESS) {
3252                 rtsx_trace(chip);
3253                 return retval;
3254         }
3255
3256         SET_MMC(sd_card);
3257
3258 RTY_MMC_RST:
3259         retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
3260                                 NULL, 0);
3261         if (retval != STATUS_SUCCESS) {
3262                 rtsx_trace(chip);
3263                 return STATUS_FAIL;
3264         }
3265
3266         do {
3267                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3268                         sd_set_err_code(chip, SD_NO_CARD);
3269                         rtsx_trace(chip);
3270                         return STATUS_FAIL;
3271                 }
3272
3273                 retval = sd_send_cmd_get_rsp(chip, SEND_OP_COND,
3274                                         (SUPPORT_VOLTAGE | 0x40000000),
3275                                         SD_RSP_TYPE_R3, rsp, 5);
3276                 if (retval != STATUS_SUCCESS) {
3277                         if (sd_check_err_code(chip, SD_BUSY) ||
3278                                 sd_check_err_code(chip, SD_TO_ERR)) {
3279                                 k++;
3280                                 if (k < 20) {
3281                                         sd_clr_err_code(chip);
3282                                         goto RTY_MMC_RST;
3283                                 } else {
3284                                         rtsx_trace(chip);
3285                                         return STATUS_FAIL;
3286                                 }
3287                         } else {
3288                                 j++;
3289                                 if (j < 100) {
3290                                         sd_clr_err_code(chip);
3291                                         goto RTY_MMC_RST;
3292                                 } else {
3293                                         rtsx_trace(chip);
3294                                         return STATUS_FAIL;
3295                                 }
3296                         }
3297                 }
3298
3299                 wait_timeout(20);
3300                 i++;
3301         } while (!(rsp[1] & 0x80) && (i < 255));
3302
3303         if (i == 255) {
3304                 rtsx_trace(chip);
3305                 return STATUS_FAIL;
3306         }
3307
3308         if ((rsp[1] & 0x60) == 0x40)
3309                 SET_MMC_SECTOR_MODE(sd_card);
3310         else
3311                 CLR_MMC_SECTOR_MODE(sd_card);
3312
3313         retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
3314                                 NULL, 0);
3315         if (retval != STATUS_SUCCESS) {
3316                 rtsx_trace(chip);
3317                 return STATUS_FAIL;
3318         }
3319
3320         sd_card->sd_addr = 0x00100000;
3321         retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr,
3322                                 SD_RSP_TYPE_R6, rsp, 5);
3323         if (retval != STATUS_SUCCESS) {
3324                 rtsx_trace(chip);
3325                 return STATUS_FAIL;
3326         }
3327
3328         retval = sd_check_csd(chip, 1);
3329         if (retval != STATUS_SUCCESS) {
3330                 rtsx_trace(chip);
3331                 return STATUS_FAIL;
3332         }
3333
3334         spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2;
3335
3336         retval = sd_select_card(chip, 1);
3337         if (retval != STATUS_SUCCESS) {
3338                 rtsx_trace(chip);
3339                 return STATUS_FAIL;
3340         }
3341
3342         retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
3343                                 NULL, 0);
3344         if (retval != STATUS_SUCCESS) {
3345                 rtsx_trace(chip);
3346                 return STATUS_FAIL;
3347         }
3348
3349 #ifdef SUPPORT_SD_LOCK
3350 MMC_UNLOCK_ENTRY:
3351         retval = sd_update_lock_status(chip);
3352         if (retval != STATUS_SUCCESS) {
3353                 rtsx_trace(chip);
3354                 return STATUS_FAIL;
3355         }
3356 #endif
3357
3358         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3359         if (retval != STATUS_SUCCESS) {
3360                 rtsx_trace(chip);
3361                 return STATUS_FAIL;
3362         }
3363
3364         chip->card_bus_width[chip->card2lun[SD_CARD]] = 1;
3365
3366         if (!sd_card->mmc_dont_switch_bus) {
3367                 if (spec_ver == 4) {
3368                         /* MMC 4.x Cards */
3369                         retval = mmc_switch_timing_bus(chip, switch_ddr);
3370                         if (retval != STATUS_SUCCESS) {
3371                                 retval = sd_init_power(chip);
3372                                 if (retval != STATUS_SUCCESS) {
3373                                         rtsx_trace(chip);
3374                                         return STATUS_FAIL;
3375                                 }
3376                                 sd_card->mmc_dont_switch_bus = 1;
3377                                 rtsx_trace(chip);
3378                                 goto Switch_Fail;
3379                         }
3380                 }
3381
3382                 if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) {
3383                         rtsx_trace(chip);
3384                         return STATUS_FAIL;
3385                 }
3386
3387                 if (switch_ddr && CHK_MMC_DDR52(sd_card)) {
3388                         retval = sd_set_init_para(chip);
3389                         if (retval != STATUS_SUCCESS) {
3390                                 rtsx_trace(chip);
3391                                 return STATUS_FAIL;
3392                         }
3393
3394                         retval = mmc_ddr_tuning(chip);
3395                         if (retval != STATUS_SUCCESS) {
3396                                 retval = sd_init_power(chip);
3397                                 if (retval != STATUS_SUCCESS) {
3398                                         rtsx_trace(chip);
3399                                         return STATUS_FAIL;
3400                                 }
3401
3402                                 switch_ddr = false;
3403                                 rtsx_trace(chip);
3404                                 goto Switch_Fail;
3405                         }
3406
3407                         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
3408                         if (retval == STATUS_SUCCESS) {
3409                                 retval = sd_read_lba0(chip);
3410                                 if (retval != STATUS_SUCCESS) {
3411                                         retval = sd_init_power(chip);
3412                                         if (retval != STATUS_SUCCESS) {
3413                                                 rtsx_trace(chip);
3414                                                 return STATUS_FAIL;
3415                                         }
3416
3417                                         switch_ddr = false;
3418                                         rtsx_trace(chip);
3419                                         goto Switch_Fail;
3420                                 }
3421                         }
3422                 }
3423         }
3424
3425 #ifdef SUPPORT_SD_LOCK
3426         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
3427                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
3428                                              0x02);
3429                 if (retval) {
3430                         rtsx_trace(chip);
3431                         return retval;
3432                 }
3433                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
3434                                              0x00);
3435                 if (retval) {
3436                         rtsx_trace(chip);
3437                         return retval;
3438                 }
3439         }
3440 #endif
3441
3442         temp = rtsx_readl(chip, RTSX_BIPR);
3443         if (temp & SD_WRITE_PROTECT)
3444                 chip->card_wp |= SD_CARD;
3445
3446         return STATUS_SUCCESS;
3447 }
3448
3449 int reset_sd_card(struct rtsx_chip *chip)
3450 {
3451         struct sd_info *sd_card = &(chip->sd_card);
3452         int retval;
3453
3454         sd_init_reg_addr(chip);
3455
3456         memset(sd_card, 0, sizeof(struct sd_info));
3457         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3458
3459         retval = enable_card_clock(chip, SD_CARD);
3460         if (retval != STATUS_SUCCESS) {
3461                 rtsx_trace(chip);
3462                 return STATUS_FAIL;
3463         }
3464
3465         if (chip->ignore_sd && CHK_SDIO_EXIST(chip) &&
3466                 !CHK_SDIO_IGNORED(chip)) {
3467                 if (chip->asic_code) {
3468                         retval = sd_pull_ctl_enable(chip);
3469                         if (retval != STATUS_SUCCESS) {
3470                                 rtsx_trace(chip);
3471                                 return STATUS_FAIL;
3472                         }
3473                 } else {
3474                         retval = rtsx_write_register(chip, FPGA_PULL_CTL,
3475                                                 FPGA_SD_PULL_CTL_BIT | 0x20, 0);
3476                         if (retval != STATUS_SUCCESS) {
3477                                 rtsx_trace(chip);
3478                                 return STATUS_FAIL;
3479                         }
3480                 }
3481                 retval = card_share_mode(chip, SD_CARD);
3482                 if (retval != STATUS_SUCCESS) {
3483                         rtsx_trace(chip);
3484                         return STATUS_FAIL;
3485                 }
3486
3487                 chip->sd_io = 1;
3488                 rtsx_trace(chip);
3489                 return STATUS_FAIL;
3490         }
3491
3492         retval = sd_init_power(chip);
3493         if (retval != STATUS_SUCCESS) {
3494                 rtsx_trace(chip);
3495                 return STATUS_FAIL;
3496         }
3497
3498         if (chip->sd_ctl & RESET_MMC_FIRST) {
3499                 retval = reset_mmc(chip);
3500                 if (retval != STATUS_SUCCESS) {
3501                         if (sd_check_err_code(chip, SD_NO_CARD)) {
3502                                 rtsx_trace(chip);
3503                                 return STATUS_FAIL;
3504                         }
3505
3506                         retval = reset_sd(chip);
3507                         if (retval != STATUS_SUCCESS) {
3508                                 rtsx_trace(chip);
3509                                 return STATUS_FAIL;
3510                         }
3511                 }
3512         } else {
3513                 retval = reset_sd(chip);
3514                 if (retval != STATUS_SUCCESS) {
3515                         if (sd_check_err_code(chip, SD_NO_CARD)) {
3516                                 rtsx_trace(chip);
3517                                 return STATUS_FAIL;
3518                         }
3519
3520                         if (chip->sd_io) {
3521                                 rtsx_trace(chip);
3522                                 return STATUS_FAIL;
3523                         } else {
3524                                 retval = reset_mmc(chip);
3525                                 if (retval != STATUS_SUCCESS) {
3526                                         rtsx_trace(chip);
3527                                         return STATUS_FAIL;
3528                                 }
3529                         }
3530                 }
3531         }
3532
3533         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3534         if (retval != STATUS_SUCCESS) {
3535                 rtsx_trace(chip);
3536                 return STATUS_FAIL;
3537         }
3538
3539         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3540         if (retval) {
3541                 rtsx_trace(chip);
3542                 return retval;
3543         }
3544         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3545         if (retval) {
3546                 rtsx_trace(chip);
3547                 return retval;
3548         }
3549
3550         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3551
3552         retval = sd_set_init_para(chip);
3553         if (retval != STATUS_SUCCESS) {
3554                 rtsx_trace(chip);
3555                 return STATUS_FAIL;
3556         }
3557
3558         dev_dbg(rtsx_dev(chip), "sd_card->sd_type = 0x%x\n", sd_card->sd_type);
3559
3560         return STATUS_SUCCESS;
3561 }
3562
3563 static int reset_mmc_only(struct rtsx_chip *chip)
3564 {
3565         struct sd_info *sd_card = &(chip->sd_card);
3566         int retval;
3567
3568         sd_card->sd_type = 0;
3569         sd_card->seq_mode = 0;
3570         sd_card->sd_data_buf_ready = 0;
3571         sd_card->capacity = 0;
3572         sd_card->sd_switch_fail = 0;
3573
3574 #ifdef SUPPORT_SD_LOCK
3575         sd_card->sd_lock_status = 0;
3576         sd_card->sd_erase_status = 0;
3577 #endif
3578
3579         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0;
3580
3581         retval = enable_card_clock(chip, SD_CARD);
3582         if (retval != STATUS_SUCCESS) {
3583                 rtsx_trace(chip);
3584                 return STATUS_FAIL;
3585         }
3586
3587         retval = sd_init_power(chip);
3588         if (retval != STATUS_SUCCESS) {
3589                 rtsx_trace(chip);
3590                 return STATUS_FAIL;
3591         }
3592
3593         retval = reset_mmc(chip);
3594         if (retval != STATUS_SUCCESS) {
3595                 rtsx_trace(chip);
3596                 return STATUS_FAIL;
3597         }
3598
3599         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3600         if (retval != STATUS_SUCCESS) {
3601                 rtsx_trace(chip);
3602                 return STATUS_FAIL;
3603         }
3604
3605         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3606         if (retval) {
3607                 rtsx_trace(chip);
3608                 return retval;
3609         }
3610         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3611         if (retval) {
3612                 rtsx_trace(chip);
3613                 return retval;
3614         }
3615
3616         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3617
3618         retval = sd_set_init_para(chip);
3619         if (retval != STATUS_SUCCESS) {
3620                 rtsx_trace(chip);
3621                 return STATUS_FAIL;
3622         }
3623
3624         dev_dbg(rtsx_dev(chip), "In reset_mmc_only, sd_card->sd_type = 0x%x\n",
3625                 sd_card->sd_type);
3626
3627         return STATUS_SUCCESS;
3628 }
3629
3630 #define WAIT_DATA_READY_RTY_CNT         255
3631
3632 static int wait_data_buf_ready(struct rtsx_chip *chip)
3633 {
3634         struct sd_info *sd_card = &(chip->sd_card);
3635         int i, retval;
3636
3637         for (i = 0; i < WAIT_DATA_READY_RTY_CNT; i++) {
3638                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3639                         sd_set_err_code(chip, SD_NO_CARD);
3640                         rtsx_trace(chip);
3641                         return STATUS_FAIL;
3642                 }
3643
3644                 sd_card->sd_data_buf_ready = 0;
3645
3646                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
3647                                 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3648                 if (retval != STATUS_SUCCESS) {
3649                         rtsx_trace(chip);
3650                         return STATUS_FAIL;
3651                 }
3652
3653                 if (sd_card->sd_data_buf_ready) {
3654                         return sd_send_cmd_get_rsp(chip, SEND_STATUS,
3655                                 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3656                 }
3657         }
3658
3659         sd_set_err_code(chip, SD_TO_ERR);
3660
3661         rtsx_trace(chip);
3662         return STATUS_FAIL;
3663 }
3664
3665 void sd_stop_seq_mode(struct rtsx_chip *chip)
3666 {
3667         struct sd_info *sd_card = &(chip->sd_card);
3668         int retval;
3669
3670         if (sd_card->seq_mode) {
3671                 retval = sd_switch_clock(chip);
3672                 if (retval != STATUS_SUCCESS)
3673                         return;
3674
3675                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3676                                 SD_RSP_TYPE_R1b, NULL, 0);
3677                 if (retval != STATUS_SUCCESS)
3678                         sd_set_err_code(chip, SD_STS_ERR);
3679
3680                 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
3681                 if (retval != STATUS_SUCCESS)
3682                         sd_set_err_code(chip, SD_STS_ERR);
3683
3684                 sd_card->seq_mode = 0;
3685
3686                 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3687         }
3688 }
3689
3690 static inline int sd_auto_tune_clock(struct rtsx_chip *chip)
3691 {
3692         struct sd_info *sd_card = &(chip->sd_card);
3693         int retval;
3694
3695         if (chip->asic_code) {
3696                 if (sd_card->sd_clock > 30)
3697                         sd_card->sd_clock -= 20;
3698         } else {
3699                 switch (sd_card->sd_clock) {
3700                 case CLK_200:
3701                         sd_card->sd_clock = CLK_150;
3702                         break;
3703
3704                 case CLK_150:
3705                         sd_card->sd_clock = CLK_120;
3706                         break;
3707
3708                 case CLK_120:
3709                         sd_card->sd_clock = CLK_100;
3710                         break;
3711
3712                 case CLK_100:
3713                         sd_card->sd_clock = CLK_80;
3714                         break;
3715
3716                 case CLK_80:
3717                         sd_card->sd_clock = CLK_60;
3718                         break;
3719
3720                 case CLK_60:
3721                         sd_card->sd_clock = CLK_50;
3722                         break;
3723
3724                 default:
3725                         break;
3726                 }
3727         }
3728
3729         retval = sd_switch_clock(chip);
3730         if (retval != STATUS_SUCCESS) {
3731                 rtsx_trace(chip);
3732                 return STATUS_FAIL;
3733         }
3734
3735         return STATUS_SUCCESS;
3736 }
3737
3738 int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector,
3739         u16 sector_cnt)
3740 {
3741         struct sd_info *sd_card = &(chip->sd_card);
3742         u32 data_addr;
3743         u8 cfg2;
3744         int retval;
3745
3746         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3747                 dev_dbg(rtsx_dev(chip), "sd_rw: Read %d %s from 0x%x\n",
3748                         sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
3749                         start_sector);
3750         } else {
3751                 dev_dbg(rtsx_dev(chip), "sd_rw: Write %d %s to 0x%x\n",
3752                         sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
3753                         start_sector);
3754         }
3755
3756         sd_card->cleanup_counter = 0;
3757
3758         if (!(chip->card_ready & SD_CARD)) {
3759                 sd_card->seq_mode = 0;
3760
3761                 retval = reset_sd_card(chip);
3762                 if (retval == STATUS_SUCCESS) {
3763                         chip->card_ready |= SD_CARD;
3764                         chip->card_fail &= ~SD_CARD;
3765                 } else {
3766                         chip->card_ready &= ~SD_CARD;
3767                         chip->card_fail |= SD_CARD;
3768                         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3769                         chip->rw_need_retry = 1;
3770                         rtsx_trace(chip);
3771                         return STATUS_FAIL;
3772                 }
3773         }
3774
3775         if (!CHK_SD_HCXC(sd_card) && !CHK_MMC_SECTOR_MODE(sd_card))
3776                 data_addr = start_sector << 9;
3777         else
3778                 data_addr = start_sector;
3779
3780         sd_clr_err_code(chip);
3781
3782         retval = sd_switch_clock(chip);
3783         if (retval != STATUS_SUCCESS) {
3784                 sd_set_err_code(chip, SD_IO_ERR);
3785                 rtsx_trace(chip);
3786                 goto RW_FAIL;
3787         }
3788
3789         if (sd_card->seq_mode &&
3790                 ((sd_card->pre_dir != srb->sc_data_direction) ||
3791                         ((sd_card->pre_sec_addr + sd_card->pre_sec_cnt) !=
3792                                 start_sector))) {
3793                 if ((sd_card->pre_sec_cnt < 0x80)
3794                                 && (sd_card->pre_dir == DMA_FROM_DEVICE)
3795                                 && !CHK_SD30_SPEED(sd_card)
3796                                 && !CHK_SD_HS(sd_card)
3797                                 && !CHK_MMC_HS(sd_card)) {
3798                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3799                                         SD_RSP_TYPE_R1, NULL, 0);
3800                 }
3801
3802                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
3803                                 0, SD_RSP_TYPE_R1b, NULL, 0);
3804                 if (retval != STATUS_SUCCESS) {
3805                         chip->rw_need_retry = 1;
3806                         sd_set_err_code(chip, SD_STS_ERR);
3807                         rtsx_trace(chip);
3808                         goto RW_FAIL;
3809                 }
3810
3811                 sd_card->seq_mode = 0;
3812
3813                 retval = rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3814                 if (retval != STATUS_SUCCESS) {
3815                         sd_set_err_code(chip, SD_IO_ERR);
3816                         rtsx_trace(chip);
3817                         goto RW_FAIL;
3818                 }
3819
3820                 if ((sd_card->pre_sec_cnt < 0x80)
3821                                 && !CHK_SD30_SPEED(sd_card)
3822                                 && !CHK_SD_HS(sd_card)
3823                                 && !CHK_MMC_HS(sd_card)) {
3824                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3825                                         SD_RSP_TYPE_R1, NULL, 0);
3826                 }
3827         }
3828
3829         rtsx_init_cmd(chip);
3830
3831         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x00);
3832         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 0x02);
3833         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
3834                 (u8)sector_cnt);
3835         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
3836                 (u8)(sector_cnt >> 8));
3837
3838         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3839
3840         if (CHK_MMC_8BIT(sd_card))
3841                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3842                         0x03, SD_BUS_WIDTH_8);
3843         else if (CHK_MMC_4BIT(sd_card) || CHK_SD(sd_card))
3844                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3845                         0x03, SD_BUS_WIDTH_4);
3846         else
3847                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3848                         0x03, SD_BUS_WIDTH_1);
3849
3850         if (sd_card->seq_mode) {
3851                 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16|
3852                         SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 |
3853                         SD_RSP_LEN_0;
3854                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3855
3856                 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512,
3857                                 DMA_512);
3858
3859                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3860                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3861                                      SD_TM_AUTO_READ_3 | SD_TRANSFER_START);
3862                 } else {
3863                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3864                                      SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3865                 }
3866
3867                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3868                         SD_TRANSFER_END, SD_TRANSFER_END);
3869
3870                 rtsx_send_cmd_no_wait(chip);
3871         } else {
3872                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3873                         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n",
3874                                 READ_MULTIPLE_BLOCK);
3875                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
3876                                      0x40 | READ_MULTIPLE_BLOCK);
3877                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF,
3878                                 (u8)(data_addr >> 24));
3879                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF,
3880                                 (u8)(data_addr >> 16));
3881                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF,
3882                                 (u8)(data_addr >> 8));
3883                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF,
3884                                 (u8)data_addr);
3885
3886                         cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3887                                 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 |
3888                                 SD_RSP_LEN_6;
3889                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3890                                 cfg2);
3891
3892                         trans_dma_enable(srb->sc_data_direction, chip,
3893                                         sector_cnt * 512, DMA_512);
3894
3895                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3896                                      SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
3897                         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3898                                      SD_TRANSFER_END, SD_TRANSFER_END);
3899
3900                         rtsx_send_cmd_no_wait(chip);
3901                 } else {
3902                         retval = rtsx_send_cmd(chip, SD_CARD, 50);
3903                         if (retval < 0) {
3904                                 rtsx_clear_sd_error(chip);
3905
3906                                 chip->rw_need_retry = 1;
3907                                 sd_set_err_code(chip, SD_TO_ERR);
3908                                 rtsx_trace(chip);
3909                                 goto RW_FAIL;
3910                         }
3911
3912                         retval = wait_data_buf_ready(chip);
3913                         if (retval != STATUS_SUCCESS) {
3914                                 chip->rw_need_retry = 1;
3915                                 sd_set_err_code(chip, SD_TO_ERR);
3916                                 rtsx_trace(chip);
3917                                 goto RW_FAIL;
3918                         }
3919
3920                         retval = sd_send_cmd_get_rsp(chip, WRITE_MULTIPLE_BLOCK,
3921                                         data_addr, SD_RSP_TYPE_R1, NULL, 0);
3922                         if (retval != STATUS_SUCCESS) {
3923                                 chip->rw_need_retry = 1;
3924                                 rtsx_trace(chip);
3925                                 goto RW_FAIL;
3926                         }
3927
3928                         rtsx_init_cmd(chip);
3929
3930                         cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3931                                 SD_NO_WAIT_BUSY_END |
3932                                 SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
3933                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3934                                 cfg2);
3935
3936                         trans_dma_enable(srb->sc_data_direction, chip,
3937                                         sector_cnt * 512, DMA_512);
3938
3939                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3940                                      SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3941                         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3942                                      SD_TRANSFER_END, SD_TRANSFER_END);
3943
3944                         rtsx_send_cmd_no_wait(chip);
3945                 }
3946
3947                 sd_card->seq_mode = 1;
3948         }
3949
3950         retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
3951                                 scsi_bufflen(srb), scsi_sg_count(srb),
3952                                 srb->sc_data_direction, chip->sd_timeout);
3953         if (retval < 0) {
3954                 u8 stat = 0;
3955                 int err;
3956
3957                 sd_card->seq_mode = 0;
3958
3959                 if (retval == -ETIMEDOUT)
3960                         err = STATUS_TIMEDOUT;
3961                 else
3962                         err = STATUS_FAIL;
3963
3964                 rtsx_read_register(chip, REG_SD_STAT1, &stat);
3965                 rtsx_clear_sd_error(chip);
3966                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3967                         chip->rw_need_retry = 0;
3968                         dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n");
3969                         rtsx_trace(chip);
3970                         return STATUS_FAIL;
3971                 }
3972
3973                 chip->rw_need_retry = 1;
3974
3975                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3976                                         SD_RSP_TYPE_R1b, NULL, 0);
3977                 if (retval != STATUS_SUCCESS) {
3978                         sd_set_err_code(chip, SD_STS_ERR);
3979                         rtsx_trace(chip);
3980                         goto RW_FAIL;
3981                 }
3982
3983                 if (stat & (SD_CRC7_ERR | SD_CRC16_ERR | SD_CRC_WRITE_ERR)) {
3984                         dev_dbg(rtsx_dev(chip), "SD CRC error, tune clock!\n");
3985                         sd_set_err_code(chip, SD_CRC_ERR);
3986                         rtsx_trace(chip);
3987                         goto RW_FAIL;
3988                 }
3989
3990                 if (err == STATUS_TIMEDOUT) {
3991                         sd_set_err_code(chip, SD_TO_ERR);
3992                         rtsx_trace(chip);
3993                         goto RW_FAIL;
3994                 }
3995
3996                 rtsx_trace(chip);
3997                 return err;
3998         }
3999
4000         sd_card->pre_sec_addr = start_sector;
4001         sd_card->pre_sec_cnt = sector_cnt;
4002         sd_card->pre_dir = srb->sc_data_direction;
4003
4004         return STATUS_SUCCESS;
4005
4006 RW_FAIL:
4007         sd_card->seq_mode = 0;
4008
4009         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
4010                 chip->rw_need_retry = 0;
4011                 dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n");
4012                 rtsx_trace(chip);
4013                 return STATUS_FAIL;
4014         }
4015
4016         if (sd_check_err_code(chip, SD_CRC_ERR)) {
4017                 if (CHK_MMC_4BIT(sd_card) || CHK_MMC_8BIT(sd_card)) {
4018                         sd_card->mmc_dont_switch_bus = 1;
4019                         reset_mmc_only(chip);
4020                         sd_card->mmc_dont_switch_bus = 0;
4021                 } else {
4022                         sd_card->need_retune = 1;
4023                         sd_auto_tune_clock(chip);
4024                 }
4025         } else if (sd_check_err_code(chip, SD_TO_ERR | SD_STS_ERR)) {
4026                 retval = reset_sd_card(chip);
4027                 if (retval != STATUS_SUCCESS) {
4028                         chip->card_ready &= ~SD_CARD;
4029                         chip->card_fail |= SD_CARD;
4030                         chip->capacity[chip->card2lun[SD_CARD]] = 0;
4031                 }
4032         }
4033
4034         rtsx_trace(chip);
4035         return STATUS_FAIL;
4036 }
4037
4038 #ifdef SUPPORT_CPRM
4039 int soft_reset_sd_card(struct rtsx_chip *chip)
4040 {
4041         return reset_sd(chip);
4042 }
4043
4044 int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
4045                 u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, bool special_check)
4046 {
4047         int retval;
4048         int timeout = 100;
4049         u16 reg_addr;
4050         u8 *ptr;
4051         int stat_idx = 0;
4052         int rty_cnt = 0;
4053
4054         dev_dbg(rtsx_dev(chip), "EXT SD/MMC CMD %d\n", cmd_idx);
4055
4056         if (rsp_type == SD_RSP_TYPE_R1b)
4057                 timeout = 3000;
4058
4059 RTY_SEND_CMD:
4060
4061         rtsx_init_cmd(chip);
4062
4063         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
4064         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
4065         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
4066         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
4067         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
4068
4069         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
4070         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4071                         0x01, PINGPONG_BUFFER);
4072         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
4073                         0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
4074         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
4075                 SD_TRANSFER_END);
4076
4077         if (rsp_type == SD_RSP_TYPE_R2) {
4078                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
4079                      reg_addr++)
4080                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
4081
4082                 stat_idx = 17;
4083         } else if (rsp_type != SD_RSP_TYPE_R0) {
4084                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
4085                      reg_addr++)
4086                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
4087
4088                 stat_idx = 6;
4089         }
4090         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0, 0);
4091
4092         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
4093
4094         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
4095         if (retval < 0) {
4096                 if (retval == -ETIMEDOUT) {
4097                         rtsx_clear_sd_error(chip);
4098
4099                         if (rsp_type & SD_WAIT_BUSY_END) {
4100                                 retval = sd_check_data0_status(chip);
4101                                 if (retval != STATUS_SUCCESS) {
4102                                         rtsx_trace(chip);
4103                                         return retval;
4104                                 }
4105                         } else {
4106                                 sd_set_err_code(chip, SD_TO_ERR);
4107                         }
4108                 }
4109                 rtsx_trace(chip);
4110                 return STATUS_FAIL;
4111         }
4112
4113         if (rsp_type == SD_RSP_TYPE_R0)
4114                 return STATUS_SUCCESS;
4115
4116         ptr = rtsx_get_cmd_data(chip) + 1;
4117
4118         if ((ptr[0] & 0xC0) != 0) {
4119                 sd_set_err_code(chip, SD_STS_ERR);
4120                 rtsx_trace(chip);
4121                 return STATUS_FAIL;
4122         }
4123
4124         if (!(rsp_type & SD_NO_CHECK_CRC7)) {
4125                 if (ptr[stat_idx] & SD_CRC7_ERR) {
4126                         if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
4127                                 sd_set_err_code(chip, SD_CRC_ERR);
4128                                 rtsx_trace(chip);
4129                                 return STATUS_FAIL;
4130                         }
4131                         if (rty_cnt < SD_MAX_RETRY_COUNT) {
4132                                 wait_timeout(20);
4133                                 rty_cnt++;
4134                                 goto RTY_SEND_CMD;
4135                         } else {
4136                                 sd_set_err_code(chip, SD_CRC_ERR);
4137                                 rtsx_trace(chip);
4138                                 return STATUS_FAIL;
4139                         }
4140                 }
4141         }
4142
4143         if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) ||
4144                 (cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) {
4145                 if ((cmd_idx != STOP_TRANSMISSION) && !special_check) {
4146                         if (ptr[1] & 0x80) {
4147                                 rtsx_trace(chip);
4148                                 return STATUS_FAIL;
4149                         }
4150                 }
4151 #ifdef SUPPORT_SD_LOCK
4152                 if (ptr[1] & 0x7D)
4153 #else
4154                 if (ptr[1] & 0x7F)
4155 #endif
4156                 {
4157                         rtsx_trace(chip);
4158                         return STATUS_FAIL;
4159                 }
4160                 if (ptr[2] & 0xF8) {
4161                         rtsx_trace(chip);
4162                         return STATUS_FAIL;
4163                 }
4164
4165                 if (cmd_idx == SELECT_CARD) {
4166                         if (rsp_type == SD_RSP_TYPE_R2) {
4167                                 if ((ptr[3] & 0x1E) != 0x04) {
4168                                         rtsx_trace(chip);
4169                                         return STATUS_FAIL;
4170                                 }
4171
4172                         } else if (rsp_type == SD_RSP_TYPE_R0) {
4173                                 if ((ptr[3] & 0x1E) != 0x03) {
4174                                         rtsx_trace(chip);
4175                                         return STATUS_FAIL;
4176                                 }
4177                         }
4178                 }
4179         }
4180
4181         if (rsp && rsp_len)
4182                 memcpy(rsp, ptr, rsp_len);
4183
4184         return STATUS_SUCCESS;
4185 }
4186
4187 int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type)
4188 {
4189         int retval, rsp_len;
4190         u16 reg_addr;
4191
4192         if (rsp_type == SD_RSP_TYPE_R0)
4193                 return STATUS_SUCCESS;
4194
4195         rtsx_init_cmd(chip);
4196
4197         if (rsp_type == SD_RSP_TYPE_R2) {
4198                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
4199                      reg_addr++)
4200                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
4201
4202                 rsp_len = 17;
4203         } else if (rsp_type != SD_RSP_TYPE_R0) {
4204                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
4205                      reg_addr++)
4206                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
4207
4208                 rsp_len = 6;
4209         }
4210         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0);
4211
4212         retval = rtsx_send_cmd(chip, SD_CARD, 100);
4213         if (retval != STATUS_SUCCESS) {
4214                 rtsx_trace(chip);
4215                 return STATUS_FAIL;
4216         }
4217
4218         if (rsp) {
4219                 int min_len = (rsp_len < len) ? rsp_len : len;
4220
4221                 memcpy(rsp, rtsx_get_cmd_data(chip), min_len);
4222
4223                 dev_dbg(rtsx_dev(chip), "min_len = %d\n", min_len);
4224                 dev_dbg(rtsx_dev(chip), "Response in cmd buf: 0x%x 0x%x 0x%x 0x%x\n",
4225                         rsp[0], rsp[1], rsp[2], rsp[3]);
4226         }
4227
4228         return STATUS_SUCCESS;
4229 }
4230
4231 int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4232 {
4233         struct sd_info *sd_card = &(chip->sd_card);
4234         unsigned int lun = SCSI_LUN(srb);
4235         int len;
4236         u8 buf[18] = {
4237                 0x00,
4238                 0x00,
4239                 0x00,
4240                 0x0E,
4241                 0x00,
4242                 0x00,
4243                 0x00,
4244                 0x00,
4245                 0x53,
4246                 0x44,
4247                 0x20,
4248                 0x43,
4249                 0x61,
4250                 0x72,
4251                 0x64,
4252                 0x00,
4253                 0x00,
4254                 0x00,
4255         };
4256
4257         sd_card->pre_cmd_err = 0;
4258
4259         if (!(CHK_BIT(chip->lun_mc, lun))) {
4260                 SET_BIT(chip->lun_mc, lun);
4261                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4262                 rtsx_trace(chip);
4263                 return TRANSPORT_FAILED;
4264         }
4265
4266         if ((0x53 != srb->cmnd[2]) || (0x44 != srb->cmnd[3]) ||
4267                 (0x20 != srb->cmnd[4]) || (0x43 != srb->cmnd[5]) ||
4268                 (0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7]) ||
4269                 (0x64 != srb->cmnd[8])) {
4270                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4271                 rtsx_trace(chip);
4272                 return TRANSPORT_FAILED;
4273         }
4274
4275         switch (srb->cmnd[1] & 0x0F) {
4276         case 0:
4277                 sd_card->sd_pass_thru_en = 0;
4278                 break;
4279
4280         case 1:
4281                 sd_card->sd_pass_thru_en = 1;
4282                 break;
4283
4284         default:
4285                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4286                 rtsx_trace(chip);
4287                 return TRANSPORT_FAILED;
4288         }
4289
4290         buf[5] = (1 == CHK_SD(sd_card)) ?  0x01 : 0x02;
4291         if (chip->card_wp & SD_CARD)
4292                 buf[5] |= 0x80;
4293
4294         buf[6] = (u8)(sd_card->sd_addr >> 16);
4295         buf[7] = (u8)(sd_card->sd_addr >> 24);
4296
4297         buf[15] = chip->max_lun;
4298
4299         len = min_t(int, 18, scsi_bufflen(srb));
4300         rtsx_stor_set_xfer_buf(buf, len, srb);
4301
4302         return TRANSPORT_GOOD;
4303 }
4304
4305 static inline int get_rsp_type(struct scsi_cmnd *srb, u8 *rsp_type,
4306                         int *rsp_len)
4307 {
4308         if (!rsp_type || !rsp_len)
4309                 return STATUS_FAIL;
4310
4311         switch (srb->cmnd[10]) {
4312         case 0x03:
4313                 *rsp_type = SD_RSP_TYPE_R0;
4314                 *rsp_len = 0;
4315                 break;
4316
4317         case 0x04:
4318                 *rsp_type = SD_RSP_TYPE_R1;
4319                 *rsp_len = 6;
4320                 break;
4321
4322         case 0x05:
4323                 *rsp_type = SD_RSP_TYPE_R1b;
4324                 *rsp_len = 6;
4325                 break;
4326
4327         case 0x06:
4328                 *rsp_type = SD_RSP_TYPE_R2;
4329                 *rsp_len = 17;
4330                 break;
4331
4332         case 0x07:
4333                 *rsp_type = SD_RSP_TYPE_R3;
4334                 *rsp_len = 6;
4335                 break;
4336
4337         default:
4338                 return STATUS_FAIL;
4339         }
4340
4341         return STATUS_SUCCESS;
4342 }
4343
4344 int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4345 {
4346         struct sd_info *sd_card = &(chip->sd_card);
4347         unsigned int lun = SCSI_LUN(srb);
4348         int retval, rsp_len;
4349         u8 cmd_idx, rsp_type;
4350         bool standby = false, acmd = false;
4351         u32 arg;
4352
4353         if (!sd_card->sd_pass_thru_en) {
4354                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4355                 rtsx_trace(chip);
4356                 return TRANSPORT_FAILED;
4357         }
4358
4359         retval = sd_switch_clock(chip);
4360         if (retval != STATUS_SUCCESS) {
4361                 rtsx_trace(chip);
4362                 return TRANSPORT_FAILED;
4363         }
4364
4365         if (sd_card->pre_cmd_err) {
4366                 sd_card->pre_cmd_err = 0;
4367                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4368                 rtsx_trace(chip);
4369                 return TRANSPORT_FAILED;
4370         }
4371
4372         cmd_idx = srb->cmnd[2] & 0x3F;
4373         if (srb->cmnd[1] & 0x02)
4374                 standby = true;
4375
4376         if (srb->cmnd[1] & 0x01)
4377                 acmd = true;
4378
4379         arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
4380                 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
4381
4382         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4383         if (retval != STATUS_SUCCESS) {
4384                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4385                 rtsx_trace(chip);
4386                 return TRANSPORT_FAILED;
4387         }
4388         sd_card->last_rsp_type = rsp_type;
4389
4390         retval = sd_switch_clock(chip);
4391         if (retval != STATUS_SUCCESS) {
4392                 rtsx_trace(chip);
4393                 return TRANSPORT_FAILED;
4394         }
4395
4396 #ifdef SUPPORT_SD_LOCK
4397         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4398                 if (CHK_MMC_8BIT(sd_card)) {
4399                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4400                                                 SD_BUS_WIDTH_8);
4401                         if (retval != STATUS_SUCCESS) {
4402                                 rtsx_trace(chip);
4403                                 return TRANSPORT_FAILED;
4404                         }
4405
4406                 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
4407                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4408                                                 SD_BUS_WIDTH_4);
4409                         if (retval != STATUS_SUCCESS) {
4410                                 rtsx_trace(chip);
4411                                 return TRANSPORT_FAILED;
4412                         }
4413                 }
4414         }
4415 #else
4416         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4417         if (retval != STATUS_SUCCESS) {
4418                 rtsx_trace(chip);
4419                 return TRANSPORT_FAILED;
4420         }
4421 #endif
4422
4423         if (standby) {
4424                 retval = sd_select_card(chip, 0);
4425                 if (retval != STATUS_SUCCESS) {
4426                         rtsx_trace(chip);
4427                         goto SD_Execute_Cmd_Failed;
4428                 }
4429         }
4430
4431         if (acmd) {
4432                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4433                                                 sd_card->sd_addr,
4434                                                 SD_RSP_TYPE_R1, NULL, 0, false);
4435                 if (retval != STATUS_SUCCESS) {
4436                         rtsx_trace(chip);
4437                         goto SD_Execute_Cmd_Failed;
4438                 }
4439         }
4440
4441         retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
4442                         sd_card->rsp, rsp_len, false);
4443         if (retval != STATUS_SUCCESS) {
4444                 rtsx_trace(chip);
4445                 goto SD_Execute_Cmd_Failed;
4446         }
4447
4448         if (standby) {
4449                 retval = sd_select_card(chip, 1);
4450                 if (retval != STATUS_SUCCESS) {
4451                         rtsx_trace(chip);
4452                         goto SD_Execute_Cmd_Failed;
4453                 }
4454         }
4455
4456 #ifdef SUPPORT_SD_LOCK
4457         retval = sd_update_lock_status(chip);
4458         if (retval != STATUS_SUCCESS) {
4459                 rtsx_trace(chip);
4460                 goto SD_Execute_Cmd_Failed;
4461         }
4462 #endif
4463
4464         scsi_set_resid(srb, 0);
4465         return TRANSPORT_GOOD;
4466
4467 SD_Execute_Cmd_Failed:
4468         sd_card->pre_cmd_err = 1;
4469         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4470         release_sd_card(chip);
4471         do_reset_sd_card(chip);
4472         if (!(chip->card_ready & SD_CARD))
4473                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4474
4475         rtsx_trace(chip);
4476         return TRANSPORT_FAILED;
4477 }
4478
4479 int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4480 {
4481         struct sd_info *sd_card = &(chip->sd_card);
4482         unsigned int lun = SCSI_LUN(srb);
4483         int retval, rsp_len, i;
4484         bool read_err = false, cmd13_checkbit = false;
4485         u8 cmd_idx, rsp_type, bus_width;
4486         bool standby = false, send_cmd12 = false, acmd = false;
4487         u32 data_len;
4488
4489         if (!sd_card->sd_pass_thru_en) {
4490                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4491                 rtsx_trace(chip);
4492                 return TRANSPORT_FAILED;
4493         }
4494
4495         if (sd_card->pre_cmd_err) {
4496                 sd_card->pre_cmd_err = 0;
4497                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4498                 rtsx_trace(chip);
4499                 return TRANSPORT_FAILED;
4500         }
4501
4502         retval = sd_switch_clock(chip);
4503         if (retval != STATUS_SUCCESS) {
4504                 rtsx_trace(chip);
4505                 return TRANSPORT_FAILED;
4506         }
4507
4508         cmd_idx = srb->cmnd[2] & 0x3F;
4509         if (srb->cmnd[1] & 0x04)
4510                 send_cmd12 = true;
4511
4512         if (srb->cmnd[1] & 0x02)
4513                 standby = true;
4514
4515         if (srb->cmnd[1] & 0x01)
4516                 acmd = true;
4517
4518         data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
4519                                                 << 8) | srb->cmnd[9];
4520
4521         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4522         if (retval != STATUS_SUCCESS) {
4523                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4524                 rtsx_trace(chip);
4525                 return TRANSPORT_FAILED;
4526         }
4527         sd_card->last_rsp_type = rsp_type;
4528
4529         retval = sd_switch_clock(chip);
4530         if (retval != STATUS_SUCCESS) {
4531                 rtsx_trace(chip);
4532                 return TRANSPORT_FAILED;
4533         }
4534
4535 #ifdef SUPPORT_SD_LOCK
4536         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4537                 if (CHK_MMC_8BIT(sd_card))
4538                         bus_width = SD_BUS_WIDTH_8;
4539                 else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card))
4540                         bus_width = SD_BUS_WIDTH_4;
4541                 else
4542                         bus_width = SD_BUS_WIDTH_1;
4543         } else {
4544                 bus_width = SD_BUS_WIDTH_4;
4545         }
4546         dev_dbg(rtsx_dev(chip), "bus_width = %d\n", bus_width);
4547 #else
4548         bus_width = SD_BUS_WIDTH_4;
4549 #endif
4550
4551         if (data_len < 512) {
4552                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
4553                                 SD_RSP_TYPE_R1, NULL, 0, false);
4554                 if (retval != STATUS_SUCCESS) {
4555                         rtsx_trace(chip);
4556                         goto SD_Execute_Read_Cmd_Failed;
4557                 }
4558         }
4559
4560         if (standby) {
4561                 retval = sd_select_card(chip, 0);
4562                 if (retval != STATUS_SUCCESS) {
4563                         rtsx_trace(chip);
4564                         goto SD_Execute_Read_Cmd_Failed;
4565                 }
4566         }
4567
4568         if (acmd) {
4569                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4570                                                 sd_card->sd_addr,
4571                                                 SD_RSP_TYPE_R1, NULL, 0, false);
4572                 if (retval != STATUS_SUCCESS) {
4573                         rtsx_trace(chip);
4574                         goto SD_Execute_Read_Cmd_Failed;
4575                 }
4576         }
4577
4578         if (data_len <= 512) {
4579                 int min_len;
4580                 u8 *buf;
4581                 u16 byte_cnt, blk_cnt;
4582                 u8 cmd[5];
4583
4584                 byte_cnt = ((u16)(srb->cmnd[8] & 0x03) << 8) | srb->cmnd[9];
4585                 blk_cnt = 1;
4586
4587                 cmd[0] = 0x40 | cmd_idx;
4588                 cmd[1] = srb->cmnd[3];
4589                 cmd[2] = srb->cmnd[4];
4590                 cmd[3] = srb->cmnd[5];
4591                 cmd[4] = srb->cmnd[6];
4592
4593                 buf = kmalloc(data_len, GFP_KERNEL);
4594                 if (buf == NULL) {
4595                         rtsx_trace(chip);
4596                         return TRANSPORT_ERROR;
4597                 }
4598
4599                 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt,
4600                                        blk_cnt, bus_width, buf, data_len, 2000);
4601                 if (retval != STATUS_SUCCESS) {
4602                         read_err = true;
4603                         kfree(buf);
4604                         rtsx_clear_sd_error(chip);
4605                         rtsx_trace(chip);
4606                         goto SD_Execute_Read_Cmd_Failed;
4607                 }
4608
4609                 min_len = min(data_len, scsi_bufflen(srb));
4610                 rtsx_stor_set_xfer_buf(buf, min_len, srb);
4611
4612                 kfree(buf);
4613         } else if (!(data_len & 0x1FF)) {
4614                 rtsx_init_cmd(chip);
4615
4616                 trans_dma_enable(DMA_FROM_DEVICE, chip, data_len, DMA_512);
4617
4618                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4619                         0x02);
4620                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4621                         0x00);
4622                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
4623                                 0xFF, (srb->cmnd[7] & 0xFE) >> 1);
4624                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
4625                                 0xFF, (u8)((data_len & 0x0001FE00) >> 9));
4626
4627                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
4628                         0x40 | cmd_idx);
4629                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF,
4630                         srb->cmnd[3]);
4631                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF,
4632                         srb->cmnd[4]);
4633                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF,
4634                         srb->cmnd[5]);
4635                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF,
4636                         srb->cmnd[6]);
4637
4638                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
4639                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
4640
4641                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
4642                              0xFF, SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
4643                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4644                         SD_TRANSFER_END, SD_TRANSFER_END);
4645
4646                 rtsx_send_cmd_no_wait(chip);
4647
4648                 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
4649                                         scsi_bufflen(srb), scsi_sg_count(srb),
4650                                         DMA_FROM_DEVICE, 10000);
4651                 if (retval < 0) {
4652                         read_err = true;
4653                         rtsx_clear_sd_error(chip);
4654                         rtsx_trace(chip);
4655                         goto SD_Execute_Read_Cmd_Failed;
4656                 }
4657
4658         } else {
4659                 rtsx_trace(chip);
4660                 goto SD_Execute_Read_Cmd_Failed;
4661         }
4662
4663         retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type);
4664         if (retval != STATUS_SUCCESS) {
4665                 rtsx_trace(chip);
4666                 goto SD_Execute_Read_Cmd_Failed;
4667         }
4668
4669         if (standby) {
4670                 retval = sd_select_card(chip, 1);
4671                 if (retval != STATUS_SUCCESS) {
4672                         rtsx_trace(chip);
4673                         goto SD_Execute_Read_Cmd_Failed;
4674                 }
4675         }
4676
4677         if (send_cmd12) {
4678                 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
4679                                 0, SD_RSP_TYPE_R1b, NULL, 0, false);
4680                 if (retval != STATUS_SUCCESS) {
4681                         rtsx_trace(chip);
4682                         goto SD_Execute_Read_Cmd_Failed;
4683                 }
4684         }
4685
4686         if (data_len < 512) {
4687                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
4688                                 SD_RSP_TYPE_R1, NULL, 0, false);
4689                 if (retval != STATUS_SUCCESS) {
4690                         rtsx_trace(chip);
4691                         goto SD_Execute_Read_Cmd_Failed;
4692                 }
4693
4694                 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
4695                 if (retval != STATUS_SUCCESS) {
4696                         rtsx_trace(chip);
4697                         goto SD_Execute_Read_Cmd_Failed;
4698                 }
4699
4700                 retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
4701                 if (retval != STATUS_SUCCESS) {
4702                         rtsx_trace(chip);
4703                         goto SD_Execute_Read_Cmd_Failed;
4704                 }
4705         }
4706
4707         if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
4708                 cmd13_checkbit = true;
4709
4710         for (i = 0; i < 3; i++) {
4711                 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
4712                                                 sd_card->sd_addr,
4713                                                 SD_RSP_TYPE_R1, NULL, 0,
4714                                                 cmd13_checkbit);
4715                 if (retval == STATUS_SUCCESS)
4716                         break;
4717         }
4718         if (retval != STATUS_SUCCESS) {
4719                 rtsx_trace(chip);
4720                 goto SD_Execute_Read_Cmd_Failed;
4721         }
4722
4723         scsi_set_resid(srb, 0);
4724         return TRANSPORT_GOOD;
4725
4726 SD_Execute_Read_Cmd_Failed:
4727         sd_card->pre_cmd_err = 1;
4728         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4729         if (read_err)
4730                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4731
4732         release_sd_card(chip);
4733         do_reset_sd_card(chip);
4734         if (!(chip->card_ready & SD_CARD))
4735                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4736
4737         rtsx_trace(chip);
4738         return TRANSPORT_FAILED;
4739 }
4740
4741 int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4742 {
4743         struct sd_info *sd_card = &(chip->sd_card);
4744         unsigned int lun = SCSI_LUN(srb);
4745         int retval, rsp_len, i;
4746         bool write_err = false, cmd13_checkbit = false;
4747         u8 cmd_idx, rsp_type;
4748         bool standby = false, send_cmd12 = false, acmd = false;
4749         u32 data_len, arg;
4750 #ifdef SUPPORT_SD_LOCK
4751         int lock_cmd_fail = 0;
4752         u8 sd_lock_state = 0;
4753         u8 lock_cmd_type = 0;
4754 #endif
4755
4756         if (!sd_card->sd_pass_thru_en) {
4757                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4758                 rtsx_trace(chip);
4759                 return TRANSPORT_FAILED;
4760         }
4761
4762         if (sd_card->pre_cmd_err) {
4763                 sd_card->pre_cmd_err = 0;
4764                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4765                 rtsx_trace(chip);
4766                 return TRANSPORT_FAILED;
4767         }
4768
4769         retval = sd_switch_clock(chip);
4770         if (retval != STATUS_SUCCESS) {
4771                 rtsx_trace(chip);
4772                 return TRANSPORT_FAILED;
4773         }
4774
4775         cmd_idx = srb->cmnd[2] & 0x3F;
4776         if (srb->cmnd[1] & 0x04)
4777                 send_cmd12 = true;
4778
4779         if (srb->cmnd[1] & 0x02)
4780                 standby = true;
4781
4782         if (srb->cmnd[1] & 0x01)
4783                 acmd = true;
4784
4785         data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
4786                                                 << 8) | srb->cmnd[9];
4787         arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
4788                 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
4789
4790 #ifdef SUPPORT_SD_LOCK
4791         if (cmd_idx == LOCK_UNLOCK) {
4792                 sd_lock_state = sd_card->sd_lock_status;
4793                 sd_lock_state &= SD_LOCKED;
4794         }
4795 #endif
4796
4797         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4798         if (retval != STATUS_SUCCESS) {
4799                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4800                 rtsx_trace(chip);
4801                 return TRANSPORT_FAILED;
4802         }
4803         sd_card->last_rsp_type = rsp_type;
4804
4805         retval = sd_switch_clock(chip);
4806         if (retval != STATUS_SUCCESS) {
4807                 rtsx_trace(chip);
4808                 return TRANSPORT_FAILED;
4809         }
4810
4811 #ifdef SUPPORT_SD_LOCK
4812         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4813                 if (CHK_MMC_8BIT(sd_card)) {
4814                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4815                                                 SD_BUS_WIDTH_8);
4816                         if (retval != STATUS_SUCCESS) {
4817                                 rtsx_trace(chip);
4818                                 return TRANSPORT_FAILED;
4819                         }
4820
4821                 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
4822                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4823                                                 SD_BUS_WIDTH_4);
4824                         if (retval != STATUS_SUCCESS) {
4825                                 rtsx_trace(chip);
4826                                 return TRANSPORT_FAILED;
4827                         }
4828                 }
4829         }
4830 #else
4831         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4832         if (retval != STATUS_SUCCESS) {
4833                 rtsx_trace(chip);
4834                 return TRANSPORT_FAILED;
4835         }
4836 #endif
4837
4838         if (data_len < 512) {
4839                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
4840                                 SD_RSP_TYPE_R1, NULL, 0, false);
4841                 if (retval != STATUS_SUCCESS) {
4842                         rtsx_trace(chip);
4843                         goto SD_Execute_Write_Cmd_Failed;
4844                 }
4845         }
4846
4847         if (standby) {
4848                 retval = sd_select_card(chip, 0);
4849                 if (retval != STATUS_SUCCESS) {
4850                         rtsx_trace(chip);
4851                         goto SD_Execute_Write_Cmd_Failed;
4852                 }
4853         }
4854
4855         if (acmd) {
4856                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4857                                                 sd_card->sd_addr,
4858                                                 SD_RSP_TYPE_R1, NULL, 0, false);
4859                 if (retval != STATUS_SUCCESS) {
4860                         rtsx_trace(chip);
4861                         goto SD_Execute_Write_Cmd_Failed;
4862                 }
4863         }
4864
4865         retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
4866                         sd_card->rsp, rsp_len, false);
4867         if (retval != STATUS_SUCCESS) {
4868                 rtsx_trace(chip);
4869                 goto SD_Execute_Write_Cmd_Failed;
4870         }
4871
4872         if (data_len <= 512) {
4873                 u16 i;
4874                 u8 *buf;
4875
4876                 buf = kmalloc(data_len, GFP_KERNEL);
4877                 if (buf == NULL) {
4878                         rtsx_trace(chip);
4879                         return TRANSPORT_ERROR;
4880                 }
4881
4882                 rtsx_stor_get_xfer_buf(buf, data_len, srb);
4883
4884 #ifdef SUPPORT_SD_LOCK
4885                 if (cmd_idx == LOCK_UNLOCK)
4886                         lock_cmd_type = buf[0] & 0x0F;
4887 #endif
4888
4889                 if (data_len > 256) {
4890                         rtsx_init_cmd(chip);
4891                         for (i = 0; i < 256; i++) {
4892                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4893                                                 PPBUF_BASE2 + i, 0xFF, buf[i]);
4894                         }
4895                         retval = rtsx_send_cmd(chip, 0, 250);
4896                         if (retval != STATUS_SUCCESS) {
4897                                 kfree(buf);
4898                                 rtsx_trace(chip);
4899                                 goto SD_Execute_Write_Cmd_Failed;
4900                         }
4901
4902                         rtsx_init_cmd(chip);
4903                         for (i = 256; i < data_len; i++) {
4904                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4905                                                 PPBUF_BASE2 + i, 0xFF, buf[i]);
4906                         }
4907                         retval = rtsx_send_cmd(chip, 0, 250);
4908                         if (retval != STATUS_SUCCESS) {
4909                                 kfree(buf);
4910                                 rtsx_trace(chip);
4911                                 goto SD_Execute_Write_Cmd_Failed;
4912                         }
4913                 } else {
4914                         rtsx_init_cmd(chip);
4915                         for (i = 0; i < data_len; i++) {
4916                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4917                                                 PPBUF_BASE2 + i, 0xFF, buf[i]);
4918                         }
4919                         retval = rtsx_send_cmd(chip, 0, 250);
4920                         if (retval != STATUS_SUCCESS) {
4921                                 kfree(buf);
4922                                 rtsx_trace(chip);
4923                                 goto SD_Execute_Write_Cmd_Failed;
4924                         }
4925                 }
4926
4927                 kfree(buf);
4928
4929                 rtsx_init_cmd(chip);
4930
4931                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4932                         srb->cmnd[8] & 0x03);
4933                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4934                         srb->cmnd[9]);
4935                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
4936                         0x00);
4937                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
4938                         0x01);
4939                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
4940                         PINGPONG_BUFFER);
4941
4942                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
4943                              SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4944                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4945                         SD_TRANSFER_END, SD_TRANSFER_END);
4946
4947                 retval = rtsx_send_cmd(chip, SD_CARD, 250);
4948         } else if (!(data_len & 0x1FF)) {
4949                 rtsx_init_cmd(chip);
4950
4951                 trans_dma_enable(DMA_TO_DEVICE, chip, data_len, DMA_512);
4952
4953                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4954                         0x02);
4955                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4956                         0x00);
4957                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
4958                                 0xFF, (srb->cmnd[7] & 0xFE) >> 1);
4959                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
4960                                 0xFF, (u8)((data_len & 0x0001FE00) >> 9));
4961
4962                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
4963                         SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4964                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4965                         SD_TRANSFER_END, SD_TRANSFER_END);
4966
4967                 rtsx_send_cmd_no_wait(chip);
4968
4969                 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
4970                                         scsi_bufflen(srb), scsi_sg_count(srb),
4971                                         DMA_TO_DEVICE, 10000);
4972
4973         } else {
4974                 rtsx_trace(chip);
4975                 goto SD_Execute_Write_Cmd_Failed;
4976         }
4977
4978         if (retval < 0) {
4979                 write_err = true;
4980                 rtsx_clear_sd_error(chip);
4981                 rtsx_trace(chip);
4982                 goto SD_Execute_Write_Cmd_Failed;
4983         }
4984
4985 #ifdef SUPPORT_SD_LOCK
4986         if (cmd_idx == LOCK_UNLOCK) {
4987                 if (lock_cmd_type == SD_ERASE) {
4988                         sd_card->sd_erase_status = SD_UNDER_ERASING;
4989                         scsi_set_resid(srb, 0);
4990                         return TRANSPORT_GOOD;
4991                 }
4992
4993                 rtsx_init_cmd(chip);
4994                 rtsx_add_cmd(chip, CHECK_REG_CMD, 0xFD30, 0x02, 0x02);
4995
4996                 rtsx_send_cmd(chip, SD_CARD, 250);
4997
4998                 retval = sd_update_lock_status(chip);
4999                 if (retval != STATUS_SUCCESS) {
5000                         dev_dbg(rtsx_dev(chip), "Lock command fail!\n");
5001                         lock_cmd_fail = 1;
5002                 }
5003         }
5004 #endif /* SUPPORT_SD_LOCK */
5005
5006         if (standby) {
5007                 retval = sd_select_card(chip, 1);
5008                 if (retval != STATUS_SUCCESS) {
5009                         rtsx_trace(chip);
5010                         goto SD_Execute_Write_Cmd_Failed;
5011                 }
5012         }
5013
5014         if (send_cmd12) {
5015                 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
5016                                 0, SD_RSP_TYPE_R1b, NULL, 0, false);
5017                 if (retval != STATUS_SUCCESS) {
5018                         rtsx_trace(chip);
5019                         goto SD_Execute_Write_Cmd_Failed;
5020                 }
5021         }
5022
5023         if (data_len < 512) {
5024                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
5025                                 SD_RSP_TYPE_R1, NULL, 0, false);
5026                 if (retval != STATUS_SUCCESS) {
5027                         rtsx_trace(chip);
5028                         goto SD_Execute_Write_Cmd_Failed;
5029                 }
5030
5031                 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
5032                 if (retval != STATUS_SUCCESS) {
5033                         rtsx_trace(chip);
5034                         goto SD_Execute_Write_Cmd_Failed;
5035                 }
5036
5037                 rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
5038                 if (retval != STATUS_SUCCESS) {
5039                         rtsx_trace(chip);
5040                         goto SD_Execute_Write_Cmd_Failed;
5041                 }
5042         }
5043
5044         if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
5045                 cmd13_checkbit = true;
5046
5047         for (i = 0; i < 3; i++) {
5048                 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
5049                                                 sd_card->sd_addr,
5050                                                 SD_RSP_TYPE_R1, NULL, 0,
5051                                                 cmd13_checkbit);
5052                 if (retval == STATUS_SUCCESS)
5053                         break;
5054         }
5055         if (retval != STATUS_SUCCESS) {
5056                 rtsx_trace(chip);
5057                 goto SD_Execute_Write_Cmd_Failed;
5058         }
5059
5060 #ifdef SUPPORT_SD_LOCK
5061         if (cmd_idx == LOCK_UNLOCK) {
5062                 if (!lock_cmd_fail) {
5063                         dev_dbg(rtsx_dev(chip), "lock_cmd_type = 0x%x\n",
5064                                 lock_cmd_type);
5065                         if (lock_cmd_type & SD_CLR_PWD)
5066                                 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
5067
5068                         if (lock_cmd_type & SD_SET_PWD)
5069                                 sd_card->sd_lock_status |= SD_PWD_EXIST;
5070                 }
5071
5072                 dev_dbg(rtsx_dev(chip), "sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n",
5073                         sd_lock_state, sd_card->sd_lock_status);
5074                 if (sd_lock_state ^ (sd_card->sd_lock_status & SD_LOCKED)) {
5075                         sd_card->sd_lock_notify = 1;
5076                         if (sd_lock_state) {
5077                                 if (sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) {
5078                                         sd_card->sd_lock_status |= (
5079                                                 SD_UNLOCK_POW_ON | SD_SDR_RST);
5080                                         if (CHK_SD(sd_card)) {
5081                                                 retval = reset_sd(chip);
5082                                                 if (retval != STATUS_SUCCESS) {
5083                                                         sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
5084                                                         rtsx_trace(chip);
5085                                                         goto SD_Execute_Write_Cmd_Failed;
5086                                                 }
5087                                         }
5088
5089                                         sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
5090                                 }
5091                         }
5092                 }
5093         }
5094
5095         if (lock_cmd_fail) {
5096                 scsi_set_resid(srb, 0);
5097                 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
5098                 rtsx_trace(chip);
5099                 return TRANSPORT_FAILED;
5100         }
5101 #endif  /* SUPPORT_SD_LOCK */
5102
5103         scsi_set_resid(srb, 0);
5104         return TRANSPORT_GOOD;
5105
5106 SD_Execute_Write_Cmd_Failed:
5107         sd_card->pre_cmd_err = 1;
5108         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
5109         if (write_err)
5110                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
5111
5112         release_sd_card(chip);
5113         do_reset_sd_card(chip);
5114         if (!(chip->card_ready & SD_CARD))
5115                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
5116
5117         rtsx_trace(chip);
5118         return TRANSPORT_FAILED;
5119 }
5120
5121 int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
5122 {
5123         struct sd_info *sd_card = &(chip->sd_card);
5124         unsigned int lun = SCSI_LUN(srb);
5125         int count;
5126         u16 data_len;
5127
5128         if (!sd_card->sd_pass_thru_en) {
5129                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5130                 rtsx_trace(chip);
5131                 return TRANSPORT_FAILED;
5132         }
5133
5134         if (sd_card->pre_cmd_err) {
5135                 sd_card->pre_cmd_err = 0;
5136                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
5137                 rtsx_trace(chip);
5138                 return TRANSPORT_FAILED;
5139         }
5140
5141         data_len = ((u16)srb->cmnd[7] << 8) | srb->cmnd[8];
5142
5143         if (sd_card->last_rsp_type == SD_RSP_TYPE_R0) {
5144                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5145                 rtsx_trace(chip);
5146                 return TRANSPORT_FAILED;
5147         } else if (sd_card->last_rsp_type == SD_RSP_TYPE_R2) {
5148                 count = (data_len < 17) ? data_len : 17;
5149         } else {
5150                 count = (data_len < 6) ? data_len : 6;
5151         }
5152         rtsx_stor_set_xfer_buf(sd_card->rsp, count, srb);
5153
5154         dev_dbg(rtsx_dev(chip), "Response length: %d\n", data_len);
5155         dev_dbg(rtsx_dev(chip), "Response: 0x%x 0x%x 0x%x 0x%x\n",
5156                 sd_card->rsp[0], sd_card->rsp[1],
5157                 sd_card->rsp[2], sd_card->rsp[3]);
5158
5159         scsi_set_resid(srb, 0);
5160         return TRANSPORT_GOOD;
5161 }
5162
5163 int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip)
5164 {
5165         struct sd_info *sd_card = &(chip->sd_card);
5166         unsigned int lun = SCSI_LUN(srb);
5167         int retval;
5168
5169         if (!sd_card->sd_pass_thru_en) {
5170                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5171                 rtsx_trace(chip);
5172                 return TRANSPORT_FAILED;
5173         }
5174
5175         if (sd_card->pre_cmd_err) {
5176                 sd_card->pre_cmd_err = 0;
5177                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
5178                 rtsx_trace(chip);
5179                 return TRANSPORT_FAILED;
5180         }
5181
5182         if ((0x53 != srb->cmnd[2]) || (0x44 != srb->cmnd[3]) ||
5183                 (0x20 != srb->cmnd[4]) || (0x43 != srb->cmnd[5]) ||
5184                 (0x61 != srb->cmnd[6]) || (0x72 != srb->cmnd[7]) ||
5185                 (0x64 != srb->cmnd[8])) {
5186                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5187                 rtsx_trace(chip);
5188                 return TRANSPORT_FAILED;
5189         }
5190
5191         switch (srb->cmnd[1] & 0x0F) {
5192         case 0:
5193 #ifdef SUPPORT_SD_LOCK
5194                 if (0x64 == srb->cmnd[9])
5195                         sd_card->sd_lock_status |= SD_SDR_RST;
5196 #endif
5197                 retval = reset_sd_card(chip);
5198                 if (retval != STATUS_SUCCESS) {
5199 #ifdef SUPPORT_SD_LOCK
5200                         sd_card->sd_lock_status &= ~SD_SDR_RST;
5201 #endif
5202                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
5203                         sd_card->pre_cmd_err = 1;
5204                         rtsx_trace(chip);
5205                         return TRANSPORT_FAILED;
5206                 }
5207 #ifdef SUPPORT_SD_LOCK
5208                 sd_card->sd_lock_status &= ~SD_SDR_RST;
5209 #endif
5210                 break;
5211
5212         case 1:
5213                 retval = soft_reset_sd_card(chip);
5214                 if (retval != STATUS_SUCCESS) {
5215                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
5216                         sd_card->pre_cmd_err = 1;
5217                         rtsx_trace(chip);
5218                         return TRANSPORT_FAILED;
5219                 }
5220                 break;
5221
5222         default:
5223                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5224                 rtsx_trace(chip);
5225                 return TRANSPORT_FAILED;
5226         }
5227
5228         scsi_set_resid(srb, 0);
5229         return TRANSPORT_GOOD;
5230 }
5231 #endif
5232
5233 void sd_cleanup_work(struct rtsx_chip *chip)
5234 {
5235         struct sd_info *sd_card = &(chip->sd_card);
5236
5237         if (sd_card->seq_mode) {
5238                 dev_dbg(rtsx_dev(chip), "SD: stop transmission\n");
5239                 sd_stop_seq_mode(chip);
5240                 sd_card->cleanup_counter = 0;
5241         }
5242 }
5243
5244 int sd_power_off_card3v3(struct rtsx_chip *chip)
5245 {
5246         int retval;
5247
5248         retval = disable_card_clock(chip, SD_CARD);
5249         if (retval != STATUS_SUCCESS) {
5250                 rtsx_trace(chip);
5251                 return STATUS_FAIL;
5252         }
5253
5254         retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
5255         if (retval) {
5256                 rtsx_trace(chip);
5257                 return retval;
5258         }
5259
5260         if (!chip->ft2_fast_mode) {
5261                 retval = card_power_off(chip, SD_CARD);
5262                 if (retval != STATUS_SUCCESS) {
5263                         rtsx_trace(chip);
5264                         return STATUS_FAIL;
5265                 }
5266
5267                 wait_timeout(50);
5268         }
5269
5270         if (chip->asic_code) {
5271                 retval = sd_pull_ctl_disable(chip);
5272                 if (retval != STATUS_SUCCESS) {
5273                         rtsx_trace(chip);
5274                         return STATUS_FAIL;
5275                 }
5276         } else {
5277                 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
5278                                              FPGA_SD_PULL_CTL_BIT | 0x20,
5279                                              FPGA_SD_PULL_CTL_BIT);
5280                 if (retval) {
5281                         rtsx_trace(chip);
5282                         return retval;
5283                 }
5284         }
5285
5286         return STATUS_SUCCESS;
5287 }
5288
5289 int release_sd_card(struct rtsx_chip *chip)
5290 {
5291         struct sd_info *sd_card = &(chip->sd_card);
5292         int retval;
5293
5294         chip->card_ready &= ~SD_CARD;
5295         chip->card_fail &= ~SD_CARD;
5296         chip->card_wp &= ~SD_CARD;
5297
5298         chip->sd_io = 0;
5299         chip->sd_int = 0;
5300
5301 #ifdef SUPPORT_SD_LOCK
5302         sd_card->sd_lock_status = 0;
5303         sd_card->sd_erase_status = 0;
5304 #endif
5305
5306         memset(sd_card->raw_csd, 0, 16);
5307         memset(sd_card->raw_scr, 0, 8);
5308
5309         retval = sd_power_off_card3v3(chip);
5310         if (retval != STATUS_SUCCESS) {
5311                 rtsx_trace(chip);
5312                 return STATUS_FAIL;
5313         }
5314
5315         return STATUS_SUCCESS;
5316 }