1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
31 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
33 struct ms_info *ms_card = &(chip->ms_card);
35 ms_card->err_code = err_code;
38 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
40 struct ms_info *ms_card = &(chip->ms_card);
42 return (ms_card->err_code == err_code);
45 static int ms_parse_err_code(struct rtsx_chip *chip)
51 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
52 u8 tpc, u8 cnt, u8 cfg)
54 struct ms_info *ms_card = &(chip->ms_card);
58 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
66 0x01, PINGPONG_BUFFER);
68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
69 0xFF, MS_TRANSFER_START | trans_mode);
70 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
71 MS_TRANSFER_END, MS_TRANSFER_END);
73 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
75 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
77 rtsx_clear_ms_error(chip);
78 ms_set_err_code(chip, MS_TO_ERROR);
80 return ms_parse_err_code(chip);
83 ptr = rtsx_get_cmd_data(chip) + 1;
85 if (!(tpc & 0x08)) { /* Read Packet */
86 if (*ptr & MS_CRC16_ERR) {
87 ms_set_err_code(chip, MS_CRC16_ERROR);
89 return ms_parse_err_code(chip);
91 } else { /* Write Packet */
92 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
93 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
94 ms_set_err_code(chip, MS_CMD_NK);
96 return ms_parse_err_code(chip);
101 if (*ptr & MS_RDY_TIMEOUT) {
102 rtsx_clear_ms_error(chip);
103 ms_set_err_code(chip, MS_TO_ERROR);
105 return ms_parse_err_code(chip);
108 return STATUS_SUCCESS;
111 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
112 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
113 int use_sg, void *buf, int buf_len)
116 u8 val, err_code = 0;
117 enum dma_data_direction dir;
119 if (!buf || !buf_len) {
124 if (trans_mode == MS_TM_AUTO_READ) {
125 dir = DMA_FROM_DEVICE;
126 err_code = MS_FLASH_READ_ERROR;
127 } else if (trans_mode == MS_TM_AUTO_WRITE) {
129 err_code = MS_FLASH_WRITE_ERROR;
137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
138 rtsx_add_cmd(chip, WRITE_REG_CMD,
139 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
141 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
144 rtsx_add_cmd(chip, WRITE_REG_CMD,
145 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
147 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
150 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
152 rtsx_add_cmd(chip, WRITE_REG_CMD,
153 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
154 rtsx_add_cmd(chip, CHECK_REG_CMD,
155 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
157 rtsx_send_cmd_no_wait(chip);
159 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
160 use_sg, dir, chip->mspro_timeout);
162 ms_set_err_code(chip, err_code);
163 if (retval == -ETIMEDOUT)
164 retval = STATUS_TIMEDOUT;
166 retval = STATUS_FAIL;
172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
177 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
182 return STATUS_SUCCESS;
185 static int ms_write_bytes(struct rtsx_chip *chip,
186 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
188 struct ms_info *ms_card = &(chip->ms_card);
191 if (!data || (data_len < cnt)) {
198 for (i = 0; i < cnt; i++) {
199 rtsx_add_cmd(chip, WRITE_REG_CMD,
200 PPBUF_BASE2 + i, 0xFF, data[i]);
203 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
205 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
206 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
207 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
208 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
209 0x01, PINGPONG_BUFFER);
211 rtsx_add_cmd(chip, WRITE_REG_CMD,
212 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
213 rtsx_add_cmd(chip, CHECK_REG_CMD,
214 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
216 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
220 rtsx_read_register(chip, MS_TRANS_CFG, &val);
221 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
223 rtsx_clear_ms_error(chip);
226 if (val & MS_CRC16_ERR) {
227 ms_set_err_code(chip, MS_CRC16_ERROR);
229 return ms_parse_err_code(chip);
232 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
233 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
234 ms_set_err_code(chip, MS_CMD_NK);
236 return ms_parse_err_code(chip);
241 if (val & MS_RDY_TIMEOUT) {
242 ms_set_err_code(chip, MS_TO_ERROR);
244 return ms_parse_err_code(chip);
247 ms_set_err_code(chip, MS_TO_ERROR);
249 return ms_parse_err_code(chip);
252 return STATUS_SUCCESS;
255 static int ms_read_bytes(struct rtsx_chip *chip,
256 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
258 struct ms_info *ms_card = &(chip->ms_card);
269 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
270 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
271 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
272 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
273 0x01, PINGPONG_BUFFER);
275 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
276 MS_TRANSFER_START | MS_TM_READ_BYTES);
277 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
278 MS_TRANSFER_END, MS_TRANSFER_END);
280 for (i = 0; i < data_len - 1; i++)
281 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
284 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
286 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
289 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
293 rtsx_read_register(chip, MS_TRANS_CFG, &val);
294 rtsx_clear_ms_error(chip);
297 if (val & MS_CRC16_ERR) {
298 ms_set_err_code(chip, MS_CRC16_ERROR);
300 return ms_parse_err_code(chip);
303 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
304 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
305 ms_set_err_code(chip, MS_CMD_NK);
307 return ms_parse_err_code(chip);
312 if (val & MS_RDY_TIMEOUT) {
313 ms_set_err_code(chip, MS_TO_ERROR);
315 return ms_parse_err_code(chip);
318 ms_set_err_code(chip, MS_TO_ERROR);
320 return ms_parse_err_code(chip);
323 ptr = rtsx_get_cmd_data(chip) + 1;
325 for (i = 0; i < data_len; i++)
328 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
329 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
330 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
334 return STATUS_SUCCESS;
337 static int ms_set_rw_reg_addr(struct rtsx_chip *chip,
338 u8 read_start, u8 read_cnt, u8 write_start, u8 write_cnt)
343 data[0] = read_start;
345 data[2] = write_start;
348 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
349 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
350 NO_WAIT_INT, data, 4);
351 if (retval == STATUS_SUCCESS)
352 return STATUS_SUCCESS;
353 rtsx_clear_ms_error(chip);
360 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
367 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
370 static int ms_set_init_para(struct rtsx_chip *chip)
372 struct ms_info *ms_card = &(chip->ms_card);
375 if (CHK_HG8BIT(ms_card)) {
377 ms_card->ms_clock = chip->asic_ms_hg_clk;
379 ms_card->ms_clock = chip->fpga_ms_hg_clk;
381 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
383 ms_card->ms_clock = chip->asic_ms_4bit_clk;
385 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
389 ms_card->ms_clock = chip->asic_ms_1bit_clk;
391 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
394 retval = switch_clock(chip, ms_card->ms_clock);
395 if (retval != STATUS_SUCCESS) {
400 retval = select_card(chip, MS_CARD);
401 if (retval != STATUS_SUCCESS) {
406 return STATUS_SUCCESS;
409 static int ms_switch_clock(struct rtsx_chip *chip)
411 struct ms_info *ms_card = &(chip->ms_card);
414 retval = select_card(chip, MS_CARD);
415 if (retval != STATUS_SUCCESS) {
420 retval = switch_clock(chip, ms_card->ms_clock);
421 if (retval != STATUS_SUCCESS) {
426 return STATUS_SUCCESS;
429 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
433 if (CHECK_PID(chip, 0x5208)) {
434 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
435 MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
440 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
441 MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
446 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
447 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
452 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
453 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
458 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
459 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
464 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
465 MS_D5_PD | MS_D4_PD);
470 } else if (CHECK_PID(chip, 0x5288)) {
471 if (CHECK_BARO_PKG(chip, QFN)) {
472 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
478 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
484 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
490 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
499 return STATUS_SUCCESS;
502 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
508 if (CHECK_PID(chip, 0x5208)) {
509 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
510 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
511 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
512 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
513 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
514 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
515 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
516 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
517 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
518 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
519 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
520 MS_D5_PD | MS_D4_PD);
521 } else if (CHECK_PID(chip, 0x5288)) {
522 if (CHECK_BARO_PKG(chip, QFN)) {
523 rtsx_add_cmd(chip, WRITE_REG_CMD,
524 CARD_PULL_CTL1, 0xFF, 0x55);
525 rtsx_add_cmd(chip, WRITE_REG_CMD,
526 CARD_PULL_CTL2, 0xFF, 0x45);
527 rtsx_add_cmd(chip, WRITE_REG_CMD,
528 CARD_PULL_CTL3, 0xFF, 0x4B);
529 rtsx_add_cmd(chip, WRITE_REG_CMD,
530 CARD_PULL_CTL4, 0xFF, 0x29);
534 retval = rtsx_send_cmd(chip, MS_CARD, 100);
540 return STATUS_SUCCESS;
543 static int ms_prepare_reset(struct rtsx_chip *chip)
545 struct ms_info *ms_card = &(chip->ms_card);
549 ms_card->ms_type = 0;
550 ms_card->check_ms_flow = 0;
551 ms_card->switch_8bit_fail = 0;
552 ms_card->delay_write.delay_write_flag = 0;
554 ms_card->pro_under_formatting = 0;
556 retval = ms_power_off_card3v3(chip);
557 if (retval != STATUS_SUCCESS) {
562 if (!chip->ft2_fast_mode)
565 retval = enable_card_clock(chip, MS_CARD);
566 if (retval != STATUS_SUCCESS) {
571 if (chip->asic_code) {
572 retval = ms_pull_ctl_enable(chip);
573 if (retval != STATUS_SUCCESS) {
578 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
579 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
586 if (!chip->ft2_fast_mode) {
587 retval = card_power_on(chip, MS_CARD);
588 if (retval != STATUS_SUCCESS) {
596 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
597 oc_mask = MS_OC_NOW | MS_OC_EVER;
599 oc_mask = SD_OC_NOW | SD_OC_EVER;
601 if (chip->ocp_stat & oc_mask) {
602 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
610 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
617 if (chip->asic_code) {
618 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
619 SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
625 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
626 SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
632 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
633 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
638 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
639 MS_STOP | MS_CLR_ERR);
645 retval = ms_set_init_para(chip);
646 if (retval != STATUS_SUCCESS) {
651 return STATUS_SUCCESS;
654 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
656 struct ms_info *ms_card = &(chip->ms_card);
660 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
661 if (retval != STATUS_SUCCESS) {
666 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
667 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
669 if (retval == STATUS_SUCCESS)
672 if (i == MS_MAX_RETRY_COUNT) {
677 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
682 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
685 ms_card->check_ms_flow = 1;
691 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
696 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
698 ms_card->check_ms_flow = 1;
703 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
708 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
710 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
716 chip->card_wp |= MS_CARD;
718 chip->card_wp &= ~MS_CARD;
720 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
721 chip->card_wp |= MS_CARD;
723 ms_card->check_ms_flow = 1;
728 ms_card->ms_type |= TYPE_MSPRO;
730 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
735 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
737 ms_card->ms_type &= 0x0F;
738 } else if (val == 7) {
740 ms_card->ms_type |= MS_HG;
742 ms_card->ms_type &= 0x0F;
749 return STATUS_SUCCESS;
752 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
757 /* Confirm CPU StartUp */
760 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
761 ms_set_err_code(chip, MS_NO_CARD);
766 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
767 retval = ms_read_bytes(chip, GET_INT, 1,
768 NO_WAIT_INT, &val, 1);
769 if (retval == STATUS_SUCCESS)
772 if (i == MS_MAX_RETRY_COUNT) {
784 } while (!(val & INT_REG_CED));
786 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
787 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
788 if (retval == STATUS_SUCCESS)
791 if (i == MS_MAX_RETRY_COUNT) {
796 if (val & INT_REG_ERR) {
797 if (val & INT_REG_CMDNK)
798 chip->card_wp |= (MS_CARD);
804 /* -- end confirm CPU startup */
806 return STATUS_SUCCESS;
809 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
814 data[0] = PARALLEL_4BIT_IF;
816 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
817 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
819 if (retval == STATUS_SUCCESS)
822 if (retval != STATUS_SUCCESS) {
827 return STATUS_SUCCESS;
830 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
832 struct ms_info *ms_card = &(chip->ms_card);
836 data[0] = PARALLEL_8BIT_IF;
838 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
839 retval = ms_write_bytes(chip, WRITE_REG, 1,
840 NO_WAIT_INT, data, 2);
841 if (retval == STATUS_SUCCESS)
844 if (retval != STATUS_SUCCESS) {
849 retval = rtsx_write_register(chip, MS_CFG, 0x98,
850 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
855 ms_card->ms_type |= MS_8BIT;
856 retval = ms_set_init_para(chip);
857 if (retval != STATUS_SUCCESS) {
862 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
863 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
865 if (retval != STATUS_SUCCESS) {
871 return STATUS_SUCCESS;
874 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
876 struct ms_info *ms_card = &(chip->ms_card);
879 for (i = 0; i < 3; i++) {
880 retval = ms_prepare_reset(chip);
881 if (retval != STATUS_SUCCESS) {
886 retval = ms_identify_media_type(chip, switch_8bit_bus);
887 if (retval != STATUS_SUCCESS) {
892 retval = ms_confirm_cpu_startup(chip);
893 if (retval != STATUS_SUCCESS) {
898 retval = ms_switch_parallel_bus(chip);
899 if (retval != STATUS_SUCCESS) {
900 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
901 ms_set_err_code(chip, MS_NO_CARD);
911 if (retval != STATUS_SUCCESS) {
916 /* Switch MS-PRO into Parallel mode */
917 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
922 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
929 retval = ms_set_init_para(chip);
930 if (retval != STATUS_SUCCESS) {
935 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
936 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
937 retval = ms_switch_8bit_bus(chip);
938 if (retval != STATUS_SUCCESS) {
939 ms_card->switch_8bit_fail = 1;
945 return STATUS_SUCCESS;
949 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
954 ms_cleanup_work(chip);
956 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
957 if (retval != STATUS_SUCCESS) {
969 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
970 if (retval != STATUS_SUCCESS) {
975 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
976 if (retval != STATUS_SUCCESS) {
981 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
986 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
991 return STATUS_SUCCESS;
995 static int ms_read_attribute_info(struct rtsx_chip *chip)
997 struct ms_info *ms_card = &(chip->ms_card);
999 u8 val, *buf, class_code, device_type, sub_class, data[16];
1000 u16 total_blk = 0, blk_size = 0;
1002 u32 xc_total_blk = 0, xc_blk_size = 0;
1004 u32 sys_info_addr = 0, sys_info_size;
1005 #ifdef SUPPORT_PCGL_1P18
1006 u32 model_name_addr = 0, model_name_size;
1007 int found_sys_info = 0, found_model_name = 0;
1010 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
1011 if (retval != STATUS_SUCCESS) {
1016 if (CHK_MS8BIT(ms_card))
1017 data[0] = PARALLEL_8BIT_IF;
1019 data[0] = PARALLEL_4BIT_IF;
1030 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1031 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
1033 if (retval == STATUS_SUCCESS)
1036 if (retval != STATUS_SUCCESS) {
1041 buf = kmalloc(64 * 512, GFP_KERNEL);
1044 return STATUS_ERROR;
1047 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1048 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
1049 if (retval != STATUS_SUCCESS)
1052 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1053 if (retval != STATUS_SUCCESS) {
1058 if (!(val & MS_INT_BREQ)) {
1063 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
1064 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
1065 0, 0, buf, 64 * 512);
1066 if (retval == STATUS_SUCCESS)
1069 rtsx_clear_ms_error(chip);
1071 if (retval != STATUS_SUCCESS) {
1079 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1080 if (retval != STATUS_SUCCESS) {
1086 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
1089 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
1090 PRO_READ_LONG_DATA, 0, WAIT_INT);
1091 if (retval != STATUS_SUCCESS) {
1100 if (retval != STATUS_SUCCESS) {
1106 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
1107 /* Signature code is wrong */
1113 if ((buf[4] < 1) || (buf[4] > 12)) {
1119 for (i = 0; i < buf[4]; i++) {
1120 int cur_addr_off = 16 + i * 12;
1123 if ((buf[cur_addr_off + 8] == 0x10) ||
1124 (buf[cur_addr_off + 8] == 0x13))
1126 if (buf[cur_addr_off + 8] == 0x10)
1129 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1130 ((u32)buf[cur_addr_off + 1] << 16) |
1131 ((u32)buf[cur_addr_off + 2] << 8) |
1132 buf[cur_addr_off + 3];
1133 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
1134 ((u32)buf[cur_addr_off + 5] << 16) |
1135 ((u32)buf[cur_addr_off + 6] << 8) |
1136 buf[cur_addr_off + 7];
1137 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
1138 sys_info_addr, sys_info_size);
1139 if (sys_info_size != 96) {
1144 if (sys_info_addr < 0x1A0) {
1149 if ((sys_info_size + sys_info_addr) > 0x8000) {
1156 if (buf[cur_addr_off + 8] == 0x13)
1157 ms_card->ms_type |= MS_XC;
1159 #ifdef SUPPORT_PCGL_1P18
1165 #ifdef SUPPORT_PCGL_1P18
1166 if (buf[cur_addr_off + 8] == 0x15) {
1167 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1168 ((u32)buf[cur_addr_off + 1] << 16) |
1169 ((u32)buf[cur_addr_off + 2] << 8) |
1170 buf[cur_addr_off + 3];
1171 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1172 ((u32)buf[cur_addr_off + 5] << 16) |
1173 ((u32)buf[cur_addr_off + 6] << 8) |
1174 buf[cur_addr_off + 7];
1175 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1176 model_name_addr, model_name_size);
1177 if (model_name_size != 48) {
1182 if (model_name_addr < 0x1A0) {
1187 if ((model_name_size + model_name_addr) > 0x8000) {
1193 found_model_name = 1;
1196 if (found_sys_info && found_model_name)
1207 class_code = buf[sys_info_addr + 0];
1208 device_type = buf[sys_info_addr + 56];
1209 sub_class = buf[sys_info_addr + 46];
1211 if (CHK_MSXC(ms_card)) {
1212 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1213 ((u32)buf[sys_info_addr + 7] << 16) |
1214 ((u32)buf[sys_info_addr + 8] << 8) |
1215 buf[sys_info_addr + 9];
1216 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1217 ((u32)buf[sys_info_addr + 33] << 16) |
1218 ((u32)buf[sys_info_addr + 34] << 8) |
1219 buf[sys_info_addr + 35];
1220 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1221 xc_total_blk, xc_blk_size);
1223 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1224 buf[sys_info_addr + 7];
1225 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1226 buf[sys_info_addr + 3];
1227 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1228 total_blk, blk_size);
1231 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1232 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1233 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1234 total_blk, blk_size);
1237 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1238 class_code, device_type, sub_class);
1240 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1241 #ifdef SUPPORT_PCGL_1P18
1242 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1248 if (CHK_MSXC(ms_card)) {
1249 if (class_code != 0x03) {
1254 if (class_code != 0x02) {
1260 if (class_code != 0x02) {
1266 if (device_type != 0x00) {
1267 if ((device_type == 0x01) || (device_type == 0x02) ||
1268 (device_type == 0x03)) {
1269 chip->card_wp |= MS_CARD;
1276 if (sub_class & 0xC0) {
1281 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1282 class_code, device_type, sub_class);
1285 if (CHK_MSXC(ms_card)) {
1286 chip->capacity[chip->card2lun[MS_CARD]] =
1287 ms_card->capacity = xc_total_blk * xc_blk_size;
1289 chip->capacity[chip->card2lun[MS_CARD]] =
1290 ms_card->capacity = total_blk * blk_size;
1293 ms_card->capacity = total_blk * blk_size;
1294 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1297 return STATUS_SUCCESS;
1300 #ifdef SUPPORT_MAGIC_GATE
1301 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1302 int type, u8 mg_entry_num);
1305 static int reset_ms_pro(struct rtsx_chip *chip)
1307 struct ms_info *ms_card = &(chip->ms_card);
1309 #ifdef XC_POWERCLASS
1310 u8 change_power_class;
1312 if (chip->ms_power_class_en & 0x02)
1313 change_power_class = 2;
1314 else if (chip->ms_power_class_en & 0x01)
1315 change_power_class = 1;
1317 change_power_class = 0;
1320 #ifdef XC_POWERCLASS
1323 retval = ms_pro_reset_flow(chip, 1);
1324 if (retval != STATUS_SUCCESS) {
1325 if (ms_card->switch_8bit_fail) {
1326 retval = ms_pro_reset_flow(chip, 0);
1327 if (retval != STATUS_SUCCESS) {
1337 retval = ms_read_attribute_info(chip);
1338 if (retval != STATUS_SUCCESS) {
1343 #ifdef XC_POWERCLASS
1344 if (CHK_HG8BIT(ms_card))
1345 change_power_class = 0;
1347 if (change_power_class && CHK_MSXC(ms_card)) {
1348 u8 power_class_en = chip->ms_power_class_en;
1350 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1352 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1353 change_power_class);
1355 if (change_power_class)
1356 power_class_en &= (1 << (change_power_class - 1));
1360 if (power_class_en) {
1361 u8 power_class_mode =
1362 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1363 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1365 if (change_power_class > power_class_mode)
1366 change_power_class = power_class_mode;
1367 if (change_power_class) {
1368 retval = msxc_change_power(chip,
1369 change_power_class);
1370 if (retval != STATUS_SUCCESS) {
1371 change_power_class--;
1379 #ifdef SUPPORT_MAGIC_GATE
1380 retval = mg_set_tpc_para_sub(chip, 0, 0);
1381 if (retval != STATUS_SUCCESS) {
1387 if (CHK_HG8BIT(ms_card))
1388 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1390 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1392 return STATUS_SUCCESS;
1395 static int ms_read_status_reg(struct rtsx_chip *chip)
1400 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1401 if (retval != STATUS_SUCCESS) {
1406 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1407 if (retval != STATUS_SUCCESS) {
1412 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1413 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1418 return STATUS_SUCCESS;
1422 static int ms_read_extra_data(struct rtsx_chip *chip,
1423 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1425 struct ms_info *ms_card = &(chip->ms_card);
1429 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1431 if (retval != STATUS_SUCCESS) {
1436 if (CHK_MS4BIT(ms_card)) {
1437 /* Parallel interface */
1440 /* Serial interface */
1444 data[2] = (u8)(block_addr >> 8);
1445 data[3] = (u8)block_addr;
1449 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1450 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1452 if (retval == STATUS_SUCCESS)
1455 if (i == MS_MAX_RETRY_COUNT) {
1460 ms_set_err_code(chip, MS_NO_ERROR);
1462 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1463 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1464 if (retval == STATUS_SUCCESS)
1467 if (i == MS_MAX_RETRY_COUNT) {
1472 ms_set_err_code(chip, MS_NO_ERROR);
1473 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1474 if (retval != STATUS_SUCCESS) {
1479 if (val & INT_REG_CMDNK) {
1480 ms_set_err_code(chip, MS_CMD_NK);
1484 if (val & INT_REG_CED) {
1485 if (val & INT_REG_ERR) {
1486 retval = ms_read_status_reg(chip);
1487 if (retval != STATUS_SUCCESS) {
1492 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1493 MS_EXTRA_SIZE, SystemParm, 6);
1494 if (retval != STATUS_SUCCESS) {
1501 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1502 data, MS_EXTRA_SIZE);
1503 if (retval != STATUS_SUCCESS) {
1508 if (buf && buf_len) {
1509 if (buf_len > MS_EXTRA_SIZE)
1510 buf_len = MS_EXTRA_SIZE;
1511 memcpy(buf, data, buf_len);
1514 return STATUS_SUCCESS;
1517 static int ms_write_extra_data(struct rtsx_chip *chip,
1518 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1520 struct ms_info *ms_card = &(chip->ms_card);
1524 if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1529 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1530 SystemParm, 6 + MS_EXTRA_SIZE);
1531 if (retval != STATUS_SUCCESS) {
1536 if (CHK_MS4BIT(ms_card))
1542 data[2] = (u8)(block_addr >> 8);
1543 data[3] = (u8)block_addr;
1547 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1548 data[i] = buf[i - 6];
1550 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1551 NO_WAIT_INT, data, 16);
1552 if (retval != STATUS_SUCCESS) {
1557 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1558 if (retval != STATUS_SUCCESS) {
1563 ms_set_err_code(chip, MS_NO_ERROR);
1564 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1565 if (retval != STATUS_SUCCESS) {
1570 if (val & INT_REG_CMDNK) {
1571 ms_set_err_code(chip, MS_CMD_NK);
1575 if (val & INT_REG_CED) {
1576 if (val & INT_REG_ERR) {
1577 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1583 return STATUS_SUCCESS;
1587 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1589 struct ms_info *ms_card = &(chip->ms_card);
1593 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1595 if (retval != STATUS_SUCCESS) {
1600 if (CHK_MS4BIT(ms_card))
1606 data[2] = (u8)(block_addr >> 8);
1607 data[3] = (u8)block_addr;
1611 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1612 if (retval != STATUS_SUCCESS) {
1617 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1618 if (retval != STATUS_SUCCESS) {
1623 ms_set_err_code(chip, MS_NO_ERROR);
1624 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1625 if (retval != STATUS_SUCCESS) {
1630 if (val & INT_REG_CMDNK) {
1631 ms_set_err_code(chip, MS_CMD_NK);
1636 if (val & INT_REG_CED) {
1637 if (val & INT_REG_ERR) {
1638 if (!(val & INT_REG_BREQ)) {
1639 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1643 retval = ms_read_status_reg(chip);
1644 if (retval != STATUS_SUCCESS)
1645 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1648 if (!(val & INT_REG_BREQ)) {
1649 ms_set_err_code(chip, MS_BREQ_ERROR);
1656 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1658 if (retval != STATUS_SUCCESS) {
1663 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1668 return STATUS_SUCCESS;
1672 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1674 struct ms_info *ms_card = &(chip->ms_card);
1676 u8 val, data[8], extra[MS_EXTRA_SIZE];
1678 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1679 if (retval != STATUS_SUCCESS) {
1684 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1686 if (retval != STATUS_SUCCESS) {
1691 ms_set_err_code(chip, MS_NO_ERROR);
1693 if (CHK_MS4BIT(ms_card))
1699 data[2] = (u8)(phy_blk >> 8);
1700 data[3] = (u8)phy_blk;
1703 data[6] = extra[0] & 0x7F;
1706 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1707 if (retval != STATUS_SUCCESS) {
1712 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1713 if (retval != STATUS_SUCCESS) {
1718 ms_set_err_code(chip, MS_NO_ERROR);
1719 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1720 if (retval != STATUS_SUCCESS) {
1725 if (val & INT_REG_CMDNK) {
1726 ms_set_err_code(chip, MS_CMD_NK);
1731 if (val & INT_REG_CED) {
1732 if (val & INT_REG_ERR) {
1733 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1739 return STATUS_SUCCESS;
1743 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1745 struct ms_info *ms_card = &(chip->ms_card);
1749 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1751 if (retval != STATUS_SUCCESS) {
1756 ms_set_err_code(chip, MS_NO_ERROR);
1758 if (CHK_MS4BIT(ms_card))
1764 data[2] = (u8)(phy_blk >> 8);
1765 data[3] = (u8)phy_blk;
1769 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1770 if (retval != STATUS_SUCCESS) {
1776 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1777 if (retval != STATUS_SUCCESS) {
1782 ms_set_err_code(chip, MS_NO_ERROR);
1783 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1784 if (retval != STATUS_SUCCESS) {
1789 if (val & INT_REG_CMDNK) {
1795 ms_set_err_code(chip, MS_CMD_NK);
1796 ms_set_bad_block(chip, phy_blk);
1801 if (val & INT_REG_CED) {
1802 if (val & INT_REG_ERR) {
1803 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1809 return STATUS_SUCCESS;
1813 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1815 if (!extra || (extra_len < MS_EXTRA_SIZE))
1818 memset(extra, 0xFF, MS_EXTRA_SIZE);
1820 if (type == setPS_NG) {
1821 /* set page status as 1:NG,and block status keep 1:OK */
1824 /* set page status as 0:Data Error,and block status keep 1:OK */
1828 extra[2] = (u8)(log_blk >> 8);
1829 extra[3] = (u8)log_blk;
1832 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1833 u8 start_page, u8 end_page)
1836 u8 extra[MS_EXTRA_SIZE], i;
1838 memset(extra, 0xff, MS_EXTRA_SIZE);
1840 extra[0] = 0xf8; /* Block, page OK, data erased */
1842 extra[2] = (u8)(log_blk >> 8);
1843 extra[3] = (u8)log_blk;
1845 for (i = start_page; i < end_page; i++) {
1846 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1847 ms_set_err_code(chip, MS_NO_CARD);
1852 retval = ms_write_extra_data(chip, phy_blk, i,
1853 extra, MS_EXTRA_SIZE);
1854 if (retval != STATUS_SUCCESS) {
1860 return STATUS_SUCCESS;
1863 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1864 u16 log_blk, u8 start_page, u8 end_page)
1866 struct ms_info *ms_card = &(chip->ms_card);
1867 bool uncorrect_flag = false;
1868 int retval, rty_cnt;
1869 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1871 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1872 old_blk, new_blk, log_blk);
1873 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1874 start_page, end_page);
1876 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1877 if (retval != STATUS_SUCCESS) {
1882 retval = ms_read_status_reg(chip);
1883 if (retval != STATUS_SUCCESS) {
1888 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1894 if (val & BUF_FULL) {
1895 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1896 if (retval != STATUS_SUCCESS) {
1901 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1902 if (retval != STATUS_SUCCESS) {
1907 if (!(val & INT_REG_CED)) {
1908 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1914 for (i = start_page; i < end_page; i++) {
1915 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1916 ms_set_err_code(chip, MS_NO_CARD);
1921 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1923 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1924 MS_EXTRA_SIZE, SystemParm, 6);
1925 if (retval != STATUS_SUCCESS) {
1930 ms_set_err_code(chip, MS_NO_ERROR);
1932 if (CHK_MS4BIT(ms_card))
1938 data[2] = (u8)(old_blk >> 8);
1939 data[3] = (u8)old_blk;
1943 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1945 if (retval != STATUS_SUCCESS) {
1950 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1951 if (retval != STATUS_SUCCESS) {
1956 ms_set_err_code(chip, MS_NO_ERROR);
1957 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1958 if (retval != STATUS_SUCCESS) {
1963 if (val & INT_REG_CMDNK) {
1964 ms_set_err_code(chip, MS_CMD_NK);
1969 if (val & INT_REG_CED) {
1970 if (val & INT_REG_ERR) {
1971 retval = ms_read_status_reg(chip);
1972 if (retval != STATUS_SUCCESS) {
1973 uncorrect_flag = true;
1974 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1976 uncorrect_flag = false;
1979 retval = ms_transfer_tpc(chip,
1983 if (retval != STATUS_SUCCESS) {
1988 if (uncorrect_flag) {
1989 ms_set_page_status(log_blk, setPS_NG,
1990 extra, MS_EXTRA_SIZE);
1994 ms_write_extra_data(chip, old_blk, i,
1995 extra, MS_EXTRA_SIZE);
1996 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1998 MS_SET_BAD_BLOCK_FLG(ms_card);
2000 ms_set_page_status(log_blk, setPS_Error,
2001 extra, MS_EXTRA_SIZE);
2002 ms_write_extra_data(chip, new_blk, i,
2003 extra, MS_EXTRA_SIZE);
2007 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
2009 retval = ms_transfer_tpc(
2014 if (retval == STATUS_SUCCESS)
2017 if (rty_cnt == MS_MAX_RETRY_COUNT) {
2023 if (!(val & INT_REG_BREQ)) {
2024 ms_set_err_code(chip, MS_BREQ_ERROR);
2030 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2031 MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE));
2033 ms_set_err_code(chip, MS_NO_ERROR);
2035 if (CHK_MS4BIT(ms_card))
2041 data[2] = (u8)(new_blk >> 8);
2042 data[3] = (u8)new_blk;
2046 if ((extra[0] & 0x60) != 0x60)
2052 data[6 + 2] = (u8)(log_blk >> 8);
2053 data[6 + 3] = (u8)log_blk;
2055 for (j = 4; j <= MS_EXTRA_SIZE; j++)
2058 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
2059 NO_WAIT_INT, data, 16);
2060 if (retval != STATUS_SUCCESS) {
2065 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2066 if (retval != STATUS_SUCCESS) {
2071 ms_set_err_code(chip, MS_NO_ERROR);
2072 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2073 if (retval != STATUS_SUCCESS) {
2078 if (val & INT_REG_CMDNK) {
2079 ms_set_err_code(chip, MS_CMD_NK);
2084 if (val & INT_REG_CED) {
2085 if (val & INT_REG_ERR) {
2086 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
2093 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2094 MS_EXTRA_SIZE, SystemParm, 7);
2095 if (retval != STATUS_SUCCESS) {
2100 ms_set_err_code(chip, MS_NO_ERROR);
2102 if (CHK_MS4BIT(ms_card))
2108 data[2] = (u8)(old_blk >> 8);
2109 data[3] = (u8)old_blk;
2115 retval = ms_write_bytes(chip, WRITE_REG, 7,
2116 NO_WAIT_INT, data, 8);
2117 if (retval != STATUS_SUCCESS) {
2122 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2123 if (retval != STATUS_SUCCESS) {
2128 ms_set_err_code(chip, MS_NO_ERROR);
2129 retval = ms_read_bytes(chip, GET_INT, 1,
2130 NO_WAIT_INT, &val, 1);
2131 if (retval != STATUS_SUCCESS) {
2136 if (val & INT_REG_CMDNK) {
2137 ms_set_err_code(chip, MS_CMD_NK);
2142 if (val & INT_REG_CED) {
2143 if (val & INT_REG_ERR) {
2144 ms_set_err_code(chip,
2145 MS_FLASH_WRITE_ERROR);
2153 return STATUS_SUCCESS;
2157 static int reset_ms(struct rtsx_chip *chip)
2159 struct ms_info *ms_card = &(chip->ms_card);
2161 u16 i, reg_addr, block_size;
2162 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
2163 #ifndef SUPPORT_MAGIC_GATE
2167 retval = ms_prepare_reset(chip);
2168 if (retval != STATUS_SUCCESS) {
2173 ms_card->ms_type |= TYPE_MS;
2175 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
2176 if (retval != STATUS_SUCCESS) {
2181 retval = ms_read_status_reg(chip);
2182 if (retval != STATUS_SUCCESS) {
2187 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
2192 if (val & WRT_PRTCT)
2193 chip->card_wp |= MS_CARD;
2195 chip->card_wp &= ~MS_CARD;
2200 /* Search Boot Block */
2201 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
2202 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2203 ms_set_err_code(chip, MS_NO_CARD);
2208 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
2209 if (retval != STATUS_SUCCESS) {
2214 if (extra[0] & BLOCK_OK) {
2215 if (!(extra[1] & NOT_BOOT_BLOCK)) {
2216 ms_card->boot_block = i;
2223 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
2224 dev_dbg(rtsx_dev(chip), "No boot block found!");
2229 for (j = 0; j < 3; j++) {
2230 retval = ms_read_page(chip, ms_card->boot_block, j);
2231 if (retval != STATUS_SUCCESS) {
2232 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
2233 i = ms_card->boot_block + 1;
2234 ms_set_err_code(chip, MS_NO_ERROR);
2240 retval = ms_read_page(chip, ms_card->boot_block, 0);
2241 if (retval != STATUS_SUCCESS) {
2246 /* Read MS system information as sys_info */
2247 rtsx_init_cmd(chip);
2249 for (i = 0; i < 96; i++)
2250 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
2252 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2258 ptr = rtsx_get_cmd_data(chip);
2259 memcpy(ms_card->raw_sys_info, ptr, 96);
2261 /* Read useful block contents */
2262 rtsx_init_cmd(chip);
2264 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2265 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2267 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2269 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2271 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2272 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2274 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2275 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
2277 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2283 ptr = rtsx_get_cmd_data(chip);
2285 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
2286 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
2289 * HEADER_ID0, HEADER_ID1
2291 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2292 i = ms_card->boot_block + 1;
2297 * PAGE_SIZE_0, PAGE_SIZE_1
2299 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2300 i = ms_card->boot_block + 1;
2304 if ((ptr[14] == 1) || (ptr[14] == 3))
2305 chip->card_wp |= MS_CARD;
2307 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2308 block_size = ((u16)ptr[6] << 8) | ptr[7];
2309 if (block_size == 0x0010) {
2310 /* Block size 16KB */
2311 ms_card->block_shift = 5;
2312 ms_card->page_off = 0x1F;
2313 } else if (block_size == 0x0008) {
2314 /* Block size 8KB */
2315 ms_card->block_shift = 4;
2316 ms_card->page_off = 0x0F;
2319 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2320 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2322 #ifdef SUPPORT_MAGIC_GATE
2325 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
2326 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
2327 ms_card->capacity = 0x1EE0;
2328 } else { /* Effective block for 8MB: 0x3E0 */
2329 ms_card->capacity = 0x3DE0;
2331 } else { /* 16MB, 32MB, 64MB or 128MB */
2332 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
2333 ms_card->capacity = 0x7BC0;
2334 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2335 ms_card->capacity = 0xF7C0;
2336 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2337 ms_card->capacity = 0x1EF80;
2338 } else { /* Effective block for 128MB: 0x1F00 */
2339 ms_card->capacity = 0x3DF00;
2343 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2344 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2346 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2349 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2351 /* Switch I/F Mode */
2353 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2354 if (retval != STATUS_SUCCESS) {
2359 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2364 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2370 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2372 if (retval != STATUS_SUCCESS) {
2377 retval = rtsx_write_register(chip, MS_CFG,
2378 0x58 | MS_NO_CHECK_INT,
2379 MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
2385 ms_card->ms_type |= MS_4BIT;
2388 if (CHK_MS4BIT(ms_card))
2389 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2391 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2393 return STATUS_SUCCESS;
2396 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2398 struct ms_info *ms_card = &(chip->ms_card);
2399 int size, i, seg_no, retval;
2400 u16 defect_block, reg_addr;
2403 ms_card->segment_cnt = ms_card->total_block >> 9;
2404 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2405 ms_card->segment_cnt);
2407 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2408 ms_card->segment = vzalloc(size);
2409 if (ms_card->segment == NULL) {
2414 retval = ms_read_page(chip, ms_card->boot_block, 1);
2415 if (retval != STATUS_SUCCESS) {
2420 reg_addr = PPBUF_BASE2;
2421 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2424 retval = rtsx_read_register(chip, reg_addr++, &val1);
2425 if (retval != STATUS_SUCCESS) {
2430 retval = rtsx_read_register(chip, reg_addr++, &val2);
2431 if (retval != STATUS_SUCCESS) {
2436 defect_block = ((u16)val1 << 8) | val2;
2437 if (defect_block == 0xFFFF)
2440 seg_no = defect_block / 512;
2442 block_no = ms_card->segment[seg_no].disable_count++;
2443 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2446 for (i = 0; i < ms_card->segment_cnt; i++) {
2447 ms_card->segment[i].build_flag = 0;
2448 ms_card->segment[i].l2p_table = NULL;
2449 ms_card->segment[i].free_table = NULL;
2450 ms_card->segment[i].get_index = 0;
2451 ms_card->segment[i].set_index = 0;
2452 ms_card->segment[i].unused_blk_cnt = 0;
2454 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2455 i, ms_card->segment[i].disable_count);
2458 return STATUS_SUCCESS;
2461 if (ms_card->segment) {
2462 vfree(ms_card->segment);
2463 ms_card->segment = NULL;
2469 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2471 struct ms_info *ms_card = &(chip->ms_card);
2472 struct zone_entry *segment;
2474 if (ms_card->segment == NULL)
2477 segment = &(ms_card->segment[seg_no]);
2479 if (segment->l2p_table)
2480 return segment->l2p_table[log_off];
2485 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2486 int seg_no, u16 log_off, u16 phy_blk)
2488 struct ms_info *ms_card = &(chip->ms_card);
2489 struct zone_entry *segment;
2491 if (ms_card->segment == NULL)
2494 segment = &(ms_card->segment[seg_no]);
2495 if (segment->l2p_table)
2496 segment->l2p_table[log_off] = phy_blk;
2499 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2501 struct ms_info *ms_card = &(chip->ms_card);
2502 struct zone_entry *segment;
2505 seg_no = (int)phy_blk >> 9;
2506 segment = &(ms_card->segment[seg_no]);
2508 segment->free_table[segment->set_index++] = phy_blk;
2509 if (segment->set_index >= MS_FREE_TABLE_CNT)
2510 segment->set_index = 0;
2512 segment->unused_blk_cnt++;
2515 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2517 struct ms_info *ms_card = &(chip->ms_card);
2518 struct zone_entry *segment;
2521 segment = &(ms_card->segment[seg_no]);
2523 if (segment->unused_blk_cnt <= 0)
2526 phy_blk = segment->free_table[segment->get_index];
2527 segment->free_table[segment->get_index++] = 0xFFFF;
2528 if (segment->get_index >= MS_FREE_TABLE_CNT)
2529 segment->get_index = 0;
2531 segment->unused_blk_cnt--;
2536 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2537 2974, 3470, 3966, 4462, 4958,
2538 5454, 5950, 6446, 6942, 7438,
2541 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2542 u16 log_off, u8 us1, u8 us2)
2544 struct ms_info *ms_card = &(chip->ms_card);
2545 struct zone_entry *segment;
2549 seg_no = (int)phy_blk >> 9;
2550 segment = &(ms_card->segment[seg_no]);
2551 tmp_blk = segment->l2p_table[log_off];
2555 if (!(chip->card_wp & MS_CARD))
2556 ms_erase_block(chip, tmp_blk);
2558 ms_set_unused_block(chip, tmp_blk);
2559 segment->l2p_table[log_off] = phy_blk;
2561 if (!(chip->card_wp & MS_CARD))
2562 ms_erase_block(chip, phy_blk);
2564 ms_set_unused_block(chip, phy_blk);
2567 if (phy_blk < tmp_blk) {
2568 if (!(chip->card_wp & MS_CARD))
2569 ms_erase_block(chip, phy_blk);
2571 ms_set_unused_block(chip, phy_blk);
2573 if (!(chip->card_wp & MS_CARD))
2574 ms_erase_block(chip, tmp_blk);
2576 ms_set_unused_block(chip, tmp_blk);
2577 segment->l2p_table[log_off] = phy_blk;
2581 return STATUS_SUCCESS;
2584 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2586 struct ms_info *ms_card = &(chip->ms_card);
2587 struct zone_entry *segment;
2589 int retval, table_size, disable_cnt, i;
2590 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2591 u8 extra[MS_EXTRA_SIZE], us1, us2;
2593 dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
2595 if (ms_card->segment == NULL) {
2596 retval = ms_init_l2p_tbl(chip);
2597 if (retval != STATUS_SUCCESS) {
2603 if (ms_card->segment[seg_no].build_flag) {
2604 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2606 return STATUS_SUCCESS;
2614 segment = &(ms_card->segment[seg_no]);
2616 if (segment->l2p_table == NULL) {
2617 segment->l2p_table = vmalloc(table_size * 2);
2618 if (segment->l2p_table == NULL) {
2623 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2625 if (segment->free_table == NULL) {
2626 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2627 if (segment->free_table == NULL) {
2632 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2634 start = (u16)seg_no << 9;
2635 end = (u16)(seg_no + 1) << 9;
2637 disable_cnt = segment->disable_count;
2639 segment->get_index = segment->set_index = 0;
2640 segment->unused_blk_cnt = 0;
2642 for (phy_blk = start; phy_blk < end; phy_blk++) {
2644 defect_flag = false;
2645 for (i = 0; i < segment->disable_count; i++) {
2646 if (phy_blk == segment->defect_list[i]) {
2657 retval = ms_read_extra_data(chip, phy_blk, 0,
2658 extra, MS_EXTRA_SIZE);
2659 if (retval != STATUS_SUCCESS) {
2660 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2661 ms_set_bad_block(chip, phy_blk);
2665 if (seg_no == ms_card->segment_cnt - 1) {
2666 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2667 if (!(chip->card_wp & MS_CARD)) {
2668 retval = ms_erase_block(chip, phy_blk);
2669 if (retval != STATUS_SUCCESS)
2677 if (!(extra[0] & BLOCK_OK))
2679 if (!(extra[1] & NOT_BOOT_BLOCK))
2681 if ((extra[0] & PAGE_OK) != PAGE_OK)
2684 log_blk = ((u16)extra[2] << 8) | extra[3];
2686 if (log_blk == 0xFFFF) {
2687 if (!(chip->card_wp & MS_CARD)) {
2688 retval = ms_erase_block(chip, phy_blk);
2689 if (retval != STATUS_SUCCESS)
2692 ms_set_unused_block(chip, phy_blk);
2696 if ((log_blk < ms_start_idx[seg_no]) ||
2697 (log_blk >= ms_start_idx[seg_no+1])) {
2698 if (!(chip->card_wp & MS_CARD)) {
2699 retval = ms_erase_block(chip, phy_blk);
2700 if (retval != STATUS_SUCCESS)
2703 ms_set_unused_block(chip, phy_blk);
2707 idx = log_blk - ms_start_idx[seg_no];
2709 if (segment->l2p_table[idx] == 0xFFFF) {
2710 segment->l2p_table[idx] = phy_blk;
2714 us1 = extra[0] & 0x10;
2715 tmp_blk = segment->l2p_table[idx];
2716 retval = ms_read_extra_data(chip, tmp_blk, 0,
2717 extra, MS_EXTRA_SIZE);
2718 if (retval != STATUS_SUCCESS)
2720 us2 = extra[0] & 0x10;
2722 (void)ms_arbitrate_l2p(chip, phy_blk,
2723 log_blk-ms_start_idx[seg_no], us1, us2);
2727 segment->build_flag = 1;
2729 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2730 segment->unused_blk_cnt);
2732 /* Logical Address Confirmation Process */
2733 if (seg_no == ms_card->segment_cnt - 1) {
2734 if (segment->unused_blk_cnt < 2)
2735 chip->card_wp |= MS_CARD;
2737 if (segment->unused_blk_cnt < 1)
2738 chip->card_wp |= MS_CARD;
2741 if (chip->card_wp & MS_CARD)
2742 return STATUS_SUCCESS;
2744 for (log_blk = ms_start_idx[seg_no];
2745 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2746 idx = log_blk - ms_start_idx[seg_no];
2747 if (segment->l2p_table[idx] == 0xFFFF) {
2748 phy_blk = ms_get_unused_block(chip, seg_no);
2749 if (phy_blk == 0xFFFF) {
2750 chip->card_wp |= MS_CARD;
2751 return STATUS_SUCCESS;
2753 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2754 if (retval != STATUS_SUCCESS) {
2759 segment->l2p_table[idx] = phy_blk;
2760 if (seg_no == ms_card->segment_cnt - 1) {
2761 if (segment->unused_blk_cnt < 2) {
2762 chip->card_wp |= MS_CARD;
2763 return STATUS_SUCCESS;
2766 if (segment->unused_blk_cnt < 1) {
2767 chip->card_wp |= MS_CARD;
2768 return STATUS_SUCCESS;
2774 /* Make boot block be the first normal block */
2776 for (log_blk = 0; log_blk < 494; log_blk++) {
2777 tmp_blk = segment->l2p_table[log_blk];
2778 if (tmp_blk < ms_card->boot_block) {
2779 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2781 if (chip->card_wp & MS_CARD)
2784 phy_blk = ms_get_unused_block(chip, 0);
2785 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2786 log_blk, 0, ms_card->page_off + 1);
2787 if (retval != STATUS_SUCCESS) {
2792 segment->l2p_table[log_blk] = phy_blk;
2794 retval = ms_set_bad_block(chip, tmp_blk);
2795 if (retval != STATUS_SUCCESS) {
2803 return STATUS_SUCCESS;
2806 segment->build_flag = 0;
2807 if (segment->l2p_table) {
2808 vfree(segment->l2p_table);
2809 segment->l2p_table = NULL;
2811 if (segment->free_table) {
2812 vfree(segment->free_table);
2813 segment->free_table = NULL;
2820 int reset_ms_card(struct rtsx_chip *chip)
2822 struct ms_info *ms_card = &(chip->ms_card);
2825 memset(ms_card, 0, sizeof(struct ms_info));
2827 retval = enable_card_clock(chip, MS_CARD);
2828 if (retval != STATUS_SUCCESS) {
2833 retval = select_card(chip, MS_CARD);
2834 if (retval != STATUS_SUCCESS) {
2839 ms_card->ms_type = 0;
2841 retval = reset_ms_pro(chip);
2842 if (retval != STATUS_SUCCESS) {
2843 if (ms_card->check_ms_flow) {
2844 retval = reset_ms(chip);
2845 if (retval != STATUS_SUCCESS) {
2855 retval = ms_set_init_para(chip);
2856 if (retval != STATUS_SUCCESS) {
2861 if (!CHK_MSPRO(ms_card)) {
2862 /* Build table for the last segment,
2863 * to check if L2P table block exists, erasing it
2865 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2866 if (retval != STATUS_SUCCESS) {
2872 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2874 return STATUS_SUCCESS;
2877 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2878 u32 start_sec, u16 sec_cnt, u8 cmd)
2884 data[1] = (u8)(sec_cnt >> 8);
2885 data[2] = (u8)sec_cnt;
2886 data[3] = (u8)(start_sec >> 24);
2887 data[4] = (u8)(start_sec >> 16);
2888 data[5] = (u8)(start_sec >> 8);
2889 data[6] = (u8)start_sec;
2892 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2893 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2895 if (retval == STATUS_SUCCESS)
2898 if (i == MS_MAX_RETRY_COUNT) {
2903 return STATUS_SUCCESS;
2907 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2909 struct ms_info *ms_card = &(chip->ms_card);
2912 if (ms_card->seq_mode) {
2913 retval = ms_switch_clock(chip);
2914 if (retval != STATUS_SUCCESS)
2917 ms_card->seq_mode = 0;
2918 ms_card->total_sec_cnt = 0;
2919 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2921 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2925 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2927 struct ms_info *ms_card = &(chip->ms_card);
2930 if (chip->asic_code) {
2931 if (ms_card->ms_clock > 30)
2932 ms_card->ms_clock -= 20;
2934 if (ms_card->ms_clock == CLK_80)
2935 ms_card->ms_clock = CLK_60;
2936 else if (ms_card->ms_clock == CLK_60)
2937 ms_card->ms_clock = CLK_40;
2940 retval = ms_switch_clock(chip);
2941 if (retval != STATUS_SUCCESS) {
2946 return STATUS_SUCCESS;
2949 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2950 struct rtsx_chip *chip, u32 start_sector,
2953 struct ms_info *ms_card = &(chip->ms_card);
2954 bool mode_2k = false;
2957 u8 val, trans_mode, rw_tpc, rw_cmd;
2959 ms_set_err_code(chip, MS_NO_ERROR);
2961 ms_card->cleanup_counter = 0;
2963 if (CHK_MSHG(ms_card)) {
2964 if ((start_sector % 4) || (sector_cnt % 4)) {
2965 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2966 rw_tpc = PRO_READ_LONG_DATA;
2967 rw_cmd = PRO_READ_DATA;
2969 rw_tpc = PRO_WRITE_LONG_DATA;
2970 rw_cmd = PRO_WRITE_DATA;
2973 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2974 rw_tpc = PRO_READ_QUAD_DATA;
2975 rw_cmd = PRO_READ_2K_DATA;
2977 rw_tpc = PRO_WRITE_QUAD_DATA;
2978 rw_cmd = PRO_WRITE_2K_DATA;
2983 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2984 rw_tpc = PRO_READ_LONG_DATA;
2985 rw_cmd = PRO_READ_DATA;
2987 rw_tpc = PRO_WRITE_LONG_DATA;
2988 rw_cmd = PRO_WRITE_DATA;
2992 retval = ms_switch_clock(chip);
2993 if (retval != STATUS_SUCCESS) {
2998 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2999 trans_mode = MS_TM_AUTO_READ;
3001 trans_mode = MS_TM_AUTO_WRITE;
3003 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3009 if (ms_card->seq_mode) {
3010 if ((ms_card->pre_dir != srb->sc_data_direction)
3011 || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector)
3012 || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ))
3013 || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ))
3014 || !(val & MS_INT_BREQ)
3015 || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
3016 ms_card->seq_mode = 0;
3017 ms_card->total_sec_cnt = 0;
3018 if (val & MS_INT_BREQ) {
3019 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3020 if (retval != STATUS_SUCCESS) {
3025 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3030 if (!ms_card->seq_mode) {
3031 ms_card->total_sec_cnt = 0;
3032 if (sector_cnt >= SEQ_START_CRITERIA) {
3033 if ((ms_card->capacity - start_sector) > 0xFE00)
3036 count = (u16)(ms_card->capacity - start_sector);
3038 if (count > sector_cnt) {
3040 ms_card->seq_mode = MODE_2K_SEQ;
3042 ms_card->seq_mode = MODE_512_SEQ;
3047 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
3048 if (retval != STATUS_SUCCESS) {
3049 ms_card->seq_mode = 0;
3055 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
3056 WAIT_INT, mode_2k, scsi_sg_count(srb),
3057 scsi_sglist(srb), scsi_bufflen(srb));
3058 if (retval != STATUS_SUCCESS) {
3059 ms_card->seq_mode = 0;
3060 rtsx_read_register(chip, MS_TRANS_CFG, &val);
3061 rtsx_clear_ms_error(chip);
3063 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3064 chip->rw_need_retry = 0;
3065 dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
3070 if (val & MS_INT_BREQ)
3071 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3073 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3074 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
3075 chip->rw_need_retry = 1;
3076 ms_auto_tune_clock(chip);
3083 if (ms_card->seq_mode) {
3084 ms_card->pre_sec_addr = start_sector;
3085 ms_card->pre_sec_cnt = sector_cnt;
3086 ms_card->pre_dir = srb->sc_data_direction;
3087 ms_card->total_sec_cnt += sector_cnt;
3090 return STATUS_SUCCESS;
3093 static int mspro_read_format_progress(struct rtsx_chip *chip,
3094 const int short_data_len)
3096 struct ms_info *ms_card = &(chip->ms_card);
3098 u32 total_progress, cur_progress;
3102 dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n",
3105 retval = ms_switch_clock(chip);
3106 if (retval != STATUS_SUCCESS) {
3107 ms_card->format_status = FORMAT_FAIL;
3112 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3113 if (retval != STATUS_SUCCESS) {
3114 ms_card->format_status = FORMAT_FAIL;
3119 if (!(tmp & MS_INT_BREQ)) {
3120 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) {
3121 ms_card->format_status = FORMAT_SUCCESS;
3122 return STATUS_SUCCESS;
3124 ms_card->format_status = FORMAT_FAIL;
3129 if (short_data_len >= 256)
3132 cnt = (u8)short_data_len;
3134 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
3136 if (retval != STATUS_SUCCESS) {
3137 ms_card->format_status = FORMAT_FAIL;
3142 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
3144 if (retval != STATUS_SUCCESS) {
3145 ms_card->format_status = FORMAT_FAIL;
3150 total_progress = (data[0] << 24) | (data[1] << 16) |
3151 (data[2] << 8) | data[3];
3152 cur_progress = (data[4] << 24) | (data[5] << 16) |
3153 (data[6] << 8) | data[7];
3155 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
3156 total_progress, cur_progress);
3158 if (total_progress == 0) {
3159 ms_card->progress = 0;
3161 u64 ulltmp = (u64)cur_progress * (u64)65535;
3163 do_div(ulltmp, total_progress);
3164 ms_card->progress = (u16)ulltmp;
3166 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
3168 for (i = 0; i < 5000; i++) {
3169 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3170 if (retval != STATUS_SUCCESS) {
3171 ms_card->format_status = FORMAT_FAIL;
3175 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
3176 MS_INT_BREQ | MS_INT_ERR))
3182 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
3183 if (retval != STATUS_SUCCESS) {
3184 ms_card->format_status = FORMAT_FAIL;
3190 ms_card->format_status = FORMAT_FAIL;
3195 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3196 ms_card->format_status = FORMAT_FAIL;
3201 if (tmp & MS_INT_CED) {
3202 ms_card->format_status = FORMAT_SUCCESS;
3203 ms_card->pro_under_formatting = 0;
3204 } else if (tmp & MS_INT_BREQ) {
3205 ms_card->format_status = FORMAT_IN_PROGRESS;
3207 ms_card->format_status = FORMAT_FAIL;
3208 ms_card->pro_under_formatting = 0;
3213 return STATUS_SUCCESS;
3216 void mspro_polling_format_status(struct rtsx_chip *chip)
3218 struct ms_info *ms_card = &(chip->ms_card);
3221 if (ms_card->pro_under_formatting &&
3222 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
3223 rtsx_set_stat(chip, RTSX_STAT_RUN);
3225 for (i = 0; i < 65535; i++) {
3226 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
3227 if (ms_card->format_status != FORMAT_IN_PROGRESS)
3233 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3234 int short_data_len, bool quick_format)
3236 struct ms_info *ms_card = &(chip->ms_card);
3241 retval = ms_switch_clock(chip);
3242 if (retval != STATUS_SUCCESS) {
3247 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
3248 if (retval != STATUS_SUCCESS) {
3254 switch (short_data_len) {
3270 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3271 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
3272 NO_WAIT_INT, buf, 2);
3273 if (retval == STATUS_SUCCESS)
3276 if (i == MS_MAX_RETRY_COUNT) {
3286 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
3287 if (retval != STATUS_SUCCESS) {
3292 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3298 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3303 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
3304 ms_card->pro_under_formatting = 1;
3305 ms_card->progress = 0;
3306 ms_card->format_status = FORMAT_IN_PROGRESS;
3307 return STATUS_SUCCESS;
3310 if (tmp & MS_INT_CED) {
3311 ms_card->pro_under_formatting = 0;
3312 ms_card->progress = 0;
3313 ms_card->format_status = FORMAT_SUCCESS;
3314 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3315 return STATUS_SUCCESS;
3323 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
3324 u16 log_blk, u8 start_page, u8 end_page,
3325 u8 *buf, unsigned int *index,
3326 unsigned int *offset)
3328 struct ms_info *ms_card = &(chip->ms_card);
3330 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
3333 retval = ms_read_extra_data(chip, phy_blk, start_page,
3334 extra, MS_EXTRA_SIZE);
3335 if (retval == STATUS_SUCCESS) {
3336 if ((extra[1] & 0x30) != 0x30) {
3337 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3343 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3345 if (retval != STATUS_SUCCESS) {
3350 if (CHK_MS4BIT(ms_card))
3356 data[2] = (u8)(phy_blk >> 8);
3357 data[3] = (u8)phy_blk;
3359 data[5] = start_page;
3361 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3362 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3364 if (retval == STATUS_SUCCESS)
3367 if (i == MS_MAX_RETRY_COUNT) {
3372 ms_set_err_code(chip, MS_NO_ERROR);
3374 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3375 if (retval != STATUS_SUCCESS) {
3382 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3383 ms_set_err_code(chip, MS_NO_ERROR);
3385 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3386 ms_set_err_code(chip, MS_NO_CARD);
3391 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3392 if (retval != STATUS_SUCCESS) {
3397 if (val & INT_REG_CMDNK) {
3398 ms_set_err_code(chip, MS_CMD_NK);
3402 if (val & INT_REG_ERR) {
3403 if (val & INT_REG_BREQ) {
3404 retval = ms_read_status_reg(chip);
3405 if (retval != STATUS_SUCCESS) {
3406 if (!(chip->card_wp & MS_CARD)) {
3408 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
3409 ms_write_extra_data(chip, phy_blk,
3410 page_addr, extra, MS_EXTRA_SIZE);
3412 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3417 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3422 if (!(val & INT_REG_BREQ)) {
3423 ms_set_err_code(chip, MS_BREQ_ERROR);
3429 if (page_addr == (end_page - 1)) {
3430 if (!(val & INT_REG_CED)) {
3431 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3432 if (retval != STATUS_SUCCESS) {
3438 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3440 if (retval != STATUS_SUCCESS) {
3445 if (!(val & INT_REG_CED)) {
3446 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3451 trans_cfg = NO_WAIT_INT;
3453 trans_cfg = WAIT_INT;
3456 rtsx_init_cmd(chip);
3458 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3459 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3461 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3464 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3466 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3467 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3468 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3469 MS_TRANSFER_END, MS_TRANSFER_END);
3471 rtsx_send_cmd_no_wait(chip);
3473 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
3474 512, scsi_sg_count(chip->srb),
3475 index, offset, DMA_FROM_DEVICE,
3478 if (retval == -ETIMEDOUT) {
3479 ms_set_err_code(chip, MS_TO_ERROR);
3480 rtsx_clear_ms_error(chip);
3482 return STATUS_TIMEDOUT;
3485 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3486 if (retval != STATUS_SUCCESS) {
3487 ms_set_err_code(chip, MS_TO_ERROR);
3488 rtsx_clear_ms_error(chip);
3490 return STATUS_TIMEDOUT;
3492 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3493 ms_set_err_code(chip, MS_CRC16_ERROR);
3494 rtsx_clear_ms_error(chip);
3500 if (scsi_sg_count(chip->srb) == 0)
3504 return STATUS_SUCCESS;
3507 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3508 u16 new_blk, u16 log_blk, u8 start_page,
3509 u8 end_page, u8 *buf, unsigned int *index,
3510 unsigned int *offset)
3512 struct ms_info *ms_card = &(chip->ms_card);
3514 u8 page_addr, val, data[16];
3518 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3520 if (retval != STATUS_SUCCESS) {
3525 if (CHK_MS4BIT(ms_card))
3531 data[2] = (u8)(old_blk >> 8);
3532 data[3] = (u8)old_blk;
3538 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3540 if (retval != STATUS_SUCCESS) {
3545 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3546 if (retval != STATUS_SUCCESS) {
3551 ms_set_err_code(chip, MS_NO_ERROR);
3552 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3554 if (retval != STATUS_SUCCESS) {
3560 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3561 SystemParm, (6 + MS_EXTRA_SIZE));
3562 if (retval != STATUS_SUCCESS) {
3567 ms_set_err_code(chip, MS_NO_ERROR);
3569 if (CHK_MS4BIT(ms_card))
3575 data[2] = (u8)(new_blk >> 8);
3576 data[3] = (u8)new_blk;
3577 if ((end_page - start_page) == 1)
3582 data[5] = start_page;
3585 data[8] = (u8)(log_blk >> 8);
3586 data[9] = (u8)log_blk;
3588 for (i = 0x0A; i < 0x10; i++)
3591 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3592 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3593 NO_WAIT_INT, data, 16);
3594 if (retval == STATUS_SUCCESS)
3597 if (i == MS_MAX_RETRY_COUNT) {
3602 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3603 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3604 if (retval == STATUS_SUCCESS)
3607 if (i == MS_MAX_RETRY_COUNT) {
3612 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3613 if (retval != STATUS_SUCCESS) {
3619 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3620 ms_set_err_code(chip, MS_NO_ERROR);
3622 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3623 ms_set_err_code(chip, MS_NO_CARD);
3628 if (val & INT_REG_CMDNK) {
3629 ms_set_err_code(chip, MS_CMD_NK);
3633 if (val & INT_REG_ERR) {
3634 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3638 if (!(val & INT_REG_BREQ)) {
3639 ms_set_err_code(chip, MS_BREQ_ERROR);
3646 rtsx_init_cmd(chip);
3648 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3649 0xFF, WRITE_PAGE_DATA);
3650 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3652 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3655 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3657 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3658 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3659 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3660 MS_TRANSFER_END, MS_TRANSFER_END);
3662 rtsx_send_cmd_no_wait(chip);
3664 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
3665 512, scsi_sg_count(chip->srb),
3666 index, offset, DMA_TO_DEVICE,
3669 ms_set_err_code(chip, MS_TO_ERROR);
3670 rtsx_clear_ms_error(chip);
3672 if (retval == -ETIMEDOUT) {
3674 return STATUS_TIMEDOUT;
3680 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3681 if (retval != STATUS_SUCCESS) {
3686 if ((end_page - start_page) == 1) {
3687 if (!(val & INT_REG_CED)) {
3688 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3693 if (page_addr == (end_page - 1)) {
3694 if (!(val & INT_REG_CED)) {
3695 retval = ms_send_cmd(chip, BLOCK_END,
3697 if (retval != STATUS_SUCCESS) {
3703 retval = ms_read_bytes(chip, GET_INT, 1,
3704 NO_WAIT_INT, &val, 1);
3705 if (retval != STATUS_SUCCESS) {
3711 if ((page_addr == (end_page - 1)) ||
3712 (page_addr == ms_card->page_off)) {
3713 if (!(val & INT_REG_CED)) {
3714 ms_set_err_code(chip,
3715 MS_FLASH_WRITE_ERROR);
3722 if (scsi_sg_count(chip->srb) == 0)
3726 return STATUS_SUCCESS;
3730 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3731 u16 log_blk, u8 page_off)
3733 struct ms_info *ms_card = &(chip->ms_card);
3736 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3737 page_off, ms_card->page_off + 1);
3738 if (retval != STATUS_SUCCESS) {
3743 seg_no = old_blk >> 9;
3745 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3746 MS_CLR_BAD_BLOCK_FLG(ms_card);
3747 ms_set_bad_block(chip, old_blk);
3749 retval = ms_erase_block(chip, old_blk);
3750 if (retval == STATUS_SUCCESS)
3751 ms_set_unused_block(chip, old_blk);
3754 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3756 return STATUS_SUCCESS;
3759 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3760 u16 log_blk, u8 start_page)
3765 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3767 if (retval != STATUS_SUCCESS) {
3773 return STATUS_SUCCESS;
3776 #ifdef MS_DELAY_WRITE
3777 int ms_delay_write(struct rtsx_chip *chip)
3779 struct ms_info *ms_card = &(chip->ms_card);
3780 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3783 if (delay_write->delay_write_flag) {
3784 retval = ms_set_init_para(chip);
3785 if (retval != STATUS_SUCCESS) {
3790 delay_write->delay_write_flag = 0;
3791 retval = ms_finish_write(chip,
3792 delay_write->old_phyblock,
3793 delay_write->new_phyblock,
3794 delay_write->logblock,
3795 delay_write->pageoff);
3796 if (retval != STATUS_SUCCESS) {
3802 return STATUS_SUCCESS;
3806 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3808 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3809 set_sense_type(chip, SCSI_LUN(srb),
3810 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3812 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3815 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3816 u32 start_sector, u16 sector_cnt)
3818 struct ms_info *ms_card = &(chip->ms_card);
3819 unsigned int lun = SCSI_LUN(srb);
3821 unsigned int index = 0, offset = 0;
3822 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3823 u8 start_page, end_page = 0, page_cnt;
3825 #ifdef MS_DELAY_WRITE
3826 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3829 ms_set_err_code(chip, MS_NO_ERROR);
3831 ms_card->cleanup_counter = 0;
3833 ptr = (u8 *)scsi_sglist(srb);
3835 retval = ms_switch_clock(chip);
3836 if (retval != STATUS_SUCCESS) {
3837 ms_rw_fail(srb, chip);
3842 log_blk = (u16)(start_sector >> ms_card->block_shift);
3843 start_page = (u8)(start_sector & ms_card->page_off);
3845 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3846 if (log_blk < ms_start_idx[seg_no+1])
3850 if (ms_card->segment[seg_no].build_flag == 0) {
3851 retval = ms_build_l2p_tbl(chip, seg_no);
3852 if (retval != STATUS_SUCCESS) {
3853 chip->card_fail |= MS_CARD;
3854 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3860 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3861 #ifdef MS_DELAY_WRITE
3862 if (delay_write->delay_write_flag &&
3863 (delay_write->logblock == log_blk) &&
3864 (start_page > delay_write->pageoff)) {
3865 delay_write->delay_write_flag = 0;
3866 retval = ms_copy_page(chip,
3867 delay_write->old_phyblock,
3868 delay_write->new_phyblock, log_blk,
3869 delay_write->pageoff, start_page);
3870 if (retval != STATUS_SUCCESS) {
3871 set_sense_type(chip, lun,
3872 SENSE_TYPE_MEDIA_WRITE_ERR);
3876 old_blk = delay_write->old_phyblock;
3877 new_blk = delay_write->new_phyblock;
3878 } else if (delay_write->delay_write_flag &&
3879 (delay_write->logblock == log_blk) &&
3880 (start_page == delay_write->pageoff)) {
3881 delay_write->delay_write_flag = 0;
3882 old_blk = delay_write->old_phyblock;
3883 new_blk = delay_write->new_phyblock;
3885 retval = ms_delay_write(chip);
3886 if (retval != STATUS_SUCCESS) {
3887 set_sense_type(chip, lun,
3888 SENSE_TYPE_MEDIA_WRITE_ERR);
3893 old_blk = ms_get_l2p_tbl(chip, seg_no,
3894 log_blk - ms_start_idx[seg_no]);
3895 new_blk = ms_get_unused_block(chip, seg_no);
3896 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3897 set_sense_type(chip, lun,
3898 SENSE_TYPE_MEDIA_WRITE_ERR);
3903 retval = ms_prepare_write(chip, old_blk, new_blk,
3904 log_blk, start_page);
3905 if (retval != STATUS_SUCCESS) {
3906 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3907 set_sense_type(chip, lun,
3908 SENSE_TYPE_MEDIA_NOT_PRESENT);
3912 set_sense_type(chip, lun,
3913 SENSE_TYPE_MEDIA_WRITE_ERR);
3917 #ifdef MS_DELAY_WRITE
3921 #ifdef MS_DELAY_WRITE
3922 retval = ms_delay_write(chip);
3923 if (retval != STATUS_SUCCESS) {
3924 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3925 set_sense_type(chip, lun,
3926 SENSE_TYPE_MEDIA_NOT_PRESENT);
3930 set_sense_type(chip, lun,
3931 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3936 old_blk = ms_get_l2p_tbl(chip, seg_no,
3937 log_blk - ms_start_idx[seg_no]);
3938 if (old_blk == 0xFFFF) {
3939 set_sense_type(chip, lun,
3940 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3946 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3947 seg_no, old_blk, new_blk);
3949 while (total_sec_cnt) {
3950 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3951 end_page = ms_card->page_off + 1;
3953 end_page = start_page + (u8)total_sec_cnt;
3955 page_cnt = end_page - start_page;
3957 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3958 start_page, end_page, page_cnt);
3960 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3961 retval = ms_read_multiple_pages(chip,
3962 old_blk, log_blk, start_page, end_page,
3963 ptr, &index, &offset);
3965 retval = ms_write_multiple_pages(chip, old_blk,
3966 new_blk, log_blk, start_page, end_page,
3967 ptr, &index, &offset);
3970 if (retval != STATUS_SUCCESS) {
3971 toggle_gpio(chip, 1);
3972 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3973 set_sense_type(chip, lun,
3974 SENSE_TYPE_MEDIA_NOT_PRESENT);
3978 ms_rw_fail(srb, chip);
3983 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3984 if (end_page == (ms_card->page_off + 1)) {
3985 retval = ms_erase_block(chip, old_blk);
3986 if (retval == STATUS_SUCCESS)
3987 ms_set_unused_block(chip, old_blk);
3989 ms_set_l2p_tbl(chip, seg_no,
3990 log_blk - ms_start_idx[seg_no],
3995 total_sec_cnt -= page_cnt;
3996 if (scsi_sg_count(srb) == 0)
3997 ptr += page_cnt * 512;
3999 if (total_sec_cnt == 0)
4004 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
4006 if (log_blk < ms_start_idx[seg_no+1])
4010 if (ms_card->segment[seg_no].build_flag == 0) {
4011 retval = ms_build_l2p_tbl(chip, seg_no);
4012 if (retval != STATUS_SUCCESS) {
4013 chip->card_fail |= MS_CARD;
4014 set_sense_type(chip, lun,
4015 SENSE_TYPE_MEDIA_NOT_PRESENT);
4021 old_blk = ms_get_l2p_tbl(chip, seg_no,
4022 log_blk - ms_start_idx[seg_no]);
4023 if (old_blk == 0xFFFF) {
4024 ms_rw_fail(srb, chip);
4029 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4030 new_blk = ms_get_unused_block(chip, seg_no);
4031 if (new_blk == 0xFFFF) {
4032 ms_rw_fail(srb, chip);
4038 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
4039 seg_no, old_blk, new_blk);
4044 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4045 if (end_page < (ms_card->page_off + 1)) {
4046 #ifdef MS_DELAY_WRITE
4047 delay_write->delay_write_flag = 1;
4048 delay_write->old_phyblock = old_blk;
4049 delay_write->new_phyblock = new_blk;
4050 delay_write->logblock = log_blk;
4051 delay_write->pageoff = end_page;
4053 retval = ms_finish_write(chip, old_blk, new_blk,
4055 if (retval != STATUS_SUCCESS) {
4056 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
4057 set_sense_type(chip, lun,
4058 SENSE_TYPE_MEDIA_NOT_PRESENT);
4063 ms_rw_fail(srb, chip);
4071 scsi_set_resid(srb, 0);
4073 return STATUS_SUCCESS;
4076 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
4077 u32 start_sector, u16 sector_cnt)
4079 struct ms_info *ms_card = &(chip->ms_card);
4082 if (CHK_MSPRO(ms_card))
4083 retval = mspro_rw_multi_sector(srb, chip, start_sector,
4086 retval = ms_rw_multi_sector(srb, chip, start_sector,
4093 void ms_free_l2p_tbl(struct rtsx_chip *chip)
4095 struct ms_info *ms_card = &(chip->ms_card);
4098 if (ms_card->segment != NULL) {
4099 for (i = 0; i < ms_card->segment_cnt; i++) {
4100 if (ms_card->segment[i].l2p_table != NULL) {
4101 vfree(ms_card->segment[i].l2p_table);
4102 ms_card->segment[i].l2p_table = NULL;
4104 if (ms_card->segment[i].free_table != NULL) {
4105 vfree(ms_card->segment[i].free_table);
4106 ms_card->segment[i].free_table = NULL;
4109 vfree(ms_card->segment);
4110 ms_card->segment = NULL;
4114 #ifdef SUPPORT_MAGIC_GATE
4116 #ifdef READ_BYTES_WAIT_INT
4117 static int ms_poll_int(struct rtsx_chip *chip)
4122 rtsx_init_cmd(chip);
4124 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
4126 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
4127 if (retval != STATUS_SUCCESS) {
4132 val = *rtsx_get_cmd_data(chip);
4133 if (val & MS_INT_ERR) {
4138 return STATUS_SUCCESS;
4142 #ifdef MS_SAMPLE_INT_ERR
4143 static int check_ms_err(struct rtsx_chip *chip)
4148 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4149 if (retval != STATUS_SUCCESS)
4151 if (val & MS_TRANSFER_ERR)
4154 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
4155 if (retval != STATUS_SUCCESS)
4158 if (val & (MS_INT_ERR | MS_INT_CMDNK))
4164 static int check_ms_err(struct rtsx_chip *chip)
4169 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4170 if (retval != STATUS_SUCCESS)
4172 if (val & MS_TRANSFER_ERR)
4179 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
4190 data[6] = entry_num;
4193 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
4194 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
4196 if (retval == STATUS_SUCCESS)
4199 if (i == MS_MAX_RETRY_COUNT) {
4204 if (check_ms_err(chip)) {
4205 rtsx_clear_ms_error(chip);
4210 return STATUS_SUCCESS;
4213 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
4220 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
4222 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
4224 if (retval != STATUS_SUCCESS) {
4235 buf[5] = mg_entry_num;
4237 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
4238 NO_WAIT_INT, buf, 6);
4239 if (retval != STATUS_SUCCESS) {
4244 return STATUS_SUCCESS;
4247 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4251 unsigned int lun = SCSI_LUN(srb);
4252 u8 buf1[32], buf2[12];
4254 if (scsi_bufflen(srb) < 12) {
4255 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4260 ms_cleanup_work(chip);
4262 retval = ms_switch_clock(chip);
4263 if (retval != STATUS_SUCCESS) {
4268 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
4269 if (retval != STATUS_SUCCESS) {
4270 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4275 memset(buf1, 0, 32);
4276 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
4277 for (i = 0; i < 8; i++)
4278 buf1[8+i] = buf2[4+i];
4280 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4282 if (retval != STATUS_SUCCESS) {
4283 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4287 if (check_ms_err(chip)) {
4288 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4289 rtsx_clear_ms_error(chip);
4294 return STATUS_SUCCESS;
4297 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4299 int retval = STATUS_FAIL;
4301 unsigned int lun = SCSI_LUN(srb);
4304 ms_cleanup_work(chip);
4306 retval = ms_switch_clock(chip);
4307 if (retval != STATUS_SUCCESS) {
4312 buf = kmalloc(1540, GFP_KERNEL);
4315 return STATUS_ERROR;
4323 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
4324 if (retval != STATUS_SUCCESS) {
4325 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4330 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4331 3, WAIT_INT, 0, 0, buf + 4, 1536);
4332 if (retval != STATUS_SUCCESS) {
4333 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4334 rtsx_clear_ms_error(chip);
4338 if (check_ms_err(chip)) {
4339 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4340 rtsx_clear_ms_error(chip);
4345 bufflen = min_t(int, 1052, scsi_bufflen(srb));
4346 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4353 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4355 struct ms_info *ms_card = &(chip->ms_card);
4359 unsigned int lun = SCSI_LUN(srb);
4362 ms_cleanup_work(chip);
4364 retval = ms_switch_clock(chip);
4365 if (retval != STATUS_SUCCESS) {
4370 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
4371 if (retval != STATUS_SUCCESS) {
4372 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4377 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4379 if (retval != STATUS_SUCCESS) {
4380 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4384 if (check_ms_err(chip)) {
4385 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4386 rtsx_clear_ms_error(chip);
4391 memcpy(ms_card->magic_gate_id, buf, 16);
4393 #ifdef READ_BYTES_WAIT_INT
4394 retval = ms_poll_int(chip);
4395 if (retval != STATUS_SUCCESS) {
4396 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4402 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
4403 if (retval != STATUS_SUCCESS) {
4404 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4409 bufflen = min_t(int, 12, scsi_bufflen(srb));
4410 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4412 for (i = 0; i < 8; i++)
4415 for (i = 0; i < 24; i++)
4418 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
4419 32, WAIT_INT, buf, 32);
4420 if (retval != STATUS_SUCCESS) {
4421 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4425 if (check_ms_err(chip)) {
4426 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4427 rtsx_clear_ms_error(chip);
4432 ms_card->mg_auth = 0;
4434 return STATUS_SUCCESS;
4437 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4439 struct ms_info *ms_card = &(chip->ms_card);
4442 unsigned int lun = SCSI_LUN(srb);
4443 u8 buf1[32], buf2[36];
4445 ms_cleanup_work(chip);
4447 retval = ms_switch_clock(chip);
4448 if (retval != STATUS_SUCCESS) {
4453 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
4454 if (retval != STATUS_SUCCESS) {
4455 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4460 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4462 if (retval != STATUS_SUCCESS) {
4463 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4467 if (check_ms_err(chip)) {
4468 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4469 rtsx_clear_ms_error(chip);
4479 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4480 memcpy(buf2 + 20, buf1, 16);
4482 bufflen = min_t(int, 36, scsi_bufflen(srb));
4483 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4485 #ifdef READ_BYTES_WAIT_INT
4486 retval = ms_poll_int(chip);
4487 if (retval != STATUS_SUCCESS) {
4488 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4494 return STATUS_SUCCESS;
4497 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4499 struct ms_info *ms_card = &(chip->ms_card);
4503 unsigned int lun = SCSI_LUN(srb);
4506 ms_cleanup_work(chip);
4508 retval = ms_switch_clock(chip);
4509 if (retval != STATUS_SUCCESS) {
4514 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4515 if (retval != STATUS_SUCCESS) {
4516 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4521 bufflen = min_t(int, 12, scsi_bufflen(srb));
4522 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4524 for (i = 0; i < 8; i++)
4527 for (i = 0; i < 24; i++)
4530 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4532 if (retval != STATUS_SUCCESS) {
4533 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4537 if (check_ms_err(chip)) {
4538 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4539 rtsx_clear_ms_error(chip);
4544 ms_card->mg_auth = 1;
4546 return STATUS_SUCCESS;
4549 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4551 struct ms_info *ms_card = &(chip->ms_card);
4554 unsigned int lun = SCSI_LUN(srb);
4557 ms_cleanup_work(chip);
4559 retval = ms_switch_clock(chip);
4560 if (retval != STATUS_SUCCESS) {
4565 buf = kmalloc(1028, GFP_KERNEL);
4568 return STATUS_ERROR;
4576 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4577 if (retval != STATUS_SUCCESS) {
4578 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4583 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4584 2, WAIT_INT, 0, 0, buf + 4, 1024);
4585 if (retval != STATUS_SUCCESS) {
4586 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4587 rtsx_clear_ms_error(chip);
4591 if (check_ms_err(chip)) {
4592 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4593 rtsx_clear_ms_error(chip);
4598 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4599 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4606 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4608 struct ms_info *ms_card = &(chip->ms_card);
4611 #ifdef MG_SET_ICV_SLOW
4614 unsigned int lun = SCSI_LUN(srb);
4617 ms_cleanup_work(chip);
4619 retval = ms_switch_clock(chip);
4620 if (retval != STATUS_SUCCESS) {
4625 buf = kmalloc(1028, GFP_KERNEL);
4628 return STATUS_ERROR;
4631 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4632 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4634 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4635 if (retval != STATUS_SUCCESS) {
4636 if (ms_card->mg_auth == 0) {
4637 if ((buf[5] & 0xC0) != 0)
4638 set_sense_type(chip, lun,
4639 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4641 set_sense_type(chip, lun,
4642 SENSE_TYPE_MG_WRITE_ERR);
4644 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4650 #ifdef MG_SET_ICV_SLOW
4651 for (i = 0; i < 2; i++) {
4654 rtsx_init_cmd(chip);
4656 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4657 0xFF, PRO_WRITE_LONG_DATA);
4658 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4659 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4662 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4664 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4665 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4666 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4667 MS_TRANSFER_END, MS_TRANSFER_END);
4669 rtsx_send_cmd_no_wait(chip);
4671 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512,
4672 512, 0, DMA_TO_DEVICE, 3000);
4673 if ((retval < 0) || check_ms_err(chip)) {
4674 rtsx_clear_ms_error(chip);
4675 if (ms_card->mg_auth == 0) {
4676 if ((buf[5] & 0xC0) != 0)
4677 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4679 set_sense_type(chip, lun,
4680 SENSE_TYPE_MG_WRITE_ERR);
4682 set_sense_type(chip, lun,
4683 SENSE_TYPE_MG_WRITE_ERR);
4685 retval = STATUS_FAIL;
4691 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4692 2, WAIT_INT, 0, 0, buf + 4, 1024);
4693 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4694 rtsx_clear_ms_error(chip);
4695 if (ms_card->mg_auth == 0) {
4696 if ((buf[5] & 0xC0) != 0)
4697 set_sense_type(chip, lun,
4698 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4700 set_sense_type(chip, lun,
4701 SENSE_TYPE_MG_WRITE_ERR);
4703 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4715 #endif /* SUPPORT_MAGIC_GATE */
4717 void ms_cleanup_work(struct rtsx_chip *chip)
4719 struct ms_info *ms_card = &(chip->ms_card);
4721 if (CHK_MSPRO(ms_card)) {
4722 if (ms_card->seq_mode) {
4723 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4724 mspro_stop_seq_mode(chip);
4725 ms_card->cleanup_counter = 0;
4727 if (CHK_MSHG(ms_card)) {
4728 rtsx_write_register(chip, MS_CFG,
4729 MS_2K_SECTOR_MODE, 0x00);
4732 #ifdef MS_DELAY_WRITE
4733 else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
4734 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4735 ms_delay_write(chip);
4736 ms_card->cleanup_counter = 0;
4741 int ms_power_off_card3v3(struct rtsx_chip *chip)
4745 retval = disable_card_clock(chip, MS_CARD);
4746 if (retval != STATUS_SUCCESS) {
4751 if (chip->asic_code) {
4752 retval = ms_pull_ctl_disable(chip);
4753 if (retval != STATUS_SUCCESS) {
4758 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4759 FPGA_MS_PULL_CTL_BIT | 0x20,
4760 FPGA_MS_PULL_CTL_BIT);
4766 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4771 if (!chip->ft2_fast_mode) {
4772 retval = card_power_off(chip, MS_CARD);
4773 if (retval != STATUS_SUCCESS) {
4779 return STATUS_SUCCESS;
4782 int release_ms_card(struct rtsx_chip *chip)
4784 struct ms_info *ms_card = &(chip->ms_card);
4787 #ifdef MS_DELAY_WRITE
4788 ms_card->delay_write.delay_write_flag = 0;
4790 ms_card->pro_under_formatting = 0;
4792 chip->card_ready &= ~MS_CARD;
4793 chip->card_fail &= ~MS_CARD;
4794 chip->card_wp &= ~MS_CARD;
4796 ms_free_l2p_tbl(chip);
4798 memset(ms_card->raw_sys_info, 0, 96);
4799 #ifdef SUPPORT_PCGL_1P18
4800 memset(ms_card->raw_model_name, 0, 48);
4803 retval = ms_power_off_card3v3(chip);
4804 if (retval != STATUS_SUCCESS) {
4809 return STATUS_SUCCESS;