kernel/drivers/staging/rtl8723au/include/hal_com.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  ******************************************************************************/
  15 #ifndef __HAL_COMMON_H__
  16 #define __HAL_COMMON_H__
  17
  18 /*  */
  19 /*        Rate Definition */
  20 /*  */
  21 /* CCK */
  22 #define RATR_1M                                 0x00000001
  23 #define RATR_2M                                 0x00000002
  24 #define RATR_55M                                0x00000004
  25 #define RATR_11M                                0x00000008
  26 /* OFDM */
  27 #define RATR_6M                                 0x00000010
  28 #define RATR_9M                                 0x00000020
  29 #define RATR_12M                                0x00000040
  30 #define RATR_18M                                0x00000080
  31 #define RATR_24M                                0x00000100
  32 #define RATR_36M                                0x00000200
  33 #define RATR_48M                                0x00000400
  34 #define RATR_54M                                0x00000800
  35 /* MCS 1 Spatial Stream */
  36 #define RATR_MCS0                               0x00001000
  37 #define RATR_MCS1                               0x00002000
  38 #define RATR_MCS2                               0x00004000
  39 #define RATR_MCS3                               0x00008000
  40 #define RATR_MCS4                               0x00010000
  41 #define RATR_MCS5                               0x00020000
  42 #define RATR_MCS6                               0x00040000
  43 #define RATR_MCS7                               0x00080000
  44 /* MCS 2 Spatial Stream */
  45 #define RATR_MCS8                               0x00100000
  46 #define RATR_MCS9                               0x00200000
  47 #define RATR_MCS10                              0x00400000
  48 #define RATR_MCS11                              0x00800000
  49 #define RATR_MCS12                              0x01000000
  50 #define RATR_MCS13                              0x02000000
  51 #define RATR_MCS14                              0x04000000
  52 #define RATR_MCS15                              0x08000000
  53
  54 /* CCK */
  55 #define RATE_1M                                 BIT(0)
  56 #define RATE_2M                                 BIT(1)
  57 #define RATE_5_5M                               BIT(2)
  58 #define RATE_11M                                BIT(3)
  59 /* OFDM */
  60 #define RATE_6M                                 BIT(4)
  61 #define RATE_9M                                 BIT(5)
  62 #define RATE_12M                                BIT(6)
  63 #define RATE_18M                                BIT(7)
  64 #define RATE_24M                                BIT(8)
  65 #define RATE_36M                                BIT(9)
  66 #define RATE_48M                                BIT(10)
  67 #define RATE_54M                                BIT(11)
  68
  69 /*------------------------------ Tx Desc definition Macro ------------------------*/
  70 /* pragma mark -- Tx Desc related definition. -- */
  71 /*  */
  72 /*  */
  73 /*      Rate */
  74 /*  */
  75 /*  CCK Rates, TxHT = 0 */
  76 #define DESC_RATE1M                             0x00
  77 #define DESC_RATE2M                             0x01
  78 #define DESC_RATE5_5M                           0x02
  79 #define DESC_RATE11M                            0x03
  80
  81 /*  OFDM Rates, TxHT = 0 */
  82 #define DESC_RATE6M                             0x04
  83 #define DESC_RATE9M                             0x05
  84 #define DESC_RATE12M                            0x06
  85 #define DESC_RATE18M                            0x07
  86 #define DESC_RATE24M                            0x08
  87 #define DESC_RATE36M                            0x09
  88 #define DESC_RATE48M                            0x0a
  89 #define DESC_RATE54M                            0x0b
  90
  91 /*  MCS Rates, TxHT = 1 */
  92 #define DESC_RATEMCS0                           0x0c
  93 #define DESC_RATEMCS1                           0x0d
  94 #define DESC_RATEMCS2                           0x0e
  95 #define DESC_RATEMCS3                           0x0f
  96 #define DESC_RATEMCS4                           0x10
  97 #define DESC_RATEMCS5                           0x11
  98 #define DESC_RATEMCS6                           0x12
  99 #define DESC_RATEMCS7                           0x13
 100 #define DESC_RATEMCS8                           0x14
 101 #define DESC_RATEMCS9                           0x15
 102 #define DESC_RATEMCS10                          0x16
 103 #define DESC_RATEMCS11                          0x17
 104 #define DESC_RATEMCS12                          0x18
 105 #define DESC_RATEMCS13                          0x19
 106 #define DESC_RATEMCS14                          0x1a
 107 #define DESC_RATEMCS15                          0x1b
 108 #define DESC_RATEMCS15_SG                       0x1c
 109 #define DESC_RATEMCS32                          0x20
 110
 111 #define REG_P2P_CTWIN                                   0x0572 /*  1 Byte long (in unit of TU) */
 112 #define REG_NOA_DESC_SEL                                0x05CF
 113 #define REG_NOA_DESC_DURATION           0x05E0
 114 #define REG_NOA_DESC_INTERVAL                   0x05E4
 115 #define REG_NOA_DESC_START                      0x05E8
 116 #define REG_NOA_DESC_COUNT                      0x05EC
 117
 118 #include "HalVerDef.h"
 119
 120
 121 u8      /* return the final channel plan decision */
 122 hal_com_get_channel_plan23a(
 123         struct rtw_adapter      *padapter,
 124         u8                      hw_channel_plan,        /* channel plan from HW (efuse/eeprom) */
 125         u8                      sw_channel_plan,        /* channel plan from SW (registry/module param) */
 126         u8                      def_channel_plan,       /* channel plan used when the former two is invalid */
 127         bool            AutoLoadFail
 128         );
 129
 130 u8      MRateToHwRate23a(u8 rate);
 131
 132 void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS);
 133
 134 bool
 135 Hal_MappingOutPipe23a(struct rtw_adapter *pAdapter, u8 NumOutPipe);
 136
 137 void c2h_evt_clear23a(struct rtw_adapter *adapter);
 138 s32 c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf);
 139
 140 void rtl8723a_set_ampdu_min_space(struct rtw_adapter *padapter, u8 MinSpacingToSet);
 141 void rtl8723a_set_ampdu_factor(struct rtw_adapter *padapter, u8 FactorToSet);
 142 void rtl8723a_set_acm_ctrl(struct rtw_adapter *padapter, u8 ctrl);
 143 void rtl8723a_set_media_status(struct rtw_adapter *padapter, u8 status);
 144 void rtl8723a_set_media_status1(struct rtw_adapter *padapter, u8 status);
 145 void rtl8723a_set_bcn_func(struct rtw_adapter *padapter, u8 val);
 146 void rtl8723a_check_bssid(struct rtw_adapter *padapter, u8 val);
 147 void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag);
 148 void rtl8723a_on_rcr_am(struct rtw_adapter *padapter);
 149 void rtl8723a_off_rcr_am(struct rtw_adapter *padapter);
 150 void rtl8723a_set_slot_time(struct rtw_adapter *padapter, u8 slottime);
 151 void rtl8723a_ack_preamble(struct rtw_adapter *padapter, u8 bShortPreamble);
 152 void rtl8723a_set_sec_cfg(struct rtw_adapter *padapter, u8 sec);
 153 void rtl8723a_cam_empty_entry(struct rtw_adapter *padapter, u8 ucIndex);
 154 void rtl8723a_cam_invalidate_all(struct rtw_adapter *padapter);
 155 void rtl8723a_cam_write(struct rtw_adapter *padapter,
 156                         u8 entry, u16 ctrl, const u8 *mac, const u8 *key);
 157 void rtl8723a_fifo_cleanup(struct rtw_adapter *padapter);
 158 void rtl8723a_set_apfm_on_mac(struct rtw_adapter *padapter, u8 val);
 159 void rtl8723a_bcn_valid(struct rtw_adapter *padapter);
 160 bool rtl8723a_get_bcn_valid(struct rtw_adapter *padapter);
 161 void rtl8723a_set_beacon_interval(struct rtw_adapter *padapter, u16 interval);
 162 void rtl8723a_set_resp_sifs(struct rtw_adapter *padapter,
 163                             u8 r2t1, u8 r2t2, u8 t2t1, u8 t2t2);
 164 void rtl8723a_set_ac_param_vo(struct rtw_adapter *padapter, u32 vo);
 165 void rtl8723a_set_ac_param_vi(struct rtw_adapter *padapter, u32 vi);
 166 void rtl8723a_set_ac_param_be(struct rtw_adapter *padapter, u32 be);
 167 void rtl8723a_set_ac_param_bk(struct rtw_adapter *padapter, u32 bk);
 168 void rtl8723a_set_rxdma_agg_pg_th(struct rtw_adapter *padapter, u8 val);
 169 void rtl8723a_set_initial_gain(struct rtw_adapter *padapter, u32 rx_gain);
 170
 171 void rtl8723a_odm_support_ability_write(struct rtw_adapter *padapter, u32 val);
 172 void rtl8723a_odm_support_ability_backup(struct rtw_adapter *padapter);
 173 void rtl8723a_odm_support_ability_restore(struct rtw_adapter *padapter);
 174 void rtl8723a_odm_support_ability_set(struct rtw_adapter *padapter, u32 val);
 175 void rtl8723a_odm_support_ability_clr(struct rtw_adapter *padapter, u32 val);
 176
 177 void rtl8723a_set_rpwm(struct rtw_adapter *padapter, u8 val);
 178 u8 rtl8723a_get_rf_type(struct rtw_adapter *padapter);
 179 bool rtl8723a_get_fwlps_rf_on(struct rtw_adapter *padapter);
 180 bool rtl8723a_chk_hi_queue_empty(struct rtw_adapter *padapter);
 181
 182 #endif /* __HAL_COMMON_H__ */