kernel/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __RTL8712_CMDCTRL_BITDEF_H__
  21 #define __RTL8712_CMDCTRL_BITDEF_H__
  22
  23 /*
  24  * 2. Command Control Registers  (Offset: 0x0040 - 0x004F)*/
  25 /*--------------------------------------------------------------------------*/
  26 /*       8192S (CMD) command register bits      (Offset 0x40, 16 bits)*/
  27 /*--------------------------------------------------------------------------*/
  28 #define         _APSDOFF_STATUS         BIT(15)
  29 #define         _APSDOFF                BIT(14)
  30 #define         _BBRSTn                 BIT(13)  /*Enable OFDM/CCK*/
  31 #define         _BB_GLB_RSTn            BIT(12)   /*Enable BB*/
  32 #define         _SCHEDULE_EN            BIT(10)  /*Enable MAC scheduler*/
  33 #define         _MACRXEN                BIT(9)
  34 #define         _MACTXEN                BIT(8)
  35 #define         _DDMA_EN                BIT(7)  /*FW off load function enable*/
  36 #define         _FW2HW_EN               BIT(6)  /*MAC every module reset */
  37 #define         _RXDMA_EN               BIT(5)
  38 #define         _TXDMA_EN               BIT(4)
  39 #define         _HCI_RXDMA_EN           BIT(3)
  40 #define         _HCI_TXDMA_EN           BIT(2)
  41
  42 /*TXPAUSE*/
  43 #define _STOPHCCA                       BIT(6)
  44 #define _STOPHIGH                       BIT(5)
  45 #define _STOPMGT                        BIT(4)
  46 #define _STOPVO                         BIT(3)
  47 #define _STOPVI                         BIT(2)
  48 #define _STOPBE                         BIT(1)
  49 #define _STOPBK                         BIT(0)
  50
  51 /*TCR*/
  52 #define _DISCW                          BIT(20)
  53 #define _ICV                            BIT(19)
  54 #define _CFEND_FMT                      BIT(17)
  55 #define _CRC                            BIT(16)
  56 #define _FWRDY                          BIT(7)
  57 #define _BASECHG                        BIT(6)
  58 #define _IMEM_RDY                       BIT(5)
  59 #define _DMEM_CODE_DONE                 BIT(4)
  60 #define _EMEM_CHK_RPT                   BIT(3)
  61 #define _EMEM_CODE_DONE                 BIT(2)
  62 #define _IMEM_CHK_RPT                   BIT(1)
  63 #define _IMEM_CODE_DONE                 BIT(0)
  64
  65 #define _TXDMA_INIT_VALUE       (_IMEM_CHK_RPT|_EMEM_CHK_RPT)
  66
  67 /*RCR*/
  68 #define _ENMBID                         BIT(27)
  69 #define _APP_PHYST_RXFF                 BIT(25)
  70 #define _APP_PHYST_STAFF                BIT(24)
  71 #define _CBSSID                         BIT(23)
  72 #define _APWRMGT                        BIT(22)
  73 #define _ADD3                           BIT(21)
  74 #define _AMF                            BIT(20)
  75 #define _ACF                            BIT(19)
  76 #define _ADF                            BIT(18)
  77 #define _APP_MIC                        BIT(17)
  78 #define _APP_ICV                        BIT(16)
  79 #define _RXFTH_MSK                      0x0000E000
  80 #define _RXFTH_SHT                      13
  81 #define _AICV                           BIT(12)
  82 #define _RXPKTLMT_MSK                   0x00000FC0
  83 #define _RXPKTLMT_SHT                   6
  84 #define _ACRC32                         BIT(5)
  85 #define _AB                             BIT(3)
  86 #define _AM                             BIT(2)
  87 #define _APM                            BIT(1)
  88 #define _AAP                            BIT(0)
  89
  90 /*MSR*/
  91 #define _NETTYPE_MSK                    0x03
  92 #define _NETTYPE_SHT                    0
  93
  94 /*BT*/
  95 #define _BTMODE_MSK                     0x06
  96 #define _BTMODE_SHT                     1
  97 #define _ENBT                           BIT(0)
  98
  99 /*MBIDCTRL*/
 100 #define _ENMBID_MODE                    BIT(15)
 101 #define _BCNNO_MSK                      0x7000
 102 #define _BCNNO_SHT                      12
 103 #define _BCNSPACE_MSK                   0x0FFF
 104 #define _BCNSPACE_SHT                   0
 105
 106
 107 #endif /* __RTL8712_CMDCTRL_BITDEF_H__*/
 108