kernel/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  *
   4  * This program is distributed in the hope that it will be useful, but WITHOUT
   5  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   6  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   7  * more details.
   8  *
   9  * The full GNU General Public License is included in this distribution in the
  10  * file called LICENSE.
  11  *
  12  * Contact Information:
  13  * wlanfae <wlanfae@realtek.com>
  14 ******************************************************************************/
  15 #include "rtl_core.h"
  16 #include "rtl_dm.h"
  17 #include "r8192E_hw.h"
  18 #include "r8192E_phy.h"
  19 #include "r8192E_phyreg.h"
  20 #include "r8190P_rtl8256.h"
  21 #include "r8192E_cmdpkt.h"
  22
  23 /*---------------------------Define Local Constant---------------------------*/
  24 static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
  25         0x5e4322,
  26         0x5e4322,
  27         0x5ea44f,
  28         0x5e4322,
  29         0x604322,
  30         0xa44f,
  31         0x5e4322,
  32         0x5e4332
  33 };
  34
  35 static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = {
  36         0x5e4322,
  37         0x5e4322,
  38         0x5e4322,
  39         0x5e4322,
  40         0x604322,
  41         0xa44f,
  42         0x5e4322,
  43         0x5e4322
  44 };
  45
  46 static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
  47         0x5e4322,
  48         0xa44f,
  49         0x5ea44f,
  50         0x5e4322,
  51         0x604322,
  52         0x5e4322,
  53         0x5e4322,
  54         0x5e4332
  55 };
  56
  57 const u32 dm_tx_bb_gain[TxBBGainTableLength] = {
  58         0x7f8001fe, /* 12 dB */
  59         0x788001e2, /* 11 dB */
  60         0x71c001c7,
  61         0x6b8001ae,
  62         0x65400195,
  63         0x5fc0017f,
  64         0x5a400169,
  65         0x55400155,
  66         0x50800142,
  67         0x4c000130,
  68         0x47c0011f,
  69         0x43c0010f,
  70         0x40000100,
  71         0x3c8000f2,
  72         0x390000e4,
  73         0x35c000d7,
  74         0x32c000cb,
  75         0x300000c0,
  76         0x2d4000b5,
  77         0x2ac000ab,
  78         0x288000a2,
  79         0x26000098,
  80         0x24000090,
  81         0x22000088,
  82         0x20000080,
  83         0x1a00006c,
  84         0x1c800072,
  85         0x18000060,
  86         0x19800066,
  87         0x15800056,
  88         0x26c0005b,
  89         0x14400051,
  90         0x24400051,
  91         0x1300004c,
  92         0x12000048,
  93         0x11000044,
  94         0x10000040, /* -24 dB */
  95 };
  96
  97 const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8] = {
  98         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
  99         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
 100         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
 101         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
 102         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
 103         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
 104         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
 105         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
 106         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
 107         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
 108         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
 109         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
 110         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
 111         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
 112         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
 113         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
 114         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
 115         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
 116         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
 117         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 118         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 119         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
 120         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
 121 };
 122
 123 const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8] = {
 124         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 125         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
 126         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 127         {0x2d, 0x2d, 0x27, 0x17, 0x00, 0x00, 0x00, 0x00},
 128         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 129         {0x28, 0x28, 0x22, 0x14, 0x00, 0x00, 0x00, 0x00},
 130         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 131         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
 132         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 133         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
 134         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 135         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
 136         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 137         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
 138         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 139         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
 140         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 141         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
 142         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 143         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 144         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 145         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
 146         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
 147 };
 148
 149 /*---------------------------Define Local Constant---------------------------*/
 150
 151
 152 /*------------------------Define global variable-----------------------------*/
 153 struct dig_t dm_digtable;
 154
 155 struct drx_path_sel DM_RxPathSelTable;
 156 /*------------------------Define global variable-----------------------------*/
 157
 158
 159 /*------------------------Define local variable------------------------------*/
 160 /*------------------------Define local variable------------------------------*/
 161
 162
 163
 164 /*---------------------Define local function prototype-----------------------*/
 165 static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev);
 166
 167 static void _rtl92e_dm_init_bandwidth_autoswitch(struct net_device *dev);
 168 static  void    _rtl92e_dm_bandwidth_autoswitch(struct net_device *dev);
 169
 170
 171 static  void    _rtl92e_dm_check_tx_power_tracking(struct net_device *dev);
 172
 173 static void _rtl92e_dm_bb_initialgain_restore(struct net_device *dev);
 174 static void _rtl92e_dm_dig_init(struct net_device *dev);
 175 static void _rtl92e_dm_ctrl_initgain_byrssi(struct net_device *dev);
 176 static void _rtl92e_dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
 177 static void _rtl92e_dm_ctrl_initgain_byrssi_driver(struct net_device *dev);
 178 static void _rtl92e_dm_ctrl_initgain_byrssi_false_alarm(struct net_device *dev);
 179 static void _rtl92e_dm_initial_gain(struct net_device *dev);
 180 static void _rtl92e_dm_pd_th(struct net_device *dev);
 181 static void _rtl92e_dm_cs_ratio(struct net_device *dev);
 182
 183 static  void _rtl92e_dm_init_cts_to_self(struct net_device *dev);
 184 static void _rtl92e_dm_init_wa_broadcom_iot(struct net_device *dev);
 185
 186 static void _rtl92e_dm_check_edca_turbo(struct net_device *dev);
 187 static void _rtl92e_dm_check_rx_path_selection(struct net_device *dev);
 188 static void _rtl92e_dm_init_rx_path_selection(struct net_device *dev);
 189 static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev);
 190
 191
 192 static void _rtl92e_dm_init_fsync(struct net_device *dev);
 193 static void _rtl92e_dm_deinit_fsync(struct net_device *dev);
 194
 195 static  void _rtl92e_dm_check_txrateandretrycount(struct net_device *dev);
 196 static  void _rtl92e_dm_check_ac_dc_power(struct net_device *dev);
 197 static void _rtl92e_dm_check_fsync(struct net_device *dev);
 198 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data);
 199 static void _rtl92e_dm_fsync_timer_callback(unsigned long data);
 200
 201 /*---------------------Define local function prototype-----------------------*/
 202
 203 static  void    _rtl92e_dm_init_dynamic_tx_power(struct net_device *dev);
 204 static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev);
 205
 206 static void _rtl92e_dm_send_rssi_to_fw(struct net_device *dev);
 207 static void _rtl92e_dm_cts_to_self(struct net_device *dev);
 208 /*---------------------------Define function prototype------------------------*/
 209
 210 void rtl92e_dm_init(struct net_device *dev)
 211 {
 212         struct r8192_priv *priv = rtllib_priv(dev);
 213
 214         priv->DM_Type = DM_Type_ByDriver;
 215
 216         priv->undecorated_smoothed_pwdb = -1;
 217
 218         _rtl92e_dm_init_dynamic_tx_power(dev);
 219
 220         rtl92e_init_adaptive_rate(dev);
 221
 222         _rtl92e_dm_dig_init(dev);
 223         rtl92e_dm_init_edca_turbo(dev);
 224         _rtl92e_dm_init_bandwidth_autoswitch(dev);
 225         _rtl92e_dm_init_fsync(dev);
 226         _rtl92e_dm_init_rx_path_selection(dev);
 227         _rtl92e_dm_init_cts_to_self(dev);
 228         if (IS_HARDWARE_TYPE_8192SE(dev))
 229                 _rtl92e_dm_init_wa_broadcom_iot(dev);
 230
 231         INIT_DELAYED_WORK_RSL(&priv->gpio_change_rf_wq,
 232                               (void *)_rtl92e_dm_check_rf_ctrl_gpio, dev);
 233 }
 234
 235 void rtl92e_dm_deinit(struct net_device *dev)
 236 {
 237
 238         _rtl92e_dm_deinit_fsync(dev);
 239
 240 }
 241
 242 void rtl92e_dm_watchdog(struct net_device *dev)
 243 {
 244         struct r8192_priv *priv = rtllib_priv(dev);
 245
 246         if (priv->being_init_adapter)
 247                 return;
 248
 249         _rtl92e_dm_check_ac_dc_power(dev);
 250
 251         _rtl92e_dm_check_txrateandretrycount(dev);
 252         _rtl92e_dm_check_edca_turbo(dev);
 253
 254         _rtl92e_dm_check_rate_adaptive(dev);
 255         _rtl92e_dm_dynamic_tx_power(dev);
 256         _rtl92e_dm_check_tx_power_tracking(dev);
 257
 258         _rtl92e_dm_ctrl_initgain_byrssi(dev);
 259         _rtl92e_dm_bandwidth_autoswitch(dev);
 260
 261         _rtl92e_dm_check_rx_path_selection(dev);
 262         _rtl92e_dm_check_fsync(dev);
 263
 264         _rtl92e_dm_send_rssi_to_fw(dev);
 265         _rtl92e_dm_cts_to_self(dev);
 266 }
 267
 268 static void _rtl92e_dm_check_ac_dc_power(struct net_device *dev)
 269 {
 270         struct r8192_priv *priv = rtllib_priv(dev);
 271         static char *ac_dc_script = "/etc/acpi/wireless-rtl-ac-dc-power.sh";
 272         char *argv[] = {ac_dc_script, DRV_NAME, NULL};
 273         static char *envp[] = {"HOME=/",
 274                         "TERM=linux",
 275                         "PATH=/usr/bin:/bin",
 276                          NULL};
 277
 278         if (priv->ResetProgress == RESET_TYPE_SILENT) {
 279                 RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF),
 280                          "GPIOChangeRFWorkItemCallBack(): Silent Reset!!!!!!!\n");
 281                 return;
 282         }
 283
 284         if (priv->rtllib->state != RTLLIB_LINKED)
 285                 return;
 286         call_usermodehelper(ac_dc_script, argv, envp, UMH_WAIT_PROC);
 287
 288         return;
 289 };
 290
 291
 292 void rtl92e_init_adaptive_rate(struct net_device *dev)
 293 {
 294
 295         struct r8192_priv *priv = rtllib_priv(dev);
 296         struct rate_adaptive *pra = &priv->rate_adaptive;
 297
 298         pra->ratr_state = DM_RATR_STA_MAX;
 299         pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
 300         pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
 301         pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
 302
 303         pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
 304         pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
 305         pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
 306
 307         if (priv->CustomerID == RT_CID_819x_Netcore)
 308                 pra->ping_rssi_enable = 1;
 309         else
 310                 pra->ping_rssi_enable = 0;
 311         pra->ping_rssi_thresh_for_ra = 15;
 312
 313
 314         if (priv->rf_type == RF_2T4R) {
 315                 pra->upper_rssi_threshold_ratr          =       0x8f0f0000;
 316                 pra->middle_rssi_threshold_ratr         =       0x8f0ff000;
 317                 pra->low_rssi_threshold_ratr            =       0x8f0ff001;
 318                 pra->low_rssi_threshold_ratr_40M        =       0x8f0ff005;
 319                 pra->low_rssi_threshold_ratr_20M        =       0x8f0ff001;
 320                 pra->ping_rssi_ratr     =       0x0000000d;
 321         } else if (priv->rf_type == RF_1T2R) {
 322                 pra->upper_rssi_threshold_ratr          =       0x000fc000;
 323                 pra->middle_rssi_threshold_ratr         =       0x000ff000;
 324                 pra->low_rssi_threshold_ratr            =       0x000ff001;
 325                 pra->low_rssi_threshold_ratr_40M        =       0x000ff005;
 326                 pra->low_rssi_threshold_ratr_20M        =       0x000ff001;
 327                 pra->ping_rssi_ratr     =       0x0000000d;
 328         }
 329
 330 }
 331
 332
 333 static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev)
 334 {
 335         struct r8192_priv *priv = rtllib_priv(dev);
 336         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
 337         struct rate_adaptive *pra = &priv->rate_adaptive;
 338         u32 currentRATR, targetRATR = 0;
 339         u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
 340         bool bshort_gi_enabled = false;
 341         static u8 ping_rssi_state;
 342
 343         if (!priv->up) {
 344                 RT_TRACE(COMP_RATE,
 345                          "<---- _rtl92e_dm_check_rate_adaptive(): driver is going to unload\n");
 346                 return;
 347         }
 348
 349         if (pra->rate_adaptive_disabled)
 350                 return;
 351
 352         if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
 353             priv->rtllib->mode == WIRELESS_MODE_N_5G))
 354                 return;
 355
 356         if (priv->rtllib->state == RTLLIB_LINKED) {
 357
 358                 bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz &&
 359                                      pHTInfo->bCurShortGI40MHz) ||
 360                                     (!pHTInfo->bCurTxBW40MHz &&
 361                                      pHTInfo->bCurShortGI20MHz);
 362
 363                 pra->upper_rssi_threshold_ratr =
 364                                 (pra->upper_rssi_threshold_ratr & (~BIT31)) |
 365                                 ((bshort_gi_enabled) ? BIT31 : 0);
 366
 367                 pra->middle_rssi_threshold_ratr =
 368                                 (pra->middle_rssi_threshold_ratr & (~BIT31)) |
 369                                 ((bshort_gi_enabled) ? BIT31 : 0);
 370
 371                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
 372                         pra->low_rssi_threshold_ratr =
 373                                 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) |
 374                                 ((bshort_gi_enabled) ? BIT31 : 0);
 375                 } else {
 376                         pra->low_rssi_threshold_ratr =
 377                                 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) |
 378                                 ((bshort_gi_enabled) ? BIT31 : 0);
 379                 }
 380                 pra->ping_rssi_ratr =
 381                                 (pra->ping_rssi_ratr & (~BIT31)) |
 382                                 ((bshort_gi_enabled) ? BIT31 : 0);
 383
 384                 if (pra->ratr_state == DM_RATR_STA_HIGH) {
 385                         HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
 386                         LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
 387                                         (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
 388                 } else if (pra->ratr_state == DM_RATR_STA_LOW) {
 389                         HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
 390                         LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
 391                                         (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M);
 392                 } else {
 393                         HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
 394                         LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
 395                                         (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
 396                 }
 397
 398                 if (priv->undecorated_smoothed_pwdb >=
 399                     (long)HighRSSIThreshForRA) {
 400                         pra->ratr_state = DM_RATR_STA_HIGH;
 401                         targetRATR = pra->upper_rssi_threshold_ratr;
 402                 } else if (priv->undecorated_smoothed_pwdb >=
 403                            (long)LowRSSIThreshForRA) {
 404                         pra->ratr_state = DM_RATR_STA_MIDDLE;
 405                         targetRATR = pra->middle_rssi_threshold_ratr;
 406                 } else {
 407                         pra->ratr_state = DM_RATR_STA_LOW;
 408                         targetRATR = pra->low_rssi_threshold_ratr;
 409                 }
 410
 411                 if (pra->ping_rssi_enable) {
 412                         if (priv->undecorated_smoothed_pwdb <
 413                             (long)(pra->ping_rssi_thresh_for_ra+5)) {
 414                                 if ((priv->undecorated_smoothed_pwdb <
 415                                      (long)pra->ping_rssi_thresh_for_ra) ||
 416                                     ping_rssi_state) {
 417                                         pra->ratr_state = DM_RATR_STA_LOW;
 418                                         targetRATR = pra->ping_rssi_ratr;
 419                                         ping_rssi_state = 1;
 420                                 }
 421                         } else {
 422                                 ping_rssi_state = 0;
 423                         }
 424                 }
 425
 426                 if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
 427                         targetRATR &=  0xf00fffff;
 428
 429                 currentRATR = rtl92e_readl(dev, RATR0);
 430                 if (targetRATR !=  currentRATR) {
 431                         u32 ratr_value;
 432
 433                         ratr_value = targetRATR;
 434                         RT_TRACE(COMP_RATE,
 435                                  "currentRATR = %x, targetRATR = %x\n",
 436                                  currentRATR, targetRATR);
 437                         if (priv->rf_type == RF_1T2R)
 438                                 ratr_value &= ~(RATE_ALL_OFDM_2SS);
 439                         rtl92e_writel(dev, RATR0, ratr_value);
 440                         rtl92e_writeb(dev, UFWP, 1);
 441
 442                         pra->last_ratr = targetRATR;
 443                 }
 444
 445         } else {
 446                 pra->ratr_state = DM_RATR_STA_MAX;
 447         }
 448 }
 449
 450 static void _rtl92e_dm_init_bandwidth_autoswitch(struct net_device *dev)
 451 {
 452         struct r8192_priv *priv = rtllib_priv(dev);
 453
 454         priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
 455         priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
 456         priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
 457         priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
 458 }
 459
 460 static void _rtl92e_dm_bandwidth_autoswitch(struct net_device *dev)
 461 {
 462         struct r8192_priv *priv = rtllib_priv(dev);
 463
 464         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||
 465            !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable)
 466                 return;
 467         if (priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false) {
 468                 if (priv->undecorated_smoothed_pwdb <=
 469                     priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
 470                         priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
 471         } else {
 472                 if (priv->undecorated_smoothed_pwdb >=
 473                     priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
 474                         priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
 475         }
 476 }
 477
 478 static u32 OFDMSwingTable[OFDM_Table_Length] = {
 479         0x7f8001fe,
 480         0x71c001c7,
 481         0x65400195,
 482         0x5a400169,
 483         0x50800142,
 484         0x47c0011f,
 485         0x40000100,
 486         0x390000e4,
 487         0x32c000cb,
 488         0x2d4000b5,
 489         0x288000a2,
 490         0x24000090,
 491         0x20000080,
 492         0x1c800072,
 493         0x19800066,
 494         0x26c0005b,
 495         0x24400051,
 496         0x12000048,
 497         0x10000040
 498 };
 499
 500 static u8       CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
 501         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
 502         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
 503         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
 504         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
 505         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
 506         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
 507         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
 508         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
 509         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
 510         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
 511         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
 512         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
 513 };
 514
 515 static u8       CCKSwingTable_Ch14[CCK_Table_length][8] = {
 516         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
 517         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
 518         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
 519         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
 520         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
 521         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
 522         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
 523         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
 524         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
 525         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
 526         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
 527         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
 528 };
 529
 530 #define         Pw_Track_Flag                           0x11d
 531 #define         Tssi_Mea_Value                          0x13c
 532 #define         Tssi_Report_Value1                      0x134
 533 #define         Tssi_Report_Value2                      0x13e
 534 #define         FW_Busy_Flag                            0x13f
 535
 536 static void _rtl92e_dm_tx_update_tssi_weak_signal(struct net_device *dev,
 537                                                   u8 RF_Type)
 538 {
 539         struct r8192_priv *p = rtllib_priv(dev);
 540
 541         if (RF_Type == RF_2T4R) {
 542                 if ((p->rfa_txpowertrackingindex > 0) &&
 543                     (p->rfc_txpowertrackingindex > 0)) {
 544                         p->rfa_txpowertrackingindex--;
 545                         if (p->rfa_txpowertrackingindex_real > 4) {
 546                                 p->rfa_txpowertrackingindex_real--;
 547                                 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 548                                                   bMaskDWord,
 549                                                   dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 550                         }
 551
 552                         p->rfc_txpowertrackingindex--;
 553                         if (p->rfc_txpowertrackingindex_real > 4) {
 554                                 p->rfc_txpowertrackingindex_real--;
 555                                 rtl92e_set_bb_reg(dev,
 556                                                   rOFDM0_XCTxIQImbalance,
 557                                                   bMaskDWord,
 558                                                   dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]);
 559                         }
 560                 } else {
 561                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 562                                           bMaskDWord,
 563                                           dm_tx_bb_gain[4]);
 564                         rtl92e_set_bb_reg(dev,
 565                                           rOFDM0_XCTxIQImbalance,
 566                                           bMaskDWord, dm_tx_bb_gain[4]);
 567                 }
 568         } else {
 569                 if (p->rfa_txpowertrackingindex > 0) {
 570                         p->rfa_txpowertrackingindex--;
 571                         if (p->rfa_txpowertrackingindex_real > 4) {
 572                                 p->rfa_txpowertrackingindex_real--;
 573                                 rtl92e_set_bb_reg(dev,
 574                                                   rOFDM0_XATxIQImbalance,
 575                                                   bMaskDWord,
 576                                                   dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 577                         }
 578                 } else {
 579                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 580                                           bMaskDWord, dm_tx_bb_gain[4]);
 581                 }
 582         }
 583 }
 584
 585 static void _rtl92e_dm_tx_update_tssi_strong_signal(struct net_device *dev,
 586                                                     u8 RF_Type)
 587 {
 588         struct r8192_priv *p = rtllib_priv(dev);
 589
 590         if (RF_Type == RF_2T4R) {
 591                 if ((p->rfa_txpowertrackingindex < TxBBGainTableLength - 1) &&
 592                     (p->rfc_txpowertrackingindex < TxBBGainTableLength - 1)) {
 593                         p->rfa_txpowertrackingindex++;
 594                         p->rfa_txpowertrackingindex_real++;
 595                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 596                                           bMaskDWord,
 597                                           dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 598                         p->rfc_txpowertrackingindex++;
 599                         p->rfc_txpowertrackingindex_real++;
 600                         rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance,
 601                                           bMaskDWord,
 602                                           dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]);
 603                 } else {
 604                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 605                                           bMaskDWord,
 606                                           dm_tx_bb_gain[TxBBGainTableLength - 1]);
 607                         rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance,
 608                                           bMaskDWord,
 609                                           dm_tx_bb_gain[TxBBGainTableLength - 1]);
 610                 }
 611         } else {
 612                 if (p->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) {
 613                         p->rfa_txpowertrackingindex++;
 614                         p->rfa_txpowertrackingindex_real++;
 615                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 616                                           bMaskDWord,
 617                                           dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
 618                 } else {
 619                         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
 620                                           bMaskDWord,
 621                                           dm_tx_bb_gain[TxBBGainTableLength - 1]);
 622                 }
 623         }
 624 }
 625
 626 static void _rtl92e_dm_tx_power_tracking_callback_tssi(struct net_device *dev)
 627 {
 628         struct r8192_priv *priv = rtllib_priv(dev);
 629         bool    bHighpowerstate, viviflag = false;
 630         struct dcmd_txcmd tx_cmd;
 631         u8      powerlevelOFDM24G;
 632         int     i = 0, j = 0, k = 0;
 633         u8      RF_Type, tmp_report[5] = {0, 0, 0, 0, 0};
 634         u32     Value;
 635         u8      Pwr_Flag;
 636         u16     Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver = 0;
 637         u32     delta = 0;
 638
 639         RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
 640         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 641         rtl92e_writeb(dev, FW_Busy_Flag, 0);
 642         priv->rtllib->bdynamic_txpower_enable = false;
 643         bHighpowerstate = priv->bDynamicTxHighPower;
 644
 645         powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24);
 646         RF_Type = priv->rf_type;
 647         Value = (RF_Type<<8) | powerlevelOFDM24G;
 648
 649         RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n",
 650                  powerlevelOFDM24G);
 651
 652
 653         for (j = 0; j <= 30; j++) {
 654
 655                 tx_cmd.Op               = TXCMD_SET_TX_PWR_TRACKING;
 656                 tx_cmd.Length   = 4;
 657                 tx_cmd.Value            = Value;
 658                 rtl92e_send_cmd_pkt(dev, DESC_PACKET_TYPE_NORMAL, (u8 *)&tx_cmd,
 659                                     sizeof(struct dcmd_txcmd));
 660                 mdelay(1);
 661                 for (i = 0; i <= 30; i++) {
 662                         Pwr_Flag = rtl92e_readb(dev, Pw_Track_Flag);
 663
 664                         if (Pwr_Flag == 0) {
 665                                 mdelay(1);
 666
 667                                 if (priv->bResetInProgress) {
 668                                         RT_TRACE(COMP_POWER_TRACKING,
 669                                                  "we are in silent reset progress, so return\n");
 670                                         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 671                                         rtl92e_writeb(dev, FW_Busy_Flag, 0);
 672                                         return;
 673                                 }
 674                                 if (priv->rtllib->eRFPowerState != eRfOn) {
 675                                         RT_TRACE(COMP_POWER_TRACKING,
 676                                                  "we are in power save, so return\n");
 677                                         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 678                                         rtl92e_writeb(dev, FW_Busy_Flag, 0);
 679                                         return;
 680                                 }
 681
 682                                 continue;
 683                         }
 684
 685                         Avg_TSSI_Meas = rtl92e_readw(dev, Tssi_Mea_Value);
 686
 687                         if (Avg_TSSI_Meas == 0) {
 688                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 689                                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 690                                 return;
 691                         }
 692
 693                         for (k = 0; k < 5; k++) {
 694                                 if (k != 4)
 695                                         tmp_report[k] = rtl92e_readb(dev,
 696                                                          Tssi_Report_Value1+k);
 697                                 else
 698                                         tmp_report[k] = rtl92e_readb(dev,
 699                                                          Tssi_Report_Value2);
 700
 701                                 RT_TRACE(COMP_POWER_TRACKING,
 702                                          "TSSI_report_value = %d\n",
 703                                          tmp_report[k]);
 704
 705                                 if (tmp_report[k] <= 20) {
 706                                         viviflag = true;
 707                                         break;
 708                                 }
 709                         }
 710
 711                         if (viviflag) {
 712                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 713                                 viviflag = false;
 714                                 RT_TRACE(COMP_POWER_TRACKING,
 715                                          "we filted this data\n");
 716                                 for (k = 0; k < 5; k++)
 717                                         tmp_report[k] = 0;
 718                                 break;
 719                         }
 720
 721                         for (k = 0; k < 5; k++)
 722                                 Avg_TSSI_Meas_from_driver += tmp_report[k];
 723
 724                         Avg_TSSI_Meas_from_driver *= 100 / 5;
 725                         RT_TRACE(COMP_POWER_TRACKING,
 726                                  "Avg_TSSI_Meas_from_driver = %d\n",
 727                                  Avg_TSSI_Meas_from_driver);
 728                         TSSI_13dBm = priv->TSSI_13dBm;
 729                         RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n",
 730                                  TSSI_13dBm);
 731
 732                         if (Avg_TSSI_Meas_from_driver > TSSI_13dBm)
 733                                 delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
 734                         else
 735                                 delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
 736
 737                         if (delta <= E_FOR_TX_POWER_TRACK) {
 738                                 priv->rtllib->bdynamic_txpower_enable = true;
 739                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 740                                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 741                                 RT_TRACE(COMP_POWER_TRACKING,
 742                                          "tx power track is done\n");
 743                                 RT_TRACE(COMP_POWER_TRACKING,
 744                                          "priv->rfa_txpowertrackingindex = %d\n",
 745                                          priv->rfa_txpowertrackingindex);
 746                                 RT_TRACE(COMP_POWER_TRACKING,
 747                                          "priv->rfa_txpowertrackingindex_real = %d\n",
 748                                          priv->rfa_txpowertrackingindex_real);
 749                                 RT_TRACE(COMP_POWER_TRACKING,
 750                                          "priv->CCKPresentAttentuation_difference = %d\n",
 751                                          priv->CCKPresentAttentuation_difference);
 752                                 RT_TRACE(COMP_POWER_TRACKING,
 753                                          "priv->CCKPresentAttentuation = %d\n",
 754                                          priv->CCKPresentAttentuation);
 755                                 return;
 756                         }
 757                         if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK)
 758                                 _rtl92e_dm_tx_update_tssi_weak_signal(dev,
 759                                                                       RF_Type);
 760                         else
 761                                 _rtl92e_dm_tx_update_tssi_strong_signal(dev, RF_Type);
 762
 763                         if (RF_Type == RF_2T4R) {
 764                                 priv->CCKPresentAttentuation_difference
 765                                         = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
 766                         } else {
 767                                 priv->CCKPresentAttentuation_difference
 768                                         = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
 769                         }
 770
 771                         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
 772                                 priv->CCKPresentAttentuation =
 773                                          priv->CCKPresentAttentuation_20Mdefault +
 774                                          priv->CCKPresentAttentuation_difference;
 775                         else
 776                                 priv->CCKPresentAttentuation =
 777                                          priv->CCKPresentAttentuation_40Mdefault +
 778                                          priv->CCKPresentAttentuation_difference;
 779
 780                         if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
 781                                 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
 782                         if (priv->CCKPresentAttentuation < 0)
 783                                 priv->CCKPresentAttentuation = 0;
 784
 785                         if (priv->CCKPresentAttentuation > -1 &&
 786                             priv->CCKPresentAttentuation < CCKTxBBGainTableLength) {
 787                                 if (priv->rtllib->current_network.channel == 14 &&
 788                                     !priv->bcck_in_ch14) {
 789                                         priv->bcck_in_ch14 = true;
 790                                         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 791                                 } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
 792                                         priv->bcck_in_ch14 = false;
 793                                         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 794                                 } else
 795                                         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 796                         }
 797                         RT_TRACE(COMP_POWER_TRACKING,
 798                                  "priv->rfa_txpowertrackingindex = %d\n",
 799                                  priv->rfa_txpowertrackingindex);
 800                         RT_TRACE(COMP_POWER_TRACKING,
 801                                  "priv->rfa_txpowertrackingindex_real = %d\n",
 802                                  priv->rfa_txpowertrackingindex_real);
 803                         RT_TRACE(COMP_POWER_TRACKING,
 804                                  "priv->CCKPresentAttentuation_difference = %d\n",
 805                                  priv->CCKPresentAttentuation_difference);
 806                         RT_TRACE(COMP_POWER_TRACKING,
 807                                  "priv->CCKPresentAttentuation = %d\n",
 808                                  priv->CCKPresentAttentuation);
 809
 810                         if (priv->CCKPresentAttentuation_difference <= -12 ||
 811                             priv->CCKPresentAttentuation_difference >= 24) {
 812                                 priv->rtllib->bdynamic_txpower_enable = true;
 813                                 rtl92e_writeb(dev, Pw_Track_Flag, 0);
 814                                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 815                                 RT_TRACE(COMP_POWER_TRACKING,
 816                                          "tx power track--->limited\n");
 817                                 return;
 818                         }
 819
 820                         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 821                         Avg_TSSI_Meas_from_driver = 0;
 822                         for (k = 0; k < 5; k++)
 823                                 tmp_report[k] = 0;
 824                         break;
 825                 }
 826                 rtl92e_writeb(dev, FW_Busy_Flag, 0);
 827         }
 828         priv->rtllib->bdynamic_txpower_enable = true;
 829         rtl92e_writeb(dev, Pw_Track_Flag, 0);
 830 }
 831
 832 static void _rtl92e_dm_tx_power_tracking_cb_thermal(struct net_device *dev)
 833 {
 834 #define ThermalMeterVal 9
 835         struct r8192_priv *priv = rtllib_priv(dev);
 836         u32 tmpRegA, TempCCk;
 837         u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
 838         int i = 0, CCKSwingNeedUpdate = 0;
 839
 840         if (!priv->btxpower_trackingInit) {
 841                 tmpRegA = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance,
 842                                             bMaskDWord);
 843                 for (i = 0; i < OFDM_Table_Length; i++) {
 844                         if (tmpRegA == OFDMSwingTable[i]) {
 845                                 priv->OFDM_index[0] = (u8)i;
 846                                 RT_TRACE(COMP_POWER_TRACKING,
 847                                          "Initial reg0x%x = 0x%x, OFDM_index = 0x%x\n",
 848                                          rOFDM0_XATxIQImbalance, tmpRegA,
 849                                          priv->OFDM_index[0]);
 850                         }
 851                 }
 852
 853                 TempCCk = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1, bMaskByte2);
 854                 for (i = 0; i < CCK_Table_length; i++) {
 855                         if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
 856                                 priv->CCK_index = (u8) i;
 857                                 RT_TRACE(COMP_POWER_TRACKING,
 858                                          "Initial reg0x%x = 0x%x, CCK_index = 0x%x\n",
 859                                          rCCK0_TxFilter1, TempCCk,
 860                                          priv->CCK_index);
 861                                 break;
 862                         }
 863                 }
 864                 priv->btxpower_trackingInit = true;
 865                 return;
 866         }
 867
 868         tmpRegA = rtl92e_get_rf_reg(dev, RF90_PATH_A, 0x12, 0x078);
 869         RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d\n", tmpRegA);
 870         if (tmpRegA < 3 || tmpRegA > 13)
 871                 return;
 872         if (tmpRegA >= 12)
 873                 tmpRegA = 12;
 874         RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d\n", tmpRegA);
 875         priv->ThermalMeter[0] = ThermalMeterVal;
 876         priv->ThermalMeter[1] = ThermalMeterVal;
 877
 878         if (priv->ThermalMeter[0] >= (u8)tmpRegA) {
 879                 tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0] -
 880                               (u8)tmpRegA);
 881                 tmpCCK40Mindex = tmpCCK20Mindex - 6;
 882                 if (tmpOFDMindex >= OFDM_Table_Length)
 883                         tmpOFDMindex = OFDM_Table_Length-1;
 884                 if (tmpCCK20Mindex >= CCK_Table_length)
 885                         tmpCCK20Mindex = CCK_Table_length-1;
 886                 if (tmpCCK40Mindex >= CCK_Table_length)
 887                         tmpCCK40Mindex = CCK_Table_length-1;
 888         } else {
 889                 tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
 890                 if (tmpval >= 6)
 891                         tmpOFDMindex = tmpCCK20Mindex = 0;
 892                 else
 893                         tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
 894                 tmpCCK40Mindex = 0;
 895         }
 896         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
 897                 tmpCCKindex = tmpCCK40Mindex;
 898         else
 899                 tmpCCKindex = tmpCCK20Mindex;
 900
 901         priv->Record_CCK_20Mindex = tmpCCK20Mindex;
 902         priv->Record_CCK_40Mindex = tmpCCK40Mindex;
 903         RT_TRACE(COMP_POWER_TRACKING,
 904                  "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n",
 905                  priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
 906
 907         if (priv->rtllib->current_network.channel == 14 &&
 908             !priv->bcck_in_ch14) {
 909                 priv->bcck_in_ch14 = true;
 910                 CCKSwingNeedUpdate = 1;
 911         } else if (priv->rtllib->current_network.channel != 14 &&
 912                    priv->bcck_in_ch14) {
 913                 priv->bcck_in_ch14 = false;
 914                 CCKSwingNeedUpdate = 1;
 915         }
 916
 917         if (priv->CCK_index != tmpCCKindex) {
 918                 priv->CCK_index = tmpCCKindex;
 919                 CCKSwingNeedUpdate = 1;
 920         }
 921
 922         if (CCKSwingNeedUpdate)
 923                 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
 924         if (priv->OFDM_index[0] != tmpOFDMindex) {
 925                 priv->OFDM_index[0] = tmpOFDMindex;
 926                 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
 927                                   OFDMSwingTable[priv->OFDM_index[0]]);
 928                 RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n",
 929                          priv->OFDM_index[0],
 930                          OFDMSwingTable[priv->OFDM_index[0]]);
 931         }
 932         priv->txpower_count = 0;
 933 }
 934
 935 void rtl92e_dm_txpower_tracking_wq(void *data)
 936 {
 937         struct r8192_priv *priv = container_of_dwork_rsl(data,
 938                                   struct r8192_priv, txpower_tracking_wq);
 939         struct net_device *dev = priv->rtllib->dev;
 940
 941         if (priv->IC_Cut >= IC_VersionCut_D)
 942                 _rtl92e_dm_tx_power_tracking_callback_tssi(dev);
 943         else
 944                 _rtl92e_dm_tx_power_tracking_cb_thermal(dev);
 945 }
 946
 947 static void _rtl92e_dm_initialize_tx_power_tracking_tssi(struct net_device *dev)
 948 {
 949
 950         struct r8192_priv *priv = rtllib_priv(dev);
 951
 952         priv->btxpower_tracking = true;
 953         priv->txpower_count       = 0;
 954         priv->btxpower_trackingInit = false;
 955
 956 }
 957
 958 static void _rtl92e_dm_init_tx_power_tracking_thermal(struct net_device *dev)
 959 {
 960         struct r8192_priv *priv = rtllib_priv(dev);
 961
 962
 963         if (priv->rtllib->FwRWRF)
 964                 priv->btxpower_tracking = true;
 965         else
 966                 priv->btxpower_tracking = false;
 967         priv->txpower_count       = 0;
 968         priv->btxpower_trackingInit = false;
 969         RT_TRACE(COMP_POWER_TRACKING, "pMgntInfo->bTXPowerTracking = %d\n",
 970                  priv->btxpower_tracking);
 971 }
 972
 973 void rtl92e_dm_init_txpower_tracking(struct net_device *dev)
 974 {
 975         struct r8192_priv *priv = rtllib_priv(dev);
 976
 977         if (priv->IC_Cut >= IC_VersionCut_D)
 978                 _rtl92e_dm_initialize_tx_power_tracking_tssi(dev);
 979         else
 980                 _rtl92e_dm_init_tx_power_tracking_thermal(dev);
 981 }
 982
 983 static void _rtl92e_dm_check_tx_power_tracking_tssi(struct net_device *dev)
 984 {
 985         struct r8192_priv *priv = rtllib_priv(dev);
 986         static u32 tx_power_track_counter;
 987
 988         RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
 989         if (rtl92e_readb(dev, 0x11e) == 1)
 990                 return;
 991         if (!priv->btxpower_tracking)
 992                 return;
 993         tx_power_track_counter++;
 994
 995
 996          if (tx_power_track_counter >= 180) {
 997                 queue_delayed_work_rsl(priv->priv_wq,
 998                                        &priv->txpower_tracking_wq, 0);
 999                 tx_power_track_counter = 0;
1000         }
1001
1002 }
1003
1004 static void _rtl92e_dm_check_tx_power_tracking_thermal(struct net_device *dev)
1005 {
1006         struct r8192_priv *priv = rtllib_priv(dev);
1007         static u8       TM_Trigger;
1008         u8              TxPowerCheckCnt = 0;
1009
1010         if (IS_HARDWARE_TYPE_8192SE(dev))
1011                 TxPowerCheckCnt = 5;
1012         else
1013                 TxPowerCheckCnt = 2;
1014         if (!priv->btxpower_tracking)
1015                 return;
1016
1017         if (priv->txpower_count  <= TxPowerCheckCnt) {
1018                 priv->txpower_count++;
1019                 return;
1020         }
1021
1022         if (!TM_Trigger) {
1023                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1024                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1025                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1026                 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1027                 TM_Trigger = 1;
1028                 return;
1029         }
1030         netdev_info(dev, "===============>Schedule TxPowerTrackingWorkItem\n");
1031         queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1032         TM_Trigger = 0;
1033
1034 }
1035
1036 static void _rtl92e_dm_check_tx_power_tracking(struct net_device *dev)
1037 {
1038         struct r8192_priv *priv = rtllib_priv(dev);
1039
1040         if (priv->IC_Cut >= IC_VersionCut_D)
1041                 _rtl92e_dm_check_tx_power_tracking_tssi(dev);
1042         else
1043                 _rtl92e_dm_check_tx_power_tracking_thermal(dev);
1044 }
1045
1046 static void _rtl92e_dm_cck_tx_power_adjust_tssi(struct net_device *dev,
1047                                                 bool bInCH14)
1048 {
1049         u32 TempVal;
1050         struct r8192_priv *priv = rtllib_priv(dev);
1051         u8 attenuation = (u8)priv->CCKPresentAttentuation;
1052
1053         TempVal = 0;
1054         if (!bInCH14) {
1055                 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][0] +
1056                           (dm_cck_tx_bb_gain[attenuation][1] << 8));
1057
1058                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1059                 TempVal = (u32)((dm_cck_tx_bb_gain[attenuation][2]) +
1060                           (dm_cck_tx_bb_gain[attenuation][3] << 8) +
1061                           (dm_cck_tx_bb_gain[attenuation][4] << 16)+
1062                           (dm_cck_tx_bb_gain[attenuation][5] << 24));
1063                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1064                 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][6] +
1065                           (dm_cck_tx_bb_gain[attenuation][7] << 8));
1066
1067                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1068         } else {
1069                 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][0]) +
1070                           (dm_cck_tx_bb_gain_ch14[attenuation][1] << 8));
1071
1072                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1073                 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][2]) +
1074                           (dm_cck_tx_bb_gain_ch14[attenuation][3] << 8) +
1075                           (dm_cck_tx_bb_gain_ch14[attenuation][4] << 16)+
1076                           (dm_cck_tx_bb_gain_ch14[attenuation][5] << 24));
1077                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1078                 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][6]) +
1079                           (dm_cck_tx_bb_gain_ch14[attenuation][7] << 8));
1080
1081                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1082         }
1083 }
1084
1085 static void _rtl92e_dm_cck_tx_power_adjust_thermal_meter(struct net_device *dev,
1086                                                          bool bInCH14)
1087 {
1088         u32 TempVal;
1089         struct r8192_priv *priv = rtllib_priv(dev);
1090
1091         TempVal = 0;
1092         if (!bInCH14) {
1093                 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
1094                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1] << 8);
1095                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1096                 RT_TRACE(COMP_POWER_TRACKING,
1097                          "CCK not chnl 14, reg 0x%x = 0x%x\n", rCCK0_TxFilter1,
1098                          TempVal);
1099                 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
1100                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3] << 8) +
1101                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4] << 16)+
1102                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5] << 24);
1103                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1104                 RT_TRACE(COMP_POWER_TRACKING,
1105                          "CCK not chnl 14, reg 0x%x = 0x%x\n", rCCK0_TxFilter2,
1106                          TempVal);
1107                 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
1108                           (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7] << 8);
1109
1110                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1111                 RT_TRACE(COMP_POWER_TRACKING,
1112                          "CCK not chnl 14, reg 0x%x = 0x%x\n", rCCK0_DebugPort,
1113                          TempVal);
1114         } else {
1115                 TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
1116                           (CCKSwingTable_Ch14[priv->CCK_index][1] << 8);
1117
1118                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1119                 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1120                         rCCK0_TxFilter1, TempVal);
1121                 TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
1122                           (CCKSwingTable_Ch14[priv->CCK_index][3] << 8) +
1123                           (CCKSwingTable_Ch14[priv->CCK_index][4] << 16)+
1124                           (CCKSwingTable_Ch14[priv->CCK_index][5] << 24);
1125                 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1126                 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1127                         rCCK0_TxFilter2, TempVal);
1128                 TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
1129                           (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
1130
1131                 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1132                 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1133                         rCCK0_DebugPort, TempVal);
1134         }
1135 }
1136
1137 void rtl92e_dm_cck_txpower_adjust(struct net_device *dev, bool binch14)
1138 {
1139         struct r8192_priv *priv = rtllib_priv(dev);
1140
1141         if (priv->IC_Cut >= IC_VersionCut_D)
1142                 _rtl92e_dm_cck_tx_power_adjust_tssi(dev, binch14);
1143         else
1144                 _rtl92e_dm_cck_tx_power_adjust_thermal_meter(dev, binch14);
1145 }
1146
1147 static void _rtl92e_dm_tx_power_reset_recovery(struct net_device *dev)
1148 {
1149         struct r8192_priv *priv = rtllib_priv(dev);
1150
1151         RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
1152         rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
1153                           dm_tx_bb_gain[priv->rfa_txpowertrackingindex]);
1154         RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n",
1155                  dm_tx_bb_gain[priv->rfa_txpowertrackingindex]);
1156         RT_TRACE(COMP_POWER_TRACKING,
1157                  "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n",
1158                  priv->rfa_txpowertrackingindex);
1159         RT_TRACE(COMP_POWER_TRACKING,
1160                  "Reset Recovery : RF A I/Q Amplify Gain is %d\n",
1161                  dm_tx_bb_gain_idx_to_amplify(priv->rfa_txpowertrackingindex));
1162         RT_TRACE(COMP_POWER_TRACKING,
1163                  "Reset Recovery: CCK Attenuation is %d dB\n",
1164                  priv->CCKPresentAttentuation);
1165         rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1166
1167         rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord,
1168                           dm_tx_bb_gain[priv->rfc_txpowertrackingindex]);
1169         RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n",
1170                  dm_tx_bb_gain[priv->rfc_txpowertrackingindex]);
1171         RT_TRACE(COMP_POWER_TRACKING,
1172                  "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n",
1173                  priv->rfc_txpowertrackingindex);
1174         RT_TRACE(COMP_POWER_TRACKING,
1175                  "Reset Recovery : RF C I/Q Amplify Gain is %d\n",
1176                  dm_tx_bb_gain_idx_to_amplify(priv->rfc_txpowertrackingindex));
1177 }
1178
1179 void rtl92e_dm_restore_state(struct net_device *dev)
1180 {
1181         struct r8192_priv *priv = rtllib_priv(dev);
1182         u32     reg_ratr = priv->rate_adaptive.last_ratr;
1183         u32 ratr_value;
1184
1185         if (!priv->up) {
1186                 RT_TRACE(COMP_RATE,
1187                          "<---- rtl92e_dm_restore_state(): driver is going to unload\n");
1188                 return;
1189         }
1190
1191         if (priv->rate_adaptive.rate_adaptive_disabled)
1192                 return;
1193         if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
1194               priv->rtllib->mode == WIRELESS_MODE_N_5G))
1195                 return;
1196         ratr_value = reg_ratr;
1197         if (priv->rf_type == RF_1T2R)
1198                 ratr_value &= ~(RATE_ALL_OFDM_2SS);
1199         rtl92e_writel(dev, RATR0, ratr_value);
1200         rtl92e_writeb(dev, UFWP, 1);
1201         if (priv->btxpower_trackingInit && priv->btxpower_tracking)
1202                 _rtl92e_dm_tx_power_reset_recovery(dev);
1203
1204         _rtl92e_dm_bb_initialgain_restore(dev);
1205
1206 }
1207
1208 static void _rtl92e_dm_bb_initialgain_restore(struct net_device *dev)
1209 {
1210         struct r8192_priv *priv = rtllib_priv(dev);
1211         u32 bit_mask = 0x7f;
1212
1213         if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1214                 return;
1215
1216         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1217         rtl92e_set_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask,
1218                           (u32)priv->initgain_backup.xaagccore1);
1219         rtl92e_set_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask,
1220                           (u32)priv->initgain_backup.xbagccore1);
1221         rtl92e_set_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask,
1222                           (u32)priv->initgain_backup.xcagccore1);
1223         rtl92e_set_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask,
1224                           (u32)priv->initgain_backup.xdagccore1);
1225         bit_mask  = bMaskByte2;
1226         rtl92e_set_bb_reg(dev, rCCK0_CCA, bit_mask,
1227                           (u32)priv->initgain_backup.cca);
1228
1229         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n",
1230                  priv->initgain_backup.xaagccore1);
1231         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n",
1232                  priv->initgain_backup.xbagccore1);
1233         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n",
1234                  priv->initgain_backup.xcagccore1);
1235         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n",
1236                  priv->initgain_backup.xdagccore1);
1237         RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n",
1238                  priv->initgain_backup.cca);
1239         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1240
1241 }
1242
1243 void rtl92e_dm_backup_state(struct net_device *dev)
1244 {
1245         struct r8192_priv *priv = rtllib_priv(dev);
1246         u32 bit_mask = bMaskByte0;
1247
1248         priv->bswitch_fsync  = false;
1249         priv->bfsync_processing = false;
1250
1251         if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1252                 return;
1253
1254         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1255         priv->initgain_backup.xaagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask);
1256         priv->initgain_backup.xbagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask);
1257         priv->initgain_backup.xcagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask);
1258         priv->initgain_backup.xdagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask);
1259         bit_mask  = bMaskByte2;
1260         priv->initgain_backup.cca = (u8)rtl92e_get_bb_reg(dev, rCCK0_CCA, bit_mask);
1261
1262         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n",
1263                  priv->initgain_backup.xaagccore1);
1264         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n",
1265                  priv->initgain_backup.xbagccore1);
1266         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n",
1267                  priv->initgain_backup.xcagccore1);
1268         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n",
1269                  priv->initgain_backup.xdagccore1);
1270         RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n",
1271                  priv->initgain_backup.cca);
1272 }
1273
1274 static void _rtl92e_dm_dig_init(struct net_device *dev)
1275 {
1276         struct r8192_priv *priv = rtllib_priv(dev);
1277
1278         dm_digtable.dig_enable_flag     = true;
1279
1280         dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
1281
1282         dm_digtable.dig_algorithm_switch = 0;
1283
1284         dm_digtable.dig_state           = DM_STA_DIG_MAX;
1285         dm_digtable.dig_highpwr_state   = DM_STA_DIG_MAX;
1286         dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1287         dm_digtable.PreSTAConnectState = DIG_STA_DISCONNECT;
1288
1289         dm_digtable.rssi_low_thresh     = DM_DIG_THRESH_LOW;
1290         dm_digtable.rssi_high_thresh    = DM_DIG_THRESH_HIGH;
1291
1292         dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
1293         dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
1294
1295         dm_digtable.rssi_val = 50;
1296         dm_digtable.backoff_val = DM_DIG_BACKOFF;
1297         dm_digtable.rx_gain_range_max = DM_DIG_MAX;
1298         if (priv->CustomerID == RT_CID_819x_Netcore)
1299                 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
1300         else
1301                 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
1302 }
1303
1304 static void _rtl92e_dm_ctrl_initgain_byrssi(struct net_device *dev)
1305 {
1306
1307         if (dm_digtable.dig_enable_flag == false)
1308                 return;
1309
1310         if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1311                 _rtl92e_dm_ctrl_initgain_byrssi_false_alarm(dev);
1312         else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1313                 _rtl92e_dm_ctrl_initgain_byrssi_driver(dev);
1314         else
1315                 return;
1316 }
1317
1318 /*-----------------------------------------------------------------------------
1319  * Function:    dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
1320  *
1321  * Overview:    Driver monitor RSSI and False Alarm to change initial gain.
1322                         Only change initial gain during link in progress.
1323  *
1324  * Input:               IN      PADAPTER        pAdapter
1325  *
1326  * Output:              NONE
1327  *
1328  * Return:              NONE
1329  *
1330  * Revised History:
1331  *      When            Who             Remark
1332  *      03/04/2009      hpfan   Create Version 0.
1333  *
1334  *---------------------------------------------------------------------------*/
1335
1336 static void _rtl92e_dm_ctrl_initgain_byrssi_driver(struct net_device *dev)
1337 {
1338         struct r8192_priv *priv = rtllib_priv(dev);
1339         u8 i;
1340         static u8       fw_dig;
1341
1342         if (dm_digtable.dig_enable_flag == false)
1343                 return;
1344
1345         if (dm_digtable.dig_algorithm_switch)
1346                 fw_dig = 0;
1347         if (fw_dig <= 3) {
1348                 for (i = 0; i < 3; i++)
1349                         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1350                 fw_dig++;
1351                 dm_digtable.dig_state = DM_STA_DIG_OFF;
1352         }
1353
1354         if (priv->rtllib->state == RTLLIB_LINKED)
1355                 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
1356         else
1357                 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1358
1359
1360         dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
1361         _rtl92e_dm_initial_gain(dev);
1362         _rtl92e_dm_pd_th(dev);
1363         _rtl92e_dm_cs_ratio(dev);
1364         if (dm_digtable.dig_algorithm_switch)
1365                 dm_digtable.dig_algorithm_switch = 0;
1366         dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
1367
1368 }
1369
1370 static void _rtl92e_dm_ctrl_initgain_byrssi_false_alarm(struct net_device *dev)
1371 {
1372         struct r8192_priv *priv = rtllib_priv(dev);
1373         static u32 reset_cnt;
1374         u8 i;
1375
1376         if (dm_digtable.dig_enable_flag == false)
1377                 return;
1378
1379         if (dm_digtable.dig_algorithm_switch) {
1380                 dm_digtable.dig_state = DM_STA_DIG_MAX;
1381                 for (i = 0; i < 3; i++)
1382                         rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1383                 dm_digtable.dig_algorithm_switch = 0;
1384         }
1385
1386         if (priv->rtllib->state != RTLLIB_LINKED)
1387                 return;
1388
1389         if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
1390                 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
1391                 return;
1392         if (priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh) {
1393                 if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
1394                         (priv->reset_count == reset_cnt))
1395                         return;
1396                 reset_cnt = priv->reset_count;
1397
1398                 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1399                 dm_digtable.dig_state = DM_STA_DIG_OFF;
1400
1401                 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1402
1403                 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x17);
1404                 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x17);
1405                 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x17);
1406                 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x17);
1407
1408                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1409                         rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
1410                 else
1411                         rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
1412
1413                 rtl92e_writeb(dev, 0xa0a, 0x08);
1414
1415                 return;
1416         }
1417
1418         if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
1419                 u8 reset_flag = 0;
1420
1421                 if (dm_digtable.dig_state == DM_STA_DIG_ON &&
1422                     (priv->reset_count == reset_cnt)) {
1423                         _rtl92e_dm_ctrl_initgain_byrssi_highpwr(dev);
1424                         return;
1425                 }
1426                 if (priv->reset_count != reset_cnt)
1427                         reset_flag = 1;
1428
1429                 reset_cnt = priv->reset_count;
1430
1431                 dm_digtable.dig_state = DM_STA_DIG_ON;
1432
1433                 if (reset_flag == 1) {
1434                         rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x2c);
1435                         rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x2c);
1436                         rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x2c);
1437                         rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x2c);
1438                 } else {
1439                         rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x20);
1440                         rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x20);
1441                         rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x20);
1442                         rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x20);
1443                 }
1444
1445                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1446                         rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1447                 else
1448                         rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1449
1450                 rtl92e_writeb(dev, 0xa0a, 0xcd);
1451
1452                 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1453         }
1454         _rtl92e_dm_ctrl_initgain_byrssi_highpwr(dev);
1455 }
1456
1457
1458 static void _rtl92e_dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev)
1459 {
1460         struct r8192_priv *priv = rtllib_priv(dev);
1461         static u32 reset_cnt_highpwr;
1462
1463         if ((priv->undecorated_smoothed_pwdb >
1464              dm_digtable.rssi_high_power_lowthresh) &&
1465             (priv->undecorated_smoothed_pwdb <
1466              dm_digtable.rssi_high_power_highthresh))
1467                 return;
1468
1469         if (priv->undecorated_smoothed_pwdb >=
1470             dm_digtable.rssi_high_power_highthresh) {
1471                 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
1472                         (priv->reset_count == reset_cnt_highpwr))
1473                         return;
1474                 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
1475
1476                 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1477                         rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
1478                 else
1479                         rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
1480         } else {
1481                 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
1482                         (priv->reset_count == reset_cnt_highpwr))
1483                         return;
1484                 dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
1485
1486                 if ((priv->undecorated_smoothed_pwdb <
1487                      dm_digtable.rssi_high_power_lowthresh) &&
1488                     (priv->undecorated_smoothed_pwdb >=
1489                     dm_digtable.rssi_high_thresh)) {
1490                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1491                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1492                         else
1493                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1494                 }
1495         }
1496         reset_cnt_highpwr = priv->reset_count;
1497 }
1498
1499 static void _rtl92e_dm_initial_gain(struct net_device *dev)
1500 {
1501         struct r8192_priv *priv = rtllib_priv(dev);
1502         u8 initial_gain = 0;
1503         static u8 initialized, force_write;
1504         static u32 reset_cnt;
1505
1506         if (dm_digtable.dig_algorithm_switch) {
1507                 initialized = 0;
1508                 reset_cnt = 0;
1509         }
1510
1511         if (rtllib_act_scanning(priv->rtllib, true) == true) {
1512                 force_write = 1;
1513                 return;
1514         }
1515
1516         if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1517                 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1518                         long gain_range = dm_digtable.rssi_val + 10 -
1519                                           dm_digtable.backoff_val;
1520                         gain_range = clamp_t(long, gain_range,
1521                                              dm_digtable.rx_gain_range_min,
1522                                              dm_digtable.rx_gain_range_max);
1523                         dm_digtable.cur_ig_value = gain_range;
1524                 } else {
1525                         if (dm_digtable.cur_ig_value == 0)
1526                                 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1527                         else
1528                                 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
1529                 }
1530         } else {
1531                 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1532                 dm_digtable.pre_ig_value = 0;
1533         }
1534
1535         if (priv->reset_count != reset_cnt) {
1536                 force_write = 1;
1537                 reset_cnt = priv->reset_count;
1538         }
1539
1540         if (dm_digtable.pre_ig_value != rtl92e_readb(dev, rOFDM0_XAAGCCore1))
1541                 force_write = 1;
1542
1543         if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
1544             || !initialized || force_write) {
1545                 initial_gain = (u8)dm_digtable.cur_ig_value;
1546                 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, initial_gain);
1547                 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, initial_gain);
1548                 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, initial_gain);
1549                 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, initial_gain);
1550                 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
1551                 initialized = 1;
1552                 force_write = 0;
1553         }
1554 }
1555
1556 static void _rtl92e_dm_pd_th(struct net_device *dev)
1557 {
1558         struct r8192_priv *priv = rtllib_priv(dev);
1559         static u8 initialized, force_write;
1560         static u32 reset_cnt;
1561
1562         if (dm_digtable.dig_algorithm_switch) {
1563                 initialized = 0;
1564                 reset_cnt = 0;
1565         }
1566
1567         if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1568                 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1569                         if (dm_digtable.rssi_val >=
1570                             dm_digtable.rssi_high_power_highthresh)
1571                                 dm_digtable.curpd_thstate =
1572                                                         DIG_PD_AT_HIGH_POWER;
1573                         else if (dm_digtable.rssi_val <=
1574                                  dm_digtable.rssi_low_thresh)
1575                                 dm_digtable.curpd_thstate =
1576                                                         DIG_PD_AT_LOW_POWER;
1577                         else if ((dm_digtable.rssi_val >=
1578                                   dm_digtable.rssi_high_thresh) &&
1579                                  (dm_digtable.rssi_val <
1580                                   dm_digtable.rssi_high_power_lowthresh))
1581                                 dm_digtable.curpd_thstate =
1582                                                         DIG_PD_AT_NORMAL_POWER;
1583                         else
1584                                 dm_digtable.curpd_thstate =
1585                                                 dm_digtable.prepd_thstate;
1586                 } else {
1587                         dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1588                 }
1589         } else {
1590                 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1591         }
1592
1593         if (priv->reset_count != reset_cnt) {
1594                 force_write = 1;
1595                 reset_cnt = priv->reset_count;
1596         }
1597
1598         if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
1599             (initialized <= 3) || force_write) {
1600                 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
1601                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1602                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
1603                         else
1604                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
1605                 } else if (dm_digtable.curpd_thstate ==
1606                            DIG_PD_AT_NORMAL_POWER) {
1607                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1608                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1609                         else
1610                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1611                 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
1612                         if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1613                                 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
1614                         else
1615                                 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
1616                 }
1617                 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
1618                 if (initialized <= 3)
1619                         initialized++;
1620                 force_write = 0;
1621         }
1622 }
1623
1624 static void _rtl92e_dm_cs_ratio(struct net_device *dev)
1625 {
1626         struct r8192_priv *priv = rtllib_priv(dev);
1627         static u8 initialized, force_write;
1628         static u32 reset_cnt;
1629
1630         if (dm_digtable.dig_algorithm_switch) {
1631                 initialized = 0;
1632                 reset_cnt = 0;
1633         }
1634
1635         if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1636                 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1637                         if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
1638                                 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1639                         else if (dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh)
1640                                 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
1641                         else
1642                                 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
1643                 } else {
1644                         dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1645                 }
1646         } else {
1647                 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1648         }
1649
1650         if (priv->reset_count != reset_cnt) {
1651                 force_write = 1;
1652                 reset_cnt = priv->reset_count;
1653         }
1654
1655
1656         if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
1657             !initialized || force_write) {
1658                 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
1659                         rtl92e_writeb(dev, 0xa0a, 0x08);
1660                 else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
1661                         rtl92e_writeb(dev, 0xa0a, 0xcd);
1662                 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
1663                 initialized = 1;
1664                 force_write = 0;
1665         }
1666 }
1667
1668 void rtl92e_dm_init_edca_turbo(struct net_device *dev)
1669 {
1670         struct r8192_priv *priv = rtllib_priv(dev);
1671
1672         priv->bcurrent_turbo_EDCA = false;
1673         priv->rtllib->bis_any_nonbepkts = false;
1674         priv->bis_cur_rdlstate = false;
1675 }
1676
1677 static void _rtl92e_dm_check_edca_turbo(struct net_device *dev)
1678 {
1679         struct r8192_priv *priv = rtllib_priv(dev);
1680         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1681
1682         static unsigned long lastTxOkCnt;
1683         static unsigned long lastRxOkCnt;
1684         unsigned long curTxOkCnt = 0;
1685         unsigned long curRxOkCnt = 0;
1686
1687         if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
1688                 goto dm_CheckEdcaTurbo_EXIT;
1689         if (priv->rtllib->state != RTLLIB_LINKED)
1690                 goto dm_CheckEdcaTurbo_EXIT;
1691         if (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
1692                 goto dm_CheckEdcaTurbo_EXIT;
1693
1694         {
1695                 u8 *peername[11] = {
1696                         "unknown", "realtek_90", "realtek_92se", "broadcom",
1697                         "ralink", "atheros", "cisco", "marvell", "92u_softap",
1698                         "self_softap"
1699                 };
1700                 static int wb_tmp;
1701
1702                 if (wb_tmp == 0) {
1703                         netdev_info(dev,
1704                                     "%s():iot peer is %s, bssid: %pM\n",
1705                                     __func__, peername[pHTInfo->IOTPeer],
1706                                     priv->rtllib->current_network.bssid);
1707                         wb_tmp = 1;
1708                 }
1709         }
1710         if (!priv->rtllib->bis_any_nonbepkts) {
1711                 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1712                 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1713                 if (pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX) {
1714                         if (curTxOkCnt > 4*curRxOkCnt) {
1715                                 if (priv->bis_cur_rdlstate ||
1716                                     !priv->bcurrent_turbo_EDCA) {
1717                                         rtl92e_writel(dev, EDCAPARA_BE,
1718                                                       edca_setting_UL[pHTInfo->IOTPeer]);
1719                                         priv->bis_cur_rdlstate = false;
1720                                 }
1721                         } else {
1722                                 if (!priv->bis_cur_rdlstate ||
1723                                     !priv->bcurrent_turbo_EDCA) {
1724                                         if (priv->rtllib->mode == WIRELESS_MODE_G)
1725                                                 rtl92e_writel(dev, EDCAPARA_BE,
1726                                                               edca_setting_DL_GMode[pHTInfo->IOTPeer]);
1727                                         else
1728                                                 rtl92e_writel(dev, EDCAPARA_BE,
1729                                                               edca_setting_DL[pHTInfo->IOTPeer]);
1730                                         priv->bis_cur_rdlstate = true;
1731                                 }
1732                         }
1733                         priv->bcurrent_turbo_EDCA = true;
1734                 } else {
1735                         if (curRxOkCnt > 4*curTxOkCnt) {
1736                                 if (!priv->bis_cur_rdlstate ||
1737                                     !priv->bcurrent_turbo_EDCA) {
1738                                         if (priv->rtllib->mode == WIRELESS_MODE_G)
1739                                                 rtl92e_writel(dev, EDCAPARA_BE,
1740                                                               edca_setting_DL_GMode[pHTInfo->IOTPeer]);
1741                                         else
1742                                                 rtl92e_writel(dev, EDCAPARA_BE,
1743                                                               edca_setting_DL[pHTInfo->IOTPeer]);
1744                                         priv->bis_cur_rdlstate = true;
1745                                 }
1746                         } else {
1747                                 if (priv->bis_cur_rdlstate ||
1748                                     !priv->bcurrent_turbo_EDCA) {
1749                                         rtl92e_writel(dev, EDCAPARA_BE,
1750                                                       edca_setting_UL[pHTInfo->IOTPeer]);
1751                                         priv->bis_cur_rdlstate = false;
1752                                 }
1753
1754                         }
1755
1756                         priv->bcurrent_turbo_EDCA = true;
1757                 }
1758         } else {
1759                  if (priv->bcurrent_turbo_EDCA) {
1760                         u8 tmp = AC0_BE;
1761
1762                         priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM,
1763                                                       (u8 *)(&tmp));
1764                         priv->bcurrent_turbo_EDCA = false;
1765                 }
1766         }
1767
1768
1769 dm_CheckEdcaTurbo_EXIT:
1770         priv->rtllib->bis_any_nonbepkts = false;
1771         lastTxOkCnt = priv->stats.txbytesunicast;
1772         lastRxOkCnt = priv->stats.rxbytesunicast;
1773 }
1774
1775 static void _rtl92e_dm_init_cts_to_self(struct net_device *dev)
1776 {
1777         struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1778
1779         priv->rtllib->bCTSToSelfEnable = true;
1780 }
1781
1782 static void _rtl92e_dm_cts_to_self(struct net_device *dev)
1783 {
1784         struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1785         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1786         static unsigned long lastTxOkCnt;
1787         static unsigned long lastRxOkCnt;
1788         unsigned long curTxOkCnt = 0;
1789         unsigned long curRxOkCnt = 0;
1790
1791         if (priv->rtllib->bCTSToSelfEnable != true) {
1792                 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1793                 return;
1794         }
1795         if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
1796                 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1797                 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1798                 if (curRxOkCnt > 4*curTxOkCnt)
1799                         pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1800                 else
1801                         pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
1802
1803                 lastTxOkCnt = priv->stats.txbytesunicast;
1804                 lastRxOkCnt = priv->stats.rxbytesunicast;
1805         }
1806 }
1807
1808
1809 static void _rtl92e_dm_init_wa_broadcom_iot(struct net_device *dev)
1810 {
1811         struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1812         struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1813
1814         pHTInfo->bWAIotBroadcom = false;
1815         pHTInfo->WAIotTH = WAIotTHVal;
1816 }
1817
1818 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data)
1819 {
1820         struct r8192_priv *priv = container_of_dwork_rsl(data,
1821                                   struct r8192_priv, gpio_change_rf_wq);
1822         struct net_device *dev = priv->rtllib->dev;
1823         u8 tmp1byte;
1824         enum rt_rf_power_state eRfPowerStateToSet;
1825         bool bActuallySet = false;
1826         char *argv[3];
1827         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
1828         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin",
1829                                NULL};
1830
1831         bActuallySet = false;
1832
1833         if ((priv->up_first_time == 1) || (priv->being_init_adapter))
1834                 return;
1835
1836         if (priv->bfirst_after_down) {
1837                 priv->bfirst_after_down = true;
1838                 return;
1839         }
1840
1841         tmp1byte = rtl92e_readb(dev, GPI);
1842
1843         eRfPowerStateToSet = (tmp1byte&BIT1) ?  eRfOn : eRfOff;
1844
1845         if (priv->bHwRadioOff && (eRfPowerStateToSet == eRfOn)) {
1846                 RT_TRACE(COMP_RF, "gpiochangeRF  - HW Radio ON\n");
1847                 netdev_info(dev, "gpiochangeRF  - HW Radio ON\n");
1848                 priv->bHwRadioOff = false;
1849                 bActuallySet = true;
1850         } else if (!priv->bHwRadioOff && (eRfPowerStateToSet == eRfOff)) {
1851                 RT_TRACE(COMP_RF, "gpiochangeRF  - HW Radio OFF\n");
1852                 netdev_info(dev, "gpiochangeRF  - HW Radio OFF\n");
1853                 priv->bHwRadioOff = true;
1854                 bActuallySet = true;
1855         }
1856
1857         if (bActuallySet) {
1858                 mdelay(1000);
1859                 priv->bHwRfOffAction = 1;
1860                 rtl92e_set_rf_state(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
1861                 if (priv->bHwRadioOff)
1862                         argv[1] = "RFOFF";
1863                 else
1864                         argv[1] = "RFON";
1865
1866                 argv[0] = RadioPowerPath;
1867                 argv[2] = NULL;
1868                 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
1869         }
1870 }
1871
1872 void rtl92e_dm_rf_pathcheck_wq(void *data)
1873 {
1874         struct r8192_priv *priv = container_of_dwork_rsl(data,
1875                                   struct r8192_priv,
1876                                   rfpath_check_wq);
1877         struct net_device *dev = priv->rtllib->dev;
1878         u8 rfpath = 0, i;
1879
1880         rfpath = rtl92e_readb(dev, 0xc04);
1881
1882         for (i = 0; i < RF90_PATH_MAX; i++) {
1883                 if (rfpath & (0x01<<i))
1884                         priv->brfpath_rxenable[i] = true;
1885                 else
1886                         priv->brfpath_rxenable[i] = false;
1887         }
1888         if (!DM_RxPathSelTable.Enable)
1889                 return;
1890
1891         _rtl92e_dm_rx_path_sel_byrssi(dev);
1892 }
1893
1894 static void _rtl92e_dm_init_rx_path_selection(struct net_device *dev)
1895 {
1896         u8 i;
1897         struct r8192_priv *priv = rtllib_priv(dev);
1898
1899         DM_RxPathSelTable.Enable = 1;
1900         DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
1901         DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
1902         if (priv->CustomerID == RT_CID_819x_Netcore)
1903                 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
1904         else
1905                 DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
1906         DM_RxPathSelTable.disabledRF = 0;
1907         for (i = 0; i < 4; i++) {
1908                 DM_RxPathSelTable.rf_rssi[i] = 50;
1909                 DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
1910                 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
1911         }
1912 }
1913
1914 #define PWDB_IN_RANGE   ((cur_cck_pwdb < tmp_cck_max_pwdb) &&   \
1915                         (cur_cck_pwdb > tmp_cck_sec_pwdb))
1916
1917 static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev)
1918 {
1919         struct r8192_priv *priv = rtllib_priv(dev);
1920         u8 i, max_rssi_index = 0, min_rssi_index = 0;
1921         u8 sec_rssi_index = 0, rf_num = 0;
1922         u8 tmp_max_rssi = 0, tmp_min_rssi = 0, tmp_sec_rssi = 0;
1923         u8 cck_default_Rx = 0x2;
1924         u8 cck_optional_Rx = 0x3;
1925         long tmp_cck_max_pwdb = 0, tmp_cck_min_pwdb = 0, tmp_cck_sec_pwdb = 0;
1926         u8 cck_rx_ver2_max_index = 0, cck_rx_ver2_min_index = 0;
1927         u8 cck_rx_ver2_sec_index = 0;
1928         u8 cur_rf_rssi;
1929         long cur_cck_pwdb;
1930         static u8 disabled_rf_cnt, cck_Rx_Path_initialized;
1931         u8 update_cck_rx_path;
1932
1933         if (priv->rf_type != RF_2T4R)
1934                 return;
1935
1936         if (!cck_Rx_Path_initialized) {
1937                 DM_RxPathSelTable.cck_Rx_path = (rtl92e_readb(dev, 0xa07)&0xf);
1938                 cck_Rx_Path_initialized = 1;
1939         }
1940
1941         DM_RxPathSelTable.disabledRF = 0xf;
1942         DM_RxPathSelTable.disabledRF &= ~(rtl92e_readb(dev, 0xc04));
1943
1944         if (priv->rtllib->mode == WIRELESS_MODE_B)
1945                 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
1946
1947         for (i = 0; i < RF90_PATH_MAX; i++) {
1948                 DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
1949
1950                 if (priv->brfpath_rxenable[i]) {
1951                         rf_num++;
1952                         cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
1953
1954                         if (rf_num == 1) {
1955                                 max_rssi_index = min_rssi_index = sec_rssi_index = i;
1956                                 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
1957                         } else if (rf_num == 2) {
1958                                 if (cur_rf_rssi >= tmp_max_rssi) {
1959                                         tmp_max_rssi = cur_rf_rssi;
1960                                         max_rssi_index = i;
1961                                 } else {
1962                                         tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
1963                                         sec_rssi_index = min_rssi_index = i;
1964                                 }
1965                         } else {
1966                                 if (cur_rf_rssi > tmp_max_rssi) {
1967                                         tmp_sec_rssi = tmp_max_rssi;
1968                                         sec_rssi_index = max_rssi_index;
1969                                         tmp_max_rssi = cur_rf_rssi;
1970                                         max_rssi_index = i;
1971                                 } else if (cur_rf_rssi == tmp_max_rssi) {
1972                                         tmp_sec_rssi = cur_rf_rssi;
1973                                         sec_rssi_index = i;
1974                                 } else if ((cur_rf_rssi < tmp_max_rssi) &&
1975                                            (cur_rf_rssi > tmp_sec_rssi)) {
1976                                         tmp_sec_rssi = cur_rf_rssi;
1977                                         sec_rssi_index = i;
1978                                 } else if (cur_rf_rssi == tmp_sec_rssi) {
1979                                         if (tmp_sec_rssi == tmp_min_rssi) {
1980                                                 tmp_sec_rssi = cur_rf_rssi;
1981                                                 sec_rssi_index = i;
1982                                         }
1983                                 } else if ((cur_rf_rssi < tmp_sec_rssi) &&
1984                                            (cur_rf_rssi > tmp_min_rssi)) {
1985                                         ;
1986                                 } else if (cur_rf_rssi == tmp_min_rssi) {
1987                                         if (tmp_sec_rssi == tmp_min_rssi) {
1988                                                 tmp_min_rssi = cur_rf_rssi;
1989                                                 min_rssi_index = i;
1990                                         }
1991                                 } else if (cur_rf_rssi < tmp_min_rssi) {
1992                                         tmp_min_rssi = cur_rf_rssi;
1993                                         min_rssi_index = i;
1994                                 }
1995                         }
1996                 }
1997         }
1998
1999         rf_num = 0;
2000         if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2001                 for (i = 0; i < RF90_PATH_MAX; i++) {
2002                         if (priv->brfpath_rxenable[i]) {
2003                                 rf_num++;
2004                                 cur_cck_pwdb =
2005                                          DM_RxPathSelTable.cck_pwdb_sta[i];
2006
2007                                 if (rf_num == 1) {
2008                                         cck_rx_ver2_max_index = i;
2009                                         cck_rx_ver2_min_index = i;
2010                                         cck_rx_ver2_sec_index = i;
2011                                         tmp_cck_max_pwdb = cur_cck_pwdb;
2012                                         tmp_cck_min_pwdb = cur_cck_pwdb;
2013                                         tmp_cck_sec_pwdb = cur_cck_pwdb;
2014                                 } else if (rf_num == 2) {
2015                                         if (cur_cck_pwdb >= tmp_cck_max_pwdb) {
2016                                                 tmp_cck_max_pwdb = cur_cck_pwdb;
2017                                                 cck_rx_ver2_max_index = i;
2018                                         } else {
2019                                                 tmp_cck_sec_pwdb = cur_cck_pwdb;
2020                                                 tmp_cck_min_pwdb = cur_cck_pwdb;
2021                                                 cck_rx_ver2_sec_index = i;
2022                                                 cck_rx_ver2_min_index = i;
2023                                         }
2024                                 } else {
2025                                         if (cur_cck_pwdb > tmp_cck_max_pwdb) {
2026                                                 tmp_cck_sec_pwdb =
2027                                                          tmp_cck_max_pwdb;
2028                                                 cck_rx_ver2_sec_index =
2029                                                          cck_rx_ver2_max_index;
2030                                                 tmp_cck_max_pwdb = cur_cck_pwdb;
2031                                                 cck_rx_ver2_max_index = i;
2032                                         } else if (cur_cck_pwdb ==
2033                                                    tmp_cck_max_pwdb) {
2034                                                 tmp_cck_sec_pwdb = cur_cck_pwdb;
2035                                                 cck_rx_ver2_sec_index = i;
2036                                         } else if (PWDB_IN_RANGE) {
2037                                                 tmp_cck_sec_pwdb = cur_cck_pwdb;
2038                                                 cck_rx_ver2_sec_index = i;
2039                                         } else if (cur_cck_pwdb ==
2040                                                    tmp_cck_sec_pwdb) {
2041                                                 if (tmp_cck_sec_pwdb ==
2042                                                     tmp_cck_min_pwdb) {
2043                                                         tmp_cck_sec_pwdb =
2044                                                                  cur_cck_pwdb;
2045                                                         cck_rx_ver2_sec_index =
2046                                                                  i;
2047                                                 }
2048                                         } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) &&
2049                                                    (cur_cck_pwdb > tmp_cck_min_pwdb)) {
2050                                                 ;
2051                                         } else if (cur_cck_pwdb == tmp_cck_min_pwdb) {
2052                                                 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) {
2053                                                         tmp_cck_min_pwdb = cur_cck_pwdb;
2054                                                         cck_rx_ver2_min_index = i;
2055                                                 }
2056                                         } else if (cur_cck_pwdb < tmp_cck_min_pwdb) {
2057                                                 tmp_cck_min_pwdb = cur_cck_pwdb;
2058                                                 cck_rx_ver2_min_index = i;
2059                                         }
2060                                 }
2061
2062                         }
2063                 }
2064         }
2065
2066         update_cck_rx_path = 0;
2067         if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2068                 cck_default_Rx = cck_rx_ver2_max_index;
2069                 cck_optional_Rx = cck_rx_ver2_sec_index;
2070                 if (tmp_cck_max_pwdb != -64)
2071                         update_cck_rx_path = 1;
2072         }
2073
2074         if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2) {
2075                 if ((tmp_max_rssi - tmp_min_rssi) >=
2076                      DM_RxPathSelTable.diff_TH) {
2077                         DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] =
2078                                  tmp_max_rssi+5;
2079                         rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable,
2080                                           0x1<<min_rssi_index, 0x0);
2081                         rtl92e_set_bb_reg(dev, rOFDM1_TRxPathEnable,
2082                                           0x1<<min_rssi_index, 0x0);
2083                         disabled_rf_cnt++;
2084                 }
2085                 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1) {
2086                         cck_default_Rx = max_rssi_index;
2087                         cck_optional_Rx = sec_rssi_index;
2088                         if (tmp_max_rssi)
2089                                 update_cck_rx_path = 1;
2090                 }
2091         }
2092
2093         if (update_cck_rx_path) {
2094                 DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2) |
2095                                                 (cck_optional_Rx);
2096                 rtl92e_set_bb_reg(dev, rCCK0_AFESetting, 0x0f000000,
2097                                   DM_RxPathSelTable.cck_Rx_path);
2098         }
2099
2100         if (DM_RxPathSelTable.disabledRF) {
2101                 for (i = 0; i < 4; i++) {
2102                         if ((DM_RxPathSelTable.disabledRF>>i) & 0x1) {
2103                                 if (tmp_max_rssi >=
2104                                     DM_RxPathSelTable.rf_enable_rssi_th[i]) {
2105                                         rtl92e_set_bb_reg(dev,
2106                                                           rOFDM0_TRxPathEnable,
2107                                                           0x1 << i, 0x1);
2108                                         rtl92e_set_bb_reg(dev,
2109                                                           rOFDM1_TRxPathEnable,
2110                                                           0x1 << i, 0x1);
2111                                         DM_RxPathSelTable.rf_enable_rssi_th[i]
2112                                                  = 100;
2113                                         disabled_rf_cnt--;
2114                                 }
2115                         }
2116                 }
2117         }
2118 }
2119
2120 static void _rtl92e_dm_check_rx_path_selection(struct net_device *dev)
2121 {
2122         struct r8192_priv *priv = rtllib_priv(dev);
2123
2124         queue_delayed_work_rsl(priv->priv_wq, &priv->rfpath_check_wq, 0);
2125 }
2126
2127
2128 static void _rtl92e_dm_init_fsync(struct net_device *dev)
2129 {
2130         struct r8192_priv *priv = rtllib_priv(dev);
2131
2132         priv->rtllib->fsync_time_interval = 500;
2133         priv->rtllib->fsync_rate_bitmap = 0x0f000800;
2134         priv->rtllib->fsync_rssi_threshold = 30;
2135         priv->rtllib->bfsync_enable = false;
2136         priv->rtllib->fsync_multiple_timeinterval = 3;
2137         priv->rtllib->fsync_firstdiff_ratethreshold = 100;
2138         priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2139         priv->rtllib->fsync_state = Default_Fsync;
2140         priv->framesyncMonitor = 1;
2141
2142         setup_timer(&priv->fsync_timer, _rtl92e_dm_fsync_timer_callback,
2143                     (unsigned long)dev);
2144 }
2145
2146
2147 static void _rtl92e_dm_deinit_fsync(struct net_device *dev)
2148 {
2149         struct r8192_priv *priv = rtllib_priv(dev);
2150
2151         del_timer_sync(&priv->fsync_timer);
2152 }
2153
2154 static void _rtl92e_dm_fsync_timer_callback(unsigned long data)
2155 {
2156         struct net_device *dev = (struct net_device *)data;
2157         struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
2158         u32 rate_index, rate_count = 0, rate_count_diff = 0;
2159         bool            bSwitchFromCountDiff = false;
2160         bool            bDoubleTimeInterval = false;
2161
2162         if (priv->rtllib->state == RTLLIB_LINKED &&
2163             priv->rtllib->bfsync_enable &&
2164             (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
2165                 u32 rate_bitmap;
2166
2167                 for (rate_index = 0; rate_index <= 27; rate_index++) {
2168                         rate_bitmap  = 1 << rate_index;
2169                         if (priv->rtllib->fsync_rate_bitmap &  rate_bitmap)
2170                                 rate_count +=
2171                                    priv->stats.received_rate_histogram[1]
2172                                    [rate_index];
2173                 }
2174
2175                 if (rate_count < priv->rate_record)
2176                         rate_count_diff = 0xffffffff - rate_count +
2177                                           priv->rate_record;
2178                 else
2179                         rate_count_diff = rate_count - priv->rate_record;
2180                 if (rate_count_diff < priv->rateCountDiffRecord) {
2181
2182                         u32 DiffNum = priv->rateCountDiffRecord -
2183                                       rate_count_diff;
2184                         if (DiffNum >=
2185                             priv->rtllib->fsync_seconddiff_ratethreshold)
2186                                 priv->ContinueDiffCount++;
2187                         else
2188                                 priv->ContinueDiffCount = 0;
2189
2190                         if (priv->ContinueDiffCount >= 2) {
2191                                 bSwitchFromCountDiff = true;
2192                                 priv->ContinueDiffCount = 0;
2193                         }
2194                 } else {
2195                         priv->ContinueDiffCount = 0;
2196                 }
2197
2198                 if (rate_count_diff <=
2199                     priv->rtllib->fsync_firstdiff_ratethreshold) {
2200                         bSwitchFromCountDiff = true;
2201                         priv->ContinueDiffCount = 0;
2202                 }
2203                 priv->rate_record = rate_count;
2204                 priv->rateCountDiffRecord = rate_count_diff;
2205                 RT_TRACE(COMP_HALDM,
2206                          "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
2207                          priv->rate_record, rate_count, rate_count_diff,
2208                          priv->bswitch_fsync);
2209                 if (priv->undecorated_smoothed_pwdb >
2210                     priv->rtllib->fsync_rssi_threshold &&
2211                     bSwitchFromCountDiff) {
2212                         bDoubleTimeInterval = true;
2213                         priv->bswitch_fsync = !priv->bswitch_fsync;
2214                         if (priv->bswitch_fsync) {
2215                                 rtl92e_writeb(dev, 0xC36, 0x1c);
2216                                 rtl92e_writeb(dev, 0xC3e, 0x90);
2217                         } else {
2218                                 rtl92e_writeb(dev, 0xC36, 0x5c);
2219                                 rtl92e_writeb(dev, 0xC3e, 0x96);
2220                         }
2221                 } else if (priv->undecorated_smoothed_pwdb <=
2222                            priv->rtllib->fsync_rssi_threshold) {
2223                         if (priv->bswitch_fsync) {
2224                                 priv->bswitch_fsync  = false;
2225                                 rtl92e_writeb(dev, 0xC36, 0x5c);
2226                                 rtl92e_writeb(dev, 0xC3e, 0x96);
2227                         }
2228                 }
2229                 if (bDoubleTimeInterval) {
2230                         if (timer_pending(&priv->fsync_timer))
2231                                 del_timer_sync(&priv->fsync_timer);
2232                         priv->fsync_timer.expires = jiffies +
2233                                  msecs_to_jiffies(priv->rtllib->fsync_time_interval *
2234                                  priv->rtllib->fsync_multiple_timeinterval);
2235                         add_timer(&priv->fsync_timer);
2236                 } else {
2237                         if (timer_pending(&priv->fsync_timer))
2238                                 del_timer_sync(&priv->fsync_timer);
2239                         priv->fsync_timer.expires = jiffies +
2240                                  msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2241                         add_timer(&priv->fsync_timer);
2242                 }
2243         } else {
2244                 if (priv->bswitch_fsync) {
2245                         priv->bswitch_fsync  = false;
2246                         rtl92e_writeb(dev, 0xC36, 0x5c);
2247                         rtl92e_writeb(dev, 0xC3e, 0x96);
2248                 }
2249                 priv->ContinueDiffCount = 0;
2250                 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2251         }
2252         RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount);
2253         RT_TRACE(COMP_HALDM,
2254                  "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
2255                  priv->rate_record, rate_count, rate_count_diff,
2256                  priv->bswitch_fsync);
2257 }
2258
2259 static void _rtl92e_dm_start_hw_fsync(struct net_device *dev)
2260 {
2261         u8 rf_timing = 0x77;
2262         struct r8192_priv *priv = rtllib_priv(dev);
2263
2264         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2265         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cf);
2266         priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING,
2267                                       (u8 *)(&rf_timing));
2268         rtl92e_writeb(dev, 0xc3b, 0x41);
2269 }
2270
2271 static void _rtl92e_dm_end_hw_fsync(struct net_device *dev)
2272 {
2273         u8 rf_timing = 0xaa;
2274         struct r8192_priv *priv = rtllib_priv(dev);
2275
2276         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2277         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2278         priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *)
2279                                      (&rf_timing));
2280         rtl92e_writeb(dev, 0xc3b, 0x49);
2281 }
2282
2283 static void _rtl92e_dm_end_sw_fsync(struct net_device *dev)
2284 {
2285         struct r8192_priv *priv = rtllib_priv(dev);
2286
2287         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2288         del_timer_sync(&(priv->fsync_timer));
2289
2290         if (priv->bswitch_fsync) {
2291                 priv->bswitch_fsync  = false;
2292
2293                 rtl92e_writeb(dev, 0xC36, 0x5c);
2294
2295                 rtl92e_writeb(dev, 0xC3e, 0x96);
2296         }
2297
2298         priv->ContinueDiffCount = 0;
2299         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2300 }
2301
2302 static void _rtl92e_dm_start_sw_fsync(struct net_device *dev)
2303 {
2304         struct r8192_priv *priv = rtllib_priv(dev);
2305         u32                     rateIndex;
2306         u32                     rateBitmap;
2307
2308         RT_TRACE(COMP_HALDM, "%s\n", __func__);
2309         priv->rate_record = 0;
2310         priv->ContinueDiffCount = 0;
2311         priv->rateCountDiffRecord = 0;
2312         priv->bswitch_fsync  = false;
2313
2314         if (priv->rtllib->mode == WIRELESS_MODE_N_24G) {
2315                 priv->rtllib->fsync_firstdiff_ratethreshold = 600;
2316                 priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
2317         } else {
2318                 priv->rtllib->fsync_firstdiff_ratethreshold = 200;
2319                 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2320         }
2321         for (rateIndex = 0; rateIndex <= 27; rateIndex++) {
2322                 rateBitmap  = 1 << rateIndex;
2323                 if (priv->rtllib->fsync_rate_bitmap & rateBitmap)
2324                         priv->rate_record +=
2325                                  priv->stats.received_rate_histogram[1]
2326                                 [rateIndex];
2327         }
2328         if (timer_pending(&priv->fsync_timer))
2329                 del_timer_sync(&priv->fsync_timer);
2330         priv->fsync_timer.expires = jiffies +
2331                                     msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2332         add_timer(&priv->fsync_timer);
2333
2334         rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cd);
2335
2336 }
2337
2338 static void _rtl92e_dm_check_fsync(struct net_device *dev)
2339 {
2340 #define RegC38_Default                  0
2341 #define RegC38_NonFsync_Other_AP        1
2342 #define RegC38_Fsync_AP_BCM             2
2343         struct r8192_priv *priv = rtllib_priv(dev);
2344         static u8 reg_c38_State = RegC38_Default;
2345         static u32 reset_cnt;
2346
2347         RT_TRACE(COMP_HALDM,
2348                  "RSSI %d TimeInterval %d MultipleTimeInterval %d\n",
2349                  priv->rtllib->fsync_rssi_threshold,
2350                  priv->rtllib->fsync_time_interval,
2351                  priv->rtllib->fsync_multiple_timeinterval);
2352         RT_TRACE(COMP_HALDM,
2353                  "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n",
2354                  priv->rtllib->fsync_rate_bitmap,
2355                  priv->rtllib->fsync_firstdiff_ratethreshold,
2356                  priv->rtllib->fsync_seconddiff_ratethreshold);
2357
2358         if (priv->rtllib->state == RTLLIB_LINKED &&
2359             priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2360                 if (priv->rtllib->bfsync_enable == 0) {
2361                         switch (priv->rtllib->fsync_state) {
2362                         case Default_Fsync:
2363                                 _rtl92e_dm_start_hw_fsync(dev);
2364                                 priv->rtllib->fsync_state = HW_Fsync;
2365                                 break;
2366                         case SW_Fsync:
2367                                 _rtl92e_dm_end_sw_fsync(dev);
2368                                 _rtl92e_dm_start_hw_fsync(dev);
2369                                 priv->rtllib->fsync_state = HW_Fsync;
2370                                 break;
2371                         case HW_Fsync:
2372                         default:
2373                                 break;
2374                         }
2375                 } else {
2376                         switch (priv->rtllib->fsync_state) {
2377                         case Default_Fsync:
2378                                 _rtl92e_dm_start_sw_fsync(dev);
2379                                 priv->rtllib->fsync_state = SW_Fsync;
2380                                 break;
2381                         case HW_Fsync:
2382                                 _rtl92e_dm_end_hw_fsync(dev);
2383                                 _rtl92e_dm_start_sw_fsync(dev);
2384                                 priv->rtllib->fsync_state = SW_Fsync;
2385                                 break;
2386                         case SW_Fsync:
2387                         default:
2388                                 break;
2389
2390                         }
2391                 }
2392                 if (priv->framesyncMonitor) {
2393                         if (reg_c38_State != RegC38_Fsync_AP_BCM) {
2394                                 rtl92e_writeb(dev, rOFDM0_RxDetector3, 0x95);
2395
2396                                 reg_c38_State = RegC38_Fsync_AP_BCM;
2397                         }
2398                 }
2399         } else {
2400                 switch (priv->rtllib->fsync_state) {
2401                 case HW_Fsync:
2402                         _rtl92e_dm_end_hw_fsync(dev);
2403                         priv->rtllib->fsync_state = Default_Fsync;
2404                         break;
2405                 case SW_Fsync:
2406                         _rtl92e_dm_end_sw_fsync(dev);
2407                         priv->rtllib->fsync_state = Default_Fsync;
2408                         break;
2409                 case Default_Fsync:
2410                 default:
2411                         break;
2412                 }
2413
2414                 if (priv->framesyncMonitor) {
2415                         if (priv->rtllib->state == RTLLIB_LINKED) {
2416                                 if (priv->undecorated_smoothed_pwdb <=
2417                                     RegC38_TH) {
2418                                         if (reg_c38_State !=
2419                                             RegC38_NonFsync_Other_AP) {
2420                                                 rtl92e_writeb(dev,
2421                                                               rOFDM0_RxDetector3,
2422                                                               0x90);
2423
2424                                                 reg_c38_State =
2425                                                      RegC38_NonFsync_Other_AP;
2426                                         }
2427                                 } else if (priv->undecorated_smoothed_pwdb >=
2428                                            (RegC38_TH+5)) {
2429                                         if (reg_c38_State) {
2430                                                 rtl92e_writeb(dev,
2431                                                         rOFDM0_RxDetector3,
2432                                                         priv->framesync);
2433                                                 reg_c38_State = RegC38_Default;
2434                                         }
2435                                 }
2436                         } else {
2437                                 if (reg_c38_State) {
2438                                         rtl92e_writeb(dev, rOFDM0_RxDetector3,
2439                                                       priv->framesync);
2440                                         reg_c38_State = RegC38_Default;
2441                                 }
2442                         }
2443                 }
2444         }
2445         if (priv->framesyncMonitor) {
2446                 if (priv->reset_count != reset_cnt) {
2447                         rtl92e_writeb(dev, rOFDM0_RxDetector3,
2448                                        priv->framesync);
2449                         reg_c38_State = RegC38_Default;
2450                         reset_cnt = priv->reset_count;
2451                 }
2452         } else {
2453                 if (reg_c38_State) {
2454                         rtl92e_writeb(dev, rOFDM0_RxDetector3,
2455                                        priv->framesync);
2456                         reg_c38_State = RegC38_Default;
2457                 }
2458         }
2459 }
2460
2461 /*---------------------------Define function prototype------------------------*/
2462 static void _rtl92e_dm_init_dynamic_tx_power(struct net_device *dev)
2463 {
2464         struct r8192_priv *priv = rtllib_priv(dev);
2465
2466         priv->rtllib->bdynamic_txpower_enable = true;
2467         priv->bLastDTPFlag_High = false;
2468         priv->bLastDTPFlag_Low = false;
2469         priv->bDynamicTxHighPower = false;
2470         priv->bDynamicTxLowPower = false;
2471 }
2472
2473 static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev)
2474 {
2475         struct r8192_priv *priv = rtllib_priv(dev);
2476         unsigned int txhipower_threshhold = 0;
2477         unsigned int txlowpower_threshold = 0;
2478
2479         if (priv->rtllib->bdynamic_txpower_enable != true) {
2480                 priv->bDynamicTxHighPower = false;
2481                 priv->bDynamicTxLowPower = false;
2482                 return;
2483         }
2484         if ((priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) &&
2485             (priv->rtllib->mode == IEEE_G)) {
2486                 txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
2487                 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
2488         } else {
2489                 txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
2490                 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
2491         }
2492
2493         RT_TRACE(COMP_TXAGC, "priv->undecorated_smoothed_pwdb = %ld\n",
2494                  priv->undecorated_smoothed_pwdb);
2495
2496         if (priv->rtllib->state == RTLLIB_LINKED) {
2497                 if (priv->undecorated_smoothed_pwdb >= txhipower_threshhold) {
2498                         priv->bDynamicTxHighPower = true;
2499                         priv->bDynamicTxLowPower = false;
2500                 } else {
2501                         if (priv->undecorated_smoothed_pwdb <
2502                             txlowpower_threshold && priv->bDynamicTxHighPower)
2503                                 priv->bDynamicTxHighPower = false;
2504                         if (priv->undecorated_smoothed_pwdb < 35)
2505                                 priv->bDynamicTxLowPower = true;
2506                         else if (priv->undecorated_smoothed_pwdb >= 40)
2507                                 priv->bDynamicTxLowPower = false;
2508                 }
2509         } else {
2510                 priv->bDynamicTxHighPower = false;
2511                 priv->bDynamicTxLowPower = false;
2512         }
2513
2514         if ((priv->bDynamicTxHighPower != priv->bLastDTPFlag_High) ||
2515             (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low)) {
2516                 RT_TRACE(COMP_TXAGC, "SetTxPowerLevel8190()  channel = %d\n",
2517                          priv->rtllib->current_network.channel);
2518
2519                 rtl92e_set_tx_power(dev, priv->rtllib->current_network.channel);
2520         }
2521         priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
2522         priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
2523
2524 }
2525
2526 static void _rtl92e_dm_check_txrateandretrycount(struct net_device *dev)
2527 {
2528         struct r8192_priv *priv = rtllib_priv(dev);
2529         struct rtllib_device *ieee = priv->rtllib;
2530
2531         ieee->softmac_stats.CurrentShowTxate = rtl92e_readb(dev,
2532                                                  Current_Tx_Rate_Reg);
2533
2534         ieee->softmac_stats.last_packet_rate = rtl92e_readb(dev,
2535                                                  Initial_Tx_Rate_Reg);
2536
2537         ieee->softmac_stats.txretrycount = rtl92e_readl(dev,
2538                                                  Tx_Retry_Count_Reg);
2539 }
2540
2541 static void _rtl92e_dm_send_rssi_to_fw(struct net_device *dev)
2542 {
2543         struct r8192_priv *priv = rtllib_priv(dev);
2544
2545         rtl92e_writeb(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
2546 }