kernel/drivers/staging/rtl8188eu/include/rtw_rf.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __RTW_RF_H_
  21 #define __RTW_RF_H_
  22
  23 #include <rtw_cmd.h>
  24
  25 #define OFDM_PHY                1
  26 #define MIXED_PHY               2
  27 #define CCK_PHY         3
  28
  29 #define NumRates        (13)
  30
  31 /*  slot time for 11g */
  32 #define SHORT_SLOT_TIME                 9
  33 #define NON_SHORT_SLOT_TIME             20
  34
  35 #define RTL8711_RF_MAX_SENS             6
  36 #define RTL8711_RF_DEF_SENS             4
  37
  38 /*  We now define the following channels as the max channels in each
  39  * channel plan. */
  40 /*  2G, total 14 chnls */
  41 /*  {1,2,3,4,5,6,7,8,9,10,11,12,13,14} */
  42 #define MAX_CHANNEL_NUM_2G              14
  43 #define MAX_CHANNEL_NUM                 14      /* 2.4 GHz only */
  44
  45 #define NUM_REGULATORYS 1
  46
  47 /* Country codes */
  48 #define USA                             0x555320
  49 #define EUROPE                          0x1 /* temp, should be provided later */
  50 #define JAPAN                           0x2 /* temp, should be provided later */
  51
  52 struct  regulatory_class {
  53         u32     starting_freq;                          /* MHz, */
  54         u8      channel_set[MAX_CHANNEL_NUM];
  55         u8      channel_cck_power[MAX_CHANNEL_NUM];     /* dbm */
  56         u8      channel_ofdm_power[MAX_CHANNEL_NUM];    /* dbm */
  57         u8      txpower_limit;                          /* dbm */
  58         u8      channel_spacing;                        /* MHz */
  59         u8      modem;
  60 };
  61
  62 enum capability {
  63         cESS            = 0x0001,
  64         cIBSS           = 0x0002,
  65         cPollable       = 0x0004,
  66         cPollReq        = 0x0008,
  67         cPrivacy        = 0x0010,
  68         cShortPreamble  = 0x0020,
  69         cPBCC           = 0x0040,
  70         cChannelAgility = 0x0080,
  71         cSpectrumMgnt   = 0x0100,
  72         cQos            = 0x0200,       /* For HCCA, use with CF-Pollable
  73                                          * and CF-PollReq */
  74         cShortSlotTime  = 0x0400,
  75         cAPSD           = 0x0800,
  76         cRM             = 0x1000,       /*  RRM (Radio Request Measurement) */
  77         cDSSS_OFDM      = 0x2000,
  78         cDelayedBA      = 0x4000,
  79         cImmediateBA    = 0x8000,
  80 };
  81
  82 enum    _REG_PREAMBLE_MODE {
  83         PREAMBLE_LONG   = 1,
  84         PREAMBLE_AUTO   = 2,
  85         PREAMBLE_SHORT  = 3,
  86 };
  87
  88 enum _RTL8712_RF_MIMO_CONFIG_ {
  89         RTL8712_RFCONFIG_1T = 0x10,
  90         RTL8712_RFCONFIG_2T = 0x20,
  91         RTL8712_RFCONFIG_1R = 0x01,
  92         RTL8712_RFCONFIG_2R = 0x02,
  93         RTL8712_RFCONFIG_1T1R = 0x11,
  94         RTL8712_RFCONFIG_1T2R = 0x12,
  95         RTL8712_RFCONFIG_TURBO = 0x92,
  96         RTL8712_RFCONFIG_2T2R = 0x22
  97 };
  98
  99 enum rf90_radio_path {
 100         RF90_PATH_A = 0,                /* Radio Path A */
 101         RF90_PATH_B = 1,                /* Radio Path B */
 102         RF90_PATH_C = 2,                /* Radio Path C */
 103         RF90_PATH_D = 3                 /* Radio Path D */
 104 };
 105
 106 /*  Bandwidth Offset */
 107 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
 108 #define HAL_PRIME_CHNL_OFFSET_LOWER     1
 109 #define HAL_PRIME_CHNL_OFFSET_UPPER     2
 110
 111 /*  Represent Channel Width in HT Capabilities */
 112 /*  */
 113 enum ht_channel_width {
 114         HT_CHANNEL_WIDTH_20 = 0,
 115         HT_CHANNEL_WIDTH_40 = 1,
 116         HT_CHANNEL_WIDTH_80 = 2,
 117         HT_CHANNEL_WIDTH_160 = 3,
 118         HT_CHANNEL_WIDTH_10 = 4,
 119 };
 120
 121 /*  */
 122 /*  Represent Extension Channel Offset in HT Capabilities */
 123 /*  This is available only in 40Mhz mode. */
 124 /*  */
 125 enum ht_extchnl_offset {
 126         HT_EXTCHNL_OFFSET_NO_EXT = 0,
 127         HT_EXTCHNL_OFFSET_UPPER = 1,
 128         HT_EXTCHNL_OFFSET_NO_DEF = 2,
 129         HT_EXTCHNL_OFFSET_LOWER = 3,
 130 };
 131
 132 /* 2007/11/15 MH Define different RF type. */
 133 enum rt_rf_type_def {
 134         RF_1T2R = 0,
 135         RF_2T4R = 1,
 136         RF_2T2R = 2,
 137         RF_1T1R = 3,
 138         RF_2T2R_GREEN = 4,
 139         RF_819X_MAX_TYPE = 5,
 140 };
 141
 142 u32 rtw_ch2freq(u32 ch);
 143 u32 rtw_freq2ch(u32 freq);
 144
 145
 146 #endif /* _RTL8711_RF_H_ */