kernel/drivers/staging/rtl8188eu/hal/usb_halinit.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _HCI_HAL_INIT_C_
  21
  22 #include <osdep_service.h>
  23 #include <drv_types.h>
  24 #include <rtw_efuse.h>
  25 #include <fw.h>
  26 #include <rtl8188e_hal.h>
  27 #include <rtl8188e_led.h>
  28 #include <rtw_iol.h>
  29 #include <usb_hal.h>
  30 #include <phy.h>
  31
  32 #define         HAL_BB_ENABLE           1
  33
  34 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
  35 {
  36         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  37
  38         switch (NumOutPipe) {
  39         case    3:
  40                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
  41                 haldata->OutEpNumber = 3;
  42                 break;
  43         case    2:
  44                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
  45                 haldata->OutEpNumber = 2;
  46                 break;
  47         case    1:
  48                 haldata->OutEpQueueSel = TX_SELE_HQ;
  49                 haldata->OutEpNumber = 1;
  50                 break;
  51         default:
  52                 break;
  53         }
  54         DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
  55 }
  56
  57 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
  58 {
  59         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  60         bool                    result          = false;
  61
  62         _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
  63
  64         /*  Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
  65         if (1 == haldata->OutEpNumber) {
  66                 if (1 != NumInPipe)
  67                         return result;
  68         }
  69
  70         /*  All config other than above support one Bulk IN and one Interrupt IN. */
  71
  72         result = Hal_MappingOutPipe(adapt, NumOutPipe);
  73
  74         return result;
  75 }
  76
  77 static void rtl8188eu_interface_configure(struct adapter *adapt)
  78 {
  79         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  80         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(adapt);
  81
  82         if (pdvobjpriv->ishighspeed)
  83                 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
  84         else
  85                 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
  86
  87         haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
  88
  89         haldata->UsbTxAggMode           = 1;
  90         haldata->UsbTxAggDescNum        = 0x6;  /*  only 4 bits */
  91
  92         haldata->UsbRxAggMode           = USB_RX_AGG_DMA;/*  USB_RX_AGG_DMA; */
  93         haldata->UsbRxAggBlockCount     = 8; /* unit : 512b */
  94         haldata->UsbRxAggBlockTimeout   = 0x6;
  95         haldata->UsbRxAggPageCount      = 48; /* uint :128 b 0x0A;      10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
  96         haldata->UsbRxAggPageTimeout    = 0x4; /* 6, absolute time = 34ms/(2^6) */
  97
  98         HalUsbSetQueuePipeMapping8188EUsb(adapt,
  99                                 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
 100 }
 101
 102 static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
 103 {
 104         u16 value16;
 105         /*  HW Power on sequence */
 106         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
 107         if (haldata->bMacPwrCtrlOn)
 108                 return _SUCCESS;
 109
 110         if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
 111                                       PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,
 112                                       Rtl8188E_NIC_PWR_ON_FLOW)) {
 113                 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
 114                 return _FAIL;
 115         }
 116
 117         /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 118         /*  Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 119         usb_write16(adapt, REG_CR, 0x00);  /* suggseted by zhouzhou, by page, 20111230 */
 120
 121                 /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 122         value16 = usb_read16(adapt, REG_CR);
 123         value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 124                                 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 125         /*  for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 126
 127         usb_write16(adapt, REG_CR, value16);
 128         haldata->bMacPwrCtrlOn = true;
 129
 130         return _SUCCESS;
 131 }
 132
 133 /*  Shall USB interface init this? */
 134 static void _InitInterrupt(struct adapter *Adapter)
 135 {
 136         u32 imr, imr_ex;
 137         u8  usb_opt;
 138         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 139
 140         /* HISR write one to clear */
 141         usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
 142         /*  HIMR - */
 143         imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
 144         usb_write32(Adapter, REG_HIMR_88E, imr);
 145         haldata->IntrMask[0] = imr;
 146
 147         imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
 148         usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
 149         haldata->IntrMask[1] = imr_ex;
 150
 151         /*  REG_USB_SPECIAL_OPTION - BIT(4) */
 152         /*  0; Use interrupt endpoint to upload interrupt pkt */
 153         /*  1; Use bulk endpoint to upload interrupt pkt, */
 154         usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 155
 156         if (!adapter_to_dvobj(Adapter)->ishighspeed)
 157                 usb_opt = usb_opt & (~INT_BULK_SEL);
 158         else
 159                 usb_opt = usb_opt | (INT_BULK_SEL);
 160
 161         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
 162 }
 163
 164 static void _InitQueueReservedPage(struct adapter *Adapter)
 165 {
 166         struct hal_data_8188e           *haldata = GET_HAL_DATA(Adapter);
 167         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 168         u32 numHQ       = 0;
 169         u32 numLQ       = 0;
 170         u32 numNQ       = 0;
 171         u32 numPubQ;
 172         u32 value32;
 173         u8 value8;
 174         bool bWiFiConfig = pregistrypriv->wifi_spec;
 175
 176         if (bWiFiConfig) {
 177                 if (haldata->OutEpQueueSel & TX_SELE_HQ)
 178                         numHQ =  0x29;
 179
 180                 if (haldata->OutEpQueueSel & TX_SELE_LQ)
 181                         numLQ = 0x1C;
 182
 183                 /*  NOTE: This step shall be proceed before writting REG_RQPN. */
 184                 if (haldata->OutEpQueueSel & TX_SELE_NQ)
 185                         numNQ = 0x1C;
 186                 value8 = (u8)_NPQ(numNQ);
 187                 usb_write8(Adapter, REG_RQPN_NPQ, value8);
 188
 189                 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
 190
 191                 /*  TX DMA */
 192                 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 193                 usb_write32(Adapter, REG_RQPN, value32);
 194         } else {
 195                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
 196                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
 197                 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
 198         }
 199 }
 200
 201 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
 202 {
 203         usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 204         usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 205         usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 206         usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 207         usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
 208 }
 209
 210 static void _InitPageBoundary(struct adapter *Adapter)
 211 {
 212         /*  RX Page Boundary */
 213         /*  */
 214         u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
 215
 216         usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 217 }
 218
 219 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
 220                                        u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
 221                                        u16 hiQ)
 222 {
 223         u16 value16     = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 224
 225         value16 |= _TXDMA_BEQ_MAP(beQ)  | _TXDMA_BKQ_MAP(bkQ) |
 226                    _TXDMA_VIQ_MAP(viQ)  | _TXDMA_VOQ_MAP(voQ) |
 227                    _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
 228
 229         usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
 230 }
 231
 232 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
 233 {
 234         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 235
 236         u16 value = 0;
 237         switch (haldata->OutEpQueueSel) {
 238         case TX_SELE_HQ:
 239                 value = QUEUE_HIGH;
 240                 break;
 241         case TX_SELE_LQ:
 242                 value = QUEUE_LOW;
 243                 break;
 244         case TX_SELE_NQ:
 245                 value = QUEUE_NORMAL;
 246                 break;
 247         default:
 248                 break;
 249         }
 250         _InitNormalChipRegPriority(Adapter, value, value, value, value,
 251                                    value, value);
 252 }
 253
 254 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
 255 {
 256         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 257         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 258         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 259         u16 valueHi = 0;
 260         u16 valueLow = 0;
 261
 262         switch (haldata->OutEpQueueSel) {
 263         case (TX_SELE_HQ | TX_SELE_LQ):
 264                 valueHi = QUEUE_HIGH;
 265                 valueLow = QUEUE_LOW;
 266                 break;
 267         case (TX_SELE_NQ | TX_SELE_LQ):
 268                 valueHi = QUEUE_NORMAL;
 269                 valueLow = QUEUE_LOW;
 270                 break;
 271         case (TX_SELE_HQ | TX_SELE_NQ):
 272                 valueHi = QUEUE_HIGH;
 273                 valueLow = QUEUE_NORMAL;
 274                 break;
 275         default:
 276                 break;
 277         }
 278
 279         if (!pregistrypriv->wifi_spec) {
 280                 beQ     = valueLow;
 281                 bkQ     = valueLow;
 282                 viQ     = valueHi;
 283                 voQ     = valueHi;
 284                 mgtQ    = valueHi;
 285                 hiQ     = valueHi;
 286         } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
 287                 beQ     = valueLow;
 288                 bkQ     = valueHi;
 289                 viQ     = valueHi;
 290                 voQ     = valueLow;
 291                 mgtQ    = valueHi;
 292                 hiQ     = valueHi;
 293         }
 294         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 295 }
 296
 297 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
 298 {
 299         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 300         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 301
 302         if (!pregistrypriv->wifi_spec) {/*  typical setting */
 303                 beQ     = QUEUE_LOW;
 304                 bkQ     = QUEUE_LOW;
 305                 viQ     = QUEUE_NORMAL;
 306                 voQ     = QUEUE_HIGH;
 307                 mgtQ    = QUEUE_HIGH;
 308                 hiQ     = QUEUE_HIGH;
 309         } else {/*  for WMM */
 310                 beQ     = QUEUE_LOW;
 311                 bkQ     = QUEUE_NORMAL;
 312                 viQ     = QUEUE_NORMAL;
 313                 voQ     = QUEUE_HIGH;
 314                 mgtQ    = QUEUE_HIGH;
 315                 hiQ     = QUEUE_HIGH;
 316         }
 317         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 318 }
 319
 320 static void _InitQueuePriority(struct adapter *Adapter)
 321 {
 322         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 323
 324         switch (haldata->OutEpNumber) {
 325         case 1:
 326                 _InitNormalChipOneOutEpPriority(Adapter);
 327                 break;
 328         case 2:
 329                 _InitNormalChipTwoOutEpPriority(Adapter);
 330                 break;
 331         case 3:
 332                 _InitNormalChipThreeOutEpPriority(Adapter);
 333                 break;
 334         default:
 335                 break;
 336         }
 337 }
 338
 339 static void _InitNetworkType(struct adapter *Adapter)
 340 {
 341         u32 value32;
 342
 343         value32 = usb_read32(Adapter, REG_CR);
 344         /*  TODO: use the other function to set network type */
 345         value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 346
 347         usb_write32(Adapter, REG_CR, value32);
 348 }
 349
 350 static void _InitTransferPageSize(struct adapter *Adapter)
 351 {
 352         /*  Tx page size is always 128. */
 353
 354         u8 value8;
 355         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 356         usb_write8(Adapter, REG_PBP, value8);
 357 }
 358
 359 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
 360 {
 361         usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 362 }
 363
 364 static void _InitWMACSetting(struct adapter *Adapter)
 365 {
 366         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 367
 368         haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
 369                                   RCR_CBSSID_DATA | RCR_CBSSID_BCN |
 370                                   RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
 371                                   RCR_APP_MIC | RCR_APP_PHYSTS;
 372
 373         /*  some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
 374         usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
 375
 376         /*  Accept all multicast address */
 377         usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
 378         usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
 379 }
 380
 381 static void _InitAdaptiveCtrl(struct adapter *Adapter)
 382 {
 383         u16 value16;
 384         u32 value32;
 385
 386         /*  Response Rate Set */
 387         value32 = usb_read32(Adapter, REG_RRSR);
 388         value32 &= ~RATE_BITMAP_ALL;
 389         value32 |= RATE_RRSR_CCK_ONLY_1M;
 390         usb_write32(Adapter, REG_RRSR, value32);
 391
 392         /*  CF-END Threshold */
 393
 394         /*  SIFS (used in NAV) */
 395         value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 396         usb_write16(Adapter, REG_SPEC_SIFS, value16);
 397
 398         /*  Retry Limit */
 399         value16 = _LRL(0x30) | _SRL(0x30);
 400         usb_write16(Adapter, REG_RL, value16);
 401 }
 402
 403 static void _InitEDCA(struct adapter *Adapter)
 404 {
 405         /*  Set Spec SIFS (used in NAV) */
 406         usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
 407         usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
 408
 409         /*  Set SIFS for CCK */
 410         usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
 411
 412         /*  Set SIFS for OFDM */
 413         usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
 414
 415         /*  TXOP */
 416         usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 417         usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 418         usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
 419         usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
 420 }
 421
 422 static void _InitRDGSetting(struct adapter *Adapter)
 423 {
 424         usb_write8(Adapter, REG_RD_CTRL, 0xFF);
 425         usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
 426         usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
 427 }
 428
 429 static void _InitRxSetting(struct adapter *Adapter)
 430 {
 431         usb_write32(Adapter, REG_MACID, 0x87654321);
 432         usb_write32(Adapter, 0x0700, 0x87654321);
 433 }
 434
 435 static void _InitRetryFunction(struct adapter *Adapter)
 436 {
 437         u8 value8;
 438
 439         value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
 440         value8 |= EN_AMPDU_RTY_NEW;
 441         usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
 442
 443         /*  Set ACK timeout */
 444         usb_write8(Adapter, REG_ACKTO, 0x40);
 445 }
 446
 447 /*-----------------------------------------------------------------------------
 448  * Function:    usb_AggSettingTxUpdate()
 449  *
 450  * Overview:    Separate TX/RX parameters update independent for TP detection and
 451  *                      dynamic TX/RX aggreagtion parameters update.
 452  *
 453  * Input:                       struct adapter *
 454  *
 455  * Output/Return:       NONE
 456  *
 457  * Revised History:
 458  *      When            Who             Remark
 459  *      12/10/2010      MHC             Separate to smaller function.
 460  *
 461  *---------------------------------------------------------------------------*/
 462 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
 463 {
 464         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 465         u32 value32;
 466
 467         if (Adapter->registrypriv.wifi_spec)
 468                 haldata->UsbTxAggMode = false;
 469
 470         if (haldata->UsbTxAggMode) {
 471                 value32 = usb_read32(Adapter, REG_TDECTRL);
 472                 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
 473                 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
 474
 475                 usb_write32(Adapter, REG_TDECTRL, value32);
 476         }
 477 }       /*  usb_AggSettingTxUpdate */
 478
 479 /*-----------------------------------------------------------------------------
 480  * Function:    usb_AggSettingRxUpdate()
 481  *
 482  * Overview:    Separate TX/RX parameters update independent for TP detection and
 483  *                      dynamic TX/RX aggreagtion parameters update.
 484  *
 485  * Input:                       struct adapter *
 486  *
 487  * Output/Return:       NONE
 488  *
 489  * Revised History:
 490  *      When            Who             Remark
 491  *      12/10/2010      MHC             Separate to smaller function.
 492  *
 493  *---------------------------------------------------------------------------*/
 494 static void
 495 usb_AggSettingRxUpdate(
 496                 struct adapter *Adapter
 497         )
 498 {
 499         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 500         u8 valueDMA;
 501         u8 valueUSB;
 502
 503         valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
 504         valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 505
 506         switch (haldata->UsbRxAggMode) {
 507         case USB_RX_AGG_DMA:
 508                 valueDMA |= RXDMA_AGG_EN;
 509                 valueUSB &= ~USB_AGG_EN;
 510                 break;
 511         case USB_RX_AGG_USB:
 512                 valueDMA &= ~RXDMA_AGG_EN;
 513                 valueUSB |= USB_AGG_EN;
 514                 break;
 515         case USB_RX_AGG_MIX:
 516                 valueDMA |= RXDMA_AGG_EN;
 517                 valueUSB |= USB_AGG_EN;
 518                 break;
 519         case USB_RX_AGG_DISABLE:
 520         default:
 521                 valueDMA &= ~RXDMA_AGG_EN;
 522                 valueUSB &= ~USB_AGG_EN;
 523                 break;
 524         }
 525
 526         usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
 527         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
 528
 529         switch (haldata->UsbRxAggMode) {
 530         case USB_RX_AGG_DMA:
 531                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 532                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
 533                 break;
 534         case USB_RX_AGG_USB:
 535                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 536                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 537                 break;
 538         case USB_RX_AGG_MIX:
 539                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 540                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
 541                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 542                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 543                 break;
 544         case USB_RX_AGG_DISABLE:
 545         default:
 546                 /*  TODO: */
 547                 break;
 548         }
 549
 550         switch (PBP_128) {
 551         case PBP_128:
 552                 haldata->HwRxPageSize = 128;
 553                 break;
 554         case PBP_64:
 555                 haldata->HwRxPageSize = 64;
 556                 break;
 557         case PBP_256:
 558                 haldata->HwRxPageSize = 256;
 559                 break;
 560         case PBP_512:
 561                 haldata->HwRxPageSize = 512;
 562                 break;
 563         case PBP_1024:
 564                 haldata->HwRxPageSize = 1024;
 565                 break;
 566         default:
 567                 break;
 568         }
 569 }       /*  usb_AggSettingRxUpdate */
 570
 571 static void InitUsbAggregationSetting(struct adapter *Adapter)
 572 {
 573         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 574
 575         /*  Tx aggregation setting */
 576         usb_AggSettingTxUpdate(Adapter);
 577
 578         /*  Rx aggregation setting */
 579         usb_AggSettingRxUpdate(Adapter);
 580
 581         /*  201/12/10 MH Add for USB agg mode dynamic switch. */
 582         haldata->UsbRxHighSpeedMode = false;
 583 }
 584
 585 static void _InitBeaconParameters(struct adapter *Adapter)
 586 {
 587         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 588
 589         usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
 590
 591         /*  TODO: Remove these magic number */
 592         usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
 593         usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*  5ms */
 594         usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /*  2ms */
 595
 596         /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
 597         /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
 598         usb_write16(Adapter, REG_BCNTCFG, 0x660F);
 599
 600         haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
 601         haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
 602         haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
 603         haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
 604         haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
 605 }
 606
 607 static void _BeaconFunctionEnable(struct adapter *Adapter,
 608                                   bool Enable, bool Linked)
 609 {
 610         usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
 611
 612         usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
 613 }
 614
 615 /*  Set CCK and OFDM Block "ON" */
 616 static void _BBTurnOnBlock(struct adapter *Adapter)
 617 {
 618         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 619         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 620 }
 621
 622 enum {
 623         Antenna_Lfet = 1,
 624         Antenna_Right = 2,
 625 };
 626
 627 static void _InitAntenna_Selection(struct adapter *Adapter)
 628 {
 629         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 630
 631         if (haldata->AntDivCfg == 0)
 632                 return;
 633         DBG_88E("==>  %s ....\n", __func__);
 634
 635         usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23));
 636         phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
 637
 638         if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
 639                 haldata->CurAntenna = Antenna_A;
 640         else
 641                 haldata->CurAntenna = Antenna_B;
 642         DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
 643 }
 644
 645 /*-----------------------------------------------------------------------------
 646  * Function:    HwSuspendModeEnable92Cu()
 647  *
 648  * Overview:    HW suspend mode switch.
 649  *
 650  * Input:               NONE
 651  *
 652  * Output:      NONE
 653  *
 654  * Return:      NONE
 655  *
 656  * Revised History:
 657  *      When            Who             Remark
 658  *      08/23/2010      MHC             HW suspend mode switch test..
 659  *---------------------------------------------------------------------------*/
 660 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
 661 {
 662         u8 val8;
 663         enum rt_rf_power_state rfpowerstate = rf_off;
 664
 665         if (adapt->pwrctrlpriv.bHWPowerdown) {
 666                 val8 = usb_read8(adapt, REG_HSISR);
 667                 DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8);
 668                 rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
 669         } else { /*  rf on/off */
 670                 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT(3)));
 671                 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
 672                 DBG_88E("GPIO_IN=%02x\n", val8);
 673                 rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
 674         }
 675         return rfpowerstate;
 676 }       /*  HalDetectPwrDownMode */
 677
 678 static u32 rtl8188eu_hal_init(struct adapter *Adapter)
 679 {
 680         u8 value8 = 0;
 681         u16  value16;
 682         u8 txpktbuf_bndy;
 683         u32 status = _SUCCESS;
 684         struct hal_data_8188e           *haldata = GET_HAL_DATA(Adapter);
 685         struct pwrctrl_priv             *pwrctrlpriv = &Adapter->pwrctrlpriv;
 686         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 687         u32 init_start_time = jiffies;
 688
 689         #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
 690
 691
 692         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
 693
 694         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 695
 696                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 697                         rtl88eu_phy_iq_calibrate(Adapter, true);
 698                 } else {
 699                         rtl88eu_phy_iq_calibrate(Adapter, false);
 700                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 701                 }
 702
 703                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 704                 rtl88eu_phy_lc_calibrate(Adapter);
 705
 706                 goto exit;
 707         }
 708
 709         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
 710         status = rtl8188eu_InitPowerOn(Adapter);
 711         if (status == _FAIL) {
 712                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
 713                 goto exit;
 714         }
 715
 716         /*  Save target channel */
 717         haldata->CurrentChannel = 6;/* default set to 6 */
 718
 719         if (pwrctrlpriv->reg_rfoff) {
 720                 pwrctrlpriv->rf_pwrstate = rf_off;
 721         }
 722
 723         /*  2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
 724         /*  HW GPIO pin. Before PHY_RFConfig8192C. */
 725         /*  2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
 726
 727         if (!pregistrypriv->wifi_spec) {
 728                 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
 729         } else {
 730                 /*  for WMM */
 731                 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
 732         }
 733
 734         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
 735         _InitQueueReservedPage(Adapter);
 736         _InitQueuePriority(Adapter);
 737         _InitPageBoundary(Adapter);
 738         _InitTransferPageSize(Adapter);
 739
 740         _InitTxBufferBoundary(Adapter, 0);
 741
 742         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
 743         if (Adapter->registrypriv.mp_mode == 1) {
 744                 _InitRxSetting(Adapter);
 745                 Adapter->bFWReady = false;
 746         } else {
 747                 status = rtl88eu_download_fw(Adapter);
 748
 749                 if (status) {
 750                         DBG_88E("%s: Download Firmware failed!!\n", __func__);
 751                         Adapter->bFWReady = false;
 752                         return status;
 753                 } else {
 754                         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
 755                         Adapter->bFWReady = true;
 756                 }
 757         }
 758         rtl8188e_InitializeFirmwareVars(Adapter);
 759
 760         rtl88eu_phy_mac_config(Adapter);
 761
 762         rtl88eu_phy_bb_config(Adapter);
 763
 764         rtl88eu_phy_rf_config(Adapter);
 765
 766         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
 767         status = rtl8188e_iol_efuse_patch(Adapter);
 768         if (status == _FAIL) {
 769                 DBG_88E("%s  rtl8188e_iol_efuse_patch failed\n", __func__);
 770                 goto exit;
 771         }
 772
 773         _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
 774
 775         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
 776         status =  InitLLTTable(Adapter, txpktbuf_bndy);
 777         if (status == _FAIL) {
 778                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
 779                 goto exit;
 780         }
 781
 782         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
 783         /*  Get Rx PHY status in order to report RSSI and others. */
 784         _InitDriverInfoSize(Adapter, DRVINFO_SZ);
 785
 786         _InitInterrupt(Adapter);
 787         hal_init_macaddr(Adapter);/* set mac_address */
 788         _InitNetworkType(Adapter);/* set msr */
 789         _InitWMACSetting(Adapter);
 790         _InitAdaptiveCtrl(Adapter);
 791         _InitEDCA(Adapter);
 792         _InitRetryFunction(Adapter);
 793         InitUsbAggregationSetting(Adapter);
 794         _InitBeaconParameters(Adapter);
 795         /*  Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
 796         /*  Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
 797         /*  Enable MACTXEN/MACRXEN block */
 798         value16 = usb_read16(Adapter, REG_CR);
 799         value16 |= (MACTXEN | MACRXEN);
 800         usb_write8(Adapter, REG_CR, value16);
 801
 802         if (haldata->bRDGEnable)
 803                 _InitRDGSetting(Adapter);
 804
 805         /* Enable TX Report */
 806         /* Enable Tx Report Timer */
 807         value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 808         usb_write8(Adapter,  REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
 809         /* Set MAX RPT MACID */
 810         usb_write8(Adapter,  REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
 811         /* Tx RPT Timer. Unit: 32us */
 812         usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
 813
 814         usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
 815
 816         usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 817         usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 818
 819         /* Keep RfRegChnlVal for later use. */
 820         haldata->RfRegChnlVal[0] = phy_query_rf_reg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
 821         haldata->RfRegChnlVal[1] = phy_query_rf_reg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
 822
 823 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
 824         _BBTurnOnBlock(Adapter);
 825
 826 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 827         invalidate_cam_all(Adapter);
 828
 829 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
 830         /*  2010/12/17 MH We need to set TX power according to EFUSE content at first. */
 831         phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
 832
 833 /*  Move by Neo for USB SS to below setp */
 834 /* _RfPowerSave(Adapter); */
 835
 836         _InitAntenna_Selection(Adapter);
 837
 838         /*  */
 839         /*  Disable BAR, suggested by Scott */
 840         /*  2010.04.09 add by hpfan */
 841         /*  */
 842         usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
 843
 844         /*  HW SEQ CTRL */
 845         /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
 846         usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
 847
 848         if (pregistrypriv->wifi_spec)
 849                 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
 850
 851         /* Nav limit , suggest by scott */
 852         usb_write8(Adapter, 0x652, 0x0);
 853
 854 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
 855         rtl8188e_InitHalDm(Adapter);
 856
 857         /*  2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
 858         /*  and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
 859         /*  call initstruct adapter. May cause some problem?? */
 860         /*  Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
 861         /*  in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
 862         /*  is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
 863         /*  Added by tynli. 2010.03.30. */
 864         pwrctrlpriv->rf_pwrstate = rf_on;
 865
 866         /*  enable Tx report. */
 867         usb_write8(Adapter,  REG_FWHW_TXQ_CTRL+1, 0x0F);
 868
 869         /*  Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
 870         usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
 871
 872         /* tynli_test_tx_report. */
 873         usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
 874
 875         /* enable tx DMA to drop the redundate data of packet */
 876         usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
 877
 878 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
 879                 /*  2010/08/26 MH Merge from 8192CE. */
 880         if (pwrctrlpriv->rf_pwrstate == rf_on) {
 881                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 882                                 rtl88eu_phy_iq_calibrate(Adapter, true);
 883                 } else {
 884                         rtl88eu_phy_iq_calibrate(Adapter, false);
 885                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 886                 }
 887
 888 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
 889
 890                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 891
 892 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
 893                         rtl88eu_phy_lc_calibrate(Adapter);
 894         }
 895
 896 /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
 897 /*      _InitPABias(Adapter); */
 898         usb_write8(Adapter, REG_USB_HRPWM, 0);
 899
 900         /* ack for xmit mgmt frames. */
 901         usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
 902
 903 exit:
 904 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
 905
 906         DBG_88E("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time));
 907
 908
 909         return status;
 910 }
 911
 912 static void CardDisableRTL8188EU(struct adapter *Adapter)
 913 {
 914         u8 val8;
 915         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 916
 917         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
 918
 919         /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
 920         val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 921         usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT(1)));
 922
 923         /*  stop rx */
 924         usb_write8(Adapter, REG_CR, 0x0);
 925
 926         /*  Run LPS WL RFOFF flow */
 927         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 928                                  PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,
 929                                  Rtl8188E_NIC_LPS_ENTER_FLOW);
 930
 931         /*  2. 0x1F[7:0] = 0            turn off RF */
 932
 933         val8 = usb_read8(Adapter, REG_MCUFWDL);
 934         if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
 935                 /*  Reset MCU 0x2[10]=0. */
 936                 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
 937                 val8 &= ~BIT(2);        /*  0x2[10], FEN_CPUEN */
 938                 usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
 939         }
 940
 941         /*  reset MCU ready status */
 942         usb_write8(Adapter, REG_MCUFWDL, 0);
 943
 944         /* YJ,add,111212 */
 945         /* Disable 32k */
 946         val8 = usb_read8(Adapter, REG_32K_CTRL);
 947         usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0)));
 948
 949         /*  Card disable power action flow */
 950         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 951                                  PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,
 952                                  Rtl8188E_NIC_DISABLE_FLOW);
 953
 954         /*  Reset MCU IO Wrapper */
 955         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 956         usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT(3))));
 957         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 958         usb_write8(Adapter, REG_RSV_CTRL+1, val8 | BIT(3));
 959
 960         /* YJ,test add, 111207. For Power Consumption. */
 961         val8 = usb_read8(Adapter, GPIO_IN);
 962         usb_write8(Adapter, GPIO_OUT, val8);
 963         usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
 964
 965         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
 966         usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
 967         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
 968         usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
 969         usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
 970         haldata->bMacPwrCtrlOn = false;
 971         Adapter->bFWReady = false;
 972 }
 973 static void rtl8192cu_hw_power_down(struct adapter *adapt)
 974 {
 975         /*  2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
 976         /*  Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
 977
 978         /*  Enable register area 0x0-0xc. */
 979         usb_write8(adapt, REG_RSV_CTRL, 0x0);
 980         usb_write16(adapt, REG_APS_FSMCO, 0x8812);
 981 }
 982
 983 static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
 984 {
 985
 986         DBG_88E("==> %s\n", __func__);
 987
 988         usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
 989         usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
 990
 991         DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
 992         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 993                 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 994                         rtl8192cu_hw_power_down(Adapter);
 995         } else {
 996                 if (Adapter->hw_init_completed) {
 997                         CardDisableRTL8188EU(Adapter);
 998
 999                         if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
1000                                 rtl8192cu_hw_power_down(Adapter);
1001                 }
1002         }
1003         return _SUCCESS;
1004  }
1005
1006 static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
1007 {
1008         u8 i;
1009         struct recv_buf *precvbuf;
1010         uint    status;
1011         struct recv_priv *precvpriv = &(Adapter->recvpriv);
1012
1013         status = _SUCCESS;
1014
1015         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
1016                  ("===> usb_inirp_init\n"));
1017
1018         precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
1019
1020         /* issue Rx irp to receive data */
1021         precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1022         for (i = 0; i < NR_RECVBUFF; i++) {
1023                 if (usb_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
1024                         RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
1025                         status = _FAIL;
1026                         goto exit;
1027                 }
1028
1029                 precvbuf++;
1030                 precvpriv->free_recv_buf_queue_cnt--;
1031         }
1032
1033 exit:
1034
1035         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
1036
1037
1038         return status;
1039 }
1040
1041 static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter)
1042 {
1043         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n ===> usb_rx_deinit\n"));
1044
1045         usb_read_port_cancel(Adapter);
1046
1047         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n <=== usb_rx_deinit\n"));
1048
1049         return _SUCCESS;
1050 }
1051
1052 /*  */
1053 /*  */
1054 /*      EEPROM/EFUSE Content Parsing */
1055 /*  */
1056 /*  */
1057 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1058 {
1059         struct hal_data_8188e   *haldata = GET_HAL_DATA(adapt);
1060
1061         if (!AutoLoadFail) {
1062                 /*  VID, PID */
1063                 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1064                 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1065
1066                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1067                 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1068                 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1069         } else {
1070                 haldata->EEPROMVID                      = EEPROM_Default_VID;
1071                 haldata->EEPROMPID                      = EEPROM_Default_PID;
1072
1073                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1074                 haldata->EEPROMCustomerID               = EEPROM_Default_CustomerID;
1075                 haldata->EEPROMSubCustomerID    = EEPROM_Default_SubCustomerID;
1076         }
1077
1078         DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1079         DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1080 }
1081
1082 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1083 {
1084         u16 i;
1085         u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1086         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1087
1088         if (AutoLoadFail) {
1089                 for (i = 0; i < 6; i++)
1090                         eeprom->mac_addr[i] = sMacAddr[i];
1091         } else {
1092                 /* Read Permanent MAC address */
1093                 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1094         }
1095         RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1096                  ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
1097                  eeprom->mac_addr));
1098 }
1099
1100 static void
1101 readAdapterInfo_8188EU(
1102                 struct adapter *adapt
1103         )
1104 {
1105         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1106
1107         /* parse the eeprom/efuse content */
1108         Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1109         Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1110         Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1111
1112         Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1113         Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1114         Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1115         rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1116         Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1117         Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1118         Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1119         Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1120         Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1121
1122 }
1123
1124 static void _ReadPROMContent(
1125         struct adapter *Adapter
1126         )
1127 {
1128         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1129         u8 eeValue;
1130
1131         /* check system boot selection */
1132         eeValue = usb_read8(Adapter, REG_9346CR);
1133         eeprom->EepromOrEfuse           = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1134         eeprom->bautoload_fail_flag     = (eeValue & EEPROM_EN) ? false : true;
1135
1136         DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1137                 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1138
1139         Hal_InitPGData88E(Adapter);
1140         readAdapterInfo_8188EU(Adapter);
1141 }
1142
1143 static void _ReadRFType(struct adapter *Adapter)
1144 {
1145         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1146
1147         haldata->rf_chip = RF_6052;
1148 }
1149
1150 static void _ReadAdapterInfo8188EU(struct adapter *Adapter)
1151 {
1152         u32 start = jiffies;
1153
1154         MSG_88E("====> %s\n", __func__);
1155
1156         _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
1157         _ReadPROMContent(Adapter);
1158
1159         MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
1160 }
1161
1162 #define GPIO_DEBUG_PORT_NUM 0
1163 static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1164 {
1165 }
1166
1167 static void ResumeTxBeacon(struct adapter *adapt)
1168 {
1169         struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1170
1171         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1172         /*  which should be read from register to a global variable. */
1173
1174         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT(6));
1175         haldata->RegFwHwTxQCtrl |= BIT(6);
1176         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1177         haldata->RegReg542 |= BIT(0);
1178         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1179 }
1180
1181 static void StopTxBeacon(struct adapter *adapt)
1182 {
1183         struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1184
1185         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1186         /*  which should be read from register to a global variable. */
1187
1188         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
1189         haldata->RegFwHwTxQCtrl &= (~BIT(6));
1190         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1191         haldata->RegReg542 &= ~(BIT(0));
1192         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1193
1194          /* todo: CheckFwRsvdPageContent(Adapter);  2010.06.23. Added by tynli. */
1195 }
1196
1197 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1198 {
1199         u8 val8;
1200         u8 mode = *((u8 *)val);
1201
1202         /*  disable Port0 TSF update */
1203         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1204
1205         /*  set net_type */
1206         val8 = usb_read8(Adapter, MSR)&0x0c;
1207         val8 |= mode;
1208         usb_write8(Adapter, MSR, val8);
1209
1210         DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1211
1212         if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1213                 StopTxBeacon(Adapter);
1214
1215                 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1216         } else if ((mode == _HW_STATE_ADHOC_)) {
1217                 ResumeTxBeacon(Adapter);
1218                 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1219         } else if (mode == _HW_STATE_AP_) {
1220                 ResumeTxBeacon(Adapter);
1221
1222                 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1223
1224                 /* Set RCR */
1225                 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1226                 /* enable to rx data frame */
1227                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1228                 /* enable to rx ps-poll */
1229                 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1230
1231                 /* Beacon Control related register for first time */
1232                 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /*  2ms */
1233
1234                 usb_write8(Adapter, REG_ATIMWND, 0x0a); /*  10ms */
1235                 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1236                 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1237                 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/*  +32767 (~32ms) */
1238
1239                 /* reset TSF */
1240                 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1241
1242                 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1243                 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1244
1245                 /* enable BCN0 Function for if1 */
1246                 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1247                 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1248
1249                 /* dis BCN1 ATIM  WND if if2 is station */
1250                 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1251         }
1252 }
1253
1254 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1255 {
1256         u8 idx = 0;
1257         u32 reg_macid;
1258
1259         reg_macid = REG_MACID;
1260
1261         for (idx = 0; idx < 6; idx++)
1262                 usb_write8(Adapter, (reg_macid+idx), val[idx]);
1263 }
1264
1265 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1266 {
1267         u8 idx = 0;
1268         u32 reg_bssid;
1269
1270         reg_bssid = REG_BSSID;
1271
1272         for (idx = 0; idx < 6; idx++)
1273                 usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1274 }
1275
1276 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1277 {
1278         u32 bcn_ctrl_reg;
1279
1280         bcn_ctrl_reg = REG_BCN_CTRL;
1281
1282         if (*((u8 *)val))
1283                 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1284         else
1285                 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1286 }
1287
1288 static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1289 {
1290         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1291         struct dm_priv  *pdmpriv = &haldata->dmpriv;
1292         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1293
1294         switch (variable) {
1295         case HW_VAR_MEDIA_STATUS:
1296                 {
1297                         u8 val8;
1298
1299                         val8 = usb_read8(Adapter, MSR)&0x0c;
1300                         val8 |= *((u8 *)val);
1301                         usb_write8(Adapter, MSR, val8);
1302                 }
1303                 break;
1304         case HW_VAR_MEDIA_STATUS1:
1305                 {
1306                         u8 val8;
1307
1308                         val8 = usb_read8(Adapter, MSR) & 0x03;
1309                         val8 |= *((u8 *)val) << 2;
1310                         usb_write8(Adapter, MSR, val8);
1311                 }
1312                 break;
1313         case HW_VAR_SET_OPMODE:
1314                 hw_var_set_opmode(Adapter, variable, val);
1315                 break;
1316         case HW_VAR_MAC_ADDR:
1317                 hw_var_set_macaddr(Adapter, variable, val);
1318                 break;
1319         case HW_VAR_BSSID:
1320                 hw_var_set_bssid(Adapter, variable, val);
1321                 break;
1322         case HW_VAR_BASIC_RATE:
1323                 {
1324                         u16 BrateCfg = 0;
1325                         u8 RateIndex = 0;
1326
1327                         /*  2007.01.16, by Emily */
1328                         /*  Select RRSR (in Legacy-OFDM and CCK) */
1329                         /*  For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1330                         /*  We do not use other rates. */
1331                         HalSetBrateCfg(Adapter, val, &BrateCfg);
1332                         DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1333
1334                         /* 2011.03.30 add by Luke Lee */
1335                         /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1336                         /* because CCK 2M has poor TXEVM */
1337                         /* CCK 5.5M & 11M ACK should be enabled for better performance */
1338
1339                         BrateCfg = (BrateCfg | 0xd) & 0x15d;
1340                         haldata->BasicRateSet = BrateCfg;
1341
1342                         BrateCfg |= 0x01; /*  default enable 1M ACK rate */
1343                         /*  Set RRSR rate table. */
1344                         usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1345                         usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1346                         usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1347
1348                         /*  Set RTS initial rate */
1349                         while (BrateCfg > 0x1) {
1350                                 BrateCfg >>= 1;
1351                                 RateIndex++;
1352                         }
1353                         /*  Ziv - Check */
1354                         usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1355                 }
1356                 break;
1357         case HW_VAR_TXPAUSE:
1358                 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1359                 break;
1360         case HW_VAR_BCN_FUNC:
1361                 hw_var_set_bcn_func(Adapter, variable, val);
1362                 break;
1363         case HW_VAR_CORRECT_TSF:
1364                 {
1365                         u64     tsf;
1366                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1367                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1368
1369                         tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */
1370
1371                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1372                                 StopTxBeacon(Adapter);
1373
1374                         /* disable related TSF function */
1375                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1376
1377                         usb_write32(Adapter, REG_TSFTR, tsf);
1378                         usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1379
1380                         /* enable related TSF function */
1381                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3));
1382
1383                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1384                                 ResumeTxBeacon(Adapter);
1385                 }
1386                 break;
1387         case HW_VAR_CHECK_BSSID:
1388                 if (*((u8 *)val)) {
1389                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1390                 } else {
1391                         u32 val32;
1392
1393                         val32 = usb_read32(Adapter, REG_RCR);
1394
1395                         val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1396
1397                         usb_write32(Adapter, REG_RCR, val32);
1398                 }
1399                 break;
1400         case HW_VAR_MLME_DISCONNECT:
1401                 /* Set RCR to not to receive data frame when NO LINK state */
1402                 /* reject all data frames */
1403                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1404
1405                 /* reset TSF */
1406                 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
1407
1408                 /* disable update TSF */
1409                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1410                 break;
1411         case HW_VAR_MLME_SITESURVEY:
1412                 if (*((u8 *)val)) { /* under sitesurvey */
1413                         /* config RCR to receive different BSSID & not to receive data frame */
1414                         u32 v = usb_read32(Adapter, REG_RCR);
1415                         v &= ~(RCR_CBSSID_BCN);
1416                         usb_write32(Adapter, REG_RCR, v);
1417                         /* reject all data frame */
1418                         usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1419
1420                         /* disable update TSF */
1421                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1422                 } else { /* sitesurvey done */
1423                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1424                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1425
1426                         if ((is_client_associated_to_ap(Adapter)) ||
1427                             ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1428                                 /* enable to rx data frame */
1429                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1430
1431                                 /* enable update TSF */
1432                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1433                         } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1434                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1435                                 /* enable update TSF */
1436                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1437                         }
1438                         if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1439                                 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1440                         } else {
1441                                 if (Adapter->in_cta_test) {
1442                                         u32 v = usb_read32(Adapter, REG_RCR);
1443                                         v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/*  RCR_ADF */
1444                                         usb_write32(Adapter, REG_RCR, v);
1445                                 } else {
1446                                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1447                                 }
1448                         }
1449                 }
1450                 break;
1451         case HW_VAR_MLME_JOIN:
1452                 {
1453                         u8 RetryLimit = 0x30;
1454                         u8 type = *((u8 *)val);
1455                         struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
1456
1457                         if (type == 0) { /*  prepare to join */
1458                                 /* enable to rx data frame.Accept all data frame */
1459                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1460
1461                                 if (Adapter->in_cta_test) {
1462                                         u32 v = usb_read32(Adapter, REG_RCR);
1463                                         v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/*  RCR_ADF */
1464                                         usb_write32(Adapter, REG_RCR, v);
1465                                 } else {
1466                                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1467                                 }
1468
1469                                 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1470                                         RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1471                                 else /*  Ad-hoc Mode */
1472                                         RetryLimit = 0x7;
1473                         } else if (type == 1) {
1474                                 /* joinbss_event call back when join res < 0 */
1475                                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1476                         } else if (type == 2) {
1477                                 /* sta add event call back */
1478                                 /* enable update TSF */
1479                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1480
1481                                 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1482                                         RetryLimit = 0x7;
1483                         }
1484                         usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1485                 }
1486                 break;
1487         case HW_VAR_BEACON_INTERVAL:
1488                 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1489                 break;
1490         case HW_VAR_SLOT_TIME:
1491                 {
1492                         u8 u1bAIFS, aSifsTime;
1493                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1494                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1495
1496                         usb_write8(Adapter, REG_SLOT, val[0]);
1497
1498                         if (pmlmeinfo->WMM_enable == 0) {
1499                                 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1500                                         aSifsTime = 10;
1501                                 else
1502                                         aSifsTime = 16;
1503
1504                                 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1505
1506                                 /*  <Roger_EXP> Temporary removed, 2008.06.20. */
1507                                 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1508                                 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1509                                 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1510                                 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1511                         }
1512                 }
1513                 break;
1514         case HW_VAR_RESP_SIFS:
1515                 /* RESP_SIFS for CCK */
1516                 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /*  SIFS_T2T_CCK (0x08) */
1517                 usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
1518                 /* RESP_SIFS for OFDM */
1519                 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1520                 usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1521                 break;
1522         case HW_VAR_ACK_PREAMBLE:
1523                 {
1524                         u8 regTmp;
1525                         u8 bShortPreamble = *((bool *)val);
1526                         /*  Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1527                         regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1528                         if (bShortPreamble)
1529                                 regTmp |= 0x80;
1530
1531                         usb_write8(Adapter, REG_RRSR+2, regTmp);
1532                 }
1533                 break;
1534         case HW_VAR_SEC_CFG:
1535                 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1536                 break;
1537         case HW_VAR_DM_FLAG:
1538                 podmpriv->SupportAbility = *((u8 *)val);
1539                 break;
1540         case HW_VAR_DM_FUNC_OP:
1541                 if (val[0])
1542                         podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1543                 else
1544                         podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1545                 break;
1546         case HW_VAR_DM_FUNC_SET:
1547                 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1548                         pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1549                         podmpriv->SupportAbility =      pdmpriv->InitODMFlag;
1550                 } else {
1551                         podmpriv->SupportAbility |= *((u32 *)val);
1552                 }
1553                 break;
1554         case HW_VAR_DM_FUNC_CLR:
1555                 podmpriv->SupportAbility &= *((u32 *)val);
1556                 break;
1557         case HW_VAR_CAM_EMPTY_ENTRY:
1558                 {
1559                         u8 ucIndex = *((u8 *)val);
1560                         u8 i;
1561                         u32 ulCommand = 0;
1562                         u32 ulContent = 0;
1563                         u32 ulEncAlgo = CAM_AES;
1564
1565                         for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1566                                 /*  filled id in CAM config 2 byte */
1567                                 if (i == 0)
1568                                         ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1569                                 else
1570                                         ulContent = 0;
1571                                 /*  polling bit, and No Write enable, and address */
1572                                 ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1573                                 ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1574                                 /*  write content 0 is equall to mark invalid */
1575                                 usb_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
1576                                 usb_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
1577                         }
1578                 }
1579                 break;
1580         case HW_VAR_CAM_INVALID_ALL:
1581                 usb_write32(Adapter, RWCAM, BIT(31) | BIT(30));
1582                 break;
1583         case HW_VAR_CAM_WRITE:
1584                 {
1585                         u32 cmd;
1586                         u32 *cam_val = (u32 *)val;
1587                         usb_write32(Adapter, WCAMI, cam_val[0]);
1588
1589                         cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1590                         usb_write32(Adapter, RWCAM, cmd);
1591                 }
1592                 break;
1593         case HW_VAR_AC_PARAM_VO:
1594                 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1595                 break;
1596         case HW_VAR_AC_PARAM_VI:
1597                 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1598                 break;
1599         case HW_VAR_AC_PARAM_BE:
1600                 haldata->AcParam_BE = ((u32 *)(val))[0];
1601                 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1602                 break;
1603         case HW_VAR_AC_PARAM_BK:
1604                 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1605                 break;
1606         case HW_VAR_ACM_CTRL:
1607                 {
1608                         u8 acm_ctrl = *((u8 *)val);
1609                         u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1610
1611                         if (acm_ctrl > 1)
1612                                 AcmCtrl = AcmCtrl | 0x1;
1613
1614                         if (acm_ctrl & BIT(3))
1615                                 AcmCtrl |= AcmHw_VoqEn;
1616                         else
1617                                 AcmCtrl &= (~AcmHw_VoqEn);
1618
1619                         if (acm_ctrl & BIT(2))
1620                                 AcmCtrl |= AcmHw_ViqEn;
1621                         else
1622                                 AcmCtrl &= (~AcmHw_ViqEn);
1623
1624                         if (acm_ctrl & BIT(1))
1625                                 AcmCtrl |= AcmHw_BeqEn;
1626                         else
1627                                 AcmCtrl &= (~AcmHw_BeqEn);
1628
1629                         DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1630                         usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1631                 }
1632                 break;
1633         case HW_VAR_AMPDU_MIN_SPACE:
1634                 {
1635                         u8 MinSpacingToSet;
1636                         u8 SecMinSpace;
1637
1638                         MinSpacingToSet = *((u8 *)val);
1639                         if (MinSpacingToSet <= 7) {
1640                                 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1641                                 case _NO_PRIVACY_:
1642                                 case _AES_:
1643                                         SecMinSpace = 0;
1644                                         break;
1645                                 case _WEP40_:
1646                                 case _WEP104_:
1647                                 case _TKIP_:
1648                                 case _TKIP_WTMIC_:
1649                                         SecMinSpace = 6;
1650                                         break;
1651                                 default:
1652                                         SecMinSpace = 7;
1653                                         break;
1654                                 }
1655                                 if (MinSpacingToSet < SecMinSpace)
1656                                         MinSpacingToSet = SecMinSpace;
1657                                 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1658                         }
1659                 }
1660                 break;
1661         case HW_VAR_AMPDU_FACTOR:
1662                 {
1663                         u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1664                         u8 FactorToSet;
1665                         u8 *pRegToSet;
1666                         u8 index = 0;
1667
1668                         pRegToSet = RegToSet_Normal; /*  0xb972a841; */
1669                         FactorToSet = *((u8 *)val);
1670                         if (FactorToSet <= 3) {
1671                                 FactorToSet = 1 << (FactorToSet + 2);
1672                                 if (FactorToSet > 0xf)
1673                                         FactorToSet = 0xf;
1674
1675                                 for (index = 0; index < 4; index++) {
1676                                         if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1677                                                 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1678
1679                                         if ((pRegToSet[index] & 0x0f) > FactorToSet)
1680                                                 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1681
1682                                         usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1683                                 }
1684                         }
1685                 }
1686                 break;
1687         case HW_VAR_RXDMA_AGG_PG_TH:
1688                 {
1689                         u8 threshold = *((u8 *)val);
1690                         if (threshold == 0)
1691                                 threshold = haldata->UsbRxAggPageCount;
1692                         usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1693                 }
1694                 break;
1695         case HW_VAR_SET_RPWM:
1696                 break;
1697         case HW_VAR_H2C_FW_PWRMODE:
1698                 {
1699                         u8 psmode = (*(u8 *)val);
1700
1701                         /*  Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1702                         /*  saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1703                         if (psmode != PS_MODE_ACTIVE)
1704                                 ODM_RF_Saving(podmpriv, true);
1705                         rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1706                 }
1707                 break;
1708         case HW_VAR_H2C_FW_JOINBSSRPT:
1709                 {
1710                         u8 mstatus = (*(u8 *)val);
1711                         rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1712                 }
1713                 break;
1714         case HW_VAR_INITIAL_GAIN:
1715                 {
1716                         struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1717                         u32 rx_gain = ((u32 *)(val))[0];
1718
1719                         if (rx_gain == 0xff) {/* restore rx gain */
1720                                 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1721                         } else {
1722                                 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1723                                 ODM_Write_DIG(podmpriv, rx_gain);
1724                         }
1725                 }
1726                 break;
1727         case HW_VAR_TRIGGER_GPIO_0:
1728                 rtl8192cu_trigger_gpio_0(Adapter);
1729                 break;
1730         case HW_VAR_RPT_TIMER_SETTING:
1731                 {
1732                         u16 min_rpt_time = (*(u16 *)val);
1733                         ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1734                 }
1735                 break;
1736         case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1737                 {
1738                         u8 Optimum_antenna = (*(u8 *)val);
1739                         u8 Ant;
1740                         /* switch antenna to Optimum_antenna */
1741                         if (haldata->CurAntenna !=  Optimum_antenna) {
1742                                 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1743                                 rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1744
1745                                 haldata->CurAntenna = Optimum_antenna;
1746                         }
1747                 }
1748                 break;
1749         case HW_VAR_EFUSE_BYTES: /*  To set EFUE total used bytes, added by Roger, 2008.12.22. */
1750                 haldata->EfuseUsedBytes = *((u16 *)val);
1751                 break;
1752         case HW_VAR_FIFO_CLEARN_UP:
1753                 {
1754                         struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1755                         u8 trycnt = 100;
1756
1757                         /* pause tx */
1758                         usb_write8(Adapter, REG_TXPAUSE, 0xff);
1759
1760                         /* keep sn */
1761                         Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1762
1763                         if (!pwrpriv->bkeepfwalive) {
1764                                 /* RX DMA stop */
1765                                 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1766                                 do {
1767                                         if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1768                                                 break;
1769                                 } while (trycnt--);
1770                                 if (trycnt == 0)
1771                                         DBG_88E("Stop RX DMA failed......\n");
1772
1773                                 /* RQPN Load 0 */
1774                                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1775                                 usb_write32(Adapter, REG_RQPN, 0x80000000);
1776                                 mdelay(10);
1777                         }
1778                 }
1779                 break;
1780         case HW_VAR_CHECK_TXBUF:
1781                 break;
1782         case HW_VAR_APFM_ON_MAC:
1783                 haldata->bMacPwrCtrlOn = *val;
1784                 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1785                 break;
1786         case HW_VAR_TX_RPT_MAX_MACID:
1787                 {
1788                         u8 maxMacid = *val;
1789                         DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1790                         usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1791                 }
1792                 break;
1793         case HW_VAR_H2C_MEDIA_STATUS_RPT:
1794                 rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(__le16 *)val));
1795                 break;
1796         case HW_VAR_BCN_VALID:
1797                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1798                 usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT(0));
1799                 break;
1800         default:
1801                 break;
1802         }
1803 }
1804
1805 static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1806 {
1807         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1808         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1809
1810         switch (variable) {
1811         case HW_VAR_BASIC_RATE:
1812                 *((u16 *)(val)) = haldata->BasicRateSet;
1813         case HW_VAR_TXPAUSE:
1814                 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1815                 break;
1816         case HW_VAR_BCN_VALID:
1817                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1818                 val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1819                 break;
1820         case HW_VAR_DM_FLAG:
1821                 val[0] = podmpriv->SupportAbility;
1822                 break;
1823         case HW_VAR_RF_TYPE:
1824                 val[0] = haldata->rf_type;
1825                 break;
1826         case HW_VAR_FWLPS_RF_ON:
1827                 {
1828                         /* When we halt NIC, we should check if FW LPS is leave. */
1829                         if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1830                                 /*  If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1831                                 /*  because Fw is unload. */
1832                                 val[0] = true;
1833                         } else {
1834                                 u32 valRCR;
1835                                 valRCR = usb_read32(Adapter, REG_RCR);
1836                                 valRCR &= 0x00070000;
1837                                 if (valRCR)
1838                                         val[0] = false;
1839                                 else
1840                                         val[0] = true;
1841                         }
1842                 }
1843                 break;
1844         case HW_VAR_CURRENT_ANTENNA:
1845                 val[0] = haldata->CurAntenna;
1846                 break;
1847         case HW_VAR_EFUSE_BYTES: /*  To get EFUE total used bytes, added by Roger, 2008.12.22. */
1848                 *((u16 *)(val)) = haldata->EfuseUsedBytes;
1849                 break;
1850         case HW_VAR_APFM_ON_MAC:
1851                 *val = haldata->bMacPwrCtrlOn;
1852                 break;
1853         case HW_VAR_CHK_HI_QUEUE_EMPTY:
1854                 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1855                 break;
1856         default:
1857                 break;
1858         }
1859
1860 }
1861
1862 /*  */
1863 /*      Description: */
1864 /*              Query setting of specified variable. */
1865 /*  */
1866 static u8
1867 GetHalDefVar8188EUsb(
1868                 struct adapter *Adapter,
1869                 enum hal_def_variable eVariable,
1870                 void *pValue
1871         )
1872 {
1873         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1874         u8 bResult = _SUCCESS;
1875
1876         switch (eVariable) {
1877         case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1878                 {
1879                         struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1880                         struct sta_priv *pstapriv = &Adapter->stapriv;
1881                         struct sta_info *psta;
1882                         psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1883                         if (psta)
1884                                 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1885                 }
1886                 break;
1887         case HAL_DEF_IS_SUPPORT_ANT_DIV:
1888                 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1889                 break;
1890         case HAL_DEF_CURRENT_ANTENNA:
1891                 *((u8 *)pValue) = haldata->CurAntenna;
1892                 break;
1893         case HAL_DEF_DRVINFO_SZ:
1894                 *((u32 *)pValue) = DRVINFO_SZ;
1895                 break;
1896         case HAL_DEF_MAX_RECVBUF_SZ:
1897                 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1898                 break;
1899         case HAL_DEF_RX_PACKET_OFFSET:
1900                 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1901                 break;
1902         case HAL_DEF_DBG_DM_FUNC:
1903                 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1904                 break;
1905         case HAL_DEF_RA_DECISION_RATE:
1906                 {
1907                         u8 MacID = *((u8 *)pValue);
1908                         *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&(haldata->odmpriv), MacID);
1909                 }
1910                 break;
1911         case HAL_DEF_RA_SGI:
1912                 {
1913                         u8 MacID = *((u8 *)pValue);
1914                         *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&(haldata->odmpriv), MacID);
1915                 }
1916                 break;
1917         case HAL_DEF_PT_PWR_STATUS:
1918                 {
1919                         u8 MacID = *((u8 *)pValue);
1920                         *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(haldata->odmpriv), MacID);
1921                 }
1922                 break;
1923         case HW_VAR_MAX_RX_AMPDU_FACTOR:
1924                 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1925                 break;
1926         case HW_DEF_RA_INFO_DUMP:
1927                 {
1928                         u8 entry_id = *((u8 *)pValue);
1929                         if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1930                                 DBG_88E("============ RA status check ===================\n");
1931                                 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1932                                         entry_id,
1933                                         haldata->odmpriv.RAInfo[entry_id].RateID,
1934                                         haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1935                                         haldata->odmpriv.RAInfo[entry_id].RateSGI,
1936                                         haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1937                                         haldata->odmpriv.RAInfo[entry_id].PTStage);
1938                         }
1939                 }
1940                 break;
1941         case HW_DEF_ODM_DBG_FLAG:
1942                 {
1943                         struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
1944                         pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1945                 }
1946                 break;
1947         case HAL_DEF_DBG_DUMP_RXPKT:
1948                 *((u8 *)pValue) = haldata->bDumpRxPkt;
1949                 break;
1950         case HAL_DEF_DBG_DUMP_TXPKT:
1951                 *((u8 *)pValue) = haldata->bDumpTxPkt;
1952                 break;
1953         default:
1954                 bResult = _FAIL;
1955                 break;
1956         }
1957
1958         return bResult;
1959 }
1960
1961 static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1962 {
1963         u8 init_rate = 0;
1964         u8 networkType, raid;
1965         u32 mask, rate_bitmap;
1966         u8 shortGIrate = false;
1967         int     supportRateNum = 0;
1968         struct sta_info *psta;
1969         struct hal_data_8188e   *haldata = GET_HAL_DATA(adapt);
1970         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1971         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1972         struct wlan_bssid_ex    *cur_network = &(pmlmeinfo->network);
1973
1974         if (mac_id >= NUM_STA) /* CAM_SIZE */
1975                 return;
1976         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1977         if (psta == NULL)
1978                 return;
1979         switch (mac_id) {
1980         case 0:/*  for infra mode */
1981                 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1982                 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
1983                 raid = networktype_to_raid(networkType);
1984                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1985                 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&(pmlmeinfo->HT_caps)) : 0;
1986                 if (support_short_GI(adapt, &(pmlmeinfo->HT_caps)))
1987                         shortGIrate = true;
1988                 break;
1989         case 1:/* for broadcast/multicast */
1990                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1991                 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1992                         networkType = WIRELESS_11B;
1993                 else
1994                         networkType = WIRELESS_11G;
1995                 raid = networktype_to_raid(networkType);
1996                 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1997                 break;
1998         default: /* for each sta in IBSS */
1999                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2000                 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
2001                 raid = networktype_to_raid(networkType);
2002                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2003
2004                 /* todo: support HT in IBSS */
2005                 break;
2006         }
2007
2008         rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level);
2009         DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
2010                 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
2011
2012         mask &= rate_bitmap;
2013
2014         init_rate = get_highest_rate_idx(mask)&0x3f;
2015
2016         ODM_RA_UpdateRateInfo_8188E(&haldata->odmpriv, mac_id,
2017                                     raid, mask, shortGIrate);
2018
2019         /* set ra_id */
2020         psta->raid = raid;
2021         psta->init_rate = init_rate;
2022 }
2023
2024 static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
2025 {
2026         u32 value32;
2027         struct mlme_ext_priv    *pmlmeext = &(adapt->mlmeextpriv);
2028         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
2029         u32 bcn_ctrl_reg                        = REG_BCN_CTRL;
2030         /* reset TSF, enable update TSF, correcting TSF On Beacon */
2031
2032         /* BCN interval */
2033         usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
2034         usb_write8(adapt, REG_ATIMWND, 0x02);/*  2ms */
2035
2036         _InitBeaconParameters(adapt);
2037
2038         usb_write8(adapt, REG_SLOT, 0x09);
2039
2040         value32 = usb_read32(adapt, REG_TCR);
2041         value32 &= ~TSFRST;
2042         usb_write32(adapt,  REG_TCR, value32);
2043
2044         value32 |= TSFRST;
2045         usb_write32(adapt, REG_TCR, value32);
2046
2047         /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
2048         usb_write8(adapt,  REG_RXTSF_OFFSET_CCK, 0x50);
2049         usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
2050
2051         _BeaconFunctionEnable(adapt, true, true);
2052
2053         ResumeTxBeacon(adapt);
2054
2055         usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1));
2056 }
2057
2058 static void rtl8188eu_init_default_value(struct adapter *adapt)
2059 {
2060         struct hal_data_8188e *haldata;
2061         struct pwrctrl_priv *pwrctrlpriv;
2062         u8 i;
2063
2064         haldata = GET_HAL_DATA(adapt);
2065         pwrctrlpriv = &adapt->pwrctrlpriv;
2066
2067         /* init default value */
2068         if (!pwrctrlpriv->bkeepfwalive)
2069                 haldata->LastHMEBoxNum = 0;
2070
2071         /* init dm default value */
2072         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
2073         haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
2074         haldata->pwrGroupCnt = 0;
2075         haldata->PGMaxGroup = 13;
2076         haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
2077         for (i = 0; i < HP_THERMAL_NUM; i++)
2078                 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2079 }
2080
2081 void rtl8188eu_set_hal_ops(struct adapter *adapt)
2082 {
2083         struct hal_ops  *halfunc = &adapt->HalFunc;
2084
2085
2086         adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL);
2087         if (adapt->HalData == NULL)
2088                 DBG_88E("cant not alloc memory for HAL DATA\n");
2089
2090         halfunc->hal_power_on = rtl8188eu_InitPowerOn;
2091         halfunc->hal_init = &rtl8188eu_hal_init;
2092         halfunc->hal_deinit = &rtl8188eu_hal_deinit;
2093
2094         halfunc->inirp_init = &rtl8188eu_inirp_init;
2095         halfunc->inirp_deinit = &rtl8188eu_inirp_deinit;
2096
2097         halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv;
2098
2099         halfunc->init_recv_priv = &rtl8188eu_init_recv_priv;
2100         halfunc->free_recv_priv = &rtl8188eu_free_recv_priv;
2101         halfunc->InitSwLeds = &rtl8188eu_InitSwLeds;
2102         halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds;
2103
2104         halfunc->init_default_value = &rtl8188eu_init_default_value;
2105         halfunc->intf_chip_configure = &rtl8188eu_interface_configure;
2106         halfunc->read_adapter_info = &_ReadAdapterInfo8188EU;
2107
2108         halfunc->SetHwRegHandler = &SetHwReg8188EU;
2109         halfunc->GetHwRegHandler = &GetHwReg8188EU;
2110         halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb;
2111
2112         halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb;
2113         halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb;
2114
2115         halfunc->hal_xmit = &rtl8188eu_hal_xmit;
2116         halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit;
2117
2118         rtl8188e_set_hal_ops(halfunc);
2119 }