1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
20 #define _HCI_HAL_INIT_C_
22 #include <osdep_service.h>
23 #include <drv_types.h>
24 #include <rtw_efuse.h>
26 #include <rtl8188e_hal.h>
27 #include <rtl8188e_led.h>
32 #define HAL_BB_ENABLE 1
34 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
36 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
40 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
41 haldata->OutEpNumber = 3;
44 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
45 haldata->OutEpNumber = 2;
48 haldata->OutEpQueueSel = TX_SELE_HQ;
49 haldata->OutEpNumber = 1;
54 DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
57 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
59 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
62 _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
64 /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
65 if (1 == haldata->OutEpNumber) {
70 /* All config other than above support one Bulk IN and one Interrupt IN. */
72 result = Hal_MappingOutPipe(adapt, NumOutPipe);
77 static void rtl8188eu_interface_configure(struct adapter *adapt)
79 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
80 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
82 if (pdvobjpriv->ishighspeed)
83 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
85 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
87 haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
89 haldata->UsbTxAggMode = 1;
90 haldata->UsbTxAggDescNum = 0x6; /* only 4 bits */
92 haldata->UsbRxAggMode = USB_RX_AGG_DMA;/* USB_RX_AGG_DMA; */
93 haldata->UsbRxAggBlockCount = 8; /* unit : 512b */
94 haldata->UsbRxAggBlockTimeout = 0x6;
95 haldata->UsbRxAggPageCount = 48; /* uint :128 b 0x0A; 10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
96 haldata->UsbRxAggPageTimeout = 0x4; /* 6, absolute time = 34ms/(2^6) */
98 HalUsbSetQueuePipeMapping8188EUsb(adapt,
99 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
102 static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
105 /* HW Power on sequence */
106 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
107 if (haldata->bMacPwrCtrlOn)
110 if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
111 PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,
112 Rtl8188E_NIC_PWR_ON_FLOW)) {
113 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
117 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
118 /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
119 usb_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
121 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
122 value16 = usb_read16(adapt, REG_CR);
123 value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
124 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
125 /* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
127 usb_write16(adapt, REG_CR, value16);
128 haldata->bMacPwrCtrlOn = true;
133 /* Shall USB interface init this? */
134 static void _InitInterrupt(struct adapter *Adapter)
138 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
140 /* HISR write one to clear */
141 usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
143 imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
144 usb_write32(Adapter, REG_HIMR_88E, imr);
145 haldata->IntrMask[0] = imr;
147 imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
148 usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
149 haldata->IntrMask[1] = imr_ex;
151 /* REG_USB_SPECIAL_OPTION - BIT(4) */
152 /* 0; Use interrupt endpoint to upload interrupt pkt */
153 /* 1; Use bulk endpoint to upload interrupt pkt, */
154 usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
156 if (!adapter_to_dvobj(Adapter)->ishighspeed)
157 usb_opt = usb_opt & (~INT_BULK_SEL);
159 usb_opt = usb_opt | (INT_BULK_SEL);
161 usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
164 static void _InitQueueReservedPage(struct adapter *Adapter)
166 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
167 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
174 bool bWiFiConfig = pregistrypriv->wifi_spec;
177 if (haldata->OutEpQueueSel & TX_SELE_HQ)
180 if (haldata->OutEpQueueSel & TX_SELE_LQ)
183 /* NOTE: This step shall be proceed before writting REG_RQPN. */
184 if (haldata->OutEpQueueSel & TX_SELE_NQ)
186 value8 = (u8)_NPQ(numNQ);
187 usb_write8(Adapter, REG_RQPN_NPQ, value8);
189 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
192 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
193 usb_write32(Adapter, REG_RQPN, value32);
195 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
196 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
197 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
201 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
203 usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
204 usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
205 usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
206 usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
207 usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
210 static void _InitPageBoundary(struct adapter *Adapter)
212 /* RX Page Boundary */
214 u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
216 usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
219 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
220 u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
223 u16 value16 = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
225 value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
226 _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
227 _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
229 usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
232 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
234 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
237 switch (haldata->OutEpQueueSel) {
245 value = QUEUE_NORMAL;
250 _InitNormalChipRegPriority(Adapter, value, value, value, value,
254 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
256 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
257 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
258 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
262 switch (haldata->OutEpQueueSel) {
263 case (TX_SELE_HQ | TX_SELE_LQ):
264 valueHi = QUEUE_HIGH;
265 valueLow = QUEUE_LOW;
267 case (TX_SELE_NQ | TX_SELE_LQ):
268 valueHi = QUEUE_NORMAL;
269 valueLow = QUEUE_LOW;
271 case (TX_SELE_HQ | TX_SELE_NQ):
272 valueHi = QUEUE_HIGH;
273 valueLow = QUEUE_NORMAL;
279 if (!pregistrypriv->wifi_spec) {
286 } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
294 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
297 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
299 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
300 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
302 if (!pregistrypriv->wifi_spec) {/* typical setting */
309 } else {/* for WMM */
317 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
320 static void _InitQueuePriority(struct adapter *Adapter)
322 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
324 switch (haldata->OutEpNumber) {
326 _InitNormalChipOneOutEpPriority(Adapter);
329 _InitNormalChipTwoOutEpPriority(Adapter);
332 _InitNormalChipThreeOutEpPriority(Adapter);
339 static void _InitNetworkType(struct adapter *Adapter)
343 value32 = usb_read32(Adapter, REG_CR);
344 /* TODO: use the other function to set network type */
345 value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
347 usb_write32(Adapter, REG_CR, value32);
350 static void _InitTransferPageSize(struct adapter *Adapter)
352 /* Tx page size is always 128. */
355 value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
356 usb_write8(Adapter, REG_PBP, value8);
359 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
361 usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
364 static void _InitWMACSetting(struct adapter *Adapter)
366 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
368 haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
369 RCR_CBSSID_DATA | RCR_CBSSID_BCN |
370 RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
371 RCR_APP_MIC | RCR_APP_PHYSTS;
373 /* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
374 usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
376 /* Accept all multicast address */
377 usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
378 usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
381 static void _InitAdaptiveCtrl(struct adapter *Adapter)
386 /* Response Rate Set */
387 value32 = usb_read32(Adapter, REG_RRSR);
388 value32 &= ~RATE_BITMAP_ALL;
389 value32 |= RATE_RRSR_CCK_ONLY_1M;
390 usb_write32(Adapter, REG_RRSR, value32);
392 /* CF-END Threshold */
394 /* SIFS (used in NAV) */
395 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
396 usb_write16(Adapter, REG_SPEC_SIFS, value16);
399 value16 = _LRL(0x30) | _SRL(0x30);
400 usb_write16(Adapter, REG_RL, value16);
403 static void _InitEDCA(struct adapter *Adapter)
405 /* Set Spec SIFS (used in NAV) */
406 usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
407 usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
409 /* Set SIFS for CCK */
410 usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
412 /* Set SIFS for OFDM */
413 usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
416 usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
417 usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
418 usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
419 usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
422 static void _InitRDGSetting(struct adapter *Adapter)
424 usb_write8(Adapter, REG_RD_CTRL, 0xFF);
425 usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
426 usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
429 static void _InitRxSetting(struct adapter *Adapter)
431 usb_write32(Adapter, REG_MACID, 0x87654321);
432 usb_write32(Adapter, 0x0700, 0x87654321);
435 static void _InitRetryFunction(struct adapter *Adapter)
439 value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
440 value8 |= EN_AMPDU_RTY_NEW;
441 usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
443 /* Set ACK timeout */
444 usb_write8(Adapter, REG_ACKTO, 0x40);
447 /*-----------------------------------------------------------------------------
448 * Function: usb_AggSettingTxUpdate()
450 * Overview: Separate TX/RX parameters update independent for TP detection and
451 * dynamic TX/RX aggreagtion parameters update.
453 * Input: struct adapter *
455 * Output/Return: NONE
459 * 12/10/2010 MHC Separate to smaller function.
461 *---------------------------------------------------------------------------*/
462 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
464 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
467 if (Adapter->registrypriv.wifi_spec)
468 haldata->UsbTxAggMode = false;
470 if (haldata->UsbTxAggMode) {
471 value32 = usb_read32(Adapter, REG_TDECTRL);
472 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
473 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
475 usb_write32(Adapter, REG_TDECTRL, value32);
477 } /* usb_AggSettingTxUpdate */
479 /*-----------------------------------------------------------------------------
480 * Function: usb_AggSettingRxUpdate()
482 * Overview: Separate TX/RX parameters update independent for TP detection and
483 * dynamic TX/RX aggreagtion parameters update.
485 * Input: struct adapter *
487 * Output/Return: NONE
491 * 12/10/2010 MHC Separate to smaller function.
493 *---------------------------------------------------------------------------*/
495 usb_AggSettingRxUpdate(
496 struct adapter *Adapter
499 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
503 valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
504 valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
506 switch (haldata->UsbRxAggMode) {
508 valueDMA |= RXDMA_AGG_EN;
509 valueUSB &= ~USB_AGG_EN;
512 valueDMA &= ~RXDMA_AGG_EN;
513 valueUSB |= USB_AGG_EN;
516 valueDMA |= RXDMA_AGG_EN;
517 valueUSB |= USB_AGG_EN;
519 case USB_RX_AGG_DISABLE:
521 valueDMA &= ~RXDMA_AGG_EN;
522 valueUSB &= ~USB_AGG_EN;
526 usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
527 usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
529 switch (haldata->UsbRxAggMode) {
531 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
532 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
535 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
536 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
539 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
540 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
541 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
542 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
544 case USB_RX_AGG_DISABLE:
552 haldata->HwRxPageSize = 128;
555 haldata->HwRxPageSize = 64;
558 haldata->HwRxPageSize = 256;
561 haldata->HwRxPageSize = 512;
564 haldata->HwRxPageSize = 1024;
569 } /* usb_AggSettingRxUpdate */
571 static void InitUsbAggregationSetting(struct adapter *Adapter)
573 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
575 /* Tx aggregation setting */
576 usb_AggSettingTxUpdate(Adapter);
578 /* Rx aggregation setting */
579 usb_AggSettingRxUpdate(Adapter);
581 /* 201/12/10 MH Add for USB agg mode dynamic switch. */
582 haldata->UsbRxHighSpeedMode = false;
585 static void _InitBeaconParameters(struct adapter *Adapter)
587 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
589 usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
591 /* TODO: Remove these magic number */
592 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */
593 usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/* 5ms */
594 usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /* 2ms */
596 /* Suggested by designer timchen. Change beacon AIFS to the largest number */
597 /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
598 usb_write16(Adapter, REG_BCNTCFG, 0x660F);
600 haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
601 haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
602 haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
603 haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
604 haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
607 static void _BeaconFunctionEnable(struct adapter *Adapter,
608 bool Enable, bool Linked)
610 usb_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
612 usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
615 /* Set CCK and OFDM Block "ON" */
616 static void _BBTurnOnBlock(struct adapter *Adapter)
618 phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
619 phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
627 static void _InitAntenna_Selection(struct adapter *Adapter)
629 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
631 if (haldata->AntDivCfg == 0)
633 DBG_88E("==> %s ....\n", __func__);
635 usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0)|BIT23);
636 phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
638 if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
639 haldata->CurAntenna = Antenna_A;
641 haldata->CurAntenna = Antenna_B;
642 DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
645 /*-----------------------------------------------------------------------------
646 * Function: HwSuspendModeEnable92Cu()
648 * Overview: HW suspend mode switch.
658 * 08/23/2010 MHC HW suspend mode switch test..
659 *---------------------------------------------------------------------------*/
660 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
663 enum rt_rf_power_state rfpowerstate = rf_off;
665 if (adapt->pwrctrlpriv.bHWPowerdown) {
666 val8 = usb_read8(adapt, REG_HSISR);
667 DBG_88E("pwrdown, 0x5c(BIT7)=%02x\n", val8);
668 rfpowerstate = (val8 & BIT7) ? rf_off : rf_on;
669 } else { /* rf on/off */
670 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3));
671 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
672 DBG_88E("GPIO_IN=%02x\n", val8);
673 rfpowerstate = (val8 & BIT3) ? rf_on : rf_off;
676 } /* HalDetectPwrDownMode */
678 static u32 rtl8188eu_hal_init(struct adapter *Adapter)
683 u32 status = _SUCCESS;
684 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
685 struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
686 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
687 u32 init_start_time = jiffies;
689 #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
692 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
694 if (Adapter->pwrctrlpriv.bkeepfwalive) {
696 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
697 rtl88eu_phy_iq_calibrate(Adapter, true);
699 rtl88eu_phy_iq_calibrate(Adapter, false);
700 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
703 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
704 rtl88eu_phy_lc_calibrate(Adapter);
709 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
710 status = rtl8188eu_InitPowerOn(Adapter);
711 if (status == _FAIL) {
712 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
716 /* Save target channel */
717 haldata->CurrentChannel = 6;/* default set to 6 */
719 if (pwrctrlpriv->reg_rfoff) {
720 pwrctrlpriv->rf_pwrstate = rf_off;
723 /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
724 /* HW GPIO pin. Before PHY_RFConfig8192C. */
725 /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
727 if (!pregistrypriv->wifi_spec) {
728 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
731 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
734 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
735 _InitQueueReservedPage(Adapter);
736 _InitQueuePriority(Adapter);
737 _InitPageBoundary(Adapter);
738 _InitTransferPageSize(Adapter);
740 _InitTxBufferBoundary(Adapter, 0);
742 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
743 if (Adapter->registrypriv.mp_mode == 1) {
744 _InitRxSetting(Adapter);
745 Adapter->bFWReady = false;
746 haldata->fw_ractrl = false;
748 status = rtl88eu_download_fw(Adapter);
751 DBG_88E("%s: Download Firmware failed!!\n", __func__);
752 Adapter->bFWReady = false;
753 haldata->fw_ractrl = false;
756 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
757 Adapter->bFWReady = true;
758 haldata->fw_ractrl = false;
761 rtl8188e_InitializeFirmwareVars(Adapter);
763 rtl88eu_phy_mac_config(Adapter);
765 rtl88eu_phy_bb_config(Adapter);
767 rtl88eu_phy_rf_config(Adapter);
769 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
770 status = rtl8188e_iol_efuse_patch(Adapter);
771 if (status == _FAIL) {
772 DBG_88E("%s rtl8188e_iol_efuse_patch failed\n", __func__);
776 _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
778 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
779 status = InitLLTTable(Adapter, txpktbuf_bndy);
780 if (status == _FAIL) {
781 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
785 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
786 /* Get Rx PHY status in order to report RSSI and others. */
787 _InitDriverInfoSize(Adapter, DRVINFO_SZ);
789 _InitInterrupt(Adapter);
790 hal_init_macaddr(Adapter);/* set mac_address */
791 _InitNetworkType(Adapter);/* set msr */
792 _InitWMACSetting(Adapter);
793 _InitAdaptiveCtrl(Adapter);
795 _InitRetryFunction(Adapter);
796 InitUsbAggregationSetting(Adapter);
797 _InitBeaconParameters(Adapter);
798 /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
799 /* Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
800 /* Enable MACTXEN/MACRXEN block */
801 value16 = usb_read16(Adapter, REG_CR);
802 value16 |= (MACTXEN | MACRXEN);
803 usb_write8(Adapter, REG_CR, value16);
805 if (haldata->bRDGEnable)
806 _InitRDGSetting(Adapter);
808 /* Enable TX Report */
809 /* Enable Tx Report Timer */
810 value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
811 usb_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0));
812 /* Set MAX RPT MACID */
813 usb_write8(Adapter, REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
814 /* Tx RPT Timer. Unit: 32us */
815 usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
817 usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
819 usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
820 usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
822 /* Keep RfRegChnlVal for later use. */
823 haldata->RfRegChnlVal[0] = phy_query_rf_reg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
824 haldata->RfRegChnlVal[1] = phy_query_rf_reg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
826 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
827 _BBTurnOnBlock(Adapter);
829 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
830 invalidate_cam_all(Adapter);
832 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
833 /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */
834 phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
836 /* Move by Neo for USB SS to below setp */
837 /* _RfPowerSave(Adapter); */
839 _InitAntenna_Selection(Adapter);
842 /* Disable BAR, suggested by Scott */
843 /* 2010.04.09 add by hpfan */
845 usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
848 /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
849 usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
851 if (pregistrypriv->wifi_spec)
852 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
854 /* Nav limit , suggest by scott */
855 usb_write8(Adapter, 0x652, 0x0);
857 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
858 rtl8188e_InitHalDm(Adapter);
860 /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
861 /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
862 /* call initstruct adapter. May cause some problem?? */
863 /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
864 /* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
865 /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
866 /* Added by tynli. 2010.03.30. */
867 pwrctrlpriv->rf_pwrstate = rf_on;
869 /* enable Tx report. */
870 usb_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F);
872 /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
873 usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
875 /* tynli_test_tx_report. */
876 usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
878 /* enable tx DMA to drop the redundate data of packet */
879 usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
881 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
882 /* 2010/08/26 MH Merge from 8192CE. */
883 if (pwrctrlpriv->rf_pwrstate == rf_on) {
884 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
885 rtl88eu_phy_iq_calibrate(Adapter, true);
887 rtl88eu_phy_iq_calibrate(Adapter, false);
888 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
891 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
893 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
895 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
896 rtl88eu_phy_lc_calibrate(Adapter);
899 /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
900 /* _InitPABias(Adapter); */
901 usb_write8(Adapter, REG_USB_HRPWM, 0);
903 /* ack for xmit mgmt frames. */
904 usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
907 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
909 DBG_88E("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time));
915 static void CardDisableRTL8188EU(struct adapter *Adapter)
918 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
920 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
922 /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
923 val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
924 usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1));
927 usb_write8(Adapter, REG_CR, 0x0);
929 /* Run LPS WL RFOFF flow */
930 rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
931 PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,
932 Rtl8188E_NIC_LPS_ENTER_FLOW);
934 /* 2. 0x1F[7:0] = 0 turn off RF */
936 val8 = usb_read8(Adapter, REG_MCUFWDL);
937 if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
938 /* Reset MCU 0x2[10]=0. */
939 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
940 val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */
941 usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
944 /* reset MCU ready status */
945 usb_write8(Adapter, REG_MCUFWDL, 0);
949 val8 = usb_read8(Adapter, REG_32K_CTRL);
950 usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT0));
952 /* Card disable power action flow */
953 rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
954 PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,
955 Rtl8188E_NIC_DISABLE_FLOW);
957 /* Reset MCU IO Wrapper */
958 val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
959 usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3)));
960 val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
961 usb_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3);
963 /* YJ,test add, 111207. For Power Consumption. */
964 val8 = usb_read8(Adapter, GPIO_IN);
965 usb_write8(Adapter, GPIO_OUT, val8);
966 usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
968 val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
969 usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
970 val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
971 usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
972 usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
973 haldata->bMacPwrCtrlOn = false;
974 Adapter->bFWReady = false;
976 static void rtl8192cu_hw_power_down(struct adapter *adapt)
978 /* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
979 /* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
981 /* Enable register area 0x0-0xc. */
982 usb_write8(adapt, REG_RSV_CTRL, 0x0);
983 usb_write16(adapt, REG_APS_FSMCO, 0x8812);
986 static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
989 DBG_88E("==> %s\n", __func__);
991 usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
992 usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
994 DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
995 if (Adapter->pwrctrlpriv.bkeepfwalive) {
996 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
997 rtl8192cu_hw_power_down(Adapter);
999 if (Adapter->hw_init_completed) {
1000 CardDisableRTL8188EU(Adapter);
1002 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
1003 rtl8192cu_hw_power_down(Adapter);
1009 static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
1012 struct recv_buf *precvbuf;
1014 struct recv_priv *precvpriv = &(Adapter->recvpriv);
1018 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
1019 ("===> usb_inirp_init\n"));
1021 precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
1023 /* issue Rx irp to receive data */
1024 precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1025 for (i = 0; i < NR_RECVBUFF; i++) {
1026 if (usb_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
1027 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
1033 precvpriv->free_recv_buf_queue_cnt--;
1038 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
1044 static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter)
1046 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n ===> usb_rx_deinit\n"));
1048 usb_read_port_cancel(Adapter);
1050 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n <=== usb_rx_deinit\n"));
1057 /* EEPROM/EFUSE Content Parsing */
1060 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1062 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1064 if (!AutoLoadFail) {
1066 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1067 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1069 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1070 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1071 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1073 haldata->EEPROMVID = EEPROM_Default_VID;
1074 haldata->EEPROMPID = EEPROM_Default_PID;
1076 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1077 haldata->EEPROMCustomerID = EEPROM_Default_CustomerID;
1078 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1081 DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1082 DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1085 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1088 u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1089 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1092 for (i = 0; i < 6; i++)
1093 eeprom->mac_addr[i] = sMacAddr[i];
1095 /* Read Permanent MAC address */
1096 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1098 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1099 ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
1104 readAdapterInfo_8188EU(
1105 struct adapter *adapt
1108 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1110 /* parse the eeprom/efuse content */
1111 Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1112 Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1113 Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1115 Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1116 Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1117 Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1118 rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1119 Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1120 Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1121 Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1122 Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1123 Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1127 static void _ReadPROMContent(
1128 struct adapter *Adapter
1131 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1134 /* check system boot selection */
1135 eeValue = usb_read8(Adapter, REG_9346CR);
1136 eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1137 eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
1139 DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1140 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1142 Hal_InitPGData88E(Adapter);
1143 readAdapterInfo_8188EU(Adapter);
1146 static void _ReadRFType(struct adapter *Adapter)
1148 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1150 haldata->rf_chip = RF_6052;
1153 static void _ReadAdapterInfo8188EU(struct adapter *Adapter)
1155 u32 start = jiffies;
1157 MSG_88E("====> %s\n", __func__);
1159 _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
1160 _ReadPROMContent(Adapter);
1162 MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
1165 #define GPIO_DEBUG_PORT_NUM 0
1166 static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1170 static void ResumeTxBeacon(struct adapter *adapt)
1172 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1174 /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1175 /* which should be read from register to a global variable. */
1177 usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT6);
1178 haldata->RegFwHwTxQCtrl |= BIT6;
1179 usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1180 haldata->RegReg542 |= BIT0;
1181 usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1184 static void StopTxBeacon(struct adapter *adapt)
1186 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1188 /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1189 /* which should be read from register to a global variable. */
1191 usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT6));
1192 haldata->RegFwHwTxQCtrl &= (~BIT6);
1193 usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1194 haldata->RegReg542 &= ~(BIT0);
1195 usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1197 /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */
1200 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1203 u8 mode = *((u8 *)val);
1205 /* disable Port0 TSF update */
1206 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1209 val8 = usb_read8(Adapter, MSR)&0x0c;
1211 usb_write8(Adapter, MSR, val8);
1213 DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1215 if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1216 StopTxBeacon(Adapter);
1218 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1219 } else if ((mode == _HW_STATE_ADHOC_)) {
1220 ResumeTxBeacon(Adapter);
1221 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1222 } else if (mode == _HW_STATE_AP_) {
1223 ResumeTxBeacon(Adapter);
1225 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1228 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1229 /* enable to rx data frame */
1230 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1231 /* enable to rx ps-poll */
1232 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1234 /* Beacon Control related register for first time */
1235 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */
1237 usb_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */
1238 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1239 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1240 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
1243 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1245 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1246 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1248 /* enable BCN0 Function for if1 */
1249 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1250 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1252 /* dis BCN1 ATIM WND if if2 is station */
1253 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1257 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1262 reg_macid = REG_MACID;
1264 for (idx = 0; idx < 6; idx++)
1265 usb_write8(Adapter, (reg_macid+idx), val[idx]);
1268 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1273 reg_bssid = REG_BSSID;
1275 for (idx = 0; idx < 6; idx++)
1276 usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1279 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1283 bcn_ctrl_reg = REG_BCN_CTRL;
1286 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1288 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1291 static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1293 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1294 struct dm_priv *pdmpriv = &haldata->dmpriv;
1295 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1298 case HW_VAR_MEDIA_STATUS:
1302 val8 = usb_read8(Adapter, MSR)&0x0c;
1303 val8 |= *((u8 *)val);
1304 usb_write8(Adapter, MSR, val8);
1307 case HW_VAR_MEDIA_STATUS1:
1311 val8 = usb_read8(Adapter, MSR) & 0x03;
1312 val8 |= *((u8 *)val) << 2;
1313 usb_write8(Adapter, MSR, val8);
1316 case HW_VAR_SET_OPMODE:
1317 hw_var_set_opmode(Adapter, variable, val);
1319 case HW_VAR_MAC_ADDR:
1320 hw_var_set_macaddr(Adapter, variable, val);
1323 hw_var_set_bssid(Adapter, variable, val);
1325 case HW_VAR_BASIC_RATE:
1330 /* 2007.01.16, by Emily */
1331 /* Select RRSR (in Legacy-OFDM and CCK) */
1332 /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1333 /* We do not use other rates. */
1334 HalSetBrateCfg(Adapter, val, &BrateCfg);
1335 DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1337 /* 2011.03.30 add by Luke Lee */
1338 /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1339 /* because CCK 2M has poor TXEVM */
1340 /* CCK 5.5M & 11M ACK should be enabled for better performance */
1342 BrateCfg = (BrateCfg | 0xd) & 0x15d;
1343 haldata->BasicRateSet = BrateCfg;
1345 BrateCfg |= 0x01; /* default enable 1M ACK rate */
1346 /* Set RRSR rate table. */
1347 usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1348 usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1349 usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1351 /* Set RTS initial rate */
1352 while (BrateCfg > 0x1) {
1357 usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1360 case HW_VAR_TXPAUSE:
1361 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1363 case HW_VAR_BCN_FUNC:
1364 hw_var_set_bcn_func(Adapter, variable, val);
1366 case HW_VAR_CORRECT_TSF:
1369 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1370 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1372 tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */
1374 if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1375 StopTxBeacon(Adapter);
1377 /* disable related TSF function */
1378 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1380 usb_write32(Adapter, REG_TSFTR, tsf);
1381 usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1383 /* enable related TSF function */
1384 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(3));
1386 if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1387 ResumeTxBeacon(Adapter);
1390 case HW_VAR_CHECK_BSSID:
1392 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1396 val32 = usb_read32(Adapter, REG_RCR);
1398 val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1400 usb_write32(Adapter, REG_RCR, val32);
1403 case HW_VAR_MLME_DISCONNECT:
1404 /* Set RCR to not to receive data frame when NO LINK state */
1405 /* reject all data frames */
1406 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1409 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
1411 /* disable update TSF */
1412 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1414 case HW_VAR_MLME_SITESURVEY:
1415 if (*((u8 *)val)) { /* under sitesurvey */
1416 /* config RCR to receive different BSSID & not to receive data frame */
1417 u32 v = usb_read32(Adapter, REG_RCR);
1418 v &= ~(RCR_CBSSID_BCN);
1419 usb_write32(Adapter, REG_RCR, v);
1420 /* reject all data frame */
1421 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1423 /* disable update TSF */
1424 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1425 } else { /* sitesurvey done */
1426 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1427 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1429 if ((is_client_associated_to_ap(Adapter)) ||
1430 ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1431 /* enable to rx data frame */
1432 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1434 /* enable update TSF */
1435 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1436 } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1437 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1438 /* enable update TSF */
1439 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1441 if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1442 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1444 if (Adapter->in_cta_test) {
1445 u32 v = usb_read32(Adapter, REG_RCR);
1446 v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
1447 usb_write32(Adapter, REG_RCR, v);
1449 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1454 case HW_VAR_MLME_JOIN:
1456 u8 RetryLimit = 0x30;
1457 u8 type = *((u8 *)val);
1458 struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1460 if (type == 0) { /* prepare to join */
1461 /* enable to rx data frame.Accept all data frame */
1462 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1464 if (Adapter->in_cta_test) {
1465 u32 v = usb_read32(Adapter, REG_RCR);
1466 v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
1467 usb_write32(Adapter, REG_RCR, v);
1469 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1472 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1473 RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1474 else /* Ad-hoc Mode */
1476 } else if (type == 1) {
1477 /* joinbss_event call back when join res < 0 */
1478 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1479 } else if (type == 2) {
1480 /* sta add event call back */
1481 /* enable update TSF */
1482 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1484 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1487 usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1490 case HW_VAR_BEACON_INTERVAL:
1491 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1493 case HW_VAR_SLOT_TIME:
1495 u8 u1bAIFS, aSifsTime;
1496 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1497 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1499 usb_write8(Adapter, REG_SLOT, val[0]);
1501 if (pmlmeinfo->WMM_enable == 0) {
1502 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1507 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1509 /* <Roger_EXP> Temporary removed, 2008.06.20. */
1510 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1511 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1512 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1513 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1517 case HW_VAR_RESP_SIFS:
1518 /* RESP_SIFS for CCK */
1519 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /* SIFS_T2T_CCK (0x08) */
1520 usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
1521 /* RESP_SIFS for OFDM */
1522 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1523 usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1525 case HW_VAR_ACK_PREAMBLE:
1528 u8 bShortPreamble = *((bool *)val);
1529 /* Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1530 regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1534 usb_write8(Adapter, REG_RRSR+2, regTmp);
1537 case HW_VAR_SEC_CFG:
1538 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1540 case HW_VAR_DM_FLAG:
1541 podmpriv->SupportAbility = *((u8 *)val);
1543 case HW_VAR_DM_FUNC_OP:
1545 podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1547 podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1549 case HW_VAR_DM_FUNC_SET:
1550 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1551 pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1552 podmpriv->SupportAbility = pdmpriv->InitODMFlag;
1554 podmpriv->SupportAbility |= *((u32 *)val);
1557 case HW_VAR_DM_FUNC_CLR:
1558 podmpriv->SupportAbility &= *((u32 *)val);
1560 case HW_VAR_CAM_EMPTY_ENTRY:
1562 u8 ucIndex = *((u8 *)val);
1566 u32 ulEncAlgo = CAM_AES;
1568 for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1569 /* filled id in CAM config 2 byte */
1571 ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1574 /* polling bit, and No Write enable, and address */
1575 ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1576 ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1577 /* write content 0 is equall to mark invalid */
1578 usb_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */
1579 usb_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */
1583 case HW_VAR_CAM_INVALID_ALL:
1584 usb_write32(Adapter, RWCAM, BIT(31)|BIT(30));
1586 case HW_VAR_CAM_WRITE:
1589 u32 *cam_val = (u32 *)val;
1590 usb_write32(Adapter, WCAMI, cam_val[0]);
1592 cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1593 usb_write32(Adapter, RWCAM, cmd);
1596 case HW_VAR_AC_PARAM_VO:
1597 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1599 case HW_VAR_AC_PARAM_VI:
1600 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1602 case HW_VAR_AC_PARAM_BE:
1603 haldata->AcParam_BE = ((u32 *)(val))[0];
1604 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1606 case HW_VAR_AC_PARAM_BK:
1607 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1609 case HW_VAR_ACM_CTRL:
1611 u8 acm_ctrl = *((u8 *)val);
1612 u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1615 AcmCtrl = AcmCtrl | 0x1;
1617 if (acm_ctrl & BIT(3))
1618 AcmCtrl |= AcmHw_VoqEn;
1620 AcmCtrl &= (~AcmHw_VoqEn);
1622 if (acm_ctrl & BIT(2))
1623 AcmCtrl |= AcmHw_ViqEn;
1625 AcmCtrl &= (~AcmHw_ViqEn);
1627 if (acm_ctrl & BIT(1))
1628 AcmCtrl |= AcmHw_BeqEn;
1630 AcmCtrl &= (~AcmHw_BeqEn);
1632 DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1633 usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1636 case HW_VAR_AMPDU_MIN_SPACE:
1641 MinSpacingToSet = *((u8 *)val);
1642 if (MinSpacingToSet <= 7) {
1643 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1658 if (MinSpacingToSet < SecMinSpace)
1659 MinSpacingToSet = SecMinSpace;
1660 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1664 case HW_VAR_AMPDU_FACTOR:
1666 u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1671 pRegToSet = RegToSet_Normal; /* 0xb972a841; */
1672 FactorToSet = *((u8 *)val);
1673 if (FactorToSet <= 3) {
1674 FactorToSet = 1 << (FactorToSet + 2);
1675 if (FactorToSet > 0xf)
1678 for (index = 0; index < 4; index++) {
1679 if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1680 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1682 if ((pRegToSet[index] & 0x0f) > FactorToSet)
1683 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1685 usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1690 case HW_VAR_RXDMA_AGG_PG_TH:
1692 u8 threshold = *((u8 *)val);
1694 threshold = haldata->UsbRxAggPageCount;
1695 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1698 case HW_VAR_SET_RPWM:
1700 case HW_VAR_H2C_FW_PWRMODE:
1702 u8 psmode = (*(u8 *)val);
1704 /* Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1705 /* saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1706 if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(haldata->VersionID)))
1707 ODM_RF_Saving(podmpriv, true);
1708 rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1711 case HW_VAR_H2C_FW_JOINBSSRPT:
1713 u8 mstatus = (*(u8 *)val);
1714 rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1717 case HW_VAR_INITIAL_GAIN:
1719 struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1720 u32 rx_gain = ((u32 *)(val))[0];
1722 if (rx_gain == 0xff) {/* restore rx gain */
1723 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1725 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1726 ODM_Write_DIG(podmpriv, rx_gain);
1730 case HW_VAR_TRIGGER_GPIO_0:
1731 rtl8192cu_trigger_gpio_0(Adapter);
1733 case HW_VAR_RPT_TIMER_SETTING:
1735 u16 min_rpt_time = (*(u16 *)val);
1736 ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1739 case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1741 u8 Optimum_antenna = (*(u8 *)val);
1743 /* switch antenna to Optimum_antenna */
1744 if (haldata->CurAntenna != Optimum_antenna) {
1745 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1746 rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1748 haldata->CurAntenna = Optimum_antenna;
1752 case HW_VAR_EFUSE_BYTES: /* To set EFUE total used bytes, added by Roger, 2008.12.22. */
1753 haldata->EfuseUsedBytes = *((u16 *)val);
1755 case HW_VAR_FIFO_CLEARN_UP:
1757 struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1761 usb_write8(Adapter, REG_TXPAUSE, 0xff);
1764 Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1766 if (!pwrpriv->bkeepfwalive) {
1768 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1770 if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1774 DBG_88E("Stop RX DMA failed......\n");
1777 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1778 usb_write32(Adapter, REG_RQPN, 0x80000000);
1783 case HW_VAR_CHECK_TXBUF:
1785 case HW_VAR_APFM_ON_MAC:
1786 haldata->bMacPwrCtrlOn = *val;
1787 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1789 case HW_VAR_TX_RPT_MAX_MACID:
1792 DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1793 usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1796 case HW_VAR_H2C_MEDIA_STATUS_RPT:
1797 rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(__le16 *)val));
1799 case HW_VAR_BCN_VALID:
1800 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1801 usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT0);
1808 static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1810 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1811 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1814 case HW_VAR_BASIC_RATE:
1815 *((u16 *)(val)) = haldata->BasicRateSet;
1816 case HW_VAR_TXPAUSE:
1817 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1819 case HW_VAR_BCN_VALID:
1820 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1821 val[0] = (BIT0 & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1823 case HW_VAR_DM_FLAG:
1824 val[0] = podmpriv->SupportAbility;
1826 case HW_VAR_RF_TYPE:
1827 val[0] = haldata->rf_type;
1829 case HW_VAR_FWLPS_RF_ON:
1831 /* When we halt NIC, we should check if FW LPS is leave. */
1832 if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1833 /* If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1834 /* because Fw is unload. */
1838 valRCR = usb_read32(Adapter, REG_RCR);
1839 valRCR &= 0x00070000;
1847 case HW_VAR_CURRENT_ANTENNA:
1848 val[0] = haldata->CurAntenna;
1850 case HW_VAR_EFUSE_BYTES: /* To get EFUE total used bytes, added by Roger, 2008.12.22. */
1851 *((u16 *)(val)) = haldata->EfuseUsedBytes;
1853 case HW_VAR_APFM_ON_MAC:
1854 *val = haldata->bMacPwrCtrlOn;
1856 case HW_VAR_CHK_HI_QUEUE_EMPTY:
1857 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1867 /* Query setting of specified variable. */
1870 GetHalDefVar8188EUsb(
1871 struct adapter *Adapter,
1872 enum hal_def_variable eVariable,
1876 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1877 u8 bResult = _SUCCESS;
1879 switch (eVariable) {
1880 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1882 struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1883 struct sta_priv *pstapriv = &Adapter->stapriv;
1884 struct sta_info *psta;
1885 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1887 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1890 case HAL_DEF_IS_SUPPORT_ANT_DIV:
1891 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1893 case HAL_DEF_CURRENT_ANTENNA:
1894 *((u8 *)pValue) = haldata->CurAntenna;
1896 case HAL_DEF_DRVINFO_SZ:
1897 *((u32 *)pValue) = DRVINFO_SZ;
1899 case HAL_DEF_MAX_RECVBUF_SZ:
1900 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1902 case HAL_DEF_RX_PACKET_OFFSET:
1903 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1905 case HAL_DEF_DBG_DM_FUNC:
1906 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1908 case HAL_DEF_RA_DECISION_RATE:
1910 u8 MacID = *((u8 *)pValue);
1911 *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&(haldata->odmpriv), MacID);
1914 case HAL_DEF_RA_SGI:
1916 u8 MacID = *((u8 *)pValue);
1917 *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&(haldata->odmpriv), MacID);
1920 case HAL_DEF_PT_PWR_STATUS:
1922 u8 MacID = *((u8 *)pValue);
1923 *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(haldata->odmpriv), MacID);
1926 case HW_VAR_MAX_RX_AMPDU_FACTOR:
1927 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1929 case HW_DEF_RA_INFO_DUMP:
1931 u8 entry_id = *((u8 *)pValue);
1932 if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1933 DBG_88E("============ RA status check ===================\n");
1934 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1936 haldata->odmpriv.RAInfo[entry_id].RateID,
1937 haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1938 haldata->odmpriv.RAInfo[entry_id].RateSGI,
1939 haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1940 haldata->odmpriv.RAInfo[entry_id].PTStage);
1944 case HW_DEF_ODM_DBG_FLAG:
1946 struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
1947 pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1950 case HAL_DEF_DBG_DUMP_RXPKT:
1951 *((u8 *)pValue) = haldata->bDumpRxPkt;
1953 case HAL_DEF_DBG_DUMP_TXPKT:
1954 *((u8 *)pValue) = haldata->bDumpTxPkt;
1966 /* Change default setting of specified variable. */
1968 static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
1970 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1971 u8 bResult = _SUCCESS;
1973 switch (eVariable) {
1974 case HAL_DEF_DBG_DM_FUNC:
1976 u8 dm_func = *((u8 *)pValue);
1977 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1979 if (dm_func == 0) { /* disable all dynamic func */
1980 podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE;
1981 DBG_88E("==> Disable all dynamic function...\n");
1982 } else if (dm_func == 1) {/* disable DIG */
1983 podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG);
1984 DBG_88E("==> Disable DIG...\n");
1985 } else if (dm_func == 2) {/* disable High power */
1986 podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
1987 } else if (dm_func == 3) {/* disable tx power tracking */
1988 podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION);
1989 DBG_88E("==> Disable tx power tracking...\n");
1990 } else if (dm_func == 5) {/* disable antenna diversity */
1991 podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV);
1992 } else if (dm_func == 6) {/* turn on all dynamic func */
1993 if (!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) {
1994 struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1995 pDigTable->CurIGValue = usb_read8(Adapter, 0xc50);
1997 podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
1998 DBG_88E("==> Turn on all dynamic function...\n");
2002 case HAL_DEF_DBG_DUMP_RXPKT:
2003 haldata->bDumpRxPkt = *((u8 *)pValue);
2005 case HAL_DEF_DBG_DUMP_TXPKT:
2006 haldata->bDumpTxPkt = *((u8 *)pValue);
2008 case HW_DEF_FA_CNT_DUMP:
2010 u8 bRSSIDump = *((u8 *)pValue);
2011 struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
2013 dm_ocm->DebugComponents = ODM_COMP_DIG|ODM_COMP_FA_CNT;
2015 dm_ocm->DebugComponents = 0;
2018 case HW_DEF_ODM_DBG_FLAG:
2020 u64 DebugComponents = *((u64 *)pValue);
2021 struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
2022 dm_ocm->DebugComponents = DebugComponents;
2033 static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
2036 u8 networkType, raid;
2037 u32 mask, rate_bitmap;
2038 u8 shortGIrate = false;
2039 int supportRateNum = 0;
2040 struct sta_info *psta;
2041 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
2042 struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
2043 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2044 struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network);
2046 if (mac_id >= NUM_STA) /* CAM_SIZE */
2048 psta = pmlmeinfo->FW_sta_info[mac_id].psta;
2052 case 0:/* for infra mode */
2053 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
2054 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
2055 raid = networktype_to_raid(networkType);
2056 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2057 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&(pmlmeinfo->HT_caps)) : 0;
2058 if (support_short_GI(adapt, &(pmlmeinfo->HT_caps)))
2061 case 1:/* for broadcast/multicast */
2062 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2063 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
2064 networkType = WIRELESS_11B;
2066 networkType = WIRELESS_11G;
2067 raid = networktype_to_raid(networkType);
2068 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
2070 default: /* for each sta in IBSS */
2071 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2072 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
2073 raid = networktype_to_raid(networkType);
2074 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2076 /* todo: support HT in IBSS */
2080 rate_bitmap = 0x0fffffff;
2081 rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level);
2082 DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
2083 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
2085 mask &= rate_bitmap;
2087 init_rate = get_highest_rate_idx(mask)&0x3f;
2089 if (haldata->fw_ractrl) {
2092 arg = mac_id & 0x1f;/* MACID */
2096 mask |= ((raid << 28) & 0xf0000000);
2097 DBG_88E("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
2098 psta->ra_mask = mask;
2099 mask |= ((raid << 28) & 0xf0000000);
2101 /* to do ,for 8188E-SMIC */
2102 rtl8188e_set_raid_cmd(adapt, mask);
2104 ODM_RA_UpdateRateInfo_8188E(&(haldata->odmpriv),
2113 psta->init_rate = init_rate;
2116 static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
2119 struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
2120 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2121 u32 bcn_ctrl_reg = REG_BCN_CTRL;
2122 /* reset TSF, enable update TSF, correcting TSF On Beacon */
2125 usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
2126 usb_write8(adapt, REG_ATIMWND, 0x02);/* 2ms */
2128 _InitBeaconParameters(adapt);
2130 usb_write8(adapt, REG_SLOT, 0x09);
2132 value32 = usb_read32(adapt, REG_TCR);
2134 usb_write32(adapt, REG_TCR, value32);
2137 usb_write32(adapt, REG_TCR, value32);
2139 /* NOTE: Fix test chip's bug (about contention windows's randomness) */
2140 usb_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50);
2141 usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
2143 _BeaconFunctionEnable(adapt, true, true);
2145 ResumeTxBeacon(adapt);
2147 usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg)|BIT(1));
2150 static void rtl8188eu_init_default_value(struct adapter *adapt)
2152 struct hal_data_8188e *haldata;
2153 struct pwrctrl_priv *pwrctrlpriv;
2156 haldata = GET_HAL_DATA(adapt);
2157 pwrctrlpriv = &adapt->pwrctrlpriv;
2159 /* init default value */
2160 haldata->fw_ractrl = false;
2161 if (!pwrctrlpriv->bkeepfwalive)
2162 haldata->LastHMEBoxNum = 0;
2164 /* init dm default value */
2165 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
2166 haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
2167 haldata->pwrGroupCnt = 0;
2168 haldata->PGMaxGroup = 13;
2169 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
2170 for (i = 0; i < HP_THERMAL_NUM; i++)
2171 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2174 void rtl8188eu_set_hal_ops(struct adapter *adapt)
2176 struct hal_ops *halfunc = &adapt->HalFunc;
2179 adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL);
2180 if (adapt->HalData == NULL)
2181 DBG_88E("cant not alloc memory for HAL DATA\n");
2183 halfunc->hal_power_on = rtl8188eu_InitPowerOn;
2184 halfunc->hal_init = &rtl8188eu_hal_init;
2185 halfunc->hal_deinit = &rtl8188eu_hal_deinit;
2187 halfunc->inirp_init = &rtl8188eu_inirp_init;
2188 halfunc->inirp_deinit = &rtl8188eu_inirp_deinit;
2190 halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv;
2192 halfunc->init_recv_priv = &rtl8188eu_init_recv_priv;
2193 halfunc->free_recv_priv = &rtl8188eu_free_recv_priv;
2194 halfunc->InitSwLeds = &rtl8188eu_InitSwLeds;
2195 halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds;
2197 halfunc->init_default_value = &rtl8188eu_init_default_value;
2198 halfunc->intf_chip_configure = &rtl8188eu_interface_configure;
2199 halfunc->read_adapter_info = &_ReadAdapterInfo8188EU;
2201 halfunc->SetHwRegHandler = &SetHwReg8188EU;
2202 halfunc->GetHwRegHandler = &GetHwReg8188EU;
2203 halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb;
2204 halfunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb;
2206 halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb;
2207 halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb;
2209 halfunc->hal_xmit = &rtl8188eu_hal_xmit;
2210 halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit;
2212 rtl8188e_set_hal_ops(halfunc);