kernel/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _HAL_INIT_C_
  21
  22 #include <linux/firmware.h>
  23 #include <linux/vmalloc.h>
  24 #include <drv_types.h>
  25 #include <rtw_efuse.h>
  26 #include <phy.h>
  27 #include <rtl8188e_hal.h>
  28
  29 #include <rtw_iol.h>
  30
  31 void iol_mode_enable(struct adapter *padapter, u8 enable)
  32 {
  33         u8 reg_0xf0 = 0;
  34
  35         if (enable) {
  36                 /* Enable initial offload */
  37                 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
  38                 usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
  39
  40                 if (!padapter->bFWReady) {
  41                         DBG_88E("bFWReady == false call reset 8051...\n");
  42                         _8051Reset88E(padapter);
  43                 }
  44
  45         } else {
  46                 /* disable initial offload */
  47                 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
  48                 usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
  49         }
  50 }
  51
  52 s32 iol_execute(struct adapter *padapter, u8 control)
  53 {
  54         s32 status = _FAIL;
  55         u8 reg_0x88 = 0;
  56         u32 start = 0, passing_time = 0;
  57
  58         control = control&0x0f;
  59         reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
  60         usb_write8(padapter, REG_HMEBOX_E0,  reg_0x88|control);
  61
  62         start = jiffies;
  63         while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
  64                (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
  65                 ;
  66         }
  67
  68         reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
  69         status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
  70         if (reg_0x88 & control<<4)
  71                 status = _FAIL;
  72         return status;
  73 }
  74
  75 static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
  76 {
  77         s32 rst = _SUCCESS;
  78         iol_mode_enable(padapter, 1);
  79         usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
  80         rst = iol_execute(padapter, CMD_INIT_LLT);
  81         iol_mode_enable(padapter, 0);
  82         return rst;
  83 }
  84
  85
  86 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
  87 {
  88         s32     result = _SUCCESS;
  89
  90         DBG_88E("==> %s\n", __func__);
  91         if (rtw_IOL_applied(padapter)) {
  92                 iol_mode_enable(padapter, 1);
  93                 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
  94                 if (result == _SUCCESS)
  95                         result = iol_execute(padapter, CMD_EFUSE_PATCH);
  96
  97                 iol_mode_enable(padapter, 0);
  98         }
  99         return result;
 100 }
 101
 102 #define MAX_REG_BOLCK_SIZE      196
 103
 104 void _8051Reset88E(struct adapter *padapter)
 105 {
 106         u8 u1bTmp;
 107
 108         u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1);
 109         usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
 110         usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2));
 111         DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
 112 }
 113
 114 void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
 115 {
 116         struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
 117
 118         /*  Init Fw LPS related. */
 119         padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
 120
 121         /*  Init H2C counter. by tynli. 2009.12.09. */
 122         pHalData->LastHMEBoxNum = 0;
 123 }
 124
 125 static void rtl8188e_free_hal_data(struct adapter *padapter)
 126 {
 127         kfree(padapter->HalData);
 128         padapter->HalData = NULL;
 129 }
 130
 131 static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter)
 132 {
 133         u32                             value32;
 134         struct HAL_VERSION              ChipVersion;
 135         struct hal_data_8188e   *pHalData;
 136
 137         pHalData = GET_HAL_DATA(padapter);
 138
 139         value32 = usb_read32(padapter, REG_SYS_CFG);
 140         ChipVersion.ICType = CHIP_8188E;
 141         ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
 142
 143         ChipVersion.RFType = RF_TYPE_1T1R;
 144         ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
 145         ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /*  IC version (CUT) */
 146
 147         /*  For regulator mode. by tynli. 2011.01.14 */
 148         pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
 149
 150         ChipVersion.ROMVer = 0; /*  ROM code version. */
 151
 152         dump_chip_info(ChipVersion);
 153
 154         pHalData->VersionID = ChipVersion;
 155
 156         if (IS_1T2R(ChipVersion)) {
 157                 pHalData->rf_type = RF_1T2R;
 158                 pHalData->NumTotalRFPath = 2;
 159         } else if (IS_2T2R(ChipVersion)) {
 160                 pHalData->rf_type = RF_2T2R;
 161                 pHalData->NumTotalRFPath = 2;
 162         } else{
 163                 pHalData->rf_type = RF_1T1R;
 164                 pHalData->NumTotalRFPath = 1;
 165         }
 166
 167         MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
 168
 169         return ChipVersion;
 170 }
 171
 172 static void rtl8188e_read_chip_version(struct adapter *padapter)
 173 {
 174         ReadChipVersion8188E(padapter);
 175 }
 176
 177 static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
 178 {
 179         struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
 180         struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
 181         switch (eVariable) {
 182         case HAL_ODM_STA_INFO:
 183                 {
 184                         struct sta_info *psta = pValue1;
 185
 186                         if (bSet) {
 187                                 DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
 188                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
 189                                 ODM_RAInfo_Init(podmpriv, psta->mac_id);
 190                         } else {
 191                                 DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
 192                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
 193                        }
 194                 }
 195                 break;
 196         case HAL_ODM_P2P_STATE:
 197                         ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
 198                 break;
 199         case HAL_ODM_WIFI_DISPLAY_STATE:
 200                         ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
 201                 break;
 202         default:
 203                 break;
 204         }
 205 }
 206
 207 static void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
 208 {
 209         if (enable) {
 210                 DBG_88E("Enable notch filter\n");
 211                 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
 212         } else {
 213                 DBG_88E("Disable notch filter\n");
 214                 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
 215         }
 216 }
 217 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
 218 {
 219         pHalFunc->free_hal_data = &rtl8188e_free_hal_data;
 220
 221         pHalFunc->dm_init = &rtl8188e_init_dm_priv;
 222
 223         pHalFunc->read_chip_version = &rtl8188e_read_chip_version;
 224
 225         pHalFunc->set_bwmode_handler = &phy_set_bw_mode;
 226         pHalFunc->set_channel_handler = &phy_sw_chnl;
 227
 228         pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog;
 229
 230         pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid;
 231
 232         pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E;
 233         pHalFunc->AntDivCompareHandler = &AntDivCompare8188E;
 234         pHalFunc->read_rfreg = &phy_query_rf_reg;
 235         pHalFunc->write_rfreg = &phy_set_rf_reg;
 236
 237         pHalFunc->sreset_init_value = &sreset_init_value;
 238         pHalFunc->sreset_get_wifi_status  = &sreset_get_wifi_status;
 239
 240         pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar;
 241
 242         pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
 243 }
 244
 245 /*  */
 246 /*  */
 247 /*  LLT R/W/Init function */
 248 /*  */
 249 /*  */
 250 static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
 251 {
 252         s32     status = _SUCCESS;
 253         s32     count = 0;
 254         u32     value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
 255         u16     LLTReg = REG_LLT_INIT;
 256
 257         usb_write32(padapter, LLTReg, value);
 258
 259         /* polling */
 260         do {
 261                 value = usb_read32(padapter, LLTReg);
 262                 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
 263                         break;
 264
 265                 if (count > POLLING_LLT_THRESHOLD) {
 266                         RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address));
 267                         status = _FAIL;
 268                         break;
 269                 }
 270         } while (count++);
 271
 272         return status;
 273 }
 274
 275 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
 276 {
 277         s32     status = _FAIL;
 278         u32     i;
 279         u32     Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/*  176, 22k */
 280
 281         if (rtw_IOL_applied(padapter)) {
 282                 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
 283         } else {
 284                 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
 285                         status = _LLTWrite(padapter, i, i + 1);
 286                         if (_SUCCESS != status)
 287                                 return status;
 288                 }
 289
 290                 /*  end of list */
 291                 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
 292                 if (_SUCCESS != status)
 293                         return status;
 294
 295                 /*  Make the other pages as ring buffer */
 296                 /*  This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
 297                 /*  Otherwise used as local loopback buffer. */
 298                 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
 299                         status = _LLTWrite(padapter, i, (i + 1));
 300                         if (_SUCCESS != status)
 301                                 return status;
 302                 }
 303
 304                 /*  Let last entry point to the start entry of ring buffer */
 305                 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
 306                 if (_SUCCESS != status) {
 307                         return status;
 308                 }
 309         }
 310
 311         return status;
 312 }
 313
 314 void
 315 Hal_InitPGData88E(struct adapter *padapter)
 316 {
 317         struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
 318
 319         if (!pEEPROM->bautoload_fail_flag) { /*  autoload OK. */
 320                 if (!is_boot_from_eeprom(padapter)) {
 321                         /*  Read EFUSE real map to shadow. */
 322                         EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
 323                 }
 324         } else {/* autoload fail */
 325                 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
 326                 /* update to default value 0xFF */
 327                 if (!is_boot_from_eeprom(padapter))
 328                         EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
 329         }
 330 }
 331
 332 void
 333 Hal_EfuseParseIDCode88E(
 334                 struct adapter *padapter,
 335                 u8 *hwinfo
 336         )
 337 {
 338         struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
 339         u16                     EEPROMId;
 340
 341         /*  Checl 0x8129 again for making sure autoload status!! */
 342         EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
 343         if (EEPROMId != RTL_EEPROM_ID) {
 344                 DBG_88E("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
 345                 pEEPROM->bautoload_fail_flag = true;
 346         } else {
 347                 pEEPROM->bautoload_fail_flag = false;
 348         }
 349
 350         DBG_88E("EEPROM ID = 0x%04x\n", EEPROMId);
 351 }
 352
 353 static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
 354 {
 355         u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
 356
 357         memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
 358
 359         if (AutoLoadFail) {
 360                 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
 361                         /* 2.4G default value */
 362                         for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
 363                                 pwrInfo24G->IndexCCK_Base[rfPath][group] =      EEPROM_DEFAULT_24G_INDEX;
 364                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
 365                         }
 366                         for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
 367                                 if (TxCount == 0) {
 368                                         pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
 369                                         pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
 370                                 } else {
 371                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 372                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 373                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 374                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 375                                 }
 376                         }
 377                 }
 378                 return;
 379         }
 380
 381         for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
 382                 /* 2.4G default value */
 383                 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
 384                         pwrInfo24G->IndexCCK_Base[rfPath][group] =      PROMContent[eeAddr++];
 385                         if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
 386                                 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
 387                 }
 388                 for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
 389                         pwrInfo24G->IndexBW40_Base[rfPath][group] =     PROMContent[eeAddr++];
 390                         if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
 391                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
 392                 }
 393                 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
 394                         if (TxCount == 0) {
 395                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
 396                                 if (PROMContent[eeAddr] == 0xFF) {
 397                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
 398                                 } else {
 399                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
 400                                         if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
 401                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
 402                                 }
 403
 404                                 if (PROMContent[eeAddr] == 0xFF) {
 405                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_24G_OFDM_DIFF;
 406                                 } else {
 407                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
 408                                         if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
 409                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
 410                                 }
 411                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
 412                                 eeAddr++;
 413                         } else {
 414                                 if (PROMContent[eeAddr] == 0xFF) {
 415                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
 416                                 } else {
 417                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
 418                                         if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
 419                                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
 420                                 }
 421
 422                                 if (PROMContent[eeAddr] == 0xFF) {
 423                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
 424                                 } else {
 425                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
 426                                         if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
 427                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
 428                                 }
 429                                 eeAddr++;
 430
 431                                 if (PROMContent[eeAddr] == 0xFF) {
 432                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 433                                 } else {
 434                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
 435                                         if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
 436                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
 437                                 }
 438
 439                                 if (PROMContent[eeAddr] == 0xFF) {
 440                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 441                                 } else {
 442                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
 443                                         if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3)               /* 4bit sign number to 8 bit sign number */
 444                                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
 445                                 }
 446                                 eeAddr++;
 447                         }
 448                 }
 449         }
 450 }
 451
 452 static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup)
 453 {
 454         u8 bIn24G = true;
 455
 456         if (chnl <= 14) {
 457                 bIn24G = true;
 458
 459                 if (chnl < 3)                   /*  Channel 1-2 */
 460                         *pGroup = 0;
 461                 else if (chnl < 6)              /*  Channel 3-5 */
 462                         *pGroup = 1;
 463                 else     if (chnl < 9)          /*  Channel 6-8 */
 464                         *pGroup = 2;
 465                 else if (chnl < 12)             /*  Channel 9-11 */
 466                         *pGroup = 3;
 467                 else if (chnl < 14)             /*  Channel 12-13 */
 468                         *pGroup = 4;
 469                 else if (chnl == 14)            /*  Channel 14 */
 470                         *pGroup = 5;
 471         } else {
 472                 bIn24G = false;
 473
 474                 if (chnl <= 40)
 475                         *pGroup = 0;
 476                 else if (chnl <= 48)
 477                         *pGroup = 1;
 478                 else     if (chnl <= 56)
 479                         *pGroup = 2;
 480                 else if (chnl <= 64)
 481                         *pGroup = 3;
 482                 else if (chnl <= 104)
 483                         *pGroup = 4;
 484                 else if (chnl <= 112)
 485                         *pGroup = 5;
 486                 else if (chnl <= 120)
 487                         *pGroup = 5;
 488                 else if (chnl <= 128)
 489                         *pGroup = 6;
 490                 else if (chnl <= 136)
 491                         *pGroup = 7;
 492                 else if (chnl <= 144)
 493                         *pGroup = 8;
 494                 else if (chnl <= 153)
 495                         *pGroup = 9;
 496                 else if (chnl <= 161)
 497                         *pGroup = 10;
 498                 else if (chnl <= 177)
 499                         *pGroup = 11;
 500         }
 501         return bIn24G;
 502 }
 503
 504 void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 505 {
 506         if (AutoLoadFail) {
 507                 padapter->pwrctrlpriv.bHWPowerdown = false;
 508                 padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
 509         } else {
 510                 /* hw power down mode selection , 0:rf-off / 1:power down */
 511
 512                 if (padapter->registrypriv.hwpdn_mode == 2)
 513                         padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4);
 514                 else
 515                         padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
 516
 517                 /*  decide hw if support remote wakeup function */
 518                 /*  if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
 519                 padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1) ? true : false;
 520
 521                 DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
 522                 padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown , padapter->pwrctrlpriv.bSupportRemoteWakeup);
 523
 524                 DBG_88E("### PS params =>  power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
 525         }
 526 }
 527
 528 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
 529 {
 530         struct hal_data_8188e   *pHalData = GET_HAL_DATA(padapter);
 531         struct txpowerinfo24g pwrInfo24G;
 532         u8 rfPath, ch, group;
 533         u8 bIn24G, TxCount;
 534
 535         Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
 536
 537         if (!AutoLoadFail)
 538                 pHalData->bTXPowerDataReadFromEEPORM = true;
 539
 540         for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
 541                 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
 542                         bIn24G = Hal_GetChnlGroup88E(ch, &group);
 543                         if (bIn24G) {
 544                                 pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
 545                                 if (ch == 14)
 546                                         pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
 547                                 else
 548                                         pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
 549                         }
 550                         if (bIn24G) {
 551                                 DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
 552                                 DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_CCK_Base[rfPath][ch]);
 553                                 DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_BW40_Base[rfPath][ch]);
 554                         }
 555                 }
 556                 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
 557                         pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
 558                         pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
 559                         pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
 560                         pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
 561                         DBG_88E("======= TxCount %d =======\n", TxCount);
 562                         DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
 563                         DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
 564                         DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
 565                         DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
 566                 }
 567         }
 568
 569         /*  2010/10/19 MH Add Regulator recognize for CU. */
 570         if (!AutoLoadFail) {
 571                 pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7);     /* bit0~2 */
 572                 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
 573                         pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
 574         } else {
 575                 pHalData->EEPROMRegulatory = 0;
 576         }
 577         DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
 578 }
 579
 580 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
 581 {
 582         struct hal_data_8188e   *pHalData = GET_HAL_DATA(pAdapter);
 583
 584         if (!AutoLoadFail) {
 585                 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
 586                 if (pHalData->CrystalCap == 0xFF)
 587                         pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
 588         } else {
 589                 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
 590         }
 591         DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
 592 }
 593
 594 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
 595 {
 596         struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
 597
 598         if (!AutoLoadFail)
 599                 pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
 600                                         & 0xE0) >> 5;
 601         else
 602                 pHalData->BoardType = 0;
 603         DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
 604 }
 605
 606 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 607 {
 608         struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
 609
 610         if (!AutoLoadFail) {
 611                 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
 612                 if (pHalData->EEPROMVersion == 0xFF)
 613                         pHalData->EEPROMVersion = EEPROM_Default_Version;
 614         } else {
 615                 pHalData->EEPROMVersion = 1;
 616         }
 617         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
 618                  ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
 619                  pHalData->EEPROMVersion));
 620 }
 621
 622 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 623 {
 624         padapter->mlmepriv.ChannelPlan =
 625                  hal_com_get_channel_plan(padapter,
 626                                           hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
 627                                           padapter->registrypriv.channel_plan,
 628                                           RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
 629
 630         DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
 631 }
 632
 633 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 634 {
 635         struct hal_data_8188e   *pHalData = GET_HAL_DATA(padapter);
 636
 637         if (!AutoLoadFail) {
 638                 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
 639         } else {
 640                 pHalData->EEPROMCustomerID = 0;
 641                 pHalData->EEPROMSubCustomerID = 0;
 642         }
 643         DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
 644 }
 645
 646 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
 647 {
 648         struct hal_data_8188e   *pHalData = GET_HAL_DATA(pAdapter);
 649         struct registry_priv    *registry_par = &pAdapter->registrypriv;
 650
 651         if (!AutoLoadFail) {
 652                 /*  Antenna Diversity setting. */
 653                 if (registry_par->antdiv_cfg == 2) { /*  2:By EFUSE */
 654                         pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
 655                         if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
 656                                 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;
 657                 } else {
 658                         pHalData->AntDivCfg = registry_par->antdiv_cfg;  /*  0:OFF , 1:ON, 2:By EFUSE */
 659                 }
 660
 661                 if (registry_par->antdiv_type == 0) {
 662                         /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
 663                         pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
 664                         if (pHalData->TRxAntDivType == 0xFF)
 665                                 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /*  For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
 666                 } else {
 667                         pHalData->TRxAntDivType = registry_par->antdiv_type;
 668                 }
 669
 670                 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
 671                         pHalData->AntDivCfg = 1; /*  0xC1[3] is ignored. */
 672         } else {
 673                 pHalData->AntDivCfg = 0;
 674                 pHalData->TRxAntDivType = pHalData->TRxAntDivType; /*  The value in the driver setting of device manager. */
 675         }
 676         DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
 677 }
 678
 679 void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
 680 {
 681         struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
 682
 683         /*  ThermalMeter from EEPROM */
 684         if (!AutoloadFail)
 685                 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
 686         else
 687                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
 688
 689         if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
 690                 pHalData->bAPKThermalMeterIgnore = true;
 691                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
 692         }
 693         DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
 694 }