kernel/drivers/staging/rtl8188eu/hal/odm.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20
  21 /*  include files */
  22
  23 #include "odm_precomp.h"
  24 #include "phy.h"
  25
  26 u32 GlobalDebugLevel;
  27 static const u16 dB_Invert_Table[8][12] = {
  28         {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
  29         {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16},
  30         {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63},
  31         {71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251},
  32         {282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000},
  33         {1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981},
  34         {4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849},
  35         {17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}
  36 };
  37
  38 /* avoid to warn in FreeBSD ==> To DO modify */
  39 static u32 EDCAParam[HT_IOT_PEER_MAX][3] = {
  40         /*  UL                  DL */
  41         {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */
  42         {0xa44f, 0x5ea44f, 0x5e431c}, /*  1:realtek AP */
  43         {0x5ea42b, 0x5ea42b, 0x5ea42b}, /*  2:unknown AP => realtek_92SE */
  44         {0x5ea32b, 0x5ea42b, 0x5e4322}, /*  3:broadcom AP */
  45         {0x5ea422, 0x00a44f, 0x00a44f}, /*  4:ralink AP */
  46         {0x5ea322, 0x00a630, 0x00a44f}, /*  5:atheros AP */
  47         {0x5e4322, 0x5e4322, 0x5e4322},/*  6:cisco AP */
  48         {0x5ea44f, 0x00a44f, 0x5ea42b}, /*  8:marvell AP */
  49         {0x5ea42b, 0x5ea42b, 0x5ea42b}, /*  10:unknown AP=> 92U AP */
  50         {0x5ea42b, 0xa630, 0x5e431c}, /*  11:airgocap AP */
  51 };
  52
  53 /*  Global var */
  54 u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
  55         0x7f8001fe, /*  0, +6.0dB */
  56         0x788001e2, /*  1, +5.5dB */
  57         0x71c001c7, /*  2, +5.0dB */
  58         0x6b8001ae, /*  3, +4.5dB */
  59         0x65400195, /*  4, +4.0dB */
  60         0x5fc0017f, /*  5, +3.5dB */
  61         0x5a400169, /*  6, +3.0dB */
  62         0x55400155, /*  7, +2.5dB */
  63         0x50800142, /*  8, +2.0dB */
  64         0x4c000130, /*  9, +1.5dB */
  65         0x47c0011f, /*  10, +1.0dB */
  66         0x43c0010f, /*  11, +0.5dB */
  67         0x40000100, /*  12, +0dB */
  68         0x3c8000f2, /*  13, -0.5dB */
  69         0x390000e4, /*  14, -1.0dB */
  70         0x35c000d7, /*  15, -1.5dB */
  71         0x32c000cb, /*  16, -2.0dB */
  72         0x300000c0, /*  17, -2.5dB */
  73         0x2d4000b5, /*  18, -3.0dB */
  74         0x2ac000ab, /*  19, -3.5dB */
  75         0x288000a2, /*  20, -4.0dB */
  76         0x26000098, /*  21, -4.5dB */
  77         0x24000090, /*  22, -5.0dB */
  78         0x22000088, /*  23, -5.5dB */
  79         0x20000080, /*  24, -6.0dB */
  80         0x1e400079, /*  25, -6.5dB */
  81         0x1c800072, /*  26, -7.0dB */
  82         0x1b00006c, /*  27. -7.5dB */
  83         0x19800066, /*  28, -8.0dB */
  84         0x18000060, /*  29, -8.5dB */
  85         0x16c0005b, /*  30, -9.0dB */
  86         0x15800056, /*  31, -9.5dB */
  87         0x14400051, /*  32, -10.0dB */
  88         0x1300004c, /*  33, -10.5dB */
  89         0x12000048, /*  34, -11.0dB */
  90         0x11000044, /*  35, -11.5dB */
  91         0x10000040, /*  36, -12.0dB */
  92         0x0f00003c,/*  37, -12.5dB */
  93         0x0e400039,/*  38, -13.0dB */
  94         0x0d800036,/*  39, -13.5dB */
  95         0x0cc00033,/*  40, -14.0dB */
  96         0x0c000030,/*  41, -14.5dB */
  97         0x0b40002d,/*  42, -15.0dB */
  98 };
  99
 100 u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
 101         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /*  0, +0dB */
 102         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /*  1, -0.5dB */
 103         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /*  2, -1.0dB */
 104         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /*  3, -1.5dB */
 105         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /*  4, -2.0dB */
 106         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /*  5, -2.5dB */
 107         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /*  6, -3.0dB */
 108         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /*  7, -3.5dB */
 109         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /*  8, -4.0dB */
 110         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /*  9, -4.5dB */
 111         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /*  10, -5.0dB */
 112         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /*  11, -5.5dB */
 113         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /*  12, -6.0dB */
 114         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /*  13, -6.5dB */
 115         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /*  14, -7.0dB */
 116         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /*  15, -7.5dB */
 117         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /*  16, -8.0dB */
 118         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /*  17, -8.5dB */
 119         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /*  18, -9.0dB */
 120         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /*  19, -9.5dB */
 121         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /*  20, -10.0dB */
 122         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /*  21, -10.5dB */
 123         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /*  22, -11.0dB */
 124         {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /*  23, -11.5dB */
 125         {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /*  24, -12.0dB */
 126         {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /*  25, -12.5dB */
 127         {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /*  26, -13.0dB */
 128         {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /*  27, -13.5dB */
 129         {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /*  28, -14.0dB */
 130         {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /*  29, -14.5dB */
 131         {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /*  30, -15.0dB */
 132         {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /*  31, -15.5dB */
 133         {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}        /*  32, -16.0dB */
 134 };
 135
 136 u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
 137         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /*  0, +0dB */
 138         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /*  1, -0.5dB */
 139         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /*  2, -1.0dB */
 140         {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*  3, -1.5dB */
 141         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /*  4, -2.0dB */
 142         {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*  5, -2.5dB */
 143         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /*  6, -3.0dB */
 144         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /*  7, -3.5dB */
 145         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /*  8, -4.0dB */
 146         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*  9, -4.5dB */
 147         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /*  10, -5.0dB */
 148         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /*  11, -5.5dB */
 149         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /*  12, -6.0dB */
 150         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /*  13, -6.5dB */
 151         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /*  14, -7.0dB */
 152         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /*  15, -7.5dB */
 153         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /*  16, -8.0dB */
 154         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*  17, -8.5dB */
 155         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*  18, -9.0dB */
 156         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /*  19, -9.5dB */
 157         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /*  20, -10.0dB */
 158         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*  21, -10.5dB */
 159         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /*  22, -11.0dB */
 160         {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /*  23, -11.5dB */
 161         {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /*  24, -12.0dB */
 162         {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /*  25, -12.5dB */
 163         {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*  26, -13.0dB */
 164         {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*  27, -13.5dB */
 165         {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /*  28, -14.0dB */
 166         {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /*  29, -14.5dB */
 167         {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /*  30, -15.0dB */
 168         {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /*  31, -15.5dB */
 169         {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}  /*  32, -16.0dB */
 170 };
 171
 172
 173 #define         RxDefaultAnt1           0x65a9
 174 #define RxDefaultAnt2           0x569a
 175
 176 void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
 177 {
 178         pDM_Odm->DebugLevel = ODM_DBG_TRACE;
 179
 180         pDM_Odm->DebugComponents = 0;
 181 }
 182
 183 /* 3 Export Interface */
 184
 185 /*  2011/09/21 MH Add to describe different team necessary resource allocate?? */
 186 void ODM_DMInit(struct odm_dm_struct *pDM_Odm)
 187 {
 188         /* 2012.05.03 Luke: For all IC series */
 189         odm_CommonInfoSelfInit(pDM_Odm);
 190         odm_CmnInfoInit_Debug(pDM_Odm);
 191         odm_DIGInit(pDM_Odm);
 192         odm_RateAdaptiveMaskInit(pDM_Odm);
 193
 194         odm_DynamicTxPowerInit(pDM_Odm);
 195         odm_TXPowerTrackingInit(pDM_Odm);
 196         ODM_EdcaTurboInit(pDM_Odm);
 197         ODM_RAInfo_Init_all(pDM_Odm);
 198         if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)   ||
 199             (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
 200             (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
 201                 odm_InitHybridAntDiv(pDM_Odm);
 202 }
 203
 204 /*  2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */
 205 /*  You can not add any dummy function here, be care, you can only use DM structure */
 206 /*  to perform any new ODM_DM. */
 207 void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm)
 208 {
 209         /* 2012.05.03 Luke: For all IC series */
 210         odm_CmnInfoHook_Debug(pDM_Odm);
 211         odm_CmnInfoUpdate_Debug(pDM_Odm);
 212         odm_CommonInfoSelfUpdate(pDM_Odm);
 213         odm_FalseAlarmCounterStatistics(pDM_Odm);
 214         odm_RSSIMonitorCheck(pDM_Odm);
 215
 216         /* Fix Leave LPS issue */
 217         odm_DIG(pDM_Odm);
 218         odm_CCKPacketDetectionThresh(pDM_Odm);
 219
 220         if (*(pDM_Odm->pbPowerSaving))
 221                 return;
 222
 223         odm_RefreshRateAdaptiveMask(pDM_Odm);
 224
 225         if ((pDM_Odm->AntDivType ==  CG_TRX_HW_ANTDIV)  ||
 226             (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)  ||
 227             (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
 228                 odm_HwAntDiv(pDM_Odm);
 229
 230         ODM_TXPowerTrackingCheck(pDM_Odm);
 231         odm_EdcaTurboCheck(pDM_Odm);
 232 }
 233
 234 /*  Init /.. Fixed HW value. Only init time. */
 235 void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value)
 236 {
 237         /*  This section is used for init value */
 238         switch  (CmnInfo) {
 239         /*  Fixed ODM value. */
 240         case    ODM_CMNINFO_ABILITY:
 241                 pDM_Odm->SupportAbility = (u32)Value;
 242                 break;
 243         case    ODM_CMNINFO_PLATFORM:
 244                 pDM_Odm->SupportPlatform = (u8)Value;
 245                 break;
 246         case    ODM_CMNINFO_INTERFACE:
 247                 pDM_Odm->SupportInterface = (u8)Value;
 248                 break;
 249         case    ODM_CMNINFO_MP_TEST_CHIP:
 250                 pDM_Odm->bIsMPChip = (u8)Value;
 251                 break;
 252         case    ODM_CMNINFO_IC_TYPE:
 253                 pDM_Odm->SupportICType = Value;
 254                 break;
 255         case    ODM_CMNINFO_CUT_VER:
 256                 pDM_Odm->CutVersion = (u8)Value;
 257                 break;
 258         case    ODM_CMNINFO_FAB_VER:
 259                 pDM_Odm->FabVersion = (u8)Value;
 260                 break;
 261         case    ODM_CMNINFO_RF_TYPE:
 262                 pDM_Odm->RFType = (u8)Value;
 263                 break;
 264         case    ODM_CMNINFO_RF_ANTENNA_TYPE:
 265                 pDM_Odm->AntDivType = (u8)Value;
 266                 break;
 267         case    ODM_CMNINFO_BOARD_TYPE:
 268                 pDM_Odm->BoardType = (u8)Value;
 269                 break;
 270         case    ODM_CMNINFO_EXT_LNA:
 271                 pDM_Odm->ExtLNA = (u8)Value;
 272                 break;
 273         case    ODM_CMNINFO_EXT_PA:
 274                 pDM_Odm->ExtPA = (u8)Value;
 275                 break;
 276         case    ODM_CMNINFO_EXT_TRSW:
 277                 pDM_Odm->ExtTRSW = (u8)Value;
 278                 break;
 279         case    ODM_CMNINFO_PATCH_ID:
 280                 pDM_Odm->PatchID = (u8)Value;
 281                 break;
 282         case    ODM_CMNINFO_BINHCT_TEST:
 283                 pDM_Odm->bInHctTest = (bool)Value;
 284                 break;
 285         case    ODM_CMNINFO_BWIFI_TEST:
 286                 pDM_Odm->bWIFITest = (bool)Value;
 287                 break;
 288         case    ODM_CMNINFO_SMART_CONCURRENT:
 289                 pDM_Odm->bDualMacSmartConcurrent = (bool)Value;
 290                 break;
 291         /* To remove the compiler warning, must add an empty default statement to handle the other values. */
 292         default:
 293                 /* do nothing */
 294                 break;
 295         }
 296
 297         /*  Tx power tracking BB swing table. */
 298         /*  The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */
 299         pDM_Odm->BbSwingIdxOfdm                 = 12; /*  Set defalut value as index 12. */
 300         pDM_Odm->BbSwingIdxOfdmCurrent  = 12;
 301         pDM_Odm->BbSwingFlagOfdm                = false;
 302 }
 303
 304 void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue)
 305 {
 306         /*  */
 307         /*  Hook call by reference pointer. */
 308         /*  */
 309         switch  (CmnInfo) {
 310         /*  Dynamic call by reference pointer. */
 311         case    ODM_CMNINFO_MAC_PHY_MODE:
 312                 pDM_Odm->pMacPhyMode = (u8 *)pValue;
 313                 break;
 314         case    ODM_CMNINFO_TX_UNI:
 315                 pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue;
 316                 break;
 317         case    ODM_CMNINFO_RX_UNI:
 318                 pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue;
 319                 break;
 320         case    ODM_CMNINFO_WM_MODE:
 321                 pDM_Odm->pWirelessMode = (u8 *)pValue;
 322                 break;
 323         case    ODM_CMNINFO_BAND:
 324                 pDM_Odm->pBandType = (u8 *)pValue;
 325                 break;
 326         case    ODM_CMNINFO_SEC_CHNL_OFFSET:
 327                 pDM_Odm->pSecChOffset = (u8 *)pValue;
 328                 break;
 329         case    ODM_CMNINFO_SEC_MODE:
 330                 pDM_Odm->pSecurity = (u8 *)pValue;
 331                 break;
 332         case    ODM_CMNINFO_BW:
 333                 pDM_Odm->pBandWidth = (u8 *)pValue;
 334                 break;
 335         case    ODM_CMNINFO_CHNL:
 336                 pDM_Odm->pChannel = (u8 *)pValue;
 337                 break;
 338         case    ODM_CMNINFO_DMSP_GET_VALUE:
 339                 pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue;
 340                 break;
 341         case    ODM_CMNINFO_BUDDY_ADAPTOR:
 342                 pDM_Odm->pBuddyAdapter = (struct adapter **)pValue;
 343                 break;
 344         case    ODM_CMNINFO_DMSP_IS_MASTER:
 345                 pDM_Odm->pbMasterOfDMSP = (bool *)pValue;
 346                 break;
 347         case    ODM_CMNINFO_SCAN:
 348                 pDM_Odm->pbScanInProcess = (bool *)pValue;
 349                 break;
 350         case    ODM_CMNINFO_POWER_SAVING:
 351                 pDM_Odm->pbPowerSaving = (bool *)pValue;
 352                 break;
 353         case    ODM_CMNINFO_ONE_PATH_CCA:
 354                 pDM_Odm->pOnePathCCA = (u8 *)pValue;
 355                 break;
 356         case    ODM_CMNINFO_DRV_STOP:
 357                 pDM_Odm->pbDriverStopped =  (bool *)pValue;
 358                 break;
 359         case    ODM_CMNINFO_PNP_IN:
 360                 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep =  (bool *)pValue;
 361                 break;
 362         case    ODM_CMNINFO_INIT_ON:
 363                 pDM_Odm->pinit_adpt_in_progress =  (bool *)pValue;
 364                 break;
 365         case    ODM_CMNINFO_ANT_TEST:
 366                 pDM_Odm->pAntennaTest =  (u8 *)pValue;
 367                 break;
 368         case    ODM_CMNINFO_NET_CLOSED:
 369                 pDM_Odm->pbNet_closed = (bool *)pValue;
 370                 break;
 371         case    ODM_CMNINFO_MP_MODE:
 372                 pDM_Odm->mp_mode = (u8 *)pValue;
 373                 break;
 374         /* To remove the compiler warning, must add an empty default statement to handle the other values. */
 375         default:
 376                 /* do nothing */
 377                 break;
 378         }
 379 }
 380
 381 void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue)
 382 {
 383         /*  Hook call by reference pointer. */
 384         switch  (CmnInfo) {
 385         /*  Dynamic call by reference pointer. */
 386         case    ODM_CMNINFO_STA_STATUS:
 387                 pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue;
 388                 break;
 389         /* To remove the compiler warning, must add an empty default statement to handle the other values. */
 390         default:
 391                 /* do nothing */
 392                 break;
 393         }
 394 }
 395
 396 /*  Update Band/CHannel/.. The values are dynamic but non-per-packet. */
 397 void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value)
 398 {
 399         /*  */
 400         /*  This init variable may be changed in run time. */
 401         /*  */
 402         switch  (CmnInfo) {
 403         case    ODM_CMNINFO_ABILITY:
 404                 pDM_Odm->SupportAbility = (u32)Value;
 405                 break;
 406         case    ODM_CMNINFO_RF_TYPE:
 407                 pDM_Odm->RFType = (u8)Value;
 408                 break;
 409         case    ODM_CMNINFO_WIFI_DIRECT:
 410                 pDM_Odm->bWIFI_Direct = (bool)Value;
 411                 break;
 412         case    ODM_CMNINFO_WIFI_DISPLAY:
 413                 pDM_Odm->bWIFI_Display = (bool)Value;
 414                 break;
 415         case    ODM_CMNINFO_LINK:
 416                 pDM_Odm->bLinked = (bool)Value;
 417                 break;
 418         case    ODM_CMNINFO_RSSI_MIN:
 419                 pDM_Odm->RSSI_Min = (u8)Value;
 420                 break;
 421         case    ODM_CMNINFO_DBG_COMP:
 422                 pDM_Odm->DebugComponents = Value;
 423                 break;
 424         case    ODM_CMNINFO_DBG_LEVEL:
 425                 pDM_Odm->DebugLevel = (u32)Value;
 426                 break;
 427         case    ODM_CMNINFO_RA_THRESHOLD_HIGH:
 428                 pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value;
 429                 break;
 430         case    ODM_CMNINFO_RA_THRESHOLD_LOW:
 431                 pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value;
 432                 break;
 433         }
 434 }
 435
 436 void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm)
 437 {
 438         struct adapter *adapter = pDM_Odm->Adapter;
 439
 440         pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT9);
 441         pDM_Odm->RFPathRxEnable = (u8)phy_query_bb_reg(adapter, 0xc04, 0x0F);
 442
 443         ODM_InitDebugSetting(pDM_Odm);
 444 }
 445
 446 void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm)
 447 {
 448         u8 EntryCnt = 0;
 449         u8 i;
 450         struct sta_info *pEntry;
 451
 452         if (*(pDM_Odm->pBandWidth) == ODM_BW40M) {
 453                 if (*(pDM_Odm->pSecChOffset) == 1)
 454                         pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
 455                 else if (*(pDM_Odm->pSecChOffset) == 2)
 456                         pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
 457         } else {
 458                 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
 459         }
 460
 461         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
 462                 pEntry = pDM_Odm->pODM_StaInfo[i];
 463                 if (IS_STA_VALID(pEntry))
 464                         EntryCnt++;
 465         }
 466         if (EntryCnt == 1)
 467                 pDM_Odm->bOneEntryOnly = true;
 468         else
 469                 pDM_Odm->bOneEntryOnly = false;
 470 }
 471
 472 void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm)
 473 {
 474         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n"));
 475         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n", pDM_Odm->SupportPlatform));
 476         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n", pDM_Odm->SupportAbility));
 477         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n", pDM_Odm->SupportInterface));
 478         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n", pDM_Odm->SupportICType));
 479         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n", pDM_Odm->CutVersion));
 480         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n", pDM_Odm->FabVersion));
 481         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n", pDM_Odm->RFType));
 482         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n", pDM_Odm->BoardType));
 483         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n", pDM_Odm->ExtLNA));
 484         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n", pDM_Odm->ExtPA));
 485         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n", pDM_Odm->ExtTRSW));
 486         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n", pDM_Odm->PatchID));
 487         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n", pDM_Odm->bInHctTest));
 488         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n", pDM_Odm->bWIFITest));
 489         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n", pDM_Odm->bDualMacSmartConcurrent));
 490 }
 491
 492 void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm)
 493 {
 494         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n"));
 495         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n", *(pDM_Odm->pNumTxBytesUnicast)));
 496         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n", *(pDM_Odm->pNumRxBytesUnicast)));
 497         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n", *(pDM_Odm->pWirelessMode)));
 498         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n", *(pDM_Odm->pSecChOffset)));
 499         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n", *(pDM_Odm->pSecurity)));
 500         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n", *(pDM_Odm->pBandWidth)));
 501         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n", *(pDM_Odm->pChannel)));
 502
 503         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess)));
 504         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving)));
 505 }
 506
 507 void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm)
 508 {
 509         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n"));
 510         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n", pDM_Odm->bWIFI_Direct));
 511         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n", pDM_Odm->bWIFI_Display));
 512         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n", pDM_Odm->bLinked));
 513         ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min));
 514 }
 515
 516 void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI)
 517 {
 518         struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
 519         struct adapter *adapter = pDM_Odm->Adapter;
 520
 521         if (pDM_DigTable->CurIGValue != CurrentIGI) {
 522                 phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI);
 523                 pDM_DigTable->CurIGValue = CurrentIGI;
 524         }
 525 }
 526
 527 void odm_DIGInit(struct odm_dm_struct *pDM_Odm)
 528 {
 529         struct adapter *adapter = pDM_Odm->Adapter;
 530         struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
 531
 532         pDM_DigTable->CurIGValue = (u8)phy_query_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N);
 533         pDM_DigTable->RssiLowThresh     = DM_DIG_THRESH_LOW;
 534         pDM_DigTable->RssiHighThresh    = DM_DIG_THRESH_HIGH;
 535         pDM_DigTable->FALowThresh       = DM_false_ALARM_THRESH_LOW;
 536         pDM_DigTable->FAHighThresh      = DM_false_ALARM_THRESH_HIGH;
 537         pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC;
 538         pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC;
 539         pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
 540         pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
 541         pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
 542         pDM_DigTable->PreCCK_CCAThres = 0xFF;
 543         pDM_DigTable->CurCCK_CCAThres = 0x83;
 544         pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC;
 545         pDM_DigTable->LargeFAHit = 0;
 546         pDM_DigTable->Recover_cnt = 0;
 547         pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC;
 548         pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC;
 549         pDM_DigTable->bMediaConnect_0 = false;
 550         pDM_DigTable->bMediaConnect_1 = false;
 551
 552         /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */
 553         pDM_Odm->bDMInitialGainEnable = true;
 554 }
 555
 556 void odm_DIG(struct odm_dm_struct *pDM_Odm)
 557 {
 558         struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
 559         struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt;
 560         u8 DIG_Dynamic_MIN;
 561         u8 DIG_MaxOfMin;
 562         bool FirstConnect, FirstDisConnect;
 563         u8 dm_dig_max, dm_dig_min;
 564         u8 CurrentIGI = pDM_DigTable->CurIGValue;
 565
 566         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n"));
 567         if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) {
 568                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
 569                              ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n"));
 570                 return;
 571         }
 572
 573         if (*(pDM_Odm->pbScanInProcess)) {
 574                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n"));
 575                 return;
 576         }
 577
 578         /* add by Neil Chen to avoid PSD is processing */
 579         if (pDM_Odm->bDMInitialGainEnable == false) {
 580                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n"));
 581                 return;
 582         }
 583
 584         DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
 585         FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0);
 586         FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0);
 587
 588         /* 1 Boundary Decision */
 589         dm_dig_max = DM_DIG_MAX_NIC;
 590         dm_dig_min = DM_DIG_MIN_NIC;
 591         DIG_MaxOfMin = DM_DIG_MAX_AP;
 592
 593         if (pDM_Odm->bLinked) {
 594                 /* 2 Modify DIG upper bound */
 595                 if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max)
 596                         pDM_DigTable->rx_gain_range_max = dm_dig_max;
 597                 else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min)
 598                         pDM_DigTable->rx_gain_range_max = dm_dig_min;
 599                 else
 600                         pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20;
 601                 /* 2 Modify DIG lower bound */
 602                 if (pDM_Odm->bOneEntryOnly) {
 603                         if (pDM_Odm->RSSI_Min < dm_dig_min)
 604                                 DIG_Dynamic_MIN = dm_dig_min;
 605                         else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin)
 606                                 DIG_Dynamic_MIN = DIG_MaxOfMin;
 607                         else
 608                                 DIG_Dynamic_MIN = pDM_Odm->RSSI_Min;
 609                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
 610                                      ("odm_DIG() : bOneEntryOnly=true,  DIG_Dynamic_MIN=0x%x\n",
 611                                      DIG_Dynamic_MIN));
 612                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
 613                                      ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n",
 614                                      pDM_Odm->RSSI_Min));
 615                 } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) {
 616                         /* 1 Lower Bound for 88E AntDiv */
 617                         if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) {
 618                                 DIG_Dynamic_MIN = (u8)pDM_DigTable->AntDiv_RSSI_max;
 619                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
 620                                              ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n",
 621                                              pDM_DigTable->AntDiv_RSSI_max));
 622                         }
 623                 } else {
 624                         DIG_Dynamic_MIN = dm_dig_min;
 625                 }
 626         } else {
 627                 pDM_DigTable->rx_gain_range_max = dm_dig_max;
 628                 DIG_Dynamic_MIN = dm_dig_min;
 629                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n"));
 630         }
 631
 632         /* 1 Modify DIG lower bound, deal with abnormally large false alarm */
 633         if (pFalseAlmCnt->Cnt_all > 10000) {
 634                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n"));
 635
 636                 if (pDM_DigTable->LargeFAHit != 3)
 637                         pDM_DigTable->LargeFAHit++;
 638                 if (pDM_DigTable->ForbiddenIGI < CurrentIGI) {
 639                         pDM_DigTable->ForbiddenIGI = CurrentIGI;
 640                         pDM_DigTable->LargeFAHit = 1;
 641                 }
 642
 643                 if (pDM_DigTable->LargeFAHit >= 3) {
 644                         if ((pDM_DigTable->ForbiddenIGI+1) > pDM_DigTable->rx_gain_range_max)
 645                                 pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
 646                         else
 647                                 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
 648                         pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */
 649                 }
 650
 651         } else {
 652                 /* Recovery mechanism for IGI lower bound */
 653                 if (pDM_DigTable->Recover_cnt != 0) {
 654                         pDM_DigTable->Recover_cnt--;
 655                 } else {
 656                         if (pDM_DigTable->LargeFAHit < 3) {
 657                                 if ((pDM_DigTable->ForbiddenIGI-1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */
 658                                         pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */
 659                                         pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */
 660                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n"));
 661                                 } else {
 662                                         pDM_DigTable->ForbiddenIGI--;
 663                                         pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
 664                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n"));
 665                                 }
 666                         } else {
 667                                 pDM_DigTable->LargeFAHit = 0;
 668                         }
 669                 }
 670         }
 671         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
 672                      ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",
 673                      pDM_DigTable->LargeFAHit));
 674
 675         /* 1 Adjust initial gain by false alarm */
 676         if (pDM_Odm->bLinked) {
 677                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n"));
 678                 if (FirstConnect) {
 679                         CurrentIGI = pDM_Odm->RSSI_Min;
 680                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n"));
 681                 } else {
 682                         if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2)
 683                                 CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */
 684                         else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1)
 685                                 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */
 686                         else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)
 687                                 CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */
 688                 }
 689         } else {
 690                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n"));
 691                 if (FirstDisConnect) {
 692                         CurrentIGI = pDM_DigTable->rx_gain_range_min;
 693                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n"));
 694                 } else {
 695                         /* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */
 696                         if (pFalseAlmCnt->Cnt_all > 10000)
 697                                 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */
 698                         else if (pFalseAlmCnt->Cnt_all > 8000)
 699                                 CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */
 700                         else if (pFalseAlmCnt->Cnt_all < 500)
 701                                 CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */
 702                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n"));
 703                 }
 704         }
 705         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n"));
 706         /* 1 Check initial gain by upper/lower bound */
 707         if (CurrentIGI > pDM_DigTable->rx_gain_range_max)
 708                 CurrentIGI = pDM_DigTable->rx_gain_range_max;
 709         if (CurrentIGI < pDM_DigTable->rx_gain_range_min)
 710                 CurrentIGI = pDM_DigTable->rx_gain_range_min;
 711
 712         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
 713                      ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n",
 714                      pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min));
 715         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all));
 716         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI));
 717
 718         /* 2 High power RSSI threshold */
 719
 720         ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */
 721         pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
 722         pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
 723 }
 724
 725 /* 3============================================================ */
 726 /* 3 FASLE ALARM CHECK */
 727 /* 3============================================================ */
 728
 729 void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm)
 730 {
 731         struct adapter *adapter = pDM_Odm->Adapter;
 732         u32 ret_value;
 733         struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
 734
 735         if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
 736                 return;
 737
 738         /* hold ofdm counter */
 739         phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */
 740         phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */
 741
 742         ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
 743         FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
 744         FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16;
 745         ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
 746         FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
 747         FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16;
 748         ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
 749         FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
 750         FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16;
 751         ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
 752         FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
 753
 754         FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
 755                                      FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail +
 756                                      FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
 757
 758         ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord);
 759         FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff);
 760         FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000)>>16;
 761
 762         /* hold cck counter */
 763         phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1);
 764         phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1);
 765
 766         ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
 767         FalseAlmCnt->Cnt_Cck_fail = ret_value;
 768         ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3);
 769         FalseAlmCnt->Cnt_Cck_fail +=  (ret_value & 0xff)<<8;
 770
 771         ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
 772         FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8);
 773
 774         FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync +
 775                                 FalseAlmCnt->Cnt_SB_Search_fail +
 776                                 FalseAlmCnt->Cnt_Parity_Fail +
 777                                 FalseAlmCnt->Cnt_Rate_Illegal +
 778                                 FalseAlmCnt->Cnt_Crc8_fail +
 779                                 FalseAlmCnt->Cnt_Mcs_fail +
 780                                 FalseAlmCnt->Cnt_Cck_fail);
 781
 782         FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA;
 783
 784         ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n"));
 785         ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
 786                      ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n",
 787                      FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail));
 788         ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
 789                      ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n",
 790                      FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal));
 791         ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
 792                      ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n",
 793                      FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail));
 794         ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail));
 795         ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
 796         ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all));
 797 }
 798
 799 /* 3============================================================ */
 800 /* 3 CCK Packet Detect Threshold */
 801 /* 3============================================================ */
 802
 803 void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm)
 804 {
 805         u8 CurCCK_CCAThres;
 806         struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
 807
 808         if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT)))
 809                 return;
 810         if (pDM_Odm->ExtLNA)
 811                 return;
 812         if (pDM_Odm->bLinked) {
 813                 if (pDM_Odm->RSSI_Min > 25) {
 814                         CurCCK_CCAThres = 0xcd;
 815                 } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) {
 816                         CurCCK_CCAThres = 0x83;
 817                 } else {
 818                         if (FalseAlmCnt->Cnt_Cck_fail > 1000)
 819                                 CurCCK_CCAThres = 0x83;
 820                         else
 821                                 CurCCK_CCAThres = 0x40;
 822                 }
 823         } else {
 824                 if (FalseAlmCnt->Cnt_Cck_fail > 1000)
 825                         CurCCK_CCAThres = 0x83;
 826                 else
 827                         CurCCK_CCAThres = 0x40;
 828         }
 829         ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres);
 830 }
 831
 832 void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres)
 833 {
 834         struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
 835         struct adapter *adapt = pDM_Odm->Adapter;
 836
 837         if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres)           /* modify by Guo.Mingzhi 2012-01-03 */
 838                 usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres);
 839         pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
 840         pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
 841 }
 842
 843 void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal)
 844 {
 845         struct adapter *adapter = pDM_Odm->Adapter;
 846         struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable;
 847         u8 Rssi_Up_bound = 30;
 848         u8 Rssi_Low_bound = 25;
 849
 850         if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */
 851                 Rssi_Up_bound = 50;
 852                 Rssi_Low_bound = 45;
 853         }
 854         if (pDM_PSTable->initialize == 0) {
 855                 pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14;
 856                 pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord)&BIT3)>>3;
 857                 pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24;
 858                 pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord)&0xF000)>>12;
 859                 pDM_PSTable->initialize = 1;
 860         }
 861
 862         if (!bForceInNormal) {
 863                 if (pDM_Odm->RSSI_Min != 0xFF) {
 864                         if (pDM_PSTable->PreRFState == RF_Normal) {
 865                                 if (pDM_Odm->RSSI_Min >= Rssi_Up_bound)
 866                                         pDM_PSTable->CurRFState = RF_Save;
 867                                 else
 868                                         pDM_PSTable->CurRFState = RF_Normal;
 869                         } else {
 870                                 if (pDM_Odm->RSSI_Min <= Rssi_Low_bound)
 871                                         pDM_PSTable->CurRFState = RF_Normal;
 872                                 else
 873                                         pDM_PSTable->CurRFState = RF_Save;
 874                         }
 875                 } else {
 876                         pDM_PSTable->CurRFState = RF_MAX;
 877                 }
 878         } else {
 879                 pDM_PSTable->CurRFState = RF_Normal;
 880         }
 881
 882         if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
 883                 if (pDM_PSTable->CurRFState == RF_Save) {
 884                         phy_set_bb_reg(adapter, 0x874  , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
 885                         phy_set_bb_reg(adapter, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */
 886                         phy_set_bb_reg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */
 887                         phy_set_bb_reg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
 888                         phy_set_bb_reg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */
 889                         phy_set_bb_reg(adapter, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */
 890                         phy_set_bb_reg(adapter, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */
 891                 } else {
 892                         phy_set_bb_reg(adapter, 0x874  , 0x1CC000, pDM_PSTable->Reg874);
 893                         phy_set_bb_reg(adapter, 0xc70, BIT3, pDM_PSTable->RegC70);
 894                         phy_set_bb_reg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
 895                         phy_set_bb_reg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
 896                         phy_set_bb_reg(adapter, 0x818, BIT28, 0x0);
 897                 }
 898                 pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
 899         }
 900 }
 901
 902 /* 3============================================================ */
 903 /* 3 RATR MASK */
 904 /* 3============================================================ */
 905 /* 3============================================================ */
 906 /* 3 Rate Adaptive */
 907 /* 3============================================================ */
 908
 909 void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm)
 910 {
 911         struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive;
 912
 913         pOdmRA->Type = DM_Type_ByDriver;
 914         if (pOdmRA->Type == DM_Type_ByDriver)
 915                 pDM_Odm->bUseRAMask = true;
 916         else
 917                 pDM_Odm->bUseRAMask = false;
 918
 919         pOdmRA->RATRState = DM_RATR_STA_INIT;
 920         pOdmRA->HighRSSIThresh = 50;
 921         pOdmRA->LowRSSIThresh = 20;
 922 }
 923
 924 u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level)
 925 {
 926         struct sta_info *pEntry;
 927         u32 rate_bitmap = 0x0fffffff;
 928         u8 WirelessMode;
 929
 930         pEntry = pDM_Odm->pODM_StaInfo[macid];
 931         if (!IS_STA_VALID(pEntry))
 932                 return ra_mask;
 933
 934         WirelessMode = pEntry->wireless_mode;
 935
 936         switch (WirelessMode) {
 937         case ODM_WM_B:
 938                 if (ra_mask & 0x0000000c)               /* 11M or 5.5M enable */
 939                         rate_bitmap = 0x0000000d;
 940                 else
 941                         rate_bitmap = 0x0000000f;
 942                 break;
 943         case (ODM_WM_A|ODM_WM_G):
 944                 if (rssi_level == DM_RATR_STA_HIGH)
 945                         rate_bitmap = 0x00000f00;
 946                 else
 947                         rate_bitmap = 0x00000ff0;
 948                 break;
 949         case (ODM_WM_B|ODM_WM_G):
 950                 if (rssi_level == DM_RATR_STA_HIGH)
 951                         rate_bitmap = 0x00000f00;
 952                 else if (rssi_level == DM_RATR_STA_MIDDLE)
 953                         rate_bitmap = 0x00000ff0;
 954                 else
 955                         rate_bitmap = 0x00000ff5;
 956                 break;
 957         case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
 958         case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
 959                 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
 960                         if (rssi_level == DM_RATR_STA_HIGH) {
 961                                 rate_bitmap = 0x000f0000;
 962                         } else if (rssi_level == DM_RATR_STA_MIDDLE) {
 963                                 rate_bitmap = 0x000ff000;
 964                         } else {
 965                                 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
 966                                         rate_bitmap = 0x000ff015;
 967                                 else
 968                                         rate_bitmap = 0x000ff005;
 969                         }
 970                 } else {
 971                         if (rssi_level == DM_RATR_STA_HIGH) {
 972                                 rate_bitmap = 0x0f8f0000;
 973                         } else if (rssi_level == DM_RATR_STA_MIDDLE) {
 974                                 rate_bitmap = 0x0f8ff000;
 975                         } else {
 976                                 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
 977                                         rate_bitmap = 0x0f8ff015;
 978                                 else
 979                                         rate_bitmap = 0x0f8ff005;
 980                         }
 981                 }
 982                 break;
 983         default:
 984                 /* case WIRELESS_11_24N: */
 985                 /* case WIRELESS_11_5N: */
 986                 if (pDM_Odm->RFType == RF_1T2R)
 987                         rate_bitmap = 0x000fffff;
 988                 else
 989                         rate_bitmap = 0x0fffffff;
 990                 break;
 991         }
 992
 993         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
 994                      (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n",
 995                      rssi_level, WirelessMode, rate_bitmap));
 996
 997         return rate_bitmap;
 998 }
 999
1000 /*-----------------------------------------------------------------------------
1001  * Function:    odm_RefreshRateAdaptiveMask()
1002  *
1003  * Overview:    Update rate table mask according to rssi
1004  *
1005  * Input:               NONE
1006  *
1007  * Output:              NONE
1008  *
1009  * Return:              NONE
1010  *
1011  * Revised History:
1012  *      When            Who             Remark
1013  *      05/27/2009      hpfan   Create Version 0.
1014  *
1015  *---------------------------------------------------------------------------*/
1016 void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm)
1017 {
1018         if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK))
1019                 return;
1020         /*  */
1021         /*  2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
1022         /*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
1023         /*  HW dynamic mechanism. */
1024         /*  */
1025         odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
1026 }
1027
1028 void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm)
1029 {
1030         u8 i;
1031         struct adapter *pAdapter = pDM_Odm->Adapter;
1032
1033         if (pAdapter->bDriverStopped) {
1034                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
1035                 return;
1036         }
1037
1038         if (!pDM_Odm->bUseRAMask) {
1039                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
1040                 return;
1041         }
1042
1043         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1044                 struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i];
1045                 if (IS_STA_VALID(pstat)) {
1046                         if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false , &pstat->rssi_level)) {
1047                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
1048                                              ("RSSI:%d, RSSI_LEVEL:%d\n",
1049                                              pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level));
1050                                 rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level);
1051                         }
1052                 }
1053         }
1054 }
1055
1056 /*  Return Value: bool */
1057 /*  - true: RATRState is changed. */
1058 bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState)
1059 {
1060         struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive;
1061         const u8 GoUpGap = 5;
1062         u8 HighRSSIThreshForRA = pRA->HighRSSIThresh;
1063         u8 LowRSSIThreshForRA = pRA->LowRSSIThresh;
1064         u8 RATRState;
1065
1066         /*  Threshold Adjustment: */
1067         /*  when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */
1068         /*  Here GoUpGap is added to solve the boundary's level alternation issue. */
1069         switch (*pRATRState) {
1070         case DM_RATR_STA_INIT:
1071         case DM_RATR_STA_HIGH:
1072                 break;
1073         case DM_RATR_STA_MIDDLE:
1074                 HighRSSIThreshForRA += GoUpGap;
1075                 break;
1076         case DM_RATR_STA_LOW:
1077                 HighRSSIThreshForRA += GoUpGap;
1078                 LowRSSIThreshForRA += GoUpGap;
1079                 break;
1080         default:
1081                 ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState));
1082                 break;
1083         }
1084
1085         /*  Decide RATRState by RSSI. */
1086         if (RSSI > HighRSSIThreshForRA)
1087                 RATRState = DM_RATR_STA_HIGH;
1088         else if (RSSI > LowRSSIThreshForRA)
1089                 RATRState = DM_RATR_STA_MIDDLE;
1090         else
1091                 RATRState = DM_RATR_STA_LOW;
1092
1093         if (*pRATRState != RATRState || bForceUpdate) {
1094                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState));
1095                 *pRATRState = RATRState;
1096                 return true;
1097         }
1098         return false;
1099 }
1100
1101 /* 3============================================================ */
1102 /* 3 Dynamic Tx Power */
1103 /* 3============================================================ */
1104
1105 void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm)
1106 {
1107         struct adapter *Adapter = pDM_Odm->Adapter;
1108         struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
1109         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
1110         pdmpriv->bDynamicTxPowerEnable = false;
1111         pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
1112         pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
1113 }
1114
1115 /* 3============================================================ */
1116 /* 3 RSSI Monitor */
1117 /* 3============================================================ */
1118
1119 void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm)
1120 {
1121         if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
1122                 return;
1123
1124         /*  */
1125         /*  2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
1126         /*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
1127         /*  HW dynamic mechanism. */
1128         /*  */
1129         odm_RSSIMonitorCheckCE(pDM_Odm);
1130 }       /*  odm_RSSIMonitorCheck */
1131
1132 static void FindMinimumRSSI(struct adapter *pAdapter)
1133 {
1134         struct hal_data_8188e   *pHalData = GET_HAL_DATA(pAdapter);
1135         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
1136
1137         /* 1 1.Unconditionally set RSSI */
1138         pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
1139 }
1140
1141 void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm)
1142 {
1143         struct adapter *Adapter = pDM_Odm->Adapter;
1144         struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
1145         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
1146         int     i;
1147         int     tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
1148         u8      sta_cnt = 0;
1149         u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */
1150         struct sta_info *psta;
1151         u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1152
1153         if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED))
1154                 return;
1155
1156         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1157                 psta = pDM_Odm->pODM_StaInfo[i];
1158                 if (IS_STA_VALID(psta) &&
1159                     (psta->state & WIFI_ASOC_STATE) &&
1160                     memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) &&
1161                     memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) {
1162                         if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
1163                                 tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
1164
1165                         if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
1166                                 tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
1167                         if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1))
1168                                 PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16));
1169                 }
1170         }
1171
1172         for (i = 0; i < sta_cnt; i++) {
1173                 if (PWDB_rssi[i] != (0)) {
1174                         if (pHalData->fw_ractrl) {
1175                                 /*  Report every sta's RSSI to FW */
1176                         } else {
1177                                 ODM_RA_SetRSSI_8188E(
1178                                 &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF));
1179                         }
1180                 }
1181         }
1182
1183         if (tmpEntryMaxPWDB != 0)       /*  If associated entry is found */
1184                 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
1185         else
1186                 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
1187
1188         if (tmpEntryMinPWDB != 0xff) /*  If associated entry is found */
1189                 pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
1190         else
1191                 pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
1192
1193         FindMinimumRSSI(Adapter);
1194         ODM_CmnInfoUpdate(&pHalData->odmpriv , ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
1195 }
1196
1197 /* 3============================================================ */
1198 /* 3 Tx Power Tracking */
1199 /* 3============================================================ */
1200
1201 void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm)
1202 {
1203         odm_TXPowerTrackingThermalMeterInit(pDM_Odm);
1204 }
1205
1206 void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm)
1207 {
1208         pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
1209         pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
1210         pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false;
1211         if (*(pDM_Odm->mp_mode) != 1)
1212                 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
1213         MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl);
1214
1215         pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
1216 }
1217
1218 void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm)
1219 {
1220         /*  2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
1221         /*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
1222         /*  HW dynamic mechanism. */
1223         odm_TXPowerTrackingCheckCE(pDM_Odm);
1224 }
1225
1226 void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm)
1227 {
1228         struct adapter *Adapter = pDM_Odm->Adapter;
1229
1230         if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK))
1231                 return;
1232
1233         if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) {             /* at least delay 1 sec */
1234                 phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03);
1235
1236                 pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
1237                 return;
1238         } else {
1239                 rtl88eu_dm_txpower_tracking_callback_thermalmeter(Adapter);
1240                 pDM_Odm->RFCalibrateInfo.TM_Trigger = 0;
1241         }
1242 }
1243
1244 /* 3============================================================ */
1245 /* 3 SW Antenna Diversity */
1246 /* 3============================================================ */
1247
1248 void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
1249 {
1250         if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
1251                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n"));
1252                 return;
1253         }
1254
1255         rtl88eu_dm_antenna_div_init(pDM_Odm);
1256 }
1257
1258 void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
1259 {
1260         if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
1261                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n"));
1262                 return;
1263         }
1264
1265         rtl88eu_dm_antenna_diversity(pDM_Odm);
1266 }
1267
1268 /* EDCA Turbo */
1269 void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm)
1270 {
1271         struct adapter *Adapter = pDM_Odm->Adapter;
1272         pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
1273         pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false;
1274         Adapter->recvpriv.bIsAnyNonBEPkts = false;
1275
1276         ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM)));
1277         ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM)));
1278         ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM)));
1279         ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM)));
1280 }       /*  ODM_InitEdcaTurbo */
1281
1282 void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm)
1283 {
1284         /*  2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
1285         /*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
1286         /*  HW dynamic mechanism. */
1287         ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_EdcaTurboCheck========================>\n"));
1288
1289         if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO))
1290                 return;
1291
1292         odm_EdcaTurboCheckCE(pDM_Odm);
1293         ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n"));
1294 }       /*  odm_CheckEdcaTurbo */
1295
1296 void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm)
1297 {
1298         struct adapter *Adapter = pDM_Odm->Adapter;
1299         u32     trafficIndex;
1300         u32     edca_param;
1301         u64     cur_tx_bytes = 0;
1302         u64     cur_rx_bytes = 0;
1303         u8      bbtchange = false;
1304         struct hal_data_8188e           *pHalData = GET_HAL_DATA(Adapter);
1305         struct xmit_priv                *pxmitpriv = &(Adapter->xmitpriv);
1306         struct recv_priv                *precvpriv = &(Adapter->recvpriv);
1307         struct registry_priv    *pregpriv = &Adapter->registrypriv;
1308         struct mlme_ext_priv    *pmlmeext = &(Adapter->mlmeextpriv);
1309         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1310
1311         if ((pregpriv->wifi_spec == 1))/*  (pmlmeinfo->HT_enable == 0)) */
1312                 goto dm_CheckEdcaTurbo_EXIT;
1313
1314         if (pmlmeinfo->assoc_AP_vendor >=  HT_IOT_PEER_MAX)
1315                 goto dm_CheckEdcaTurbo_EXIT;
1316
1317         /*  Check if the status needs to be changed. */
1318         if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) {
1319                 cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
1320                 cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
1321
1322                 /* traffic, TX or RX */
1323                 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) ||
1324                     (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) {
1325                         if (cur_tx_bytes > (cur_rx_bytes << 2)) {
1326                                 /*  Uplink TP is present. */
1327                                 trafficIndex = UP_LINK;
1328                         } else {
1329                                 /*  Balance TP is present. */
1330                                 trafficIndex = DOWN_LINK;
1331                         }
1332                 } else {
1333                         if (cur_rx_bytes > (cur_tx_bytes << 2)) {
1334                                 /*  Downlink TP is present. */
1335                                 trafficIndex = DOWN_LINK;
1336                         } else {
1337                                 /*  Balance TP is present. */
1338                                 trafficIndex = UP_LINK;
1339                         }
1340                 }
1341
1342                 if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) {
1343                         if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
1344                                 edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
1345                         else
1346                                 edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex];
1347
1348                         usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
1349
1350                         pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
1351                 }
1352
1353                 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true;
1354         } else {
1355                 /*  Turn Off EDCA turbo here. */
1356                 /*  Restore original EDCA according to the declaration of AP. */
1357                  if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) {
1358                         usb_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
1359                         pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
1360                 }
1361         }
1362
1363 dm_CheckEdcaTurbo_EXIT:
1364         /*  Set variables for next time. */
1365         precvpriv->bIsAnyNonBEPkts = false;
1366         pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
1367         precvpriv->last_rx_bytes = precvpriv->rx_bytes;
1368 }