kernel/drivers/staging/rdma/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  35
  36 #include <linux/spinlock.h>
  37 #include <linux/idr.h>
  38 #include <linux/pci.h>
  39 #include <linux/io.h>
  40 #include <linux/delay.h>
  41 #include <linux/netdevice.h>
  42 #include <linux/vmalloc.h>
  43 #include <linux/bitmap.h>
  44 #include <linux/slab.h>
  45 #include <linux/module.h>
  46 #ifdef CONFIG_X86_64
  47 #include <asm/pat.h>
  48 #endif
  49
  50 #include "ipath_kernel.h"
  51 #include "ipath_verbs.h"
  52
  53 static void ipath_update_pio_bufs(struct ipath_devdata *);
  54
  55 const char *ipath_get_unit_name(int unit)
  56 {
  57         static char iname[16];
  58         snprintf(iname, sizeof iname, "infinipath%u", unit);
  59         return iname;
  60 }
  61
  62 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  63 #define PFX IPATH_DRV_NAME ": "
  64
  65 /*
  66  * The size has to be longer than this string, so we can append
  67  * board/chip information to it in the init code.
  68  */
  69 const char ib_ipath_version[] = IPATH_IDSTR "\n";
  70
  71 static struct idr unit_table;
  72 DEFINE_SPINLOCK(ipath_devs_lock);
  73 LIST_HEAD(ipath_dev_list);
  74
  75 wait_queue_head_t ipath_state_wait;
  76
  77 unsigned ipath_debug = __IPATH_INFO;
  78
  79 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  80 MODULE_PARM_DESC(debug, "mask for debug prints");
  81 EXPORT_SYMBOL_GPL(ipath_debug);
  82
  83 unsigned ipath_mtu4096 = 1; /* max 4KB IB mtu by default, if supported */
  84 module_param_named(mtu4096, ipath_mtu4096, uint, S_IRUGO);
  85 MODULE_PARM_DESC(mtu4096, "enable MTU of 4096 bytes, if supported");
  86
  87 static unsigned ipath_hol_timeout_ms = 13000;
  88 module_param_named(hol_timeout_ms, ipath_hol_timeout_ms, uint, S_IRUGO);
  89 MODULE_PARM_DESC(hol_timeout_ms,
  90         "duration of user app suspension after link failure");
  91
  92 unsigned ipath_linkrecovery = 1;
  93 module_param_named(linkrecovery, ipath_linkrecovery, uint, S_IWUSR | S_IRUGO);
  94 MODULE_PARM_DESC(linkrecovery, "enable workaround for link recovery issue");
  95
  96 MODULE_LICENSE("GPL");
  97 MODULE_AUTHOR("QLogic <support@qlogic.com>");
  98 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  99
 100 /*
 101  * Table to translate the LINKTRAININGSTATE portion of
 102  * IBCStatus to a human-readable form.
 103  */
 104 const char *ipath_ibcstatus_str[] = {
 105         "Disabled",
 106         "LinkUp",
 107         "PollActive",
 108         "PollQuiet",
 109         "SleepDelay",
 110         "SleepQuiet",
 111         "LState6",              /* unused */
 112         "LState7",              /* unused */
 113         "CfgDebounce",
 114         "CfgRcvfCfg",
 115         "CfgWaitRmt",
 116         "CfgIdle",
 117         "RecovRetrain",
 118         "CfgTxRevLane",         /* unused before IBA7220 */
 119         "RecovWaitRmt",
 120         "RecovIdle",
 121         /* below were added for IBA7220 */
 122         "CfgEnhanced",
 123         "CfgTest",
 124         "CfgWaitRmtTest",
 125         "CfgWaitCfgEnhanced",
 126         "SendTS_T",
 127         "SendTstIdles",
 128         "RcvTS_T",
 129         "SendTst_TS1s",
 130         "LTState18", "LTState19", "LTState1A", "LTState1B",
 131         "LTState1C", "LTState1D", "LTState1E", "LTState1F"
 132 };
 133
 134 static void ipath_remove_one(struct pci_dev *);
 135 static int ipath_init_one(struct pci_dev *, const struct pci_device_id *);
 136
 137 /* Only needed for registration, nothing else needs this info */
 138 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 139 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 140
 141 /* Number of seconds before our card status check...  */
 142 #define STATUS_TIMEOUT 60
 143
 144 static const struct pci_device_id ipath_pci_tbl[] = {
 145         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 146         { 0, }
 147 };
 148
 149 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 150
 151 static struct pci_driver ipath_driver = {
 152         .name = IPATH_DRV_NAME,
 153         .probe = ipath_init_one,
 154         .remove = ipath_remove_one,
 155         .id_table = ipath_pci_tbl,
 156         .driver = {
 157                 .groups = ipath_driver_attr_groups,
 158         },
 159 };
 160
 161 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 162                              u32 *bar0, u32 *bar1)
 163 {
 164         int ret;
 165
 166         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 167         if (ret)
 168                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 169                               "error %d\n", -ret);
 170
 171         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 172         if (ret)
 173                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 174                               "error %d\n", -ret);
 175
 176         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 177 }
 178
 179 static void ipath_free_devdata(struct pci_dev *pdev,
 180                                struct ipath_devdata *dd)
 181 {
 182         unsigned long flags;
 183
 184         pci_set_drvdata(pdev, NULL);
 185
 186         if (dd->ipath_unit != -1) {
 187                 spin_lock_irqsave(&ipath_devs_lock, flags);
 188                 idr_remove(&unit_table, dd->ipath_unit);
 189                 list_del(&dd->ipath_list);
 190                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 191         }
 192         vfree(dd);
 193 }
 194
 195 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 196 {
 197         unsigned long flags;
 198         struct ipath_devdata *dd;
 199         int ret;
 200
 201         dd = vzalloc(sizeof(*dd));
 202         if (!dd) {
 203                 dd = ERR_PTR(-ENOMEM);
 204                 goto bail;
 205         }
 206         dd->ipath_unit = -1;
 207
 208         idr_preload(GFP_KERNEL);
 209         spin_lock_irqsave(&ipath_devs_lock, flags);
 210
 211         ret = idr_alloc(&unit_table, dd, 0, 0, GFP_NOWAIT);
 212         if (ret < 0) {
 213                 printk(KERN_ERR IPATH_DRV_NAME
 214                        ": Could not allocate unit ID: error %d\n", -ret);
 215                 ipath_free_devdata(pdev, dd);
 216                 dd = ERR_PTR(ret);
 217                 goto bail_unlock;
 218         }
 219         dd->ipath_unit = ret;
 220
 221         dd->pcidev = pdev;
 222         pci_set_drvdata(pdev, dd);
 223
 224         list_add(&dd->ipath_list, &ipath_dev_list);
 225
 226 bail_unlock:
 227         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 228         idr_preload_end();
 229 bail:
 230         return dd;
 231 }
 232
 233 static inline struct ipath_devdata *__ipath_lookup(int unit)
 234 {
 235         return idr_find(&unit_table, unit);
 236 }
 237
 238 struct ipath_devdata *ipath_lookup(int unit)
 239 {
 240         struct ipath_devdata *dd;
 241         unsigned long flags;
 242
 243         spin_lock_irqsave(&ipath_devs_lock, flags);
 244         dd = __ipath_lookup(unit);
 245         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 246
 247         return dd;
 248 }
 249
 250 int ipath_count_units(int *npresentp, int *nupp, int *maxportsp)
 251 {
 252         int nunits, npresent, nup;
 253         struct ipath_devdata *dd;
 254         unsigned long flags;
 255         int maxports;
 256
 257         nunits = npresent = nup = maxports = 0;
 258
 259         spin_lock_irqsave(&ipath_devs_lock, flags);
 260
 261         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 262                 nunits++;
 263                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 264                         npresent++;
 265                 if (dd->ipath_lid &&
 266                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 267                                          | IPATH_LINKUNK)))
 268                         nup++;
 269                 if (dd->ipath_cfgports > maxports)
 270                         maxports = dd->ipath_cfgports;
 271         }
 272
 273         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 274
 275         if (npresentp)
 276                 *npresentp = npresent;
 277         if (nupp)
 278                 *nupp = nup;
 279         if (maxportsp)
 280                 *maxportsp = maxports;
 281
 282         return nunits;
 283 }
 284
 285 /*
 286  * These next two routines are placeholders in case we don't have per-arch
 287  * code for controlling write combining.  If explicit control of write
 288  * combining is not available, performance will probably be awful.
 289  */
 290
 291 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 292 {
 293         return -EOPNOTSUPP;
 294 }
 295
 296 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 297 {
 298 }
 299
 300 /*
 301  * Perform a PIO buffer bandwidth write test, to verify proper system
 302  * configuration.  Even when all the setup calls work, occasionally
 303  * BIOS or other issues can prevent write combining from working, or
 304  * can cause other bandwidth problems to the chip.
 305  *
 306  * This test simply writes the same buffer over and over again, and
 307  * measures close to the peak bandwidth to the chip (not testing
 308  * data bandwidth to the wire).   On chips that use an address-based
 309  * trigger to send packets to the wire, this is easy.  On chips that
 310  * use a count to trigger, we want to make sure that the packet doesn't
 311  * go out on the wire, or trigger flow control checks.
 312  */
 313 static void ipath_verify_pioperf(struct ipath_devdata *dd)
 314 {
 315         u32 pbnum, cnt, lcnt;
 316         u32 __iomem *piobuf;
 317         u32 *addr;
 318         u64 msecs, emsecs;
 319
 320         piobuf = ipath_getpiobuf(dd, 0, &pbnum);
 321         if (!piobuf) {
 322                 dev_info(&dd->pcidev->dev,
 323                         "No PIObufs for checking perf, skipping\n");
 324                 return;
 325         }
 326
 327         /*
 328          * Enough to give us a reasonable test, less than piobuf size, and
 329          * likely multiple of store buffer length.
 330          */
 331         cnt = 1024;
 332
 333         addr = vmalloc(cnt);
 334         if (!addr) {
 335                 dev_info(&dd->pcidev->dev,
 336                         "Couldn't get memory for checking PIO perf,"
 337                         " skipping\n");
 338                 goto done;
 339         }
 340
 341         preempt_disable();  /* we want reasonably accurate elapsed time */
 342         msecs = 1 + jiffies_to_msecs(jiffies);
 343         for (lcnt = 0; lcnt < 10000U; lcnt++) {
 344                 /* wait until we cross msec boundary */
 345                 if (jiffies_to_msecs(jiffies) >= msecs)
 346                         break;
 347                 udelay(1);
 348         }
 349
 350         ipath_disable_armlaunch(dd);
 351
 352         /*
 353          * length 0, no dwords actually sent, and mark as VL15
 354          * on chips where that may matter (due to IB flowcontrol)
 355          */
 356         if ((dd->ipath_flags & IPATH_HAS_PBC_CNT))
 357                 writeq(1UL << 63, piobuf);
 358         else
 359                 writeq(0, piobuf);
 360         ipath_flush_wc();
 361
 362         /*
 363          * this is only roughly accurate, since even with preempt we
 364          * still take interrupts that could take a while.   Running for
 365          * >= 5 msec seems to get us "close enough" to accurate values
 366          */
 367         msecs = jiffies_to_msecs(jiffies);
 368         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
 369                 __iowrite32_copy(piobuf + 64, addr, cnt >> 2);
 370                 emsecs = jiffies_to_msecs(jiffies) - msecs;
 371         }
 372
 373         /* 1 GiB/sec, slightly over IB SDR line rate */
 374         if (lcnt < (emsecs * 1024U))
 375                 ipath_dev_err(dd,
 376                         "Performance problem: bandwidth to PIO buffers is "
 377                         "only %u MiB/sec\n",
 378                         lcnt / (u32) emsecs);
 379         else
 380                 ipath_dbg("PIO buffer bandwidth %u MiB/sec is OK\n",
 381                         lcnt / (u32) emsecs);
 382
 383         preempt_enable();
 384
 385         vfree(addr);
 386
 387 done:
 388         /* disarm piobuf, so it's available again */
 389         ipath_disarm_piobufs(dd, pbnum, 1);
 390         ipath_enable_armlaunch(dd);
 391 }
 392
 393 static void cleanup_device(struct ipath_devdata *dd);
 394
 395 static int ipath_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 396 {
 397         int ret, len, j;
 398         struct ipath_devdata *dd;
 399         unsigned long long addr;
 400         u32 bar0 = 0, bar1 = 0;
 401
 402 #ifdef CONFIG_X86_64
 403         if (pat_enabled()) {
 404                 pr_warn("ipath needs PAT disabled, boot with nopat kernel parameter\n");
 405                 ret = -ENODEV;
 406                 goto bail;
 407         }
 408 #endif
 409
 410         dd = ipath_alloc_devdata(pdev);
 411         if (IS_ERR(dd)) {
 412                 ret = PTR_ERR(dd);
 413                 printk(KERN_ERR IPATH_DRV_NAME
 414                        ": Could not allocate devdata: error %d\n", -ret);
 415                 goto bail;
 416         }
 417
 418         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 419
 420         ret = pci_enable_device(pdev);
 421         if (ret) {
 422                 /* This can happen iff:
 423                  *
 424                  * We did a chip reset, and then failed to reprogram the
 425                  * BAR, or the chip reset due to an internal error.  We then
 426                  * unloaded the driver and reloaded it.
 427                  *
 428                  * Both reset cases set the BAR back to initial state.  For
 429                  * the latter case, the AER sticky error bit at offset 0x718
 430                  * should be set, but the Linux kernel doesn't yet know
 431                  * about that, it appears.  If the original BAR was retained
 432                  * in the kernel data structures, this may be OK.
 433                  */
 434                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 435                               dd->ipath_unit, -ret);
 436                 goto bail_devdata;
 437         }
 438         addr = pci_resource_start(pdev, 0);
 439         len = pci_resource_len(pdev, 0);
 440         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %d, vend %x/%x "
 441                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 442                    ent->device, ent->driver_data);
 443
 444         read_bars(dd, pdev, &bar0, &bar1);
 445
 446         if (!bar1 && !(bar0 & ~0xf)) {
 447                 if (addr) {
 448                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 449                                  "rewriting as %llx\n", addr);
 450                         ret = pci_write_config_dword(
 451                                 pdev, PCI_BASE_ADDRESS_0, addr);
 452                         if (ret) {
 453                                 ipath_dev_err(dd, "rewrite of BAR0 "
 454                                               "failed: err %d\n", -ret);
 455                                 goto bail_disable;
 456                         }
 457                         ret = pci_write_config_dword(
 458                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 459                         if (ret) {
 460                                 ipath_dev_err(dd, "rewrite of BAR1 "
 461                                               "failed: err %d\n", -ret);
 462                                 goto bail_disable;
 463                         }
 464                 } else {
 465                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 466                                       "not usable until reboot\n");
 467                         ret = -ENODEV;
 468                         goto bail_disable;
 469                 }
 470         }
 471
 472         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 473         if (ret) {
 474                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 475                          "err %d\n", dd->ipath_unit, -ret);
 476                 goto bail_disable;
 477         }
 478
 479         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
 480         if (ret) {
 481                 /*
 482                  * if the 64 bit setup fails, try 32 bit.  Some systems
 483                  * do not setup 64 bit maps on systems with 2GB or less
 484                  * memory installed.
 485                  */
 486                 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 487                 if (ret) {
 488                         dev_info(&pdev->dev,
 489                                 "Unable to set DMA mask for unit %u: %d\n",
 490                                 dd->ipath_unit, ret);
 491                         goto bail_regions;
 492                 } else {
 493                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 494                         ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
 495                         if (ret)
 496                                 dev_info(&pdev->dev,
 497                                         "Unable to set DMA consistent mask "
 498                                         "for unit %u: %d\n",
 499                                         dd->ipath_unit, ret);
 500
 501                 }
 502         } else {
 503                 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
 504                 if (ret)
 505                         dev_info(&pdev->dev,
 506                                 "Unable to set DMA consistent mask "
 507                                 "for unit %u: %d\n",
 508                                 dd->ipath_unit, ret);
 509         }
 510
 511         pci_set_master(pdev);
 512
 513         /*
 514          * Save BARs to rewrite after device reset.  Save all 64 bits of
 515          * BAR, just in case.
 516          */
 517         dd->ipath_pcibar0 = addr;
 518         dd->ipath_pcibar1 = addr >> 32;
 519         dd->ipath_deviceid = ent->device;       /* save for later use */
 520         dd->ipath_vendorid = ent->vendor;
 521
 522         /* setup the chip-specific functions, as early as possible. */
 523         switch (ent->device) {
 524         case PCI_DEVICE_ID_INFINIPATH_HT:
 525                 ipath_init_iba6110_funcs(dd);
 526                 break;
 527
 528         default:
 529                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 530                               "failing\n", ent->device);
 531                 return -ENODEV;
 532         }
 533
 534         for (j = 0; j < 6; j++) {
 535                 if (!pdev->resource[j].start)
 536                         continue;
 537                 ipath_cdbg(VERBOSE, "BAR %d %pR, len %llx\n",
 538                            j, &pdev->resource[j],
 539                            (unsigned long long)pci_resource_len(pdev, j));
 540         }
 541
 542         if (!addr) {
 543                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 544                 ret = -ENODEV;
 545                 goto bail_regions;
 546         }
 547
 548         dd->ipath_pcirev = pdev->revision;
 549
 550 #if defined(__powerpc__)
 551         /* There isn't a generic way to specify writethrough mappings */
 552         dd->ipath_kregbase = __ioremap(addr, len,
 553                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
 554 #else
 555         /* XXX: split this properly to enable on PAT */
 556         dd->ipath_kregbase = ioremap_nocache(addr, len);
 557 #endif
 558
 559         if (!dd->ipath_kregbase) {
 560                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 561                           addr);
 562                 ret = -ENOMEM;
 563                 goto bail_iounmap;
 564         }
 565         dd->ipath_kregend = (u64 __iomem *)
 566                 ((void __iomem *)dd->ipath_kregbase + len);
 567         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 568         /* for user mmap */
 569         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 570                    addr, dd->ipath_kregbase);
 571
 572         if (dd->ipath_f_bus(dd, pdev))
 573                 ipath_dev_err(dd, "Failed to setup config space; "
 574                               "continuing anyway\n");
 575
 576         /*
 577          * set up our interrupt handler; IRQF_SHARED probably not needed,
 578          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 579          * check 0 irq after we return from chip-specific bus setup, since
 580          * that can affect this due to setup
 581          */
 582         if (!dd->ipath_irq)
 583                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 584                               "work\n");
 585         else {
 586                 ret = request_irq(dd->ipath_irq, ipath_intr, IRQF_SHARED,
 587                                   IPATH_DRV_NAME, dd);
 588                 if (ret) {
 589                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 590                                       "irq=%d: %d\n", dd->ipath_irq, ret);
 591                         goto bail_iounmap;
 592                 }
 593         }
 594
 595         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 596         if (ret)
 597                 goto bail_irqsetup;
 598
 599         ret = ipath_enable_wc(dd);
 600
 601         if (ret)
 602                 ret = 0;
 603
 604         ipath_verify_pioperf(dd);
 605
 606         ipath_device_create_group(&pdev->dev, dd);
 607         ipathfs_add_device(dd);
 608         ipath_user_add(dd);
 609         ipath_diag_add(dd);
 610         ipath_register_ib_device(dd);
 611
 612         goto bail;
 613
 614 bail_irqsetup:
 615         cleanup_device(dd);
 616
 617         if (dd->ipath_irq)
 618                 dd->ipath_f_free_irq(dd);
 619
 620         if (dd->ipath_f_cleanup)
 621                 dd->ipath_f_cleanup(dd);
 622
 623 bail_iounmap:
 624         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 625
 626 bail_regions:
 627         pci_release_regions(pdev);
 628
 629 bail_disable:
 630         pci_disable_device(pdev);
 631
 632 bail_devdata:
 633         ipath_free_devdata(pdev, dd);
 634
 635 bail:
 636         return ret;
 637 }
 638
 639 static void cleanup_device(struct ipath_devdata *dd)
 640 {
 641         int port;
 642         struct ipath_portdata **tmp;
 643         unsigned long flags;
 644
 645         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
 646                 /* can't do anything more with chip; needs re-init */
 647                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
 648                 if (dd->ipath_kregbase) {
 649                         /*
 650                          * if we haven't already cleaned up before these are
 651                          * to ensure any register reads/writes "fail" until
 652                          * re-init
 653                          */
 654                         dd->ipath_kregbase = NULL;
 655                         dd->ipath_uregbase = 0;
 656                         dd->ipath_sregbase = 0;
 657                         dd->ipath_cregbase = 0;
 658                         dd->ipath_kregsize = 0;
 659                 }
 660                 ipath_disable_wc(dd);
 661         }
 662
 663         if (dd->ipath_spectriggerhit)
 664                 dev_info(&dd->pcidev->dev, "%lu special trigger hits\n",
 665                          dd->ipath_spectriggerhit);
 666
 667         if (dd->ipath_pioavailregs_dma) {
 668                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 669                                   (void *) dd->ipath_pioavailregs_dma,
 670                                   dd->ipath_pioavailregs_phys);
 671                 dd->ipath_pioavailregs_dma = NULL;
 672         }
 673         if (dd->ipath_dummy_hdrq) {
 674                 dma_free_coherent(&dd->pcidev->dev,
 675                         dd->ipath_pd[0]->port_rcvhdrq_size,
 676                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
 677                 dd->ipath_dummy_hdrq = NULL;
 678         }
 679
 680         if (dd->ipath_pageshadow) {
 681                 struct page **tmpp = dd->ipath_pageshadow;
 682                 dma_addr_t *tmpd = dd->ipath_physshadow;
 683                 int i, cnt = 0;
 684
 685                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
 686                            "locked\n");
 687                 for (port = 0; port < dd->ipath_cfgports; port++) {
 688                         int port_tidbase = port * dd->ipath_rcvtidcnt;
 689                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
 690                         for (i = port_tidbase; i < maxtid; i++) {
 691                                 if (!tmpp[i])
 692                                         continue;
 693                                 pci_unmap_page(dd->pcidev, tmpd[i],
 694                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
 695                                 ipath_release_user_pages(&tmpp[i], 1);
 696                                 tmpp[i] = NULL;
 697                                 cnt++;
 698                         }
 699                 }
 700                 if (cnt) {
 701                         ipath_stats.sps_pageunlocks += cnt;
 702                         ipath_cdbg(VERBOSE, "There were still %u expTID "
 703                                    "entries locked\n", cnt);
 704                 }
 705                 if (ipath_stats.sps_pagelocks ||
 706                     ipath_stats.sps_pageunlocks)
 707                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
 708                                    "unlocked via ipath_m{un}lock\n",
 709                                    (unsigned long long)
 710                                    ipath_stats.sps_pagelocks,
 711                                    (unsigned long long)
 712                                    ipath_stats.sps_pageunlocks);
 713
 714                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
 715                            dd->ipath_pageshadow);
 716                 tmpp = dd->ipath_pageshadow;
 717                 dd->ipath_pageshadow = NULL;
 718                 vfree(tmpp);
 719
 720                 dd->ipath_egrtidbase = NULL;
 721         }
 722
 723         /*
 724          * free any resources still in use (usually just kernel ports)
 725          * at unload; we do for portcnt, because that's what we allocate.
 726          * We acquire lock to be really paranoid that ipath_pd isn't being
 727          * accessed from some interrupt-related code (that should not happen,
 728          * but best to be sure).
 729          */
 730         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
 731         tmp = dd->ipath_pd;
 732         dd->ipath_pd = NULL;
 733         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
 734         for (port = 0; port < dd->ipath_portcnt; port++) {
 735                 struct ipath_portdata *pd = tmp[port];
 736                 tmp[port] = NULL; /* debugging paranoia */
 737                 ipath_free_pddata(dd, pd);
 738         }
 739         kfree(tmp);
 740 }
 741
 742 static void ipath_remove_one(struct pci_dev *pdev)
 743 {
 744         struct ipath_devdata *dd = pci_get_drvdata(pdev);
 745
 746         ipath_cdbg(VERBOSE, "removing, pdev=%p, dd=%p\n", pdev, dd);
 747
 748         /*
 749          * disable the IB link early, to be sure no new packets arrive, which
 750          * complicates the shutdown process
 751          */
 752         ipath_shutdown_device(dd);
 753
 754         flush_workqueue(ib_wq);
 755
 756         if (dd->verbs_dev)
 757                 ipath_unregister_ib_device(dd->verbs_dev);
 758
 759         ipath_diag_remove(dd);
 760         ipath_user_remove(dd);
 761         ipathfs_remove_device(dd);
 762         ipath_device_remove_group(&pdev->dev, dd);
 763
 764         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 765                    "unit %u\n", dd, (u32) dd->ipath_unit);
 766
 767         cleanup_device(dd);
 768
 769         /*
 770          * turn off rcv, send, and interrupts for all ports, all drivers
 771          * should also hard reset the chip here?
 772          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
 773          * for all versions of the driver, if they were allocated
 774          */
 775         if (dd->ipath_irq) {
 776                 ipath_cdbg(VERBOSE, "unit %u free irq %d\n",
 777                            dd->ipath_unit, dd->ipath_irq);
 778                 dd->ipath_f_free_irq(dd);
 779         } else
 780                 ipath_dbg("irq is 0, not doing free_irq "
 781                           "for unit %u\n", dd->ipath_unit);
 782         /*
 783          * we check for NULL here, because it's outside
 784          * the kregbase check, and we need to call it
 785          * after the free_irq.  Thus it's possible that
 786          * the function pointers were never initialized.
 787          */
 788         if (dd->ipath_f_cleanup)
 789                 /* clean up chip-specific stuff */
 790                 dd->ipath_f_cleanup(dd);
 791
 792         ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n", dd->ipath_kregbase);
 793         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 794         pci_release_regions(pdev);
 795         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 796         pci_disable_device(pdev);
 797
 798         ipath_free_devdata(pdev, dd);
 799 }
 800
 801 /* general driver use */
 802 DEFINE_MUTEX(ipath_mutex);
 803
 804 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 805
 806 /**
 807  * ipath_disarm_piobufs - cancel a range of PIO buffers
 808  * @dd: the infinipath device
 809  * @first: the first PIO buffer to cancel
 810  * @cnt: the number of PIO buffers to cancel
 811  *
 812  * cancel a range of PIO buffers, used when they might be armed, but
 813  * not triggered.  Used at init to ensure buffer state, and also user
 814  * process close, in case it died while writing to a PIO buffer
 815  * Also after errors.
 816  */
 817 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 818                           unsigned cnt)
 819 {
 820         unsigned i, last = first + cnt;
 821         unsigned long flags;
 822
 823         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 824         for (i = first; i < last; i++) {
 825                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 826                 /*
 827                  * The disarm-related bits are write-only, so it
 828                  * is ok to OR them in with our copy of sendctrl
 829                  * while we hold the lock.
 830                  */
 831                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 832                         dd->ipath_sendctrl | INFINIPATH_S_DISARM |
 833                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT));
 834                 /* can't disarm bufs back-to-back per iba7220 spec */
 835                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 836                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 837         }
 838         /* on some older chips, update may not happen after cancel */
 839         ipath_force_pio_avail_update(dd);
 840 }
 841
 842 /**
 843  * ipath_wait_linkstate - wait for an IB link state change to occur
 844  * @dd: the infinipath device
 845  * @state: the state to wait for
 846  * @msecs: the number of milliseconds to wait
 847  *
 848  * wait up to msecs milliseconds for IB link state change to occur for
 849  * now, take the easy polling route.  Currently used only by
 850  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
 851  * -ETIMEDOUT state can have multiple states set, for any of several
 852  * transitions.
 853  */
 854 int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state, int msecs)
 855 {
 856         dd->ipath_state_wanted = state;
 857         wait_event_interruptible_timeout(ipath_state_wait,
 858                                          (dd->ipath_flags & state),
 859                                          msecs_to_jiffies(msecs));
 860         dd->ipath_state_wanted = 0;
 861
 862         if (!(dd->ipath_flags & state)) {
 863                 u64 val;
 864                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
 865                            " ms\n",
 866                            /* test INIT ahead of DOWN, both can be set */
 867                            (state & IPATH_LINKINIT) ? "INIT" :
 868                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 869                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 870                            msecs);
 871                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 872                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 873                            (unsigned long long) ipath_read_kreg64(
 874                                    dd, dd->ipath_kregs->kr_ibcctrl),
 875                            (unsigned long long) val,
 876                            ipath_ibcstatus_str[val & dd->ibcs_lts_mask]);
 877         }
 878         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 879 }
 880
 881 static void decode_sdma_errs(struct ipath_devdata *dd, ipath_err_t err,
 882         char *buf, size_t blen)
 883 {
 884         static const struct {
 885                 ipath_err_t err;
 886                 const char *msg;
 887         } errs[] = {
 888                 { INFINIPATH_E_SDMAGENMISMATCH, "SDmaGenMismatch" },
 889                 { INFINIPATH_E_SDMAOUTOFBOUND, "SDmaOutOfBound" },
 890                 { INFINIPATH_E_SDMATAILOUTOFBOUND, "SDmaTailOutOfBound" },
 891                 { INFINIPATH_E_SDMABASE, "SDmaBase" },
 892                 { INFINIPATH_E_SDMA1STDESC, "SDma1stDesc" },
 893                 { INFINIPATH_E_SDMARPYTAG, "SDmaRpyTag" },
 894                 { INFINIPATH_E_SDMADWEN, "SDmaDwEn" },
 895                 { INFINIPATH_E_SDMAMISSINGDW, "SDmaMissingDw" },
 896                 { INFINIPATH_E_SDMAUNEXPDATA, "SDmaUnexpData" },
 897                 { INFINIPATH_E_SDMADESCADDRMISALIGN, "SDmaDescAddrMisalign" },
 898                 { INFINIPATH_E_SENDBUFMISUSE, "SendBufMisuse" },
 899                 { INFINIPATH_E_SDMADISABLED, "SDmaDisabled" },
 900         };
 901         int i;
 902         int expected;
 903         size_t bidx = 0;
 904
 905         for (i = 0; i < ARRAY_SIZE(errs); i++) {
 906                 expected = (errs[i].err != INFINIPATH_E_SDMADISABLED) ? 0 :
 907                         test_bit(IPATH_SDMA_ABORTING, &dd->ipath_sdma_status);
 908                 if ((err & errs[i].err) && !expected)
 909                         bidx += snprintf(buf + bidx, blen - bidx,
 910                                          "%s ", errs[i].msg);
 911         }
 912 }
 913
 914 /*
 915  * Decode the error status into strings, deciding whether to always
 916  * print * it or not depending on "normal packet errors" vs everything
 917  * else.   Return 1 if "real" errors, otherwise 0 if only packet
 918  * errors, so caller can decide what to print with the string.
 919  */
 920 int ipath_decode_err(struct ipath_devdata *dd, char *buf, size_t blen,
 921         ipath_err_t err)
 922 {
 923         int iserr = 1;
 924         *buf = '\0';
 925         if (err & INFINIPATH_E_PKTERRS) {
 926                 if (!(err & ~INFINIPATH_E_PKTERRS))
 927                         iserr = 0; // if only packet errors.
 928                 if (ipath_debug & __IPATH_ERRPKTDBG) {
 929                         if (err & INFINIPATH_E_REBP)
 930                                 strlcat(buf, "EBP ", blen);
 931                         if (err & INFINIPATH_E_RVCRC)
 932                                 strlcat(buf, "VCRC ", blen);
 933                         if (err & INFINIPATH_E_RICRC) {
 934                                 strlcat(buf, "CRC ", blen);
 935                                 // clear for check below, so only once
 936                                 err &= INFINIPATH_E_RICRC;
 937                         }
 938                         if (err & INFINIPATH_E_RSHORTPKTLEN)
 939                                 strlcat(buf, "rshortpktlen ", blen);
 940                         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 941                                 strlcat(buf, "sdroppeddatapkt ", blen);
 942                         if (err & INFINIPATH_E_SPKTLEN)
 943                                 strlcat(buf, "spktlen ", blen);
 944                 }
 945                 if ((err & INFINIPATH_E_RICRC) &&
 946                         !(err&(INFINIPATH_E_RVCRC|INFINIPATH_E_REBP)))
 947                         strlcat(buf, "CRC ", blen);
 948                 if (!iserr)
 949                         goto done;
 950         }
 951         if (err & INFINIPATH_E_RHDRLEN)
 952                 strlcat(buf, "rhdrlen ", blen);
 953         if (err & INFINIPATH_E_RBADTID)
 954                 strlcat(buf, "rbadtid ", blen);
 955         if (err & INFINIPATH_E_RBADVERSION)
 956                 strlcat(buf, "rbadversion ", blen);
 957         if (err & INFINIPATH_E_RHDR)
 958                 strlcat(buf, "rhdr ", blen);
 959         if (err & INFINIPATH_E_SENDSPECIALTRIGGER)
 960                 strlcat(buf, "sendspecialtrigger ", blen);
 961         if (err & INFINIPATH_E_RLONGPKTLEN)
 962                 strlcat(buf, "rlongpktlen ", blen);
 963         if (err & INFINIPATH_E_RMAXPKTLEN)
 964                 strlcat(buf, "rmaxpktlen ", blen);
 965         if (err & INFINIPATH_E_RMINPKTLEN)
 966                 strlcat(buf, "rminpktlen ", blen);
 967         if (err & INFINIPATH_E_SMINPKTLEN)
 968                 strlcat(buf, "sminpktlen ", blen);
 969         if (err & INFINIPATH_E_RFORMATERR)
 970                 strlcat(buf, "rformaterr ", blen);
 971         if (err & INFINIPATH_E_RUNSUPVL)
 972                 strlcat(buf, "runsupvl ", blen);
 973         if (err & INFINIPATH_E_RUNEXPCHAR)
 974                 strlcat(buf, "runexpchar ", blen);
 975         if (err & INFINIPATH_E_RIBFLOW)
 976                 strlcat(buf, "ribflow ", blen);
 977         if (err & INFINIPATH_E_SUNDERRUN)
 978                 strlcat(buf, "sunderrun ", blen);
 979         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 980                 strlcat(buf, "spioarmlaunch ", blen);
 981         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 982                 strlcat(buf, "sunexperrpktnum ", blen);
 983         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 984                 strlcat(buf, "sdroppedsmppkt ", blen);
 985         if (err & INFINIPATH_E_SMAXPKTLEN)
 986                 strlcat(buf, "smaxpktlen ", blen);
 987         if (err & INFINIPATH_E_SUNSUPVL)
 988                 strlcat(buf, "sunsupVL ", blen);
 989         if (err & INFINIPATH_E_INVALIDADDR)
 990                 strlcat(buf, "invalidaddr ", blen);
 991         if (err & INFINIPATH_E_RRCVEGRFULL)
 992                 strlcat(buf, "rcvegrfull ", blen);
 993         if (err & INFINIPATH_E_RRCVHDRFULL)
 994                 strlcat(buf, "rcvhdrfull ", blen);
 995         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 996                 strlcat(buf, "ibcstatuschg ", blen);
 997         if (err & INFINIPATH_E_RIBLOSTLINK)
 998                 strlcat(buf, "riblostlink ", blen);
 999         if (err & INFINIPATH_E_HARDWARE)
1000                 strlcat(buf, "hardware ", blen);
1001         if (err & INFINIPATH_E_RESET)
1002                 strlcat(buf, "reset ", blen);
1003         if (err & INFINIPATH_E_SDMAERRS)
1004                 decode_sdma_errs(dd, err, buf, blen);
1005         if (err & INFINIPATH_E_INVALIDEEPCMD)
1006                 strlcat(buf, "invalideepromcmd ", blen);
1007 done:
1008         return iserr;
1009 }
1010
1011 /**
1012  * get_rhf_errstring - decode RHF errors
1013  * @err: the err number
1014  * @msg: the output buffer
1015  * @len: the length of the output buffer
1016  *
1017  * only used one place now, may want more later
1018  */
1019 static void get_rhf_errstring(u32 err, char *msg, size_t len)
1020 {
1021         /* if no errors, and so don't need to check what's first */
1022         *msg = '\0';
1023
1024         if (err & INFINIPATH_RHF_H_ICRCERR)
1025                 strlcat(msg, "icrcerr ", len);
1026         if (err & INFINIPATH_RHF_H_VCRCERR)
1027                 strlcat(msg, "vcrcerr ", len);
1028         if (err & INFINIPATH_RHF_H_PARITYERR)
1029                 strlcat(msg, "parityerr ", len);
1030         if (err & INFINIPATH_RHF_H_LENERR)
1031                 strlcat(msg, "lenerr ", len);
1032         if (err & INFINIPATH_RHF_H_MTUERR)
1033                 strlcat(msg, "mtuerr ", len);
1034         if (err & INFINIPATH_RHF_H_IHDRERR)
1035                 /* infinipath hdr checksum error */
1036                 strlcat(msg, "ipathhdrerr ", len);
1037         if (err & INFINIPATH_RHF_H_TIDERR)
1038                 strlcat(msg, "tiderr ", len);
1039         if (err & INFINIPATH_RHF_H_MKERR)
1040                 /* bad port, offset, etc. */
1041                 strlcat(msg, "invalid ipathhdr ", len);
1042         if (err & INFINIPATH_RHF_H_IBERR)
1043                 strlcat(msg, "iberr ", len);
1044         if (err & INFINIPATH_RHF_L_SWA)
1045                 strlcat(msg, "swA ", len);
1046         if (err & INFINIPATH_RHF_L_SWB)
1047                 strlcat(msg, "swB ", len);
1048 }
1049
1050 /**
1051  * ipath_get_egrbuf - get an eager buffer
1052  * @dd: the infinipath device
1053  * @bufnum: the eager buffer to get
1054  *
1055  * must only be called if ipath_pd[port] is known to be allocated
1056  */
1057 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum)
1058 {
1059         return dd->ipath_port0_skbinfo ?
1060                 (void *) dd->ipath_port0_skbinfo[bufnum].skb->data : NULL;
1061 }
1062
1063 /**
1064  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
1065  * @dd: the infinipath device
1066  * @gfp_mask: the sk_buff SFP mask
1067  */
1068 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
1069                                 gfp_t gfp_mask)
1070 {
1071         struct sk_buff *skb;
1072         u32 len;
1073
1074         /*
1075          * Only fully supported way to handle this is to allocate lots
1076          * extra, align as needed, and then do skb_reserve().  That wastes
1077          * a lot of memory...  I'll have to hack this into infinipath_copy
1078          * also.
1079          */
1080
1081         /*
1082          * We need 2 extra bytes for ipath_ether data sent in the
1083          * key header.  In order to keep everything dword aligned,
1084          * we'll reserve 4 bytes.
1085          */
1086         len = dd->ipath_ibmaxlen + 4;
1087
1088         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1089                 /* We need a 2KB multiple alignment, and there is no way
1090                  * to do it except to allocate extra and then skb_reserve
1091                  * enough to bring it up to the right alignment.
1092                  */
1093                 len += 2047;
1094         }
1095
1096         skb = __dev_alloc_skb(len, gfp_mask);
1097         if (!skb) {
1098                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
1099                               len);
1100                 goto bail;
1101         }
1102
1103         skb_reserve(skb, 4);
1104
1105         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1106                 u32 una = (unsigned long)skb->data & 2047;
1107                 if (una)
1108                         skb_reserve(skb, 2048 - una);
1109         }
1110
1111 bail:
1112         return skb;
1113 }
1114
1115 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
1116                              u32 eflags,
1117                              u32 l,
1118                              u32 etail,
1119                              __le32 *rhf_addr,
1120                              struct ipath_message_header *hdr)
1121 {
1122         char emsg[128];
1123
1124         get_rhf_errstring(eflags, emsg, sizeof emsg);
1125         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
1126                    "tlen=%x opcode=%x egridx=%x: %s\n",
1127                    eflags, l,
1128                    ipath_hdrget_rcv_type(rhf_addr),
1129                    ipath_hdrget_length_in_bytes(rhf_addr),
1130                    be32_to_cpu(hdr->bth[0]) >> 24,
1131                    etail, emsg);
1132
1133         /* Count local link integrity errors. */
1134         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
1135                 u8 n = (dd->ipath_ibcctrl >>
1136                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
1137                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
1138
1139                 if (++dd->ipath_lli_counter > n) {
1140                         dd->ipath_lli_counter = 0;
1141                         dd->ipath_lli_errors++;
1142                 }
1143         }
1144 }
1145
1146 /*
1147  * ipath_kreceive - receive a packet
1148  * @pd: the infinipath port
1149  *
1150  * called from interrupt handler for errors or receive interrupt
1151  */
1152 void ipath_kreceive(struct ipath_portdata *pd)
1153 {
1154         struct ipath_devdata *dd = pd->port_dd;
1155         __le32 *rhf_addr;
1156         void *ebuf;
1157         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
1158         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
1159         u32 etail = -1, l, hdrqtail;
1160         struct ipath_message_header *hdr;
1161         u32 eflags, i, etype, tlen, pkttot = 0, updegr = 0, reloop = 0;
1162         static u64 totcalls;    /* stats, may eventually remove */
1163         int last;
1164
1165         l = pd->port_head;
1166         rhf_addr = (__le32 *) pd->port_rcvhdrq + l + dd->ipath_rhf_offset;
1167         if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1168                 u32 seq = ipath_hdrget_seq(rhf_addr);
1169
1170                 if (seq != pd->port_seq_cnt)
1171                         goto bail;
1172                 hdrqtail = 0;
1173         } else {
1174                 hdrqtail = ipath_get_rcvhdrtail(pd);
1175                 if (l == hdrqtail)
1176                         goto bail;
1177                 smp_rmb();
1178         }
1179
1180 reloop:
1181         for (last = 0, i = 1; !last; i += !last) {
1182                 hdr = dd->ipath_f_get_msgheader(dd, rhf_addr);
1183                 eflags = ipath_hdrget_err_flags(rhf_addr);
1184                 etype = ipath_hdrget_rcv_type(rhf_addr);
1185                 /* total length */
1186                 tlen = ipath_hdrget_length_in_bytes(rhf_addr);
1187                 ebuf = NULL;
1188                 if ((dd->ipath_flags & IPATH_NODMA_RTAIL) ?
1189                     ipath_hdrget_use_egr_buf(rhf_addr) :
1190                     (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
1191                         /*
1192                          * It turns out that the chip uses an eager buffer
1193                          * for all non-expected packets, whether it "needs"
1194                          * one or not.  So always get the index, but don't
1195                          * set ebuf (so we try to copy data) unless the
1196                          * length requires it.
1197                          */
1198                         etail = ipath_hdrget_index(rhf_addr);
1199                         updegr = 1;
1200                         if (tlen > sizeof(*hdr) ||
1201                             etype == RCVHQ_RCV_TYPE_NON_KD)
1202                                 ebuf = ipath_get_egrbuf(dd, etail);
1203                 }
1204
1205                 /*
1206                  * both tiderr and ipathhdrerr are set for all plain IB
1207                  * packets; only ipathhdrerr should be set.
1208                  */
1209
1210                 if (etype != RCVHQ_RCV_TYPE_NON_KD &&
1211                     etype != RCVHQ_RCV_TYPE_ERROR &&
1212                     ipath_hdrget_ipath_ver(hdr->iph.ver_port_tid_offset) !=
1213                     IPS_PROTO_VERSION)
1214                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
1215                                    "%x\n", etype);
1216
1217                 if (unlikely(eflags))
1218                         ipath_rcv_hdrerr(dd, eflags, l, etail, rhf_addr, hdr);
1219                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1220                         ipath_ib_rcv(dd->verbs_dev, (u32 *)hdr, ebuf, tlen);
1221                         if (dd->ipath_lli_counter)
1222                                 dd->ipath_lli_counter--;
1223                 } else if (etype == RCVHQ_RCV_TYPE_EAGER) {
1224                         u8 opcode = be32_to_cpu(hdr->bth[0]) >> 24;
1225                         u32 qp = be32_to_cpu(hdr->bth[1]) & 0xffffff;
1226                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1227                                    "qp=%x), len %x; ignored\n",
1228                                    etype, opcode, qp, tlen);
1229                 } else if (etype == RCVHQ_RCV_TYPE_EXPECTED) {
1230                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1231                                   be32_to_cpu(hdr->bth[0]) >> 24);
1232                 } else {
1233                         /*
1234                          * error packet, type of error unknown.
1235                          * Probably type 3, but we don't know, so don't
1236                          * even try to print the opcode, etc.
1237                          * Usually caused by a "bad packet", that has no
1238                          * BTH, when the LRH says it should.
1239                          */
1240                         ipath_cdbg(ERRPKT, "Error Pkt, but no eflags! egrbuf"
1241                                   " %x, len %x hdrq+%x rhf: %Lx\n",
1242                                   etail, tlen, l, (unsigned long long)
1243                                   le64_to_cpu(*(__le64 *) rhf_addr));
1244                         if (ipath_debug & __IPATH_ERRPKTDBG) {
1245                                 u32 j, *d, dw = rsize-2;
1246                                 if (rsize > (tlen>>2))
1247                                         dw = tlen>>2;
1248                                 d = (u32 *)hdr;
1249                                 printk(KERN_DEBUG "EPkt rcvhdr(%x dw):\n",
1250                                         dw);
1251                                 for (j = 0; j < dw; j++)
1252                                         printk(KERN_DEBUG "%8x%s", d[j],
1253                                                 (j%8) == 7 ? "\n" : " ");
1254                                 printk(KERN_DEBUG ".\n");
1255                         }
1256                 }
1257                 l += rsize;
1258                 if (l >= maxcnt)
1259                         l = 0;
1260                 rhf_addr = (__le32 *) pd->port_rcvhdrq +
1261                         l + dd->ipath_rhf_offset;
1262                 if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1263                         u32 seq = ipath_hdrget_seq(rhf_addr);
1264
1265                         if (++pd->port_seq_cnt > 13)
1266                                 pd->port_seq_cnt = 1;
1267                         if (seq != pd->port_seq_cnt)
1268                                 last = 1;
1269                 } else if (l == hdrqtail) {
1270                         last = 1;
1271                 }
1272                 /*
1273                  * update head regs on last packet, and every 16 packets.
1274                  * Reduce bus traffic, while still trying to prevent
1275                  * rcvhdrq overflows, for when the queue is nearly full
1276                  */
1277                 if (last || !(i & 0xf)) {
1278                         u64 lval = l;
1279
1280                         /* request IBA6120 and 7220 interrupt only on last */
1281                         if (last)
1282                                 lval |= dd->ipath_rhdrhead_intr_off;
1283                         ipath_write_ureg(dd, ur_rcvhdrhead, lval,
1284                                 pd->port_port);
1285                         if (updegr) {
1286                                 ipath_write_ureg(dd, ur_rcvegrindexhead,
1287                                                  etail, pd->port_port);
1288                                 updegr = 0;
1289                         }
1290                 }
1291         }
1292
1293         if (!dd->ipath_rhdrhead_intr_off && !reloop &&
1294             !(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1295                 /* IBA6110 workaround; we can have a race clearing chip
1296                  * interrupt with another interrupt about to be delivered,
1297                  * and can clear it before it is delivered on the GPIO
1298                  * workaround.  By doing the extra check here for the
1299                  * in-memory tail register updating while we were doing
1300                  * earlier packets, we "almost" guarantee we have covered
1301                  * that case.
1302                  */
1303                 u32 hqtail = ipath_get_rcvhdrtail(pd);
1304                 if (hqtail != hdrqtail) {
1305                         hdrqtail = hqtail;
1306                         reloop = 1; /* loop 1 extra time at most */
1307                         goto reloop;
1308                 }
1309         }
1310
1311         pkttot += i;
1312
1313         pd->port_head = l;
1314
1315         if (pkttot > ipath_stats.sps_maxpkts_call)
1316                 ipath_stats.sps_maxpkts_call = pkttot;
1317         ipath_stats.sps_port0pkts += pkttot;
1318         ipath_stats.sps_avgpkts_call =
1319                 ipath_stats.sps_port0pkts / ++totcalls;
1320
1321 bail:;
1322 }
1323
1324 /**
1325  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1326  * @dd: the infinipath device
1327  *
1328  * called whenever our local copy indicates we have run out of send buffers
1329  * NOTE: This can be called from interrupt context by some code
1330  * and from non-interrupt context by ipath_getpiobuf().
1331  */
1332
1333 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1334 {
1335         unsigned long flags;
1336         int i;
1337         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1338
1339         /* If the generation (check) bits have changed, then we update the
1340          * busy bit for the corresponding PIO buffer.  This algorithm will
1341          * modify positions to the value they already have in some cases
1342          * (i.e., no change), but it's faster than changing only the bits
1343          * that have changed.
1344          *
1345          * We would like to do this atomicly, to avoid spinlocks in the
1346          * critical send path, but that's not really possible, given the
1347          * type of changes, and that this routine could be called on
1348          * multiple cpu's simultaneously, so we lock in this routine only,
1349          * to avoid conflicting updates; all we change is the shadow, and
1350          * it's a single 64 bit memory location, so by definition the update
1351          * is atomic in terms of what other cpu's can see in testing the
1352          * bits.  The spin_lock overhead isn't too bad, since it only
1353          * happens when all buffers are in use, so only cpu overhead, not
1354          * latency or bandwidth is affected.
1355          */
1356         if (!dd->ipath_pioavailregs_dma) {
1357                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1358                 return;
1359         }
1360         if (ipath_debug & __IPATH_VERBDBG) {
1361                 /* only if packet debug and verbose */
1362                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1363                 unsigned long *shadow = dd->ipath_pioavailshadow;
1364
1365                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1366                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1367                            "s3=%lx\n",
1368                            (unsigned long long) le64_to_cpu(dma[0]),
1369                            shadow[0],
1370                            (unsigned long long) le64_to_cpu(dma[1]),
1371                            shadow[1],
1372                            (unsigned long long) le64_to_cpu(dma[2]),
1373                            shadow[2],
1374                            (unsigned long long) le64_to_cpu(dma[3]),
1375                            shadow[3]);
1376                 if (piobregs > 4)
1377                         ipath_cdbg(
1378                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1379                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1380                                 "d7=%llx s7=%lx\n",
1381                                 (unsigned long long) le64_to_cpu(dma[4]),
1382                                 shadow[4],
1383                                 (unsigned long long) le64_to_cpu(dma[5]),
1384                                 shadow[5],
1385                                 (unsigned long long) le64_to_cpu(dma[6]),
1386                                 shadow[6],
1387                                 (unsigned long long) le64_to_cpu(dma[7]),
1388                                 shadow[7]);
1389         }
1390         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1391         for (i = 0; i < piobregs; i++) {
1392                 u64 pchbusy, pchg, piov, pnew;
1393                 /*
1394                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1395                  */
1396                 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
1397                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i ^ 1]);
1398                 else
1399                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1400                 pchg = dd->ipath_pioavailkernel[i] &
1401                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1402                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1403                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1404                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1405                         pnew |= piov & pchbusy;
1406                         dd->ipath_pioavailshadow[i] = pnew;
1407                 }
1408         }
1409         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1410 }
1411
1412 /*
1413  * used to force update of pioavailshadow if we can't get a pio buffer.
1414  * Needed primarily due to exitting freeze mode after recovering
1415  * from errors.  Done lazily, because it's safer (known to not
1416  * be writing pio buffers).
1417  */
1418 static void ipath_reset_availshadow(struct ipath_devdata *dd)
1419 {
1420         int i, im;
1421         unsigned long flags;
1422
1423         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1424         for (i = 0; i < dd->ipath_pioavregs; i++) {
1425                 u64 val, oldval;
1426                 /* deal with 6110 chip bug on high register #s */
1427                 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1428                         i ^ 1 : i;
1429                 val = le64_to_cpu(dd->ipath_pioavailregs_dma[im]);
1430                 /*
1431                  * busy out the buffers not in the kernel avail list,
1432                  * without changing the generation bits.
1433                  */
1434                 oldval = dd->ipath_pioavailshadow[i];
1435                 dd->ipath_pioavailshadow[i] = val |
1436                         ((~dd->ipath_pioavailkernel[i] <<
1437                         INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT) &
1438                         0xaaaaaaaaaaaaaaaaULL); /* All BUSY bits in qword */
1439                 if (oldval != dd->ipath_pioavailshadow[i])
1440                         ipath_dbg("shadow[%d] was %Lx, now %lx\n",
1441                                 i, (unsigned long long) oldval,
1442                                 dd->ipath_pioavailshadow[i]);
1443         }
1444         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1445 }
1446
1447 /**
1448  * ipath_setrcvhdrsize - set the receive header size
1449  * @dd: the infinipath device
1450  * @rhdrsize: the receive header size
1451  *
1452  * called from user init code, and also layered driver init
1453  */
1454 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1455 {
1456         int ret = 0;
1457
1458         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1459                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1460                         dev_info(&dd->pcidev->dev,
1461                                  "Error: can't set protocol header "
1462                                  "size %u, already %u\n",
1463                                  rhdrsize, dd->ipath_rcvhdrsize);
1464                         ret = -EAGAIN;
1465                 } else
1466                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1467                                    "size %u\n", dd->ipath_rcvhdrsize);
1468         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1469                                (sizeof(u64) / sizeof(u32)))) {
1470                 ipath_dbg("Error: can't set protocol header size %u "
1471                           "(> max %u)\n", rhdrsize,
1472                           dd->ipath_rcvhdrentsize -
1473                           (u32) (sizeof(u64) / sizeof(u32)));
1474                 ret = -EOVERFLOW;
1475         } else {
1476                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1477                 dd->ipath_rcvhdrsize = rhdrsize;
1478                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1479                                  dd->ipath_rcvhdrsize);
1480                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1481                            dd->ipath_rcvhdrsize);
1482         }
1483         return ret;
1484 }
1485
1486 /*
1487  * debugging code and stats updates if no pio buffers available.
1488  */
1489 static noinline void no_pio_bufs(struct ipath_devdata *dd)
1490 {
1491         unsigned long *shadow = dd->ipath_pioavailshadow;
1492         __le64 *dma = (__le64 *)dd->ipath_pioavailregs_dma;
1493
1494         dd->ipath_upd_pio_shadow = 1;
1495
1496         /*
1497          * not atomic, but if we lose a stat count in a while, that's OK
1498          */
1499         ipath_stats.sps_nopiobufs++;
1500         if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1501                 ipath_force_pio_avail_update(dd); /* at start */
1502                 ipath_dbg("%u tries no piobufavail ts%lx; dmacopy: "
1503                         "%llx %llx %llx %llx\n"
1504                         "ipath  shadow:  %lx %lx %lx %lx\n",
1505                         dd->ipath_consec_nopiobuf,
1506                         (unsigned long)get_cycles(),
1507                         (unsigned long long) le64_to_cpu(dma[0]),
1508                         (unsigned long long) le64_to_cpu(dma[1]),
1509                         (unsigned long long) le64_to_cpu(dma[2]),
1510                         (unsigned long long) le64_to_cpu(dma[3]),
1511                         shadow[0], shadow[1], shadow[2], shadow[3]);
1512                 /*
1513                  * 4 buffers per byte, 4 registers above, cover rest
1514                  * below
1515                  */
1516                 if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1517                     (sizeof(shadow[0]) * 4 * 4))
1518                         ipath_dbg("2nd group: dmacopy: "
1519                                   "%llx %llx %llx %llx\n"
1520                                   "ipath  shadow:  %lx %lx %lx %lx\n",
1521                                   (unsigned long long)le64_to_cpu(dma[4]),
1522                                   (unsigned long long)le64_to_cpu(dma[5]),
1523                                   (unsigned long long)le64_to_cpu(dma[6]),
1524                                   (unsigned long long)le64_to_cpu(dma[7]),
1525                                   shadow[4], shadow[5], shadow[6], shadow[7]);
1526
1527                 /* at end, so update likely happened */
1528                 ipath_reset_availshadow(dd);
1529         }
1530 }
1531
1532 /*
1533  * common code for normal driver pio buffer allocation, and reserved
1534  * allocation.
1535  *
1536  * do appropriate marking as busy, etc.
1537  * returns buffer number if one found (>=0), negative number is error.
1538  */
1539 static u32 __iomem *ipath_getpiobuf_range(struct ipath_devdata *dd,
1540         u32 *pbufnum, u32 first, u32 last, u32 firsti)
1541 {
1542         int i, j, updated = 0;
1543         unsigned piobcnt;
1544         unsigned long flags;
1545         unsigned long *shadow = dd->ipath_pioavailshadow;
1546         u32 __iomem *buf;
1547
1548         piobcnt = last - first;
1549         if (dd->ipath_upd_pio_shadow) {
1550                 /*
1551                  * Minor optimization.  If we had no buffers on last call,
1552                  * start out by doing the update; continue and do scan even
1553                  * if no buffers were updated, to be paranoid
1554                  */
1555                 ipath_update_pio_bufs(dd);
1556                 updated++;
1557                 i = first;
1558         } else
1559                 i = firsti;
1560 rescan:
1561         /*
1562          * while test_and_set_bit() is atomic, we do that and then the
1563          * change_bit(), and the pair is not.  See if this is the cause
1564          * of the remaining armlaunch errors.
1565          */
1566         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1567         for (j = 0; j < piobcnt; j++, i++) {
1568                 if (i >= last)
1569                         i = first;
1570                 if (__test_and_set_bit((2 * i) + 1, shadow))
1571                         continue;
1572                 /* flip generation bit */
1573                 __change_bit(2 * i, shadow);
1574                 break;
1575         }
1576         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1577
1578         if (j == piobcnt) {
1579                 if (!updated) {
1580                         /*
1581                          * first time through; shadow exhausted, but may be
1582                          * buffers available, try an update and then rescan.
1583                          */
1584                         ipath_update_pio_bufs(dd);
1585                         updated++;
1586                         i = first;
1587                         goto rescan;
1588                 } else if (updated == 1 && piobcnt <=
1589                         ((dd->ipath_sendctrl
1590                         >> INFINIPATH_S_UPDTHRESH_SHIFT) &
1591                         INFINIPATH_S_UPDTHRESH_MASK)) {
1592                         /*
1593                          * for chips supporting and using the update
1594                          * threshold we need to force an update of the
1595                          * in-memory copy if the count is less than the
1596                          * thershold, then check one more time.
1597                          */
1598                         ipath_force_pio_avail_update(dd);
1599                         ipath_update_pio_bufs(dd);
1600                         updated++;
1601                         i = first;
1602                         goto rescan;
1603                 }
1604
1605                 no_pio_bufs(dd);
1606                 buf = NULL;
1607         } else {
1608                 if (i < dd->ipath_piobcnt2k)
1609                         buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1610                                                i * dd->ipath_palign);
1611                 else
1612                         buf = (u32 __iomem *)
1613                                 (dd->ipath_pio4kbase +
1614                                  (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1615                 if (pbufnum)
1616                         *pbufnum = i;
1617         }
1618
1619         return buf;
1620 }
1621
1622 /**
1623  * ipath_getpiobuf - find an available pio buffer
1624  * @dd: the infinipath device
1625  * @plen: the size of the PIO buffer needed in 32-bit words
1626  * @pbufnum: the buffer number is placed here
1627  */
1628 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 plen, u32 *pbufnum)
1629 {
1630         u32 __iomem *buf;
1631         u32 pnum, nbufs;
1632         u32 first, lasti;
1633
1634         if (plen + 1 >= IPATH_SMALLBUF_DWORDS) {
1635                 first = dd->ipath_piobcnt2k;
1636                 lasti = dd->ipath_lastpioindexl;
1637         } else {
1638                 first = 0;
1639                 lasti = dd->ipath_lastpioindex;
1640         }
1641         nbufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
1642         buf = ipath_getpiobuf_range(dd, &pnum, first, nbufs, lasti);
1643
1644         if (buf) {
1645                 /*
1646                  * Set next starting place.  It's just an optimization,
1647                  * it doesn't matter who wins on this, so no locking
1648                  */
1649                 if (plen + 1 >= IPATH_SMALLBUF_DWORDS)
1650                         dd->ipath_lastpioindexl = pnum + 1;
1651                 else
1652                         dd->ipath_lastpioindex = pnum + 1;
1653                 if (dd->ipath_upd_pio_shadow)
1654                         dd->ipath_upd_pio_shadow = 0;
1655                 if (dd->ipath_consec_nopiobuf)
1656                         dd->ipath_consec_nopiobuf = 0;
1657                 ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1658                            pnum, (pnum < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1659                 if (pbufnum)
1660                         *pbufnum = pnum;
1661
1662         }
1663         return buf;
1664 }
1665
1666 /**
1667  * ipath_chg_pioavailkernel - change which send buffers are available for kernel
1668  * @dd: the infinipath device
1669  * @start: the starting send buffer number
1670  * @len: the number of send buffers
1671  * @avail: true if the buffers are available for kernel use, false otherwise
1672  */
1673 void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1674                               unsigned len, int avail)
1675 {
1676         unsigned long flags;
1677         unsigned end, cnt = 0;
1678
1679         /* There are two bits per send buffer (busy and generation) */
1680         start *= 2;
1681         end = start + len * 2;
1682
1683         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1684         /* Set or clear the busy bit in the shadow. */
1685         while (start < end) {
1686                 if (avail) {
1687                         unsigned long dma;
1688                         int i, im;
1689                         /*
1690                          * the BUSY bit will never be set, because we disarm
1691                          * the user buffers before we hand them back to the
1692                          * kernel.  We do have to make sure the generation
1693                          * bit is set correctly in shadow, since it could
1694                          * have changed many times while allocated to user.
1695                          * We can't use the bitmap functions on the full
1696                          * dma array because it is always little-endian, so
1697                          * we have to flip to host-order first.
1698                          * BITS_PER_LONG is slightly wrong, since it's
1699                          * always 64 bits per register in chip...
1700                          * We only work on 64 bit kernels, so that's OK.
1701                          */
1702                         /* deal with 6110 chip bug on high register #s */
1703                         i = start / BITS_PER_LONG;
1704                         im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1705                                 i ^ 1 : i;
1706                         __clear_bit(INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
1707                                 + start, dd->ipath_pioavailshadow);
1708                         dma = (unsigned long) le64_to_cpu(
1709                                 dd->ipath_pioavailregs_dma[im]);
1710                         if (test_bit((INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1711                                 + start) % BITS_PER_LONG, &dma))
1712                                 __set_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1713                                         + start, dd->ipath_pioavailshadow);
1714                         else
1715                                 __clear_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1716                                         + start, dd->ipath_pioavailshadow);
1717                         __set_bit(start, dd->ipath_pioavailkernel);
1718                 } else {
1719                         __set_bit(start + INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT,
1720                                 dd->ipath_pioavailshadow);
1721                         __clear_bit(start, dd->ipath_pioavailkernel);
1722                 }
1723                 start += 2;
1724         }
1725
1726         if (dd->ipath_pioupd_thresh) {
1727                 end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1728                 cnt = bitmap_weight(dd->ipath_pioavailkernel, end);
1729         }
1730         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1731
1732         /*
1733          * When moving buffers from kernel to user, if number assigned to
1734          * the user is less than the pio update threshold, and threshold
1735          * is supported (cnt was computed > 0), drop the update threshold
1736          * so we update at least once per allocated number of buffers.
1737          * In any case, if the kernel buffers are less than the threshold,
1738          * drop the threshold.  We don't bother increasing it, having once
1739          * decreased it, since it would typically just cycle back and forth.
1740          * If we don't decrease below buffers in use, we can wait a long
1741          * time for an update, until some other context uses PIO buffers.
1742          */
1743         if (!avail && len < cnt)
1744                 cnt = len;
1745         if (cnt < dd->ipath_pioupd_thresh) {
1746                 dd->ipath_pioupd_thresh = cnt;
1747                 ipath_dbg("Decreased pio update threshold to %u\n",
1748                         dd->ipath_pioupd_thresh);
1749                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1750                 dd->ipath_sendctrl &= ~(INFINIPATH_S_UPDTHRESH_MASK
1751                         << INFINIPATH_S_UPDTHRESH_SHIFT);
1752                 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh
1753                         << INFINIPATH_S_UPDTHRESH_SHIFT;
1754                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1755                         dd->ipath_sendctrl);
1756                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1757         }
1758 }
1759
1760 /**
1761  * ipath_create_rcvhdrq - create a receive header queue
1762  * @dd: the infinipath device
1763  * @pd: the port data
1764  *
1765  * this must be contiguous memory (from an i/o perspective), and must be
1766  * DMA'able (which means for some systems, it will go through an IOMMU,
1767  * or be forced into a low address range).
1768  */
1769 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1770                          struct ipath_portdata *pd)
1771 {
1772         int ret = 0;
1773
1774         if (!pd->port_rcvhdrq) {
1775                 dma_addr_t phys_hdrqtail;
1776                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1777                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1778                                 sizeof(u32), PAGE_SIZE);
1779
1780                 pd->port_rcvhdrq = dma_alloc_coherent(
1781                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1782                         gfp_flags);
1783
1784                 if (!pd->port_rcvhdrq) {
1785                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1786                                       "for port %u rcvhdrq failed\n",
1787                                       amt, pd->port_port);
1788                         ret = -ENOMEM;
1789                         goto bail;
1790                 }
1791
1792                 if (!(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1793                         pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1794                                 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1795                                 GFP_KERNEL);
1796                         if (!pd->port_rcvhdrtail_kvaddr) {
1797                                 ipath_dev_err(dd, "attempt to allocate 1 page "
1798                                         "for port %u rcvhdrqtailaddr "
1799                                         "failed\n", pd->port_port);
1800                                 ret = -ENOMEM;
1801                                 dma_free_coherent(&dd->pcidev->dev, amt,
1802                                         pd->port_rcvhdrq,
1803                                         pd->port_rcvhdrq_phys);
1804                                 pd->port_rcvhdrq = NULL;
1805                                 goto bail;
1806                         }
1807                         pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1808                         ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx "
1809                                    "physical\n", pd->port_port,
1810                                    (unsigned long long) phys_hdrqtail);
1811                 }
1812
1813                 pd->port_rcvhdrq_size = amt;
1814
1815                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1816                            "for port %u rcvhdr Q\n",
1817                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1818                            (unsigned long) pd->port_rcvhdrq_phys,
1819                            (unsigned long) pd->port_rcvhdrq_size,
1820                            pd->port_port);
1821         } else {
1822                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1823                            "hdrtailaddr@%p %llx physical\n",
1824                            pd->port_port, pd->port_rcvhdrq,
1825                            (unsigned long long) pd->port_rcvhdrq_phys,
1826                            pd->port_rcvhdrtail_kvaddr, (unsigned long long)
1827                            pd->port_rcvhdrqtailaddr_phys);
1828         }
1829         /* clear for security and sanity on each use */
1830         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1831         if (pd->port_rcvhdrtail_kvaddr)
1832                 memset(pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1833
1834         /*
1835          * tell chip each time we init it, even if we are re-using previous
1836          * memory (we zero the register at process close)
1837          */
1838         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1839                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1840         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1841                               pd->port_port, pd->port_rcvhdrq_phys);
1842
1843 bail:
1844         return ret;
1845 }
1846
1847
1848 /*
1849  * Flush all sends that might be in the ready to send state, as well as any
1850  * that are in the process of being sent.   Used whenever we need to be
1851  * sure the send side is idle.  Cleans up all buffer state by canceling
1852  * all pio buffers, and issuing an abort, which cleans up anything in the
1853  * launch fifo.  The cancel is superfluous on some chip versions, but
1854  * it's safer to always do it.
1855  * PIOAvail bits are updated by the chip as if normal send had happened.
1856  */
1857 void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1858 {
1859         unsigned long flags;
1860
1861         if (dd->ipath_flags & IPATH_IB_AUTONEG_INPROG) {
1862                 ipath_cdbg(VERBOSE, "Ignore while in autonegotiation\n");
1863                 goto bail;
1864         }
1865         /*
1866          * If we have SDMA, and it's not disabled, we have to kick off the
1867          * abort state machine, provided we aren't already aborting.
1868          * If we are in the process of aborting SDMA (!DISABLED, but ABORTING),
1869          * we skip the rest of this routine. It is already "in progress"
1870          */
1871         if (dd->ipath_flags & IPATH_HAS_SEND_DMA) {
1872                 int skip_cancel;
1873                 unsigned long *statp = &dd->ipath_sdma_status;
1874
1875                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1876                 skip_cancel =
1877                         test_and_set_bit(IPATH_SDMA_ABORTING, statp)
1878                         && !test_bit(IPATH_SDMA_DISABLED, statp);
1879                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1880                 if (skip_cancel)
1881                         goto bail;
1882         }
1883
1884         ipath_dbg("Cancelling all in-progress send buffers\n");
1885
1886         /* skip armlaunch errs for a while */
1887         dd->ipath_lastcancel = jiffies + HZ / 2;
1888
1889         /*
1890          * The abort bit is auto-clearing.  We also don't want pioavail
1891          * update happening during this, and we don't want any other
1892          * sends going out, so turn those off for the duration.  We read
1893          * the scratch register to be sure that cancels and the abort
1894          * have taken effect in the chip.  Otherwise two parts are same
1895          * as ipath_force_pio_avail_update()
1896          */
1897         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1898         dd->ipath_sendctrl &= ~(INFINIPATH_S_PIOBUFAVAILUPD
1899                 | INFINIPATH_S_PIOENABLE);
1900         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1901                 dd->ipath_sendctrl | INFINIPATH_S_ABORT);
1902         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1903         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1904
1905         /* disarm all send buffers */
1906         ipath_disarm_piobufs(dd, 0,
1907                 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1908
1909         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
1910                 set_bit(IPATH_SDMA_DISARMED, &dd->ipath_sdma_status);
1911
1912         if (restore_sendctrl) {
1913                 /* else done by caller later if needed */
1914                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1915                 dd->ipath_sendctrl |= INFINIPATH_S_PIOBUFAVAILUPD |
1916                         INFINIPATH_S_PIOENABLE;
1917                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1918                         dd->ipath_sendctrl);
1919                 /* and again, be sure all have hit the chip */
1920                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1921                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1922         }
1923
1924         if ((dd->ipath_flags & IPATH_HAS_SEND_DMA) &&
1925             !test_bit(IPATH_SDMA_DISABLED, &dd->ipath_sdma_status) &&
1926             test_bit(IPATH_SDMA_RUNNING, &dd->ipath_sdma_status)) {
1927                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1928                 /* only wait so long for intr */
1929                 dd->ipath_sdma_abort_intr_timeout = jiffies + HZ;
1930                 dd->ipath_sdma_reset_wait = 200;
1931                 if (!test_bit(IPATH_SDMA_SHUTDOWN, &dd->ipath_sdma_status))
1932                         tasklet_hi_schedule(&dd->ipath_sdma_abort_task);
1933                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1934         }
1935 bail:;
1936 }
1937
1938 /*
1939  * Force an update of in-memory copy of the pioavail registers, when
1940  * needed for any of a variety of reasons.  We read the scratch register
1941  * to make it highly likely that the update will have happened by the
1942  * time we return.  If already off (as in cancel_sends above), this
1943  * routine is a nop, on the assumption that the caller will "do the
1944  * right thing".
1945  */
1946 void ipath_force_pio_avail_update(struct ipath_devdata *dd)
1947 {
1948         unsigned long flags;
1949
1950         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1951         if (dd->ipath_sendctrl & INFINIPATH_S_PIOBUFAVAILUPD) {
1952                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1953                         dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
1954                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1955                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1956                         dd->ipath_sendctrl);
1957                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1958         }
1959         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1960 }
1961
1962 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int linkcmd,
1963                                 int linitcmd)
1964 {
1965         u64 mod_wd;
1966         static const char *what[4] = {
1967                 [0] = "NOP",
1968                 [INFINIPATH_IBCC_LINKCMD_DOWN] = "DOWN",
1969                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1970                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1971         };
1972
1973         if (linitcmd == INFINIPATH_IBCC_LINKINITCMD_DISABLE) {
1974                 /*
1975                  * If we are told to disable, note that so link-recovery
1976                  * code does not attempt to bring us back up.
1977                  */
1978                 preempt_disable();
1979                 dd->ipath_flags |= IPATH_IB_LINK_DISABLED;
1980                 preempt_enable();
1981         } else if (linitcmd) {
1982                 /*
1983                  * Any other linkinitcmd will lead to LINKDOWN and then
1984                  * to INIT (if all is well), so clear flag to let
1985                  * link-recovery code attempt to bring us back up.
1986                  */
1987                 preempt_disable();
1988                 dd->ipath_flags &= ~IPATH_IB_LINK_DISABLED;
1989                 preempt_enable();
1990         }
1991
1992         mod_wd = (linkcmd << dd->ibcc_lc_shift) |
1993                 (linitcmd << INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1994         ipath_cdbg(VERBOSE,
1995                 "Moving unit %u to %s (initcmd=0x%x), current ltstate is %s\n",
1996                 dd->ipath_unit, what[linkcmd], linitcmd,
1997                 ipath_ibcstatus_str[ipath_ib_linktrstate(dd,
1998                         ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus))]);
1999
2000         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2001                          dd->ipath_ibcctrl | mod_wd);
2002         /* read from chip so write is flushed */
2003         (void) ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2004 }
2005
2006 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
2007 {
2008         u32 lstate;
2009         int ret;
2010
2011         switch (newstate) {
2012         case IPATH_IB_LINKDOWN_ONLY:
2013                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN, 0);
2014                 /* don't wait */
2015                 ret = 0;
2016                 goto bail;
2017
2018         case IPATH_IB_LINKDOWN:
2019                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2020                                         INFINIPATH_IBCC_LINKINITCMD_POLL);
2021                 /* don't wait */
2022                 ret = 0;
2023                 goto bail;
2024
2025         case IPATH_IB_LINKDOWN_SLEEP:
2026                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2027                                         INFINIPATH_IBCC_LINKINITCMD_SLEEP);
2028                 /* don't wait */
2029                 ret = 0;
2030                 goto bail;
2031
2032         case IPATH_IB_LINKDOWN_DISABLE:
2033                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2034                                         INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2035                 /* don't wait */
2036                 ret = 0;
2037                 goto bail;
2038
2039         case IPATH_IB_LINKARM:
2040                 if (dd->ipath_flags & IPATH_LINKARMED) {
2041                         ret = 0;
2042                         goto bail;
2043                 }
2044                 if (!(dd->ipath_flags &
2045                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
2046                         ret = -EINVAL;
2047                         goto bail;
2048                 }
2049                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED, 0);
2050
2051                 /*
2052                  * Since the port can transition to ACTIVE by receiving
2053                  * a non VL 15 packet, wait for either state.
2054                  */
2055                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
2056                 break;
2057
2058         case IPATH_IB_LINKACTIVE:
2059                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
2060                         ret = 0;
2061                         goto bail;
2062                 }
2063                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
2064                         ret = -EINVAL;
2065                         goto bail;
2066                 }
2067                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE, 0);
2068                 lstate = IPATH_LINKACTIVE;
2069                 break;
2070
2071         case IPATH_IB_LINK_LOOPBACK:
2072                 dev_info(&dd->pcidev->dev, "Enabling IB local loopback\n");
2073                 dd->ipath_ibcctrl |= INFINIPATH_IBCC_LOOPBACK;
2074                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2075                                  dd->ipath_ibcctrl);
2076
2077                 /* turn heartbeat off, as it causes loopback to fail */
2078                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2079                                        IPATH_IB_HRTBT_OFF);
2080                 /* don't wait */
2081                 ret = 0;
2082                 goto bail;
2083
2084         case IPATH_IB_LINK_EXTERNAL:
2085                 dev_info(&dd->pcidev->dev,
2086                         "Disabling IB local loopback (normal)\n");
2087                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2088                                        IPATH_IB_HRTBT_ON);
2089                 dd->ipath_ibcctrl &= ~INFINIPATH_IBCC_LOOPBACK;
2090                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2091                                  dd->ipath_ibcctrl);
2092                 /* don't wait */
2093                 ret = 0;
2094                 goto bail;
2095
2096         /*
2097          * Heartbeat can be explicitly enabled by the user via
2098          * "hrtbt_enable" "file", and if disabled, trying to enable here
2099          * will have no effect.  Implicit changes (heartbeat off when
2100          * loopback on, and vice versa) are included to ease testing.
2101          */
2102         case IPATH_IB_LINK_HRTBT:
2103                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2104                         IPATH_IB_HRTBT_ON);
2105                 goto bail;
2106
2107         case IPATH_IB_LINK_NO_HRTBT:
2108                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2109                         IPATH_IB_HRTBT_OFF);
2110                 goto bail;
2111
2112         default:
2113                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
2114                 ret = -EINVAL;
2115                 goto bail;
2116         }
2117         ret = ipath_wait_linkstate(dd, lstate, 2000);
2118
2119 bail:
2120         return ret;
2121 }
2122
2123 /**
2124  * ipath_set_mtu - set the MTU
2125  * @dd: the infinipath device
2126  * @arg: the new MTU
2127  *
2128  * we can handle "any" incoming size, the issue here is whether we
2129  * need to restrict our outgoing size.   For now, we don't do any
2130  * sanity checking on this, and we don't deal with what happens to
2131  * programs that are already running when the size changes.
2132  * NOTE: changing the MTU will usually cause the IBC to go back to
2133  * link INIT state...
2134  */
2135 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
2136 {
2137         u32 piosize;
2138         int changed = 0;
2139         int ret;
2140
2141         /*
2142          * mtu is IB data payload max.  It's the largest power of 2 less
2143          * than piosize (or even larger, since it only really controls the
2144          * largest we can receive; we can send the max of the mtu and
2145          * piosize).  We check that it's one of the valid IB sizes.
2146          */
2147         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
2148             (arg != 4096 || !ipath_mtu4096)) {
2149                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
2150                 ret = -EINVAL;
2151                 goto bail;
2152         }
2153         if (dd->ipath_ibmtu == arg) {
2154                 ret = 0;        /* same as current */
2155                 goto bail;
2156         }
2157
2158         piosize = dd->ipath_ibmaxlen;
2159         dd->ipath_ibmtu = arg;
2160
2161         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
2162                 /* Only if it's not the initial value (or reset to it) */
2163                 if (piosize != dd->ipath_init_ibmaxlen) {
2164                         if (arg > piosize && arg <= dd->ipath_init_ibmaxlen)
2165                                 piosize = dd->ipath_init_ibmaxlen;
2166                         dd->ipath_ibmaxlen = piosize;
2167                         changed = 1;
2168                 }
2169         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
2170                 piosize = arg + IPATH_PIO_MAXIBHDR;
2171                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
2172                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
2173                            arg);
2174                 dd->ipath_ibmaxlen = piosize;
2175                 changed = 1;
2176         }
2177
2178         if (changed) {
2179                 u64 ibc = dd->ipath_ibcctrl, ibdw;
2180                 /*
2181                  * update our housekeeping variables, and set IBC max
2182                  * size, same as init code; max IBC is max we allow in
2183                  * buffer, less the qword pbc, plus 1 for ICRC, in dwords
2184                  */
2185                 dd->ipath_ibmaxlen = piosize - 2 * sizeof(u32);
2186                 ibdw = (dd->ipath_ibmaxlen >> 2) + 1;
2187                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
2188                          dd->ibcc_mpl_shift);
2189                 ibc |= ibdw << dd->ibcc_mpl_shift;
2190                 dd->ipath_ibcctrl = ibc;
2191                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2192                                  dd->ipath_ibcctrl);
2193                 dd->ipath_f_tidtemplate(dd);
2194         }
2195
2196         ret = 0;
2197
2198 bail:
2199         return ret;
2200 }
2201
2202 int ipath_set_lid(struct ipath_devdata *dd, u32 lid, u8 lmc)
2203 {
2204         dd->ipath_lid = lid;
2205         dd->ipath_lmc = lmc;
2206
2207         dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_LIDLMC, lid |
2208                 (~((1U << lmc) - 1)) << 16);
2209
2210         dev_info(&dd->pcidev->dev, "We got a lid: 0x%x\n", lid);
2211
2212         return 0;
2213 }
2214
2215
2216 /**
2217  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
2218  * @dd: the infinipath device
2219  * @regno: the register number to write
2220  * @port: the port containing the register
2221  * @value: the value to write
2222  *
2223  * Registers that vary with the chip implementation constants (port)
2224  * use this routine.
2225  */
2226 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
2227                           unsigned port, u64 value)
2228 {
2229         u16 where;
2230
2231         if (port < dd->ipath_portcnt &&
2232             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
2233              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
2234                 where = regno + port;
2235         else
2236                 where = -1;
2237
2238         ipath_write_kreg(dd, where, value);
2239 }
2240
2241 /*
2242  * Following deal with the "obviously simple" task of overriding the state
2243  * of the LEDS, which normally indicate link physical and logical status.
2244  * The complications arise in dealing with different hardware mappings
2245  * and the board-dependent routine being called from interrupts.
2246  * and then there's the requirement to _flash_ them.
2247  */
2248 #define LED_OVER_FREQ_SHIFT 8
2249 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
2250 /* Below is "non-zero" to force override, but both actual LEDs are off */
2251 #define LED_OVER_BOTH_OFF (8)
2252
2253 static void ipath_run_led_override(unsigned long opaque)
2254 {
2255         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2256         int timeoff;
2257         int pidx;
2258         u64 lstate, ltstate, val;
2259
2260         if (!(dd->ipath_flags & IPATH_INITTED))
2261                 return;
2262
2263         pidx = dd->ipath_led_override_phase++ & 1;
2264         dd->ipath_led_override = dd->ipath_led_override_vals[pidx];
2265         timeoff = dd->ipath_led_override_timeoff;
2266
2267         /*
2268          * below potentially restores the LED values per current status,
2269          * should also possibly setup the traffic-blink register,
2270          * but leave that to per-chip functions.
2271          */
2272         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2273         ltstate = ipath_ib_linktrstate(dd, val);
2274         lstate = ipath_ib_linkstate(dd, val);
2275
2276         dd->ipath_f_setextled(dd, lstate, ltstate);
2277         mod_timer(&dd->ipath_led_override_timer, jiffies + timeoff);
2278 }
2279
2280 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val)
2281 {
2282         int timeoff, freq;
2283
2284         if (!(dd->ipath_flags & IPATH_INITTED))
2285                 return;
2286
2287         /* First check if we are blinking. If not, use 1HZ polling */
2288         timeoff = HZ;
2289         freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
2290
2291         if (freq) {
2292                 /* For blink, set each phase from one nybble of val */
2293                 dd->ipath_led_override_vals[0] = val & 0xF;
2294                 dd->ipath_led_override_vals[1] = (val >> 4) & 0xF;
2295                 timeoff = (HZ << 4)/freq;
2296         } else {
2297                 /* Non-blink set both phases the same. */
2298                 dd->ipath_led_override_vals[0] = val & 0xF;
2299                 dd->ipath_led_override_vals[1] = val & 0xF;
2300         }
2301         dd->ipath_led_override_timeoff = timeoff;
2302
2303         /*
2304          * If the timer has not already been started, do so. Use a "quick"
2305          * timeout so the function will be called soon, to look at our request.
2306          */
2307         if (atomic_inc_return(&dd->ipath_led_override_timer_active) == 1) {
2308                 /* Need to start timer */
2309                 setup_timer(&dd->ipath_led_override_timer,
2310                                 ipath_run_led_override, (unsigned long)dd);
2311
2312                 dd->ipath_led_override_timer.expires = jiffies + 1;
2313                 add_timer(&dd->ipath_led_override_timer);
2314         } else
2315                 atomic_dec(&dd->ipath_led_override_timer_active);
2316 }
2317
2318 /**
2319  * ipath_shutdown_device - shut down a device
2320  * @dd: the infinipath device
2321  *
2322  * This is called to make the device quiet when we are about to
2323  * unload the driver, and also when the device is administratively
2324  * disabled.   It does not free any data structures.
2325  * Everything it does has to be setup again by ipath_init_chip(dd,1)
2326  */
2327 void ipath_shutdown_device(struct ipath_devdata *dd)
2328 {
2329         unsigned long flags;
2330
2331         ipath_dbg("Shutting down the device\n");
2332
2333         ipath_hol_up(dd); /* make sure user processes aren't suspended */
2334
2335         dd->ipath_flags |= IPATH_LINKUNK;
2336         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
2337                              IPATH_LINKINIT | IPATH_LINKARMED |
2338                              IPATH_LINKACTIVE);
2339         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
2340                                 IPATH_STATUS_IB_READY);
2341
2342         /* mask interrupts, but not errors */
2343         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2344
2345         dd->ipath_rcvctrl = 0;
2346         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
2347                          dd->ipath_rcvctrl);
2348
2349         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2350                 teardown_sdma(dd);
2351
2352         /*
2353          * gracefully stop all sends allowing any in progress to trickle out
2354          * first.
2355          */
2356         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
2357         dd->ipath_sendctrl = 0;
2358         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
2359         /* flush it */
2360         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
2361         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
2362
2363         /*
2364          * enough for anything that's going to trickle out to have actually
2365          * done so.
2366          */
2367         udelay(5);
2368
2369         dd->ipath_f_setextled(dd, 0, 0); /* make sure LEDs are off */
2370
2371         ipath_set_ib_lstate(dd, 0, INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2372         ipath_cancel_sends(dd, 0);
2373
2374         /*
2375          * we are shutting down, so tell components that care.  We don't do
2376          * this on just a link state change, much like ethernet, a cable
2377          * unplug, etc. doesn't change driver state
2378          */
2379         signal_ib_event(dd, IB_EVENT_PORT_ERR);
2380
2381         /* disable IBC */
2382         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
2383         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
2384                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
2385
2386         /*
2387          * clear SerdesEnable and turn the leds off; do this here because
2388          * we are unloading, so don't count on interrupts to move along
2389          * Turn the LEDs off explicitly for the same reason.
2390          */
2391         dd->ipath_f_quiet_serdes(dd);
2392
2393         /* stop all the timers that might still be running */
2394         del_timer_sync(&dd->ipath_hol_timer);
2395         if (dd->ipath_stats_timer_active) {
2396                 del_timer_sync(&dd->ipath_stats_timer);
2397                 dd->ipath_stats_timer_active = 0;
2398         }
2399         if (dd->ipath_intrchk_timer.data) {
2400                 del_timer_sync(&dd->ipath_intrchk_timer);
2401                 dd->ipath_intrchk_timer.data = 0;
2402         }
2403         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2404                 del_timer_sync(&dd->ipath_led_override_timer);
2405                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2406         }
2407
2408         /*
2409          * clear all interrupts and errors, so that the next time the driver
2410          * is loaded or device is enabled, we know that whatever is set
2411          * happened while we were unloaded
2412          */
2413         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
2414                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
2415         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
2416         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
2417
2418         ipath_cdbg(VERBOSE, "Flush time and errors to EEPROM\n");
2419         ipath_update_eeprom_log(dd);
2420 }
2421
2422 /**
2423  * ipath_free_pddata - free a port's allocated data
2424  * @dd: the infinipath device
2425  * @pd: the portdata structure
2426  *
2427  * free up any allocated data for a port
2428  * This should not touch anything that would affect a simultaneous
2429  * re-allocation of port data, because it is called after ipath_mutex
2430  * is released (and can be called from reinit as well).
2431  * It should never change any chip state, or global driver state.
2432  * (The only exception to global state is freeing the port0 port0_skbs.)
2433  */
2434 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
2435 {
2436         if (!pd)
2437                 return;
2438
2439         if (pd->port_rcvhdrq) {
2440                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
2441                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
2442                            (unsigned long) pd->port_rcvhdrq_size);
2443                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
2444                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
2445                 pd->port_rcvhdrq = NULL;
2446                 if (pd->port_rcvhdrtail_kvaddr) {
2447                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
2448                                          pd->port_rcvhdrtail_kvaddr,
2449                                          pd->port_rcvhdrqtailaddr_phys);
2450                         pd->port_rcvhdrtail_kvaddr = NULL;
2451                 }
2452         }
2453         if (pd->port_port && pd->port_rcvegrbuf) {
2454                 unsigned e;
2455
2456                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
2457                         void *base = pd->port_rcvegrbuf[e];
2458                         size_t size = pd->port_rcvegrbuf_size;
2459
2460                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
2461                                    "chunk %u/%u\n", base,
2462                                    (unsigned long) size,
2463                                    e, pd->port_rcvegrbuf_chunks);
2464                         dma_free_coherent(&dd->pcidev->dev, size,
2465                                 base, pd->port_rcvegrbuf_phys[e]);
2466                 }
2467                 kfree(pd->port_rcvegrbuf);
2468                 pd->port_rcvegrbuf = NULL;
2469                 kfree(pd->port_rcvegrbuf_phys);
2470                 pd->port_rcvegrbuf_phys = NULL;
2471                 pd->port_rcvegrbuf_chunks = 0;
2472         } else if (pd->port_port == 0 && dd->ipath_port0_skbinfo) {
2473                 unsigned e;
2474                 struct ipath_skbinfo *skbinfo = dd->ipath_port0_skbinfo;
2475
2476                 dd->ipath_port0_skbinfo = NULL;
2477                 ipath_cdbg(VERBOSE, "free closed port %d "
2478                            "ipath_port0_skbinfo @ %p\n", pd->port_port,
2479                            skbinfo);
2480                 for (e = 0; e < dd->ipath_p0_rcvegrcnt; e++)
2481                         if (skbinfo[e].skb) {
2482                                 pci_unmap_single(dd->pcidev, skbinfo[e].phys,
2483                                                  dd->ipath_ibmaxlen,
2484                                                  PCI_DMA_FROMDEVICE);
2485                                 dev_kfree_skb(skbinfo[e].skb);
2486                         }
2487                 vfree(skbinfo);
2488         }
2489         kfree(pd->port_tid_pg_list);
2490         vfree(pd->subport_uregbase);
2491         vfree(pd->subport_rcvegrbuf);
2492         vfree(pd->subport_rcvhdr_base);
2493         kfree(pd);
2494 }
2495
2496 static int __init infinipath_init(void)
2497 {
2498         int ret;
2499
2500         if (ipath_debug & __IPATH_DBG)
2501                 printk(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
2502
2503         /*
2504          * These must be called before the driver is registered with
2505          * the PCI subsystem.
2506          */
2507         idr_init(&unit_table);
2508
2509         ret = pci_register_driver(&ipath_driver);
2510         if (ret < 0) {
2511                 printk(KERN_ERR IPATH_DRV_NAME
2512                        ": Unable to register driver: error %d\n", -ret);
2513                 goto bail_unit;
2514         }
2515
2516         ret = ipath_init_ipathfs();
2517         if (ret < 0) {
2518                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
2519                        "ipathfs: error %d\n", -ret);
2520                 goto bail_pci;
2521         }
2522
2523         goto bail;
2524
2525 bail_pci:
2526         pci_unregister_driver(&ipath_driver);
2527
2528 bail_unit:
2529         idr_destroy(&unit_table);
2530
2531 bail:
2532         return ret;
2533 }
2534
2535 static void __exit infinipath_cleanup(void)
2536 {
2537         ipath_exit_ipathfs();
2538
2539         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2540         pci_unregister_driver(&ipath_driver);
2541
2542         idr_destroy(&unit_table);
2543 }
2544
2545 /**
2546  * ipath_reset_device - reset the chip if possible
2547  * @unit: the device to reset
2548  *
2549  * Whether or not reset is successful, we attempt to re-initialize the chip
2550  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2551  * so that the various entry points will fail until we reinitialize.  For
2552  * now, we only allow this if no user ports are open that use chip resources
2553  */
2554 int ipath_reset_device(int unit)
2555 {
2556         int ret, i;
2557         struct ipath_devdata *dd = ipath_lookup(unit);
2558         unsigned long flags;
2559
2560         if (!dd) {
2561                 ret = -ENODEV;
2562                 goto bail;
2563         }
2564
2565         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2566                 /* Need to stop LED timer, _then_ shut off LEDs */
2567                 del_timer_sync(&dd->ipath_led_override_timer);
2568                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2569         }
2570
2571         /* Shut off LEDs after we are sure timer is not running */
2572         dd->ipath_led_override = LED_OVER_BOTH_OFF;
2573         dd->ipath_f_setextled(dd, 0, 0);
2574
2575         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2576
2577         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2578                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2579                          "not initialized or not present\n", unit);
2580                 ret = -ENXIO;
2581                 goto bail;
2582         }
2583
2584         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2585         if (dd->ipath_pd)
2586                 for (i = 1; i < dd->ipath_cfgports; i++) {
2587                         if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2588                                 continue;
2589                         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2590                         ipath_dbg("unit %u port %d is in use "
2591                                   "(PID %u cmd %s), can't reset\n",
2592                                   unit, i,
2593                                   pid_nr(dd->ipath_pd[i]->port_pid),
2594                                   dd->ipath_pd[i]->port_comm);
2595                         ret = -EBUSY;
2596                         goto bail;
2597                 }
2598         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2599
2600         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2601                 teardown_sdma(dd);
2602
2603         dd->ipath_flags &= ~IPATH_INITTED;
2604         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2605         ret = dd->ipath_f_reset(dd);
2606         if (ret == 1) {
2607                 ipath_dbg("Reinitializing unit %u after reset attempt\n",
2608                           unit);
2609                 ret = ipath_init_chip(dd, 1);
2610         } else
2611                 ret = -EAGAIN;
2612         if (ret)
2613                 ipath_dev_err(dd, "Reinitialize unit %u after "
2614                               "reset failed with %d\n", unit, ret);
2615         else
2616                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2617                          "resetting\n", unit);
2618
2619 bail:
2620         return ret;
2621 }
2622
2623 /*
2624  * send a signal to all the processes that have the driver open
2625  * through the normal interfaces (i.e., everything other than diags
2626  * interface).  Returns number of signalled processes.
2627  */
2628 static int ipath_signal_procs(struct ipath_devdata *dd, int sig)
2629 {
2630         int i, sub, any = 0;
2631         struct pid *pid;
2632         unsigned long flags;
2633
2634         if (!dd->ipath_pd)
2635                 return 0;
2636
2637         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2638         for (i = 1; i < dd->ipath_cfgports; i++) {
2639                 if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2640                         continue;
2641                 pid = dd->ipath_pd[i]->port_pid;
2642                 if (!pid)
2643                         continue;
2644
2645                 dev_info(&dd->pcidev->dev, "context %d in use "
2646                           "(PID %u), sending signal %d\n",
2647                           i, pid_nr(pid), sig);
2648                 kill_pid(pid, sig, 1);
2649                 any++;
2650                 for (sub = 0; sub < INFINIPATH_MAX_SUBPORT; sub++) {
2651                         pid = dd->ipath_pd[i]->port_subpid[sub];
2652                         if (!pid)
2653                                 continue;
2654                         dev_info(&dd->pcidev->dev, "sub-context "
2655                                 "%d:%d in use (PID %u), sending "
2656                                 "signal %d\n", i, sub, pid_nr(pid), sig);
2657                         kill_pid(pid, sig, 1);
2658                         any++;
2659                 }
2660         }
2661         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2662         return any;
2663 }
2664
2665 static void ipath_hol_signal_down(struct ipath_devdata *dd)
2666 {
2667         if (ipath_signal_procs(dd, SIGSTOP))
2668                 ipath_dbg("Stopped some processes\n");
2669         ipath_cancel_sends(dd, 1);
2670 }
2671
2672
2673 static void ipath_hol_signal_up(struct ipath_devdata *dd)
2674 {
2675         if (ipath_signal_procs(dd, SIGCONT))
2676                 ipath_dbg("Continued some processes\n");
2677 }
2678
2679 /*
2680  * link is down, stop any users processes, and flush pending sends
2681  * to prevent HoL blocking, then start the HoL timer that
2682  * periodically continues, then stop procs, so they can detect
2683  * link down if they want, and do something about it.
2684  * Timer may already be running, so use mod_timer, not add_timer.
2685  */
2686 void ipath_hol_down(struct ipath_devdata *dd)
2687 {
2688         dd->ipath_hol_state = IPATH_HOL_DOWN;
2689         ipath_hol_signal_down(dd);
2690         dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2691         dd->ipath_hol_timer.expires = jiffies +
2692                 msecs_to_jiffies(ipath_hol_timeout_ms);
2693         mod_timer(&dd->ipath_hol_timer, dd->ipath_hol_timer.expires);
2694 }
2695
2696 /*
2697  * link is up, continue any user processes, and ensure timer
2698  * is a nop, if running.  Let timer keep running, if set; it
2699  * will nop when it sees the link is up
2700  */
2701 void ipath_hol_up(struct ipath_devdata *dd)
2702 {
2703         ipath_hol_signal_up(dd);
2704         dd->ipath_hol_state = IPATH_HOL_UP;
2705 }
2706
2707 /*
2708  * toggle the running/not running state of user proceses
2709  * to prevent HoL blocking on chip resources, but still allow
2710  * user processes to do link down special case handling.
2711  * Should only be called via the timer
2712  */
2713 void ipath_hol_event(unsigned long opaque)
2714 {
2715         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2716
2717         if (dd->ipath_hol_next == IPATH_HOL_DOWNSTOP
2718                 && dd->ipath_hol_state != IPATH_HOL_UP) {
2719                 dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2720                 ipath_dbg("Stopping processes\n");
2721                 ipath_hol_signal_down(dd);
2722         } else { /* may do "extra" if also in ipath_hol_up() */
2723                 dd->ipath_hol_next = IPATH_HOL_DOWNSTOP;
2724                 ipath_dbg("Continuing processes\n");
2725                 ipath_hol_signal_up(dd);
2726         }
2727         if (dd->ipath_hol_state == IPATH_HOL_UP)
2728                 ipath_dbg("link's up, don't resched timer\n");
2729         else {
2730                 dd->ipath_hol_timer.expires = jiffies +
2731                         msecs_to_jiffies(ipath_hol_timeout_ms);
2732                 mod_timer(&dd->ipath_hol_timer,
2733                         dd->ipath_hol_timer.expires);
2734         }
2735 }
2736
2737 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2738 {
2739         u64 val;
2740
2741         if (new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK)
2742                 return -1;
2743         if (dd->ipath_rx_pol_inv != new_pol_inv) {
2744                 dd->ipath_rx_pol_inv = new_pol_inv;
2745                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2746                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2747                          INFINIPATH_XGXS_RX_POL_SHIFT);
2748                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2749                         INFINIPATH_XGXS_RX_POL_SHIFT;
2750                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2751         }
2752         return 0;
2753 }
2754
2755 /*
2756  * Disable and enable the armlaunch error.  Used for PIO bandwidth testing on
2757  * the 7220, which is count-based, rather than trigger-based.  Safe for the
2758  * driver check, since it's at init.   Not completely safe when used for
2759  * user-mode checking, since some error checking can be lost, but not
2760  * particularly risky, and only has problematic side-effects in the face of
2761  * very buggy user code.  There is no reference counting, but that's also
2762  * fine, given the intended use.
2763  */
2764 void ipath_enable_armlaunch(struct ipath_devdata *dd)
2765 {
2766         dd->ipath_lasterror &= ~INFINIPATH_E_SPIOARMLAUNCH;
2767         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
2768                 INFINIPATH_E_SPIOARMLAUNCH);
2769         dd->ipath_errormask |= INFINIPATH_E_SPIOARMLAUNCH;
2770         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2771                 dd->ipath_errormask);
2772 }
2773
2774 void ipath_disable_armlaunch(struct ipath_devdata *dd)
2775 {
2776         /* so don't re-enable if already set */
2777         dd->ipath_maskederrs &= ~INFINIPATH_E_SPIOARMLAUNCH;
2778         dd->ipath_errormask &= ~INFINIPATH_E_SPIOARMLAUNCH;
2779         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2780                 dd->ipath_errormask);
2781 }
2782
2783 module_init(infinipath_init);
2784 module_exit(infinipath_cleanup);