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50 #ifndef __PLATFORM_CONFIG_H
51 #define __PLATFORM_CONFIG_H
53 #define METADATA_TABLE_FIELD_START_SHIFT 0
54 #define METADATA_TABLE_FIELD_START_LEN_BITS 15
55 #define METADATA_TABLE_FIELD_LEN_SHIFT 16
56 #define METADATA_TABLE_FIELD_LEN_LEN_BITS 16
58 /* Header structure */
59 #define PLATFORM_CONFIG_HEADER_RECORD_IDX_SHIFT 0
60 #define PLATFORM_CONFIG_HEADER_RECORD_IDX_LEN_BITS 6
61 #define PLATFORM_CONFIG_HEADER_TABLE_LENGTH_SHIFT 16
62 #define PLATFORM_CONFIG_HEADER_TABLE_LENGTH_LEN_BITS 12
63 #define PLATFORM_CONFIG_HEADER_TABLE_TYPE_SHIFT 28
64 #define PLATFORM_CONFIG_HEADER_TABLE_TYPE_LEN_BITS 4
66 enum platform_config_table_type_encoding {
67 PLATFORM_CONFIG_TABLE_RESERVED,
68 PLATFORM_CONFIG_SYSTEM_TABLE,
69 PLATFORM_CONFIG_PORT_TABLE,
70 PLATFORM_CONFIG_RX_PRESET_TABLE,
71 PLATFORM_CONFIG_TX_PRESET_TABLE,
72 PLATFORM_CONFIG_QSFP_ATTEN_TABLE,
73 PLATFORM_CONFIG_VARIABLE_SETTINGS_TABLE,
74 PLATFORM_CONFIG_TABLE_MAX
77 enum platform_config_system_table_fields {
78 SYSTEM_TABLE_RESERVED,
79 SYSTEM_TABLE_NODE_STRING,
80 SYSTEM_TABLE_SYSTEM_IMAGE_GUID,
81 SYSTEM_TABLE_NODE_GUID,
82 SYSTEM_TABLE_REVISION,
83 SYSTEM_TABLE_VENDOR_OUI,
84 SYSTEM_TABLE_META_VERSION,
85 SYSTEM_TABLE_DEVICE_ID,
86 SYSTEM_TABLE_PARTITION_ENFORCEMENT_CAP,
87 SYSTEM_TABLE_QSFP_POWER_CLASS_MAX,
88 SYSTEM_TABLE_QSFP_ATTENUATION_DEFAULT_12G,
89 SYSTEM_TABLE_QSFP_ATTENUATION_DEFAULT_25G,
90 SYSTEM_TABLE_VARIABLE_TABLE_ENTRIES_PER_PORT,
94 enum platform_config_port_table_fields {
97 PORT_TABLE_ATTENUATION_12G,
98 PORT_TABLE_ATTENUATION_25G,
99 PORT_TABLE_LINK_SPEED_SUPPORTED,
100 PORT_TABLE_LINK_WIDTH_SUPPORTED,
103 PORT_TABLE_TX_LANE_ENABLE_MASK,
104 PORT_TABLE_LOCAL_MAX_TIMEOUT,
105 PORT_TABLE_AUTO_LANE_SHEDDING_ENABLED,
106 PORT_TABLE_EXTERNAL_LOOPBACK_ALLOWED,
107 PORT_TABLE_TX_PRESET_IDX_PASSIVE_CU,
108 PORT_TABLE_TX_PRESET_IDX_ACTIVE_NO_EQ,
109 PORT_TABLE_TX_PRESET_IDX_ACTIVE_EQ,
110 PORT_TABLE_RX_PRESET_IDX,
111 PORT_TABLE_CABLE_REACH_CLASS,
115 enum platform_config_rx_preset_table_fields {
116 RX_PRESET_TABLE_RESERVED,
117 RX_PRESET_TABLE_QSFP_RX_CDR_APPLY,
118 RX_PRESET_TABLE_QSFP_RX_EQ_APPLY,
119 RX_PRESET_TABLE_QSFP_RX_AMP_APPLY,
120 RX_PRESET_TABLE_QSFP_RX_CDR,
121 RX_PRESET_TABLE_QSFP_RX_EQ,
122 RX_PRESET_TABLE_QSFP_RX_AMP,
126 enum platform_config_tx_preset_table_fields {
127 TX_PRESET_TABLE_RESERVED,
128 TX_PRESET_TABLE_PRECUR,
129 TX_PRESET_TABLE_ATTN,
130 TX_PRESET_TABLE_POSTCUR,
131 TX_PRESET_TABLE_QSFP_TX_CDR_APPLY,
132 TX_PRESET_TABLE_QSFP_TX_EQ_APPLY,
133 TX_PRESET_TABLE_QSFP_TX_CDR,
134 TX_PRESET_TABLE_QSFP_TX_EQ,
138 enum platform_config_qsfp_attn_table_fields {
139 QSFP_ATTEN_TABLE_RESERVED,
140 QSFP_ATTEN_TABLE_TX_PRESET_IDX,
141 QSFP_ATTEN_TABLE_RX_PRESET_IDX,
145 enum platform_config_variable_settings_table_fields {
146 VARIABLE_SETTINGS_TABLE_RESERVED,
147 VARIABLE_SETTINGS_TABLE_TX_PRESET_IDX,
148 VARIABLE_SETTINGS_TABLE_RX_PRESET_IDX,
149 VARIABLE_SETTINGS_TABLE_MAX
152 struct platform_config_data {
159 * This struct acts as a quick reference into the platform_data binary image
160 * and is populated by parse_platform_config(...) depending on the specific
163 struct platform_config_cache {
165 struct platform_config_data config_tables[PLATFORM_CONFIG_TABLE_MAX];
168 static const u32 platform_config_table_limits[PLATFORM_CONFIG_TABLE_MAX] = {
174 QSFP_ATTEN_TABLE_MAX,
175 VARIABLE_SETTINGS_TABLE_MAX
178 /* This section defines default values and encodings for the
179 * fields defined for each table above
182 /*=====================================================
183 * System table encodings
184 *====================================================*/
185 #define PLATFORM_CONFIG_MAGIC_NUM 0x3d4f5041
186 #define PLATFORM_CONFIG_MAGIC_NUMBER_LEN 4
189 * These power classes are the same as defined in SFF 8636 spec rev 2.4
190 * describing byte 129 in table 6-16, except enumerated in a different order
192 enum platform_config_qsfp_power_class_encoding {
193 QSFP_POWER_CLASS_1 = 1,
203 /*=====================================================
204 * Port table encodings
205 *==================================================== */
206 enum platform_config_port_type_encoding {
208 PORT_TYPE_DISCONNECTED,
215 enum platform_config_link_speed_supported_encoding {
216 LINK_SPEED_SUPP_12G = 1,
218 LINK_SPEED_SUPP_12G_25G,
223 * This is a subset (not strict) of the link downgrades
224 * supported. The link downgrades supported are expected
225 * to be supplied to the driver by another entity such as
228 enum platform_config_link_width_supported_encoding {
229 LINK_WIDTH_SUPP_1X = 1,
231 LINK_WIDTH_SUPP_2X_1X,
233 LINK_WIDTH_SUPP_3X_1X,
234 LINK_WIDTH_SUPP_3X_2X,
235 LINK_WIDTH_SUPP_3X_2X_1X,
237 LINK_WIDTH_SUPP_4X_1X,
238 LINK_WIDTH_SUPP_4X_2X,
239 LINK_WIDTH_SUPP_4X_2X_1X,
240 LINK_WIDTH_SUPP_4X_3X,
241 LINK_WIDTH_SUPP_4X_3X_1X,
242 LINK_WIDTH_SUPP_4X_3X_2X,
243 LINK_WIDTH_SUPP_4X_3X_2X_1X,
247 enum platform_config_virtual_lane_capability_encoding {
267 enum platform_config_mtu_capability_encoding {
277 enum platform_config_local_max_timeout_encoding {
278 LOCAL_MAX_TIMEOUT_10_MS = 1,
279 LOCAL_MAX_TIMEOUT_100_MS,
280 LOCAL_MAX_TIMEOUT_1_S,
281 LOCAL_MAX_TIMEOUT_10_S,
282 LOCAL_MAX_TIMEOUT_100_S,
283 LOCAL_MAX_TIMEOUT_1000_S
286 #endif /*__PLATFORM_CONFIG_H*/