5 * This file is provided under a dual BSD/GPLv2 license. When using or
6 * redistributing this file, you may do so under either license.
10 * Copyright(c) 2015 Intel Corporation.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
23 * Copyright(c) 2015 Intel Corporation.
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
29 * - Redistributions of source code must retain the above copyright
30 * notice, this list of conditions and the following disclaimer.
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32 * notice, this list of conditions and the following disclaimer in
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39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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49 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53 #include <linux/interrupt.h>
54 #include <linux/pci.h>
55 #include <linux/dma-mapping.h>
56 #include <linux/mutex.h>
57 #include <linux/list.h>
58 #include <linux/scatterlist.h>
59 #include <linux/slab.h>
62 #include <linux/completion.h>
63 #include <linux/kref.h>
64 #include <linux/sched.h>
65 #include <linux/cdev.h>
66 #include <linux/delay.h>
67 #include <linux/kthread.h>
69 #include "chip_registers.h"
76 #include "platform_config.h"
78 /* bumped 1 from s/w major version of TrueScale */
79 #define HFI1_CHIP_VERS_MAJ 3U
81 /* don't care about this except printing */
82 #define HFI1_CHIP_VERS_MIN 0U
84 /* The Organization Unique Identifier (Mfg code), and its position in GUID */
85 #define HFI1_OUI 0x001175
86 #define HFI1_OUI_LSB 40
88 #define DROP_PACKET_OFF 0
89 #define DROP_PACKET_ON 1
91 extern unsigned long hfi1_cap_mask;
92 #define HFI1_CAP_KGET_MASK(mask, cap) ((mask) & HFI1_CAP_##cap)
93 #define HFI1_CAP_UGET_MASK(mask, cap) \
94 (((mask) >> HFI1_CAP_USER_SHIFT) & HFI1_CAP_##cap)
95 #define HFI1_CAP_KGET(cap) (HFI1_CAP_KGET_MASK(hfi1_cap_mask, cap))
96 #define HFI1_CAP_UGET(cap) (HFI1_CAP_UGET_MASK(hfi1_cap_mask, cap))
97 #define HFI1_CAP_IS_KSET(cap) (!!HFI1_CAP_KGET(cap))
98 #define HFI1_CAP_IS_USET(cap) (!!HFI1_CAP_UGET(cap))
99 #define HFI1_MISC_GET() ((hfi1_cap_mask >> HFI1_CAP_MISC_SHIFT) & \
103 * per driver stats, either not device nor port-specific, or
104 * summed over all of the devices and ports.
105 * They are described by name via ipathfs filesystem, so layout
106 * and number of elements can change without breaking compatibility.
107 * If members are added or deleted hfi1_statnames[] in debugfs.c must
110 struct hfi1_ib_stats {
111 __u64 sps_ints; /* number of interrupts handled */
112 __u64 sps_errints; /* number of error interrupts */
113 __u64 sps_txerrs; /* tx-related packet errors */
114 __u64 sps_rcverrs; /* non-crc rcv packet errors */
115 __u64 sps_hwerrs; /* hardware errors reported (parity, etc.) */
116 __u64 sps_nopiobufs; /* no pio bufs avail from kernel */
117 __u64 sps_ctxts; /* number of contexts currently open */
118 __u64 sps_lenerrs; /* number of kernel packets where RHF != LRH len */
123 extern struct hfi1_ib_stats hfi1_stats;
124 extern const struct pci_error_handlers hfi1_pci_err_handler;
127 * First-cut criterion for "device is active" is
128 * two thousand dwords combined Tx, Rx traffic per
129 * 5-second interval. SMA packets are 64 dwords,
130 * and occur "a few per second", presumably each way.
132 #define HFI1_TRAFFIC_ACTIVE_THRESHOLD (2000)
135 * Below contains all data related to a single context (formerly called port).
138 #ifdef CONFIG_DEBUG_FS
139 struct hfi1_opcode_stats_perctx;
143 * struct ps_state keeps state associated with RX queue "prescanning"
144 * (prescanning for FECNs, and BECNs), if prescanning is in use.
151 struct ctxt_eager_bufs {
152 ssize_t size; /* total size of eager buffers */
153 u32 count; /* size of buffers array */
154 u32 numbufs; /* number of buffers allocated */
155 u32 alloced; /* number of rcvarray entries used */
156 u32 rcvtid_size; /* size of each eager rcv tid */
157 u32 threshold; /* head update threshold */
158 struct eager_buffer {
169 struct hfi1_ctxtdata {
170 /* shadow the ctxt's RcvCtrl register */
172 /* rcvhdrq base, needs mmap before useful */
174 /* kernel virtual address where hdrqtail is updated */
175 volatile __le64 *rcvhdrtail_kvaddr;
177 * Shared page for kernel to signal user processes that send buffers
178 * need disarming. The process should call HFI1_CMD_DISARM_BUFS
179 * or HFI1_CMD_ACK_EVENT with IPATH_EVENT_DISARM_BUFS set.
181 unsigned long *user_event_mask;
182 /* when waiting for rcv or pioavail */
183 wait_queue_head_t wait;
184 /* rcvhdrq size (for freeing) */
186 /* number of rcvhdrq entries */
188 /* size of each of the rcvhdrq entries */
190 /* mmap of hdrq, must fit in 44 bits */
191 dma_addr_t rcvhdrq_phys;
192 dma_addr_t rcvhdrqtailaddr_phys;
193 struct ctxt_eager_bufs egrbufs;
194 /* this receive context's assigned PIO ACK send context */
195 struct send_context *sc;
197 /* dynamic receive available interrupt timeout */
198 u32 rcvavail_timeout;
200 * number of opens (including slave sub-contexts) on this instance
201 * (ignoring forks, dup, etc. for now)
205 * how much space to leave at start of eager TID entries for
206 * protocol use, on each TID
208 /* instead of calculating it */
210 /* non-zero if ctxt is being shared. */
212 /* non-zero if ctxt is being shared. */
217 /* number of RcvArray groups for this context. */
218 u32 rcv_array_groups;
219 /* index of first eager TID entry. */
221 /* number of expected TID entries */
223 /* index of first expected TID entry. */
225 /* cursor into the exp group sets */
227 /* number of exp TID groups assigned to the ctxt */
229 /* size of exp TID group fields in tidusemap */
231 /* exp TID group usage bitfield array */
232 unsigned long *tidusemap;
233 /* pinned pages for exp sends, allocated at open */
234 struct page **tid_pg_list;
235 /* dma handles for exp tid pages */
236 dma_addr_t *physshadow;
237 /* lock protecting all Expected TID data */
239 /* number of pio bufs for this ctxt (all procs, if shared) */
241 /* first pio buffer for this ctxt */
243 /* chip offset of PIO buffers for this ctxt */
245 /* per-context configuration flags */
247 /* per-context event flags for fileops/intr communication */
248 unsigned long event_flags;
249 /* WAIT_RCV that timed out, no interrupt */
251 /* WAIT_PIO that timed out, no interrupt */
253 /* WAIT_RCV already happened, no wait */
255 /* WAIT_PIO already happened, no wait */
257 /* total number of polled urgent packets */
259 /* saved total number of polled urgent packets for poll edge trigger */
261 /* pid of process using this ctxt */
263 pid_t subpid[HFI1_MAX_SHARED_CTXTS];
264 /* same size as task_struct .comm[], command that opened context */
265 char comm[TASK_COMM_LEN];
266 /* so file ops can get at unit */
267 struct hfi1_devdata *dd;
268 /* so functions that need physical port can get it easily */
269 struct hfi1_pportdata *ppd;
270 /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */
271 void *subctxt_uregbase;
272 /* An array of pages for the eager receive buffers * N */
273 void *subctxt_rcvegrbuf;
274 /* An array of pages for the eager header queue entries * N */
275 void *subctxt_rcvhdr_base;
276 /* The version of the library which opened this ctxt */
278 /* Bitmask of active slaves */
280 /* Type of packets or conditions we want to poll for */
282 /* receive packet sequence counter */
285 /* ctxt rcvhdrq head offset */
288 /* QPs waiting for context processing */
289 struct list_head qp_wait_list;
290 /* interrupt handling */
291 u64 imask; /* clear interrupt mask */
292 int ireg; /* clear interrupt register */
293 unsigned numa_id; /* numa node of this context */
294 /* verbs stats per CTX */
295 struct hfi1_opcode_stats_perctx *opstats;
297 * This is the kernel thread that will keep making
298 * progress on the user sdma requests behind the scenes.
299 * There is one per context (shared contexts use the master's).
301 struct task_struct *progress;
302 struct list_head sdma_queues;
303 spinlock_t sdma_qlock;
305 #ifdef CONFIG_PRESCAN_RXQ
306 struct ps_state ps_state;
307 #endif /* CONFIG_PRESCAN_RXQ */
310 * The interrupt handler for a particular receive context can vary
311 * throughout it's lifetime. This is not a lock protected data member so
312 * it must be updated atomically and the prev and new value must always
313 * be valid. Worst case is we process an extra interrupt and up to 64
314 * packets with the wrong interrupt handler.
316 int (*do_interrupt)(struct hfi1_ctxtdata *rcd, int threaded);
320 * Represents a single packet at a high level. Put commonly computed things in
321 * here so we do not have to keep doing them over and over. The rule of thumb is
322 * if something is used one time to derive some value, store that something in
323 * here. If it is used multiple times, then store the result of that derivation
329 struct hfi1_ctxtdata *rcd;
332 struct hfi1_other_headers *ohdr;
347 static inline bool has_sc4_bit(struct hfi1_packet *p)
349 return !!rhf_dc_info(p->rhf);
353 * Private data for snoop/capture support.
355 struct hfi1_snoop_data {
358 struct device *class_dev;
359 spinlock_t snoop_lock;
360 struct list_head queue;
361 wait_queue_head_t waitq;
363 int (*filter_callback)(void *hdr, void *data, void *value);
364 u64 dcc_cfg; /* saved value of DCC Cfg register */
367 /* snoop mode_flag values */
368 #define HFI1_PORT_SNOOP_MODE 1U
369 #define HFI1_PORT_CAPTURE_MODE 2U
371 struct hfi1_sge_state;
374 * Get/Set IB link-level config parameters for f_get/set_ib_cfg()
375 * Mostly for MADs that set or query link parameters, also ipath
378 #define HFI1_IB_CFG_LIDLMC 0 /* LID (LS16b) and Mask (MS16b) */
379 #define HFI1_IB_CFG_LWID_DG_ENB 1 /* allowed Link-width downgrade */
380 #define HFI1_IB_CFG_LWID_ENB 2 /* allowed Link-width */
381 #define HFI1_IB_CFG_LWID 3 /* currently active Link-width */
382 #define HFI1_IB_CFG_SPD_ENB 4 /* allowed Link speeds */
383 #define HFI1_IB_CFG_SPD 5 /* current Link spd */
384 #define HFI1_IB_CFG_RXPOL_ENB 6 /* Auto-RX-polarity enable */
385 #define HFI1_IB_CFG_LREV_ENB 7 /* Auto-Lane-reversal enable */
386 #define HFI1_IB_CFG_LINKLATENCY 8 /* Link Latency (IB1.2 only) */
387 #define HFI1_IB_CFG_HRTBT 9 /* IB heartbeat off/enable/auto; DDR/QDR only */
388 #define HFI1_IB_CFG_OP_VLS 10 /* operational VLs */
389 #define HFI1_IB_CFG_VL_HIGH_CAP 11 /* num of VL high priority weights */
390 #define HFI1_IB_CFG_VL_LOW_CAP 12 /* num of VL low priority weights */
391 #define HFI1_IB_CFG_OVERRUN_THRESH 13 /* IB overrun threshold */
392 #define HFI1_IB_CFG_PHYERR_THRESH 14 /* IB PHY error threshold */
393 #define HFI1_IB_CFG_LINKDEFAULT 15 /* IB link default (sleep/poll) */
394 #define HFI1_IB_CFG_PKEYS 16 /* update partition keys */
395 #define HFI1_IB_CFG_MTU 17 /* update MTU in IBC */
396 #define HFI1_IB_CFG_VL_HIGH_LIMIT 19
397 #define HFI1_IB_CFG_PMA_TICKS 20 /* PMA sample tick resolution */
398 #define HFI1_IB_CFG_PORT 21 /* switch port we are connected to */
401 * HFI or Host Link States
403 * These describe the states the driver thinks the logical and physical
404 * states are in. Used as an argument to set_link_state(). Implemented
405 * as bits for easy multi-state checking. The actual state can only be
408 #define __HLS_UP_INIT_BP 0
409 #define __HLS_UP_ARMED_BP 1
410 #define __HLS_UP_ACTIVE_BP 2
411 #define __HLS_DN_DOWNDEF_BP 3 /* link down default */
412 #define __HLS_DN_POLL_BP 4
413 #define __HLS_DN_DISABLE_BP 5
414 #define __HLS_DN_OFFLINE_BP 6
415 #define __HLS_VERIFY_CAP_BP 7
416 #define __HLS_GOING_UP_BP 8
417 #define __HLS_GOING_OFFLINE_BP 9
418 #define __HLS_LINK_COOLDOWN_BP 10
420 #define HLS_UP_INIT (1 << __HLS_UP_INIT_BP)
421 #define HLS_UP_ARMED (1 << __HLS_UP_ARMED_BP)
422 #define HLS_UP_ACTIVE (1 << __HLS_UP_ACTIVE_BP)
423 #define HLS_DN_DOWNDEF (1 << __HLS_DN_DOWNDEF_BP) /* link down default */
424 #define HLS_DN_POLL (1 << __HLS_DN_POLL_BP)
425 #define HLS_DN_DISABLE (1 << __HLS_DN_DISABLE_BP)
426 #define HLS_DN_OFFLINE (1 << __HLS_DN_OFFLINE_BP)
427 #define HLS_VERIFY_CAP (1 << __HLS_VERIFY_CAP_BP)
428 #define HLS_GOING_UP (1 << __HLS_GOING_UP_BP)
429 #define HLS_GOING_OFFLINE (1 << __HLS_GOING_OFFLINE_BP)
430 #define HLS_LINK_COOLDOWN (1 << __HLS_LINK_COOLDOWN_BP)
432 #define HLS_UP (HLS_UP_INIT | HLS_UP_ARMED | HLS_UP_ACTIVE)
434 /* use this MTU size if none other is given */
435 #define HFI1_DEFAULT_ACTIVE_MTU 8192
436 /* use this MTU size as the default maximum */
437 #define HFI1_DEFAULT_MAX_MTU 8192
438 /* default partition key */
439 #define DEFAULT_PKEY 0xffff
442 * Possible fabric manager config parameters for fm_{get,set}_table()
444 #define FM_TBL_VL_HIGH_ARB 1 /* Get/set VL high prio weights */
445 #define FM_TBL_VL_LOW_ARB 2 /* Get/set VL low prio weights */
446 #define FM_TBL_BUFFER_CONTROL 3 /* Get/set Buffer Control */
447 #define FM_TBL_SC2VLNT 4 /* Get/set SC->VLnt */
448 #define FM_TBL_VL_PREEMPT_ELEMS 5 /* Get (no set) VL preempt elems */
449 #define FM_TBL_VL_PREEMPT_MATRIX 6 /* Get (no set) VL preempt matrix */
452 * Possible "operations" for f_rcvctrl(ppd, op, ctxt)
453 * these are bits so they can be combined, e.g.
454 * HFI1_RCVCTRL_INTRAVAIL_ENB | HFI1_RCVCTRL_CTXT_ENB
456 #define HFI1_RCVCTRL_TAILUPD_ENB 0x01
457 #define HFI1_RCVCTRL_TAILUPD_DIS 0x02
458 #define HFI1_RCVCTRL_CTXT_ENB 0x04
459 #define HFI1_RCVCTRL_CTXT_DIS 0x08
460 #define HFI1_RCVCTRL_INTRAVAIL_ENB 0x10
461 #define HFI1_RCVCTRL_INTRAVAIL_DIS 0x20
462 #define HFI1_RCVCTRL_PKEY_ENB 0x40 /* Note, default is enabled */
463 #define HFI1_RCVCTRL_PKEY_DIS 0x80
464 #define HFI1_RCVCTRL_TIDFLOW_ENB 0x0400
465 #define HFI1_RCVCTRL_TIDFLOW_DIS 0x0800
466 #define HFI1_RCVCTRL_ONE_PKT_EGR_ENB 0x1000
467 #define HFI1_RCVCTRL_ONE_PKT_EGR_DIS 0x2000
468 #define HFI1_RCVCTRL_NO_RHQ_DROP_ENB 0x4000
469 #define HFI1_RCVCTRL_NO_RHQ_DROP_DIS 0x8000
470 #define HFI1_RCVCTRL_NO_EGR_DROP_ENB 0x10000
471 #define HFI1_RCVCTRL_NO_EGR_DROP_DIS 0x20000
473 /* partition enforcement flags */
474 #define HFI1_PART_ENFORCE_IN 0x1
475 #define HFI1_PART_ENFORCE_OUT 0x2
477 /* how often we check for synthetic counter wrap around */
478 #define SYNTH_CNT_TIME 2
481 #define CNTR_NORMAL 0x0 /* Normal counters, just read register */
482 #define CNTR_SYNTH 0x1 /* Synthetic counters, saturate at all 1s */
483 #define CNTR_DISABLED 0x2 /* Disable this counter */
484 #define CNTR_32BIT 0x4 /* Simulate 64 bits for this counter */
485 #define CNTR_VL 0x8 /* Per VL counter */
486 #define CNTR_INVALID_VL -1 /* Specifies invalid VL */
487 #define CNTR_MODE_W 0x0
488 #define CNTR_MODE_R 0x1
490 /* VLs Supported/Operational */
491 #define HFI1_MIN_VLS_SUPPORTED 1
492 #define HFI1_MAX_VLS_SUPPORTED 8
494 static inline void incr_cntr64(u64 *cntr)
496 if (*cntr < (u64)-1LL)
500 static inline void incr_cntr32(u32 *cntr)
502 if (*cntr < (u32)-1LL)
506 #define MAX_NAME_SIZE 64
507 struct hfi1_msix_entry {
508 struct msix_entry msix;
510 char name[MAX_NAME_SIZE];
514 /* per-SL CCA information */
516 struct hrtimer hrtimer;
517 struct hfi1_pportdata *ppd; /* read-only */
518 int sl; /* read-only */
519 u16 ccti; /* read/write - current value of CCTI */
522 struct link_down_reason {
524 * SMA-facing value. Should be set from .latest when
525 * HLS_UP_* -> HLS_DN_* transition actually occurs.
537 struct vl_arb_cache {
539 struct ib_vl_weight_elem table[VL_ARB_TABLE_SIZE];
543 * The structure below encapsulates data relevant to a physical IB Port.
544 * Current chips support only one such port, but the separation
545 * clarifies things a bit. Note that to conform to IB conventions,
546 * port-numbers are one-based. The first or only port is port1.
548 struct hfi1_pportdata {
549 struct hfi1_ibport ibport_data;
551 struct hfi1_devdata *dd;
552 struct kobject pport_cc_kobj;
553 struct kobject sc2vl_kobj;
554 struct kobject sl2sc_kobj;
555 struct kobject vl2mtu_kobj;
558 struct qsfp_data qsfp_info;
560 /* GUID for this interface, in host order */
562 /* GUID for peer interface, in host order */
565 /* up or down physical link state */
569 * this address is mapped read-only into user processes so they can
570 * get status cheaply, whenever they want. One qword of status per port
574 /* SendDMA related entries */
576 struct workqueue_struct *hfi1_wq;
578 /* move out of interrupt context */
579 struct work_struct link_vc_work;
580 struct work_struct link_up_work;
581 struct work_struct link_down_work;
582 struct work_struct sma_message_work;
583 struct work_struct freeze_work;
584 struct work_struct link_downgrade_work;
585 struct work_struct link_bounce_work;
586 /* host link state variables */
587 struct mutex hls_lock;
590 spinlock_t sdma_alllock ____cacheline_aligned_in_smp;
592 u32 lstate; /* logical link state */
594 /* these are the "32 bit" regs */
596 u32 ibmtu; /* The MTU programmed for this unit */
598 * Current max size IB packet (in bytes) including IB headers, that
599 * we can send. Changes when ibmtu changes.
602 u32 current_egress_rate; /* units [10^6 bits/sec] */
603 /* LID programmed for this instance */
605 /* list of pkeys programmed; 0 if not set */
606 u16 pkeys[MAX_PKEY_VALUES];
607 u16 link_width_supported;
608 u16 link_width_downgrade_supported;
609 u16 link_speed_supported;
610 u16 link_width_enabled;
611 u16 link_width_downgrade_enabled;
612 u16 link_speed_enabled;
613 u16 link_width_active;
614 u16 link_width_downgrade_tx_active;
615 u16 link_width_downgrade_rx_active;
616 u16 link_speed_active;
619 /* LID mask control */
621 /* Rx Polarity inversion (compensate for ~tx on partner) */
624 u8 hw_pidx; /* physical port index */
625 u8 port; /* IB port number and index into dd->pports - 1 */
626 /* type of neighbor node */
629 u8 neighbor_fm_security; /* 1 if firmware checking is disabled */
630 u8 neighbor_port_number;
631 u8 is_sm_config_started;
632 u8 offline_disabled_reason;
633 u8 is_active_optimize_enabled;
634 u8 driver_link_ready; /* driver ready for active link */
635 u8 link_enabled; /* link enabled? */
637 u8 local_tx_rate; /* rate given to 8051 firmware */
639 /* placeholders for IB MAD packet settings */
640 u8 overrun_threshold;
641 u8 phy_error_threshold;
643 /* used to override LED behavior */
644 u8 led_override; /* Substituted for normal value, if non-zero */
645 u16 led_override_timeoff; /* delta to next timer event */
646 u8 led_override_vals[2]; /* Alternates per blink-frame */
647 u8 led_override_phase; /* Just counts, LSB picks from vals[] */
648 atomic_t led_override_timer_active;
649 /* Used to flash LEDs in override mode */
650 struct timer_list led_override_timer;
655 * cca_timer_lock protects access to the per-SL cca_timer
656 * structures (specifically the ccti member).
658 spinlock_t cca_timer_lock ____cacheline_aligned_in_smp;
659 struct cca_timer cca_timer[OPA_MAX_SLS];
661 /* List of congestion control table entries */
662 struct ib_cc_table_entry_shadow ccti_entries[CC_TABLE_SHADOW_MAX];
664 /* congestion entries, each entry corresponding to a SL */
665 struct opa_congestion_setting_entry_shadow
666 congestion_entries[OPA_MAX_SLS];
669 * cc_state_lock protects (write) access to the per-port
672 spinlock_t cc_state_lock ____cacheline_aligned_in_smp;
674 struct cc_state __rcu *cc_state;
676 /* Total number of congestion control table entries */
679 /* Bit map identifying service level */
680 u32 cc_sl_control_map;
682 /* CA's max number of 64 entry units in the congestion control table */
683 u8 cc_max_table_entries;
685 /* begin congestion log related entries
686 * cc_log_lock protects all congestion log related data */
687 spinlock_t cc_log_lock ____cacheline_aligned_in_smp;
688 u8 threshold_cong_event_map[OPA_MAX_SLS/8];
689 u16 threshold_event_counter;
690 struct opa_hfi1_cong_log_event_internal cc_events[OPA_CONG_LOG_ELEMS];
691 int cc_log_idx; /* index for logging events */
692 int cc_mad_idx; /* index for reporting events */
693 /* end congestion log related entries */
695 struct vl_arb_cache vl_arb_cache[MAX_PRIO_TABLE];
697 /* port relative counter buffer */
699 /* port relative synthetic counter buffer */
701 /* we synthesize port_xmit_discards from several egress errors */
702 u64 port_xmit_discards;
703 u64 port_xmit_constraint_errors;
704 u64 port_rcv_constraint_errors;
705 /* count of 'link_err' interrupts from DC */
707 /* number of times link retrained successfully */
709 /* port_ltp_crc_mode is returned in 'portinfo' MADs */
710 u16 port_ltp_crc_mode;
711 /* port_crc_mode_enabled is the crc we support */
712 u8 port_crc_mode_enabled;
713 /* mgmt_allowed is also returned in 'portinfo' MADs */
715 u8 part_enforce; /* partition enforcement flags */
716 struct link_down_reason local_link_down_reason;
717 struct link_down_reason neigh_link_down_reason;
718 /* Value to be sent to link peer on LinkDown .*/
719 u8 remote_link_down_reason;
720 /* Error events that will cause a port bounce. */
721 u32 port_error_action;
724 typedef int (*rhf_rcv_function_ptr)(struct hfi1_packet *packet);
726 typedef void (*opcode_handler)(struct hfi1_packet *packet);
728 /* return values for the RHF receive functions */
729 #define RHF_RCV_CONTINUE 0 /* keep going */
730 #define RHF_RCV_DONE 1 /* stop, this packet processed */
731 #define RHF_RCV_REPROCESS 2 /* stop. retain this packet */
733 struct rcv_array_data {
741 struct send_context *sc;
744 /* 16 to directly index */
745 #define PER_VL_SEND_CONTEXTS 16
747 struct err_info_rcvport {
753 struct err_info_constraint {
760 unsigned int curr; /* current temperature */
761 unsigned int lo_lim; /* low temperature limit */
762 unsigned int hi_lim; /* high temperature limit */
763 unsigned int crit_lim; /* critical temperature limit */
764 u8 triggers; /* temperature triggers */
767 /* device data struct now contains only "general per-device" info.
768 * fields related to a physical IB port are in a hfi1_pportdata struct.
773 #define BOARD_VERS_MAX 96 /* how long the version string can be */
774 #define SERIAL_MAX 16 /* length of the serial number */
776 struct hfi1_devdata {
777 struct hfi1_ibdev verbs_dev; /* must be first */
778 struct list_head list;
779 /* pointers to related structs for this device */
780 /* pci access data structure */
781 struct pci_dev *pcidev;
782 struct cdev user_cdev;
783 struct cdev diag_cdev;
785 struct device *user_device;
786 struct device *diag_device;
787 struct device *ui_device;
789 /* mem-mapped pointer to base of chip regs */
790 u8 __iomem *kregbase;
791 /* end of mem-mapped chip space excluding sendbuf and user regs */
793 /* physical address of chip for io_remap, etc. */
794 resource_size_t physaddr;
795 /* receive context data */
796 struct hfi1_ctxtdata **rcd;
797 /* send context data */
798 struct send_context_info *send_contexts;
799 /* map hardware send contexts to software index */
801 /* spinlock for allocating and releasing send context resources */
803 /* Per VL data. Enough for all VLs but not all elements are set/used. */
804 struct per_vl_data vld[PER_VL_SEND_CONTEXTS];
805 /* seqlock for sc2vl */
806 seqlock_t sc2vl_lock;
808 /* Send Context initialization lock. */
809 spinlock_t sc_init_lock;
811 /* fields common to all SDMA engines */
813 /* default flags to last descriptor */
815 volatile __le64 *sdma_heads_dma; /* DMA'ed by chip */
816 dma_addr_t sdma_heads_phys;
817 void *sdma_pad_dma; /* DMA'ed by chip */
818 dma_addr_t sdma_pad_phys;
819 /* for deallocation */
820 size_t sdma_heads_size;
821 /* number from the chip */
822 u32 chip_sdma_engines;
825 /* lock for sdma_map */
826 spinlock_t sde_map_lock;
827 /* array of engines sized by num_sdma */
828 struct sdma_engine *per_sdma;
829 /* array of vl maps */
830 struct sdma_vl_map __rcu *sdma_map;
831 /* SPC freeze waitqueue and variable */
832 wait_queue_head_t sdma_unfreeze_wq;
833 atomic_t sdma_unfreeze_count;
836 /* hfi1_pportdata, points to array of (physical) port-specific
837 * data structs, indexed by pidx (0..n-1)
839 struct hfi1_pportdata *pport;
841 /* mem-mapped pointer to base of PIO buffers */
842 void __iomem *piobase;
844 * write-combining mem-mapped pointer to base of RcvArray
847 void __iomem *rcvarray_wc;
849 * credit return base - a per-NUMA range of DMA address that
850 * the chip will use to update the per-context free counter
852 struct credit_return_base *cr_base;
854 /* send context numbers and sizes for each type */
855 struct sc_config_sizes sc_sizes[SC_MAX];
857 u32 lcb_access_count; /* count of LCB users */
859 char *boardname; /* human readable board info */
861 /* device (not port) flags, basically device capabilities */
867 /* percpu int_counter */
868 u64 __percpu *int_counter;
869 u64 __percpu *rcv_limit;
871 /* number of receive contexts in use by the driver */
872 u32 num_rcv_contexts;
873 /* number of pio send contexts in use by the driver */
874 u32 num_send_contexts;
876 * number of ctxts available for PSM open
879 /* base receive interrupt timeout, in CSR units */
880 u32 rcv_intr_timeout_csr;
882 u64 __iomem *egrtidbase;
883 spinlock_t sendctrl_lock; /* protect changes to SendCtrl */
884 spinlock_t rcvctrl_lock; /* protect changes to RcvCtrl */
885 /* around rcd and (user ctxts) ctxt_cnt use (intr vs free) */
886 spinlock_t uctxt_lock; /* rcd and user context changes */
887 /* exclusive access to 8051 */
888 spinlock_t dc8051_lock;
889 /* exclusive access to 8051 memory */
890 spinlock_t dc8051_memlock;
891 int dc8051_timed_out; /* remember if the 8051 timed out */
893 * A page that will hold event notification bitmaps for all
894 * contexts. This page will be mapped into all processes.
896 unsigned long *events;
898 * per unit status, see also portdata statusp
899 * mapped read-only into user processes so they can get unit and
900 * IB link status cheaply
902 struct hfi1_status *status;
903 u32 freezelen; /* max length of freezemsg */
905 /* revision register shadow */
907 /* Base GUID for device (network order) */
910 /* these are the "32 bit" regs */
912 /* value we put in kr_rcvhdrsize */
914 /* number of receive contexts the chip supports */
915 u32 chip_rcv_contexts;
916 /* number of receive array entries */
917 u32 chip_rcv_array_count;
918 /* number of PIO send contexts the chip supports */
919 u32 chip_send_contexts;
920 /* number of bytes in the PIO memory buffer */
921 u32 chip_pio_mem_size;
922 /* number of bytes in the SDMA memory buffer */
923 u32 chip_sdma_mem_size;
925 /* size of each rcvegrbuffer */
928 u16 rcvegrbufsize_shift;
929 /* both sides of the PCIe link are gen3 capable */
930 u8 link_gen3_capable;
931 /* localbus width (1, 2,4,8,16,32) from config space */
933 /* localbus speed in MHz */
935 int unit; /* unit # of this chip */
936 int node; /* home node of this chip */
938 /* save these PCI fields to restore after a reset */
951 * ASCII serial number, from flash, large enough for original
952 * all digit strings, and longer serial number format
954 u8 serial[SERIAL_MAX];
955 /* human readable board version */
956 u8 boardversion[BOARD_VERS_MAX];
957 u8 lbus_info[32]; /* human readable localbus info */
958 /* chip major rev, from CceRevision */
960 /* chip minor rev, from CceRevision */
964 /* implementation code */
966 /* default link down value (poll/sleep) */
968 /* vAU of this device */
970 /* vCU of this device */
972 /* link credits of this device */
974 /* initial vl15 credits to use */
977 /* Misc small ints */
978 /* Number of physical ports available */
980 /* Lowest context number which can be used by user processes */
986 u16 rhf_offset; /* offset of RHF within receive header entry */
987 u16 irev; /* implementation revision */
988 u16 dc8051_ver; /* 8051 firmware version */
990 struct platform_config_cache pcfg_cache;
991 /* control high-level access to qsfp */
992 struct mutex qsfp_i2c_mutex;
994 struct diag_client *diag_client;
995 spinlock_t hfi1_diag_trans_lock; /* protect diag observer ops */
997 u8 psxmitwait_supported;
998 /* cycle length of PS* counters in HW (in picoseconds) */
999 u16 psxmitwait_check_rate;
1000 /* high volume overflow errors deferred to tasklet */
1001 struct tasklet_struct error_tasklet;
1002 /* per device cq worker */
1003 struct kthread_worker *worker;
1005 /* MSI-X information */
1006 struct hfi1_msix_entry *msix_entries;
1007 u32 num_msix_entries;
1009 /* INTx information */
1010 u32 requested_intx_irq; /* did we request one? */
1011 char intx_name[MAX_NAME_SIZE]; /* INTx name */
1013 /* general interrupt: mask of handled interrupts */
1014 u64 gi_mask[CCE_NUM_INT_CSRS];
1016 struct rcv_array_data rcv_entries;
1019 * 64 bit synthetic counters
1021 struct timer_list synth_stats_timer;
1027 size_t cntrnameslen;
1033 * remembered values for synthetic counters
1042 char *portcntrnames;
1043 size_t portcntrnameslen;
1045 struct hfi1_snoop_data hfi1_snoop;
1047 struct err_info_rcvport err_info_rcvport;
1048 struct err_info_constraint err_info_rcv_constraint;
1049 struct err_info_constraint err_info_xmit_constraint;
1050 u8 err_info_uncorrectable;
1051 u8 err_info_fmconfig;
1053 atomic_t drop_packet;
1056 /* receive interrupt functions */
1057 rhf_rcv_function_ptr *rhf_rcv_function_map;
1058 rhf_rcv_function_ptr normal_rhf_rcv_functions[8];
1061 * Handlers for outgoing data so that snoop/capture does not
1062 * have to have its hooks in the send path
1064 int (*process_pio_send)(struct hfi1_qp *qp, struct ahg_ib_header *ibhdr,
1065 u32 hdrwords, struct hfi1_sge_state *ss,
1066 u32 len, u32 plen, u32 dwords, u64 pbc);
1067 int (*process_dma_send)(struct hfi1_qp *qp, struct ahg_ib_header *ibhdr,
1068 u32 hdrwords, struct hfi1_sge_state *ss,
1069 u32 len, u32 plen, u32 dwords, u64 pbc);
1070 void (*pio_inline_send)(struct hfi1_devdata *dd, struct pio_buf *pbuf,
1071 u64 pbc, const void *from, size_t count);
1073 /* OUI comes from the HW. Used everywhere as 3 separate bytes. */
1077 /* Timer and counter used to detect RcvBufOvflCnt changes */
1078 struct timer_list rcverr_timer;
1081 int assigned_node_id;
1082 wait_queue_head_t event_queue;
1084 /* Save the enabled LCB error bits */
1089 /* 8051 firmware version helper */
1090 #define dc8051_ver(a, b) ((a) << 8 | (b))
1092 /* f_put_tid types */
1093 #define PT_EXPECTED 0
1095 #define PT_INVALID 2
1097 /* Private data for file operations */
1098 struct hfi1_filedata {
1099 struct hfi1_ctxtdata *uctxt;
1101 struct hfi1_user_sdma_comp_q *cq;
1102 struct hfi1_user_sdma_pkt_q *pq;
1103 /* for cpu affinity; -1 if none */
1107 extern struct list_head hfi1_dev_list;
1108 extern spinlock_t hfi1_devs_lock;
1109 struct hfi1_devdata *hfi1_lookup(int unit);
1110 extern u32 hfi1_cpulist_count;
1111 extern unsigned long *hfi1_cpulist;
1113 extern unsigned int snoop_drop_send;
1114 extern unsigned int snoop_force_capture;
1115 int hfi1_init(struct hfi1_devdata *, int);
1116 int hfi1_count_units(int *npresentp, int *nupp);
1117 int hfi1_count_active_units(void);
1119 int hfi1_diag_add(struct hfi1_devdata *);
1120 void hfi1_diag_remove(struct hfi1_devdata *);
1121 void handle_linkup_change(struct hfi1_devdata *dd, u32 linkup);
1123 void handle_user_interrupt(struct hfi1_ctxtdata *rcd);
1125 int hfi1_create_rcvhdrq(struct hfi1_devdata *, struct hfi1_ctxtdata *);
1126 int hfi1_setup_eagerbufs(struct hfi1_ctxtdata *);
1127 int hfi1_create_ctxts(struct hfi1_devdata *dd);
1128 struct hfi1_ctxtdata *hfi1_create_ctxtdata(struct hfi1_pportdata *, u32);
1129 void hfi1_init_pportdata(struct pci_dev *, struct hfi1_pportdata *,
1130 struct hfi1_devdata *, u8, u8);
1131 void hfi1_free_ctxtdata(struct hfi1_devdata *, struct hfi1_ctxtdata *);
1133 int handle_receive_interrupt(struct hfi1_ctxtdata *, int);
1134 int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *, int);
1135 int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *, int);
1137 /* receive packet handler dispositions */
1138 #define RCV_PKT_OK 0x0 /* keep going */
1139 #define RCV_PKT_LIMIT 0x1 /* stop, hit limit, start thread */
1140 #define RCV_PKT_DONE 0x2 /* stop, no more packets detected */
1142 /* calculate the current RHF address */
1143 static inline __le32 *get_rhf_addr(struct hfi1_ctxtdata *rcd)
1145 return (__le32 *)rcd->rcvhdrq + rcd->head + rcd->dd->rhf_offset;
1148 int hfi1_reset_device(int);
1150 /* return the driver's idea of the logical OPA port state */
1151 static inline u32 driver_lstate(struct hfi1_pportdata *ppd)
1153 return ppd->lstate; /* use the cached value */
1156 static inline u16 generate_jkey(kuid_t uid)
1158 return from_kuid(current_user_ns(), uid) & 0xffff;
1162 * active_egress_rate
1164 * returns the active egress rate in units of [10^6 bits/sec]
1166 static inline u32 active_egress_rate(struct hfi1_pportdata *ppd)
1168 u16 link_speed = ppd->link_speed_active;
1169 u16 link_width = ppd->link_width_active;
1172 if (link_speed == OPA_LINK_SPEED_25G)
1173 egress_rate = 25000;
1174 else /* assume OPA_LINK_SPEED_12_5G */
1175 egress_rate = 12500;
1177 switch (link_width) {
1178 case OPA_LINK_WIDTH_4X:
1181 case OPA_LINK_WIDTH_3X:
1184 case OPA_LINK_WIDTH_2X:
1188 /* assume IB_WIDTH_1X */
1198 * Returns the number of 'fabric clock cycles' to egress a packet
1199 * of length 'len' bytes, at 'rate' Mbit/s. Since the fabric clock
1200 * rate is (approximately) 805 MHz, the units of the returned value
1203 static inline u32 egress_cycles(u32 len, u32 rate)
1210 * (length) [bits] / (rate) [bits/sec]
1211 * ---------------------------------------------------
1212 * fabric_clock_period == 1 /(805 * 10^6) [cycles/sec]
1215 cycles = len * 8; /* bits */
1222 void set_link_ipg(struct hfi1_pportdata *ppd);
1223 void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn,
1224 u32 rqpn, u8 svc_type);
1225 void return_cnp(struct hfi1_ibport *ibp, struct hfi1_qp *qp, u32 remote_qpn,
1226 u32 pkey, u32 slid, u32 dlid, u8 sc5,
1227 const struct ib_grh *old_grh);
1229 #define PACKET_EGRESS_TIMEOUT 350
1230 static inline void pause_for_credit_return(struct hfi1_devdata *dd)
1232 /* Pause at least 1us, to ensure chip returns all credits */
1233 u32 usec = cclock_to_ns(dd, PACKET_EGRESS_TIMEOUT) / 1000;
1235 udelay(usec ? usec : 1);
1239 * sc_to_vlt() reverse lookup sc to vl
1243 static inline u8 sc_to_vlt(struct hfi1_devdata *dd, u8 sc5)
1248 if (sc5 >= OPA_MAX_SCS)
1252 seq = read_seqbegin(&dd->sc2vl_lock);
1253 rval = *(((u8 *)dd->sc2vl) + sc5);
1254 } while (read_seqretry(&dd->sc2vl_lock, seq));
1259 #define PKEY_MEMBER_MASK 0x8000
1260 #define PKEY_LOW_15_MASK 0x7fff
1263 * ingress_pkey_matches_entry - return 1 if the pkey matches ent (ent
1264 * being an entry from the ingress partition key table), return 0
1265 * otherwise. Use the matching criteria for ingress partition keys
1266 * specified in the OPAv1 spec., section 9.10.14.
1268 static inline int ingress_pkey_matches_entry(u16 pkey, u16 ent)
1270 u16 mkey = pkey & PKEY_LOW_15_MASK;
1271 u16 ment = ent & PKEY_LOW_15_MASK;
1275 * If pkey[15] is clear (limited partition member),
1276 * is bit 15 in the corresponding table element
1277 * clear (limited member)?
1279 if (!(pkey & PKEY_MEMBER_MASK))
1280 return !!(ent & PKEY_MEMBER_MASK);
1287 * ingress_pkey_table_search - search the entire pkey table for
1288 * an entry which matches 'pkey'. return 0 if a match is found,
1291 static int ingress_pkey_table_search(struct hfi1_pportdata *ppd, u16 pkey)
1295 for (i = 0; i < MAX_PKEY_VALUES; i++) {
1296 if (ingress_pkey_matches_entry(pkey, ppd->pkeys[i]))
1303 * ingress_pkey_table_fail - record a failure of ingress pkey validation,
1304 * i.e., increment port_rcv_constraint_errors for the port, and record
1305 * the 'error info' for this failure.
1307 static void ingress_pkey_table_fail(struct hfi1_pportdata *ppd, u16 pkey,
1310 struct hfi1_devdata *dd = ppd->dd;
1312 incr_cntr64(&ppd->port_rcv_constraint_errors);
1313 if (!(dd->err_info_rcv_constraint.status & OPA_EI_STATUS_SMASK)) {
1314 dd->err_info_rcv_constraint.status |= OPA_EI_STATUS_SMASK;
1315 dd->err_info_rcv_constraint.slid = slid;
1316 dd->err_info_rcv_constraint.pkey = pkey;
1321 * ingress_pkey_check - Return 0 if the ingress pkey is valid, return 1
1322 * otherwise. Use the criteria in the OPAv1 spec, section 9.10.14. idx
1323 * is a hint as to the best place in the partition key table to begin
1324 * searching. This function should not be called on the data path because
1325 * of performance reasons. On datapath pkey check is expected to be done
1326 * by HW and rcv_pkey_check function should be called instead.
1328 static inline int ingress_pkey_check(struct hfi1_pportdata *ppd, u16 pkey,
1329 u8 sc5, u8 idx, u16 slid)
1331 if (!(ppd->part_enforce & HFI1_PART_ENFORCE_IN))
1334 /* If SC15, pkey[0:14] must be 0x7fff */
1335 if ((sc5 == 0xf) && ((pkey & PKEY_LOW_15_MASK) != PKEY_LOW_15_MASK))
1338 /* Is the pkey = 0x0, or 0x8000? */
1339 if ((pkey & PKEY_LOW_15_MASK) == 0)
1342 /* The most likely matching pkey has index 'idx' */
1343 if (ingress_pkey_matches_entry(pkey, ppd->pkeys[idx]))
1346 /* no match - try the whole table */
1347 if (!ingress_pkey_table_search(ppd, pkey))
1351 ingress_pkey_table_fail(ppd, pkey, slid);
1356 * rcv_pkey_check - Return 0 if the ingress pkey is valid, return 1
1357 * otherwise. It only ensures pkey is vlid for QP0. This function
1358 * should be called on the data path instead of ingress_pkey_check
1359 * as on data path, pkey check is done by HW (except for QP0).
1361 static inline int rcv_pkey_check(struct hfi1_pportdata *ppd, u16 pkey,
1364 if (!(ppd->part_enforce & HFI1_PART_ENFORCE_IN))
1367 /* If SC15, pkey[0:14] must be 0x7fff */
1368 if ((sc5 == 0xf) && ((pkey & PKEY_LOW_15_MASK) != PKEY_LOW_15_MASK))
1373 ingress_pkey_table_fail(ppd, pkey, slid);
1379 /* MTU enumeration, 256-4k match IB */
1381 #define OPA_MTU_256 1
1382 #define OPA_MTU_512 2
1383 #define OPA_MTU_1024 3
1384 #define OPA_MTU_2048 4
1385 #define OPA_MTU_4096 5
1387 u32 lrh_max_header_bytes(struct hfi1_devdata *dd);
1388 int mtu_to_enum(u32 mtu, int default_if_bad);
1389 u16 enum_to_mtu(int);
1390 static inline int valid_ib_mtu(unsigned int mtu)
1392 return mtu == 256 || mtu == 512 ||
1393 mtu == 1024 || mtu == 2048 ||
1396 static inline int valid_opa_max_mtu(unsigned int mtu)
1398 return mtu >= 2048 &&
1399 (valid_ib_mtu(mtu) || mtu == 8192 || mtu == 10240);
1402 int set_mtu(struct hfi1_pportdata *);
1404 int hfi1_set_lid(struct hfi1_pportdata *, u32, u8);
1405 void hfi1_disable_after_error(struct hfi1_devdata *);
1406 int hfi1_set_uevent_bits(struct hfi1_pportdata *, const int);
1407 int hfi1_rcvbuf_validate(u32, u8, u16 *);
1409 int fm_get_table(struct hfi1_pportdata *, int, void *);
1410 int fm_set_table(struct hfi1_pportdata *, int, void *);
1412 void set_up_vl15(struct hfi1_devdata *dd, u8 vau, u16 vl15buf);
1413 void reset_link_credits(struct hfi1_devdata *dd);
1414 void assign_remote_cm_au_table(struct hfi1_devdata *dd, u8 vcu);
1416 int snoop_recv_handler(struct hfi1_packet *packet);
1417 int snoop_send_dma_handler(struct hfi1_qp *qp, struct ahg_ib_header *ibhdr,
1418 u32 hdrwords, struct hfi1_sge_state *ss, u32 len,
1419 u32 plen, u32 dwords, u64 pbc);
1420 int snoop_send_pio_handler(struct hfi1_qp *qp, struct ahg_ib_header *ibhdr,
1421 u32 hdrwords, struct hfi1_sge_state *ss, u32 len,
1422 u32 plen, u32 dwords, u64 pbc);
1423 void snoop_inline_pio_send(struct hfi1_devdata *dd, struct pio_buf *pbuf,
1424 u64 pbc, const void *from, size_t count);
1426 /* for use in system calls, where we want to know device type, etc. */
1427 #define ctxt_fp(fp) \
1428 (((struct hfi1_filedata *)(fp)->private_data)->uctxt)
1429 #define subctxt_fp(fp) \
1430 (((struct hfi1_filedata *)(fp)->private_data)->subctxt)
1431 #define tidcursor_fp(fp) \
1432 (((struct hfi1_filedata *)(fp)->private_data)->tidcursor)
1433 #define user_sdma_pkt_fp(fp) \
1434 (((struct hfi1_filedata *)(fp)->private_data)->pq)
1435 #define user_sdma_comp_fp(fp) \
1436 (((struct hfi1_filedata *)(fp)->private_data)->cq)
1438 static inline struct hfi1_devdata *dd_from_ppd(struct hfi1_pportdata *ppd)
1443 static inline struct hfi1_devdata *dd_from_dev(struct hfi1_ibdev *dev)
1445 return container_of(dev, struct hfi1_devdata, verbs_dev);
1448 static inline struct hfi1_devdata *dd_from_ibdev(struct ib_device *ibdev)
1450 return dd_from_dev(to_idev(ibdev));
1453 static inline struct hfi1_pportdata *ppd_from_ibp(struct hfi1_ibport *ibp)
1455 return container_of(ibp, struct hfi1_pportdata, ibport_data);
1458 static inline struct hfi1_ibport *to_iport(struct ib_device *ibdev, u8 port)
1460 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1461 unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */
1463 WARN_ON(pidx >= dd->num_pports);
1464 return &dd->pport[pidx].ibport_data;
1468 * Return the indexed PKEY from the port PKEY table.
1470 static inline u16 hfi1_get_pkey(struct hfi1_ibport *ibp, unsigned index)
1472 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1475 if (index >= ARRAY_SIZE(ppd->pkeys))
1478 ret = ppd->pkeys[index];
1484 * Readers of cc_state must call get_cc_state() under rcu_read_lock().
1485 * Writers of cc_state must call get_cc_state() under cc_state_lock.
1487 static inline struct cc_state *get_cc_state(struct hfi1_pportdata *ppd)
1489 return rcu_dereference(ppd->cc_state);
1493 * values for dd->flags (_device_ related flags)
1495 #define HFI1_INITTED 0x1 /* chip and driver up and initted */
1496 #define HFI1_PRESENT 0x2 /* chip accesses can be done */
1497 #define HFI1_FROZEN 0x4 /* chip in SPC freeze */
1498 #define HFI1_HAS_SDMA_TIMEOUT 0x8
1499 #define HFI1_HAS_SEND_DMA 0x10 /* Supports Send DMA */
1500 #define HFI1_FORCED_FREEZE 0x80 /* driver forced freeze mode */
1501 #define HFI1_DO_INIT_ASIC 0x100 /* This device will init the ASIC */
1503 /* IB dword length mask in PBC (lower 11 bits); same for all chips */
1504 #define HFI1_PBC_LENGTH_MASK ((1 << 11) - 1)
1507 /* ctxt_flag bit offsets */
1508 /* context has been setup */
1509 #define HFI1_CTXT_SETUP_DONE 1
1510 /* waiting for a packet to arrive */
1511 #define HFI1_CTXT_WAITING_RCV 2
1512 /* master has not finished initializing */
1513 #define HFI1_CTXT_MASTER_UNINIT 4
1514 /* waiting for an urgent packet to arrive */
1515 #define HFI1_CTXT_WAITING_URG 5
1517 /* free up any allocated data at closes */
1518 struct hfi1_devdata *hfi1_init_dd(struct pci_dev *,
1519 const struct pci_device_id *);
1520 void hfi1_free_devdata(struct hfi1_devdata *);
1521 void cc_state_reclaim(struct rcu_head *rcu);
1522 struct hfi1_devdata *hfi1_alloc_devdata(struct pci_dev *pdev, size_t extra);
1525 * Set LED override, only the two LSBs have "public" meaning, but
1526 * any non-zero value substitutes them for the Link and LinkTrain
1529 #define HFI1_LED_PHYS 1 /* Physical (linktraining) GREEN LED */
1530 #define HFI1_LED_LOG 2 /* Logical (link) YELLOW LED */
1531 void hfi1_set_led_override(struct hfi1_pportdata *ppd, unsigned int val);
1533 #define HFI1_CREDIT_RETURN_RATE (100)
1536 * The number of words for the KDETH protocol field. If this is
1537 * larger then the actual field used, then part of the payload
1538 * will be in the header.
1540 * Optimally, we want this sized so that a typical case will
1541 * use full cache lines. The typical local KDETH header would
1552 * For a 64-byte cache line, KDETH would need to be 36 bytes or 9 DWORDS
1554 #define DEFAULT_RCVHDRSIZE 9
1557 * Maximal header byte count:
1568 * We also want to maintain a cache line alignment to assist DMA'ing
1569 * of the header bytes. Round up to a good size.
1571 #define DEFAULT_RCVHDR_ENTSIZE 32
1573 int hfi1_get_user_pages(unsigned long, size_t, struct page **);
1574 void hfi1_release_user_pages(struct page **, size_t);
1576 static inline void clear_rcvhdrtail(const struct hfi1_ctxtdata *rcd)
1578 *((u64 *) rcd->rcvhdrtail_kvaddr) = 0ULL;
1581 static inline u32 get_rcvhdrtail(const struct hfi1_ctxtdata *rcd)
1584 * volatile because it's a DMA target from the chip, routine is
1585 * inlined, and don't want register caching or reordering.
1587 return (u32) le64_to_cpu(*rcd->rcvhdrtail_kvaddr);
1594 extern const char ib_hfi1_version[];
1596 int hfi1_device_create(struct hfi1_devdata *);
1597 void hfi1_device_remove(struct hfi1_devdata *);
1599 int hfi1_create_port_files(struct ib_device *ibdev, u8 port_num,
1600 struct kobject *kobj);
1601 int hfi1_verbs_register_sysfs(struct hfi1_devdata *);
1602 void hfi1_verbs_unregister_sysfs(struct hfi1_devdata *);
1603 /* Hook for sysfs read of QSFP */
1604 int qsfp_dump(struct hfi1_pportdata *ppd, char *buf, int len);
1606 int hfi1_pcie_init(struct pci_dev *, const struct pci_device_id *);
1607 void hfi1_pcie_cleanup(struct pci_dev *);
1608 int hfi1_pcie_ddinit(struct hfi1_devdata *, struct pci_dev *,
1609 const struct pci_device_id *);
1610 void hfi1_pcie_ddcleanup(struct hfi1_devdata *);
1611 void hfi1_pcie_flr(struct hfi1_devdata *);
1612 int pcie_speeds(struct hfi1_devdata *);
1613 void request_msix(struct hfi1_devdata *, u32 *, struct hfi1_msix_entry *);
1614 void hfi1_enable_intx(struct pci_dev *);
1615 void hfi1_nomsix(struct hfi1_devdata *);
1616 void restore_pci_variables(struct hfi1_devdata *dd);
1617 int do_pcie_gen3_transition(struct hfi1_devdata *dd);
1618 int parse_platform_config(struct hfi1_devdata *dd);
1619 int get_platform_config_field(struct hfi1_devdata *dd,
1620 enum platform_config_table_type_encoding table_type,
1621 int table_index, int field_index, u32 *data, u32 len);
1623 dma_addr_t hfi1_map_page(struct pci_dev *, struct page *, unsigned long,
1625 const char *get_unit_name(int unit);
1628 * Flush write combining store buffers (if present) and perform a write
1631 static inline void flush_wc(void)
1633 asm volatile("sfence" : : : "memory");
1636 void handle_eflags(struct hfi1_packet *packet);
1637 int process_receive_ib(struct hfi1_packet *packet);
1638 int process_receive_bypass(struct hfi1_packet *packet);
1639 int process_receive_error(struct hfi1_packet *packet);
1640 int kdeth_process_expected(struct hfi1_packet *packet);
1641 int kdeth_process_eager(struct hfi1_packet *packet);
1642 int process_receive_invalid(struct hfi1_packet *packet);
1644 extern rhf_rcv_function_ptr snoop_rhf_rcv_functions[8];
1646 void update_sge(struct hfi1_sge_state *ss, u32 length);
1648 /* global module parameter variables */
1649 extern unsigned int hfi1_max_mtu;
1650 extern unsigned int hfi1_cu;
1651 extern unsigned int user_credit_return_threshold;
1652 extern uint num_rcv_contexts;
1653 extern unsigned n_krcvqs;
1655 extern int krcvqsset;
1656 extern uint kdeth_qp;
1657 extern uint loopback;
1658 extern uint quick_linkup;
1659 extern uint rcv_intr_timeout;
1660 extern uint rcv_intr_count;
1661 extern uint rcv_intr_dynamic;
1662 extern ushort link_crc_mask;
1664 extern struct mutex hfi1_mutex;
1666 /* Number of seconds before our card status check... */
1667 #define STATUS_TIMEOUT 60
1669 #define DRIVER_NAME "hfi1"
1670 #define HFI1_USER_MINOR_BASE 0
1671 #define HFI1_TRACE_MINOR 127
1672 #define HFI1_DIAGPKT_MINOR 128
1673 #define HFI1_DIAG_MINOR_BASE 129
1674 #define HFI1_SNOOP_CAPTURE_BASE 200
1675 #define HFI1_NMINORS 255
1677 #define PCI_VENDOR_ID_INTEL 0x8086
1678 #define PCI_DEVICE_ID_INTEL0 0x24f0
1679 #define PCI_DEVICE_ID_INTEL1 0x24f1
1681 #define HFI1_PKT_USER_SC_INTEGRITY \
1682 (SEND_CTXT_CHECK_ENABLE_DISALLOW_NON_KDETH_PACKETS_SMASK \
1683 | SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_SMASK \
1684 | SEND_CTXT_CHECK_ENABLE_DISALLOW_GRH_SMASK)
1686 #define HFI1_PKT_KERNEL_SC_INTEGRITY \
1687 (SEND_CTXT_CHECK_ENABLE_DISALLOW_KDETH_PACKETS_SMASK)
1689 static inline u64 hfi1_pkt_default_send_ctxt_mask(struct hfi1_devdata *dd,
1692 u64 base_sc_integrity =
1693 SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1694 | SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1695 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
1696 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK
1697 | SEND_CTXT_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK
1698 | SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_TEST_SMASK
1699 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_SMALL_BYPASS_PACKETS_SMASK
1700 | SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_SMALL_IB_PACKETS_SMASK
1701 | SEND_CTXT_CHECK_ENABLE_DISALLOW_RAW_IPV6_SMASK
1702 | SEND_CTXT_CHECK_ENABLE_DISALLOW_RAW_SMASK
1703 | SEND_CTXT_CHECK_ENABLE_CHECK_BYPASS_VL_MAPPING_SMASK
1704 | SEND_CTXT_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1705 | SEND_CTXT_CHECK_ENABLE_CHECK_OPCODE_SMASK
1706 | SEND_CTXT_CHECK_ENABLE_CHECK_SLID_SMASK
1707 | SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1708 | SEND_CTXT_CHECK_ENABLE_CHECK_VL_SMASK
1709 | SEND_CTXT_CHECK_ENABLE_CHECK_ENABLE_SMASK;
1711 if (ctxt_type == SC_USER)
1712 base_sc_integrity |= HFI1_PKT_USER_SC_INTEGRITY;
1714 base_sc_integrity |= HFI1_PKT_KERNEL_SC_INTEGRITY;
1717 /* turn off send-side job key checks - A0 erratum */
1718 return base_sc_integrity &
1719 ~SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
1720 return base_sc_integrity;
1723 static inline u64 hfi1_pkt_base_sdma_integrity(struct hfi1_devdata *dd)
1725 u64 base_sdma_integrity =
1726 SEND_DMA_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1727 | SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1728 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
1729 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK
1730 | SEND_DMA_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK
1731 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_SMALL_BYPASS_PACKETS_SMASK
1732 | SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_SMALL_IB_PACKETS_SMASK
1733 | SEND_DMA_CHECK_ENABLE_DISALLOW_RAW_IPV6_SMASK
1734 | SEND_DMA_CHECK_ENABLE_DISALLOW_RAW_SMASK
1735 | SEND_DMA_CHECK_ENABLE_CHECK_BYPASS_VL_MAPPING_SMASK
1736 | SEND_DMA_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1737 | SEND_DMA_CHECK_ENABLE_CHECK_OPCODE_SMASK
1738 | SEND_DMA_CHECK_ENABLE_CHECK_SLID_SMASK
1739 | SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1740 | SEND_DMA_CHECK_ENABLE_CHECK_VL_SMASK
1741 | SEND_DMA_CHECK_ENABLE_CHECK_ENABLE_SMASK;
1744 /* turn off send-side job key checks - A0 erratum */
1745 return base_sdma_integrity &
1746 ~SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
1747 return base_sdma_integrity;
1751 * hfi1_early_err is used (only!) to print early errors before devdata is
1752 * allocated, or when dd->pcidev may not be valid, and at the tail end of
1753 * cleanup when devdata may have been freed, etc. hfi1_dev_porterr is
1754 * the same as dd_dev_err, but is used when the message really needs
1755 * the IB port# to be definitive as to what's happening..
1757 #define hfi1_early_err(dev, fmt, ...) \
1758 dev_err(dev, fmt, ##__VA_ARGS__)
1760 #define hfi1_early_info(dev, fmt, ...) \
1761 dev_info(dev, fmt, ##__VA_ARGS__)
1763 #define dd_dev_emerg(dd, fmt, ...) \
1764 dev_emerg(&(dd)->pcidev->dev, "%s: " fmt, \
1765 get_unit_name((dd)->unit), ##__VA_ARGS__)
1766 #define dd_dev_err(dd, fmt, ...) \
1767 dev_err(&(dd)->pcidev->dev, "%s: " fmt, \
1768 get_unit_name((dd)->unit), ##__VA_ARGS__)
1769 #define dd_dev_warn(dd, fmt, ...) \
1770 dev_warn(&(dd)->pcidev->dev, "%s: " fmt, \
1771 get_unit_name((dd)->unit), ##__VA_ARGS__)
1773 #define dd_dev_warn_ratelimited(dd, fmt, ...) \
1774 dev_warn_ratelimited(&(dd)->pcidev->dev, "%s: " fmt, \
1775 get_unit_name((dd)->unit), ##__VA_ARGS__)
1777 #define dd_dev_info(dd, fmt, ...) \
1778 dev_info(&(dd)->pcidev->dev, "%s: " fmt, \
1779 get_unit_name((dd)->unit), ##__VA_ARGS__)
1781 #define hfi1_dev_porterr(dd, port, fmt, ...) \
1782 dev_err(&(dd)->pcidev->dev, "%s: IB%u:%u " fmt, \
1783 get_unit_name((dd)->unit), (dd)->unit, (port), \
1787 * this is used for formatting hw error messages...
1789 struct hfi1_hwerror_msgs {
1796 void hfi1_format_hwerrors(u64 hwerrs,
1797 const struct hfi1_hwerror_msgs *hwerrmsgs,
1798 size_t nhwerrmsgs, char *msg, size_t lmsg);
1800 #define USER_OPCODE_CHECK_VAL 0xC0
1801 #define USER_OPCODE_CHECK_MASK 0xC0
1802 #define OPCODE_CHECK_VAL_DISABLED 0x0
1803 #define OPCODE_CHECK_MASK_DISABLED 0x0
1805 static inline void hfi1_reset_cpu_counters(struct hfi1_devdata *dd)
1807 struct hfi1_pportdata *ppd;
1810 dd->z_int_counter = get_all_cpu_total(dd->int_counter);
1811 dd->z_rcv_limit = get_all_cpu_total(dd->rcv_limit);
1813 ppd = (struct hfi1_pportdata *)(dd + 1);
1814 for (i = 0; i < dd->num_pports; i++, ppd++) {
1815 ppd->ibport_data.z_rc_acks =
1816 get_all_cpu_total(ppd->ibport_data.rc_acks);
1817 ppd->ibport_data.z_rc_qacks =
1818 get_all_cpu_total(ppd->ibport_data.rc_qacks);
1822 /* Control LED state */
1823 static inline void setextled(struct hfi1_devdata *dd, u32 on)
1826 write_csr(dd, DCC_CFG_LED_CNTRL, 0x1F);
1828 write_csr(dd, DCC_CFG_LED_CNTRL, 0x10);
1831 int hfi1_tempsense_rd(struct hfi1_devdata *dd, struct hfi1_temp *temp);
1833 #endif /* _HFI1_KERNEL_H */