kernel/drivers/staging/mt29f_spinand/mt29f_spinand.h

   1 /*-
   2  * Copyright 2013 Broadcom Corporation
   3  *
   4  * Copyright (c) 2009-2010 Micron Technology, Inc.
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * Henry Pan <hspan@micron.com>
  16  *
  17  * based on nand.h
  18  */
  19 #ifndef __LINUX_MTD_SPI_NAND_H
  20 #define __LINUX_MTD_SPI_NAND_H
  21
  22 #include <linux/wait.h>
  23 #include <linux/spinlock.h>
  24 #include <linux/mtd/mtd.h>
  25
  26 /* cmd */
  27 #define CMD_READ                        0x13
  28 #define CMD_READ_RDM                    0x03
  29 #define CMD_PROG_PAGE_CLRCACHE          0x02
  30 #define CMD_PROG_PAGE                   0x84
  31 #define CMD_PROG_PAGE_EXC               0x10
  32 #define CMD_ERASE_BLK                   0xd8
  33 #define CMD_WR_ENABLE                   0x06
  34 #define CMD_WR_DISABLE                  0x04
  35 #define CMD_READ_ID                     0x9f
  36 #define CMD_RESET                       0xff
  37 #define CMD_READ_REG                    0x0f
  38 #define CMD_WRITE_REG                   0x1f
  39
  40 /* feature/ status reg */
  41 #define REG_BLOCK_LOCK                  0xa0
  42 #define REG_OTP                         0xb0
  43 #define REG_STATUS                      0xc0/* timing */
  44
  45 /* status */
  46 #define STATUS_OIP_MASK                 0x01
  47 #define STATUS_READY                    (0 << 0)
  48 #define STATUS_BUSY                     (1 << 0)
  49
  50 #define STATUS_E_FAIL_MASK              0x04
  51 #define STATUS_E_FAIL                   (1 << 2)
  52
  53 #define STATUS_P_FAIL_MASK              0x08
  54 #define STATUS_P_FAIL                   (1 << 3)
  55
  56 #define STATUS_ECC_MASK                 0x30
  57 #define STATUS_ECC_1BIT_CORRECTED       (1 << 4)
  58 #define STATUS_ECC_ERROR                (2 << 4)
  59 #define STATUS_ECC_RESERVED             (3 << 4)
  60
  61 /*ECC enable defines*/
  62 #define OTP_ECC_MASK                    0x10
  63 #define OTP_ECC_OFF                     0
  64 #define OTP_ECC_ON                      1
  65
  66 #define ECC_DISABLED
  67 #define ECC_IN_NAND
  68 #define ECC_SOFT
  69
  70 /* block lock */
  71 #define BL_ALL_LOCKED      0x38
  72 #define BL_1_2_LOCKED      0x30
  73 #define BL_1_4_LOCKED      0x28
  74 #define BL_1_8_LOCKED      0x20
  75 #define BL_1_16_LOCKED     0x18
  76 #define BL_1_32_LOCKED     0x10
  77 #define BL_1_64_LOCKED     0x08
  78 #define BL_ALL_UNLOCKED    0
  79
  80 struct spinand_info {
  81         struct nand_ecclayout *ecclayout;
  82         struct spi_device *spi;
  83         void *priv;
  84 };
  85
  86 struct spinand_state {
  87         uint32_t        col;
  88         uint32_t        row;
  89         int             buf_ptr;
  90         u8              *buf;
  91 };
  92
  93 struct spinand_cmd {
  94         u8              cmd;
  95         u32             n_addr;         /* Number of address */
  96         u8              addr[3];        /* Reg Offset */
  97         u32             n_dummy;        /* Dummy use */
  98         u32             n_tx;           /* Number of tx bytes */
  99         u8              *tx_buf;        /* Tx buf */
 100         u32             n_rx;           /* Number of rx bytes */
 101         u8              *rx_buf;        /* Rx buf */
 102 };
 103
 104 extern int spinand_mtd(struct mtd_info *mtd);
 105 extern void spinand_mtd_release(struct mtd_info *mtd);
 106
 107 #endif /* __LINUX_MTD_SPI_NAND_H */